diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-11-17 08:42:28 -0500 |
---|---|---|
committer | Vinod Koul <vinod.koul@intel.com> | 2014-12-22 01:59:07 -0500 |
commit | 78ea4fe7e7a9395498c45098dc7339fce23fa7e0 (patch) | |
tree | 8d686c859f8e1c9764e8b7dfb741f8ecc9656472 | |
parent | e22aec0f0072164e7a2243059715c92ff56016c6 (diff) |
dmaengine: omap: Split device_control
Split the device_control callback of the TI OMAP DMA driver to make use
of the newly introduced callbacks, that will eventually be used to retrieve
slave capabilities.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r-- | drivers/dma/omap-dma.c | 51 |
1 files changed, 15 insertions, 36 deletions
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c index ca4645c27634..c84fe4a35022 100644 --- a/drivers/dma/omap-dma.c +++ b/drivers/dma/omap-dma.c | |||
@@ -948,8 +948,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic( | |||
948 | return vchan_tx_prep(&c->vc, &d->vd, flags); | 948 | return vchan_tx_prep(&c->vc, &d->vd, flags); |
949 | } | 949 | } |
950 | 950 | ||
951 | static int omap_dma_slave_config(struct omap_chan *c, struct dma_slave_config *cfg) | 951 | static int omap_dma_slave_config(struct dma_chan *chan, struct dma_slave_config *cfg) |
952 | { | 952 | { |
953 | struct omap_chan *c = to_omap_dma_chan(chan); | ||
954 | |||
953 | if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES || | 955 | if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES || |
954 | cfg->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES) | 956 | cfg->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES) |
955 | return -EINVAL; | 957 | return -EINVAL; |
@@ -959,8 +961,9 @@ static int omap_dma_slave_config(struct omap_chan *c, struct dma_slave_config *c | |||
959 | return 0; | 961 | return 0; |
960 | } | 962 | } |
961 | 963 | ||
962 | static int omap_dma_terminate_all(struct omap_chan *c) | 964 | static int omap_dma_terminate_all(struct dma_chan *chan) |
963 | { | 965 | { |
966 | struct omap_chan *c = to_omap_dma_chan(chan); | ||
964 | struct omap_dmadev *d = to_omap_dma_dev(c->vc.chan.device); | 967 | struct omap_dmadev *d = to_omap_dma_dev(c->vc.chan.device); |
965 | unsigned long flags; | 968 | unsigned long flags; |
966 | LIST_HEAD(head); | 969 | LIST_HEAD(head); |
@@ -996,8 +999,10 @@ static int omap_dma_terminate_all(struct omap_chan *c) | |||
996 | return 0; | 999 | return 0; |
997 | } | 1000 | } |
998 | 1001 | ||
999 | static int omap_dma_pause(struct omap_chan *c) | 1002 | static int omap_dma_pause(struct dma_chan *chan) |
1000 | { | 1003 | { |
1004 | struct omap_chan *c = to_omap_dma_chan(chan); | ||
1005 | |||
1001 | /* Pause/Resume only allowed with cyclic mode */ | 1006 | /* Pause/Resume only allowed with cyclic mode */ |
1002 | if (!c->cyclic) | 1007 | if (!c->cyclic) |
1003 | return -EINVAL; | 1008 | return -EINVAL; |
@@ -1010,8 +1015,10 @@ static int omap_dma_pause(struct omap_chan *c) | |||
1010 | return 0; | 1015 | return 0; |
1011 | } | 1016 | } |
1012 | 1017 | ||
1013 | static int omap_dma_resume(struct omap_chan *c) | 1018 | static int omap_dma_resume(struct dma_chan *chan) |
1014 | { | 1019 | { |
1020 | struct omap_chan *c = to_omap_dma_chan(chan); | ||
1021 | |||
1015 | /* Pause/Resume only allowed with cyclic mode */ | 1022 | /* Pause/Resume only allowed with cyclic mode */ |
1016 | if (!c->cyclic) | 1023 | if (!c->cyclic) |
1017 | return -EINVAL; | 1024 | return -EINVAL; |
@@ -1029,37 +1036,6 @@ static int omap_dma_resume(struct omap_chan *c) | |||
1029 | return 0; | 1036 | return 0; |
1030 | } | 1037 | } |
1031 | 1038 | ||
1032 | static int omap_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, | ||
1033 | unsigned long arg) | ||
1034 | { | ||
1035 | struct omap_chan *c = to_omap_dma_chan(chan); | ||
1036 | int ret; | ||
1037 | |||
1038 | switch (cmd) { | ||
1039 | case DMA_SLAVE_CONFIG: | ||
1040 | ret = omap_dma_slave_config(c, (struct dma_slave_config *)arg); | ||
1041 | break; | ||
1042 | |||
1043 | case DMA_TERMINATE_ALL: | ||
1044 | ret = omap_dma_terminate_all(c); | ||
1045 | break; | ||
1046 | |||
1047 | case DMA_PAUSE: | ||
1048 | ret = omap_dma_pause(c); | ||
1049 | break; | ||
1050 | |||
1051 | case DMA_RESUME: | ||
1052 | ret = omap_dma_resume(c); | ||
1053 | break; | ||
1054 | |||
1055 | default: | ||
1056 | ret = -ENXIO; | ||
1057 | break; | ||
1058 | } | ||
1059 | |||
1060 | return ret; | ||
1061 | } | ||
1062 | |||
1063 | static int omap_dma_chan_init(struct omap_dmadev *od, int dma_sig) | 1039 | static int omap_dma_chan_init(struct omap_dmadev *od, int dma_sig) |
1064 | { | 1040 | { |
1065 | struct omap_chan *c; | 1041 | struct omap_chan *c; |
@@ -1136,7 +1112,10 @@ static int omap_dma_probe(struct platform_device *pdev) | |||
1136 | od->ddev.device_issue_pending = omap_dma_issue_pending; | 1112 | od->ddev.device_issue_pending = omap_dma_issue_pending; |
1137 | od->ddev.device_prep_slave_sg = omap_dma_prep_slave_sg; | 1113 | od->ddev.device_prep_slave_sg = omap_dma_prep_slave_sg; |
1138 | od->ddev.device_prep_dma_cyclic = omap_dma_prep_dma_cyclic; | 1114 | od->ddev.device_prep_dma_cyclic = omap_dma_prep_dma_cyclic; |
1139 | od->ddev.device_control = omap_dma_control; | 1115 | od->ddev.device_config = omap_dma_config; |
1116 | od->ddev.device_pause = omap_dma_pause; | ||
1117 | od->ddev.device_resume = omap_dma_resume; | ||
1118 | od->ddev.device_terminate_all = omap_dma_terminate_all; | ||
1140 | od->ddev.device_slave_caps = omap_dma_device_slave_caps; | 1119 | od->ddev.device_slave_caps = omap_dma_device_slave_caps; |
1141 | od->ddev.dev = &pdev->dev; | 1120 | od->ddev.dev = &pdev->dev; |
1142 | INIT_LIST_HEAD(&od->ddev.channels); | 1121 | INIT_LIST_HEAD(&od->ddev.channels); |