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authorAlexander Popov <a13xp0p0v88@gmail.com>2014-04-23 09:53:23 -0400
committerVinod Koul <vinod.koul@intel.com>2014-05-02 13:06:21 -0400
commit78a4f0367a1de89c625237fc5524f4ef4535f031 (patch)
tree48a297a150a650d83b820f4e212aa538a55284b3
parent2a5ecb7918d72183f0292266026d077cd2c8d3ed (diff)
dma: mpc512x: reorder mpc8308 specific instructions
Concentrate the specific code for MPC8308 in the 'if' branch and handle MPC512x in the 'else' branch. This modification only reorders instructions but doesn't change behaviour. Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--drivers/dma/mpc512x_dma.c42
1 files changed, 25 insertions, 17 deletions
diff --git a/drivers/dma/mpc512x_dma.c b/drivers/dma/mpc512x_dma.c
index 448750da4402..2ce248b552dc 100644
--- a/drivers/dma/mpc512x_dma.c
+++ b/drivers/dma/mpc512x_dma.c
@@ -52,9 +52,17 @@
52#define MPC_DMA_DESCRIPTORS 64 52#define MPC_DMA_DESCRIPTORS 64
53 53
54/* Macro definitions */ 54/* Macro definitions */
55#define MPC_DMA_CHANNELS 64
56#define MPC_DMA_TCD_OFFSET 0x1000 55#define MPC_DMA_TCD_OFFSET 0x1000
57 56
57/*
58 * Maximum channel counts for individual hardware variants
59 * and the maximum channel count over all supported controllers,
60 * used for data structure size
61 */
62#define MPC8308_DMACHAN_MAX 16
63#define MPC512x_DMACHAN_MAX 64
64#define MPC_DMA_CHANNELS 64
65
58/* Arbitration mode of group and channel */ 66/* Arbitration mode of group and channel */
59#define MPC_DMA_DMACR_EDCG (1 << 31) 67#define MPC_DMA_DMACR_EDCG (1 << 31)
60#define MPC_DMA_DMACR_ERGA (1 << 3) 68#define MPC_DMA_DMACR_ERGA (1 << 3)
@@ -710,10 +718,10 @@ static int mpc_dma_probe(struct platform_device *op)
710 718
711 dma = &mdma->dma; 719 dma = &mdma->dma;
712 dma->dev = dev; 720 dma->dev = dev;
713 if (!mdma->is_mpc8308) 721 if (mdma->is_mpc8308)
714 dma->chancnt = MPC_DMA_CHANNELS; 722 dma->chancnt = MPC8308_DMACHAN_MAX;
715 else 723 else
716 dma->chancnt = 16; /* MPC8308 DMA has only 16 channels */ 724 dma->chancnt = MPC512x_DMACHAN_MAX;
717 dma->device_alloc_chan_resources = mpc_dma_alloc_chan_resources; 725 dma->device_alloc_chan_resources = mpc_dma_alloc_chan_resources;
718 dma->device_free_chan_resources = mpc_dma_free_chan_resources; 726 dma->device_free_chan_resources = mpc_dma_free_chan_resources;
719 dma->device_issue_pending = mpc_dma_issue_pending; 727 dma->device_issue_pending = mpc_dma_issue_pending;
@@ -747,7 +755,19 @@ static int mpc_dma_probe(struct platform_device *op)
747 * - Round-robin group arbitration, 755 * - Round-robin group arbitration,
748 * - Round-robin channel arbitration. 756 * - Round-robin channel arbitration.
749 */ 757 */
750 if (!mdma->is_mpc8308) { 758 if (mdma->is_mpc8308) {
759 /* MPC8308 has 16 channels and lacks some registers */
760 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA);
761
762 /* enable snooping */
763 out_be32(&mdma->regs->dmagpor, MPC_DMA_DMAGPOR_SNOOP_ENABLE);
764 /* Disable error interrupts */
765 out_be32(&mdma->regs->dmaeeil, 0);
766
767 /* Clear interrupts status */
768 out_be32(&mdma->regs->dmaintl, 0xFFFF);
769 out_be32(&mdma->regs->dmaerrl, 0xFFFF);
770 } else {
751 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG | 771 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG |
752 MPC_DMA_DMACR_ERGA | MPC_DMA_DMACR_ERCA); 772 MPC_DMA_DMACR_ERGA | MPC_DMA_DMACR_ERCA);
753 773
@@ -768,18 +788,6 @@ static int mpc_dma_probe(struct platform_device *op)
768 /* Route interrupts to IPIC */ 788 /* Route interrupts to IPIC */
769 out_be32(&mdma->regs->dmaihsa, 0); 789 out_be32(&mdma->regs->dmaihsa, 0);
770 out_be32(&mdma->regs->dmailsa, 0); 790 out_be32(&mdma->regs->dmailsa, 0);
771 } else {
772 /* MPC8308 has 16 channels and lacks some registers */
773 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA);
774
775 /* enable snooping */
776 out_be32(&mdma->regs->dmagpor, MPC_DMA_DMAGPOR_SNOOP_ENABLE);
777 /* Disable error interrupts */
778 out_be32(&mdma->regs->dmaeeil, 0);
779
780 /* Clear interrupts status */
781 out_be32(&mdma->regs->dmaintl, 0xFFFF);
782 out_be32(&mdma->regs->dmaerrl, 0xFFFF);
783 } 791 }
784 792
785 /* Register DMA engine */ 793 /* Register DMA engine */