diff options
author | Cyril Chemparathy <cyril@ti.com> | 2010-05-07 17:06:38 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-05-13 13:05:29 -0400 |
commit | 779b0d53ca41873d59225eb776c5d4493a0abd0f (patch) | |
tree | cf47ab5746105d9116e6c9e33f7ad142ff726d7a | |
parent | bd808947040ba53b2b0e52dde598a9414fb27bba (diff) |
Davinci: pinmux - use ioremap()
This patch modifies the pinmux implementation so as to ioremap() the pinmux
register area on first use.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r-- | arch/arm/mach-davinci/da830.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/da850.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm355.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm365.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm644x.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/common.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/mux.c | 17 |
8 files changed, 19 insertions, 14 deletions
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 2c84f0702088..94fe971f276a 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c | |||
@@ -1191,6 +1191,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = { | |||
1191 | .cpu_clks = da830_clks, | 1191 | .cpu_clks = da830_clks, |
1192 | .psc_bases = da830_psc_bases, | 1192 | .psc_bases = da830_psc_bases, |
1193 | .psc_bases_num = ARRAY_SIZE(da830_psc_bases), | 1193 | .psc_bases_num = ARRAY_SIZE(da830_psc_bases), |
1194 | .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, | ||
1194 | .pinmux_pins = da830_pins, | 1195 | .pinmux_pins = da830_pins, |
1195 | .pinmux_pins_num = ARRAY_SIZE(da830_pins), | 1196 | .pinmux_pins_num = ARRAY_SIZE(da830_pins), |
1196 | .intc_base = DA8XX_CP_INTC_BASE, | 1197 | .intc_base = DA8XX_CP_INTC_BASE, |
@@ -1213,7 +1214,5 @@ void __init da830_init(void) | |||
1213 | if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) | 1214 | if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) |
1214 | return; | 1215 | return; |
1215 | 1216 | ||
1216 | davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); | ||
1217 | |||
1218 | davinci_common_init(&davinci_soc_info_da830); | 1217 | davinci_common_init(&davinci_soc_info_da830); |
1219 | } | 1218 | } |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 6f5ea2aa1c4a..74d4e49d4064 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -1076,6 +1076,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = { | |||
1076 | .cpu_clks = da850_clks, | 1076 | .cpu_clks = da850_clks, |
1077 | .psc_bases = da850_psc_bases, | 1077 | .psc_bases = da850_psc_bases, |
1078 | .psc_bases_num = ARRAY_SIZE(da850_psc_bases), | 1078 | .psc_bases_num = ARRAY_SIZE(da850_psc_bases), |
1079 | .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120, | ||
1079 | .pinmux_pins = da850_pins, | 1080 | .pinmux_pins = da850_pins, |
1080 | .pinmux_pins_num = ARRAY_SIZE(da850_pins), | 1081 | .pinmux_pins_num = ARRAY_SIZE(da850_pins), |
1081 | .intc_base = DA8XX_CP_INTC_BASE, | 1082 | .intc_base = DA8XX_CP_INTC_BASE, |
@@ -1106,8 +1107,6 @@ void __init da850_init(void) | |||
1106 | if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module")) | 1107 | if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module")) |
1107 | return; | 1108 | return; |
1108 | 1109 | ||
1109 | davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); | ||
1110 | |||
1111 | davinci_common_init(&davinci_soc_info_da850); | 1110 | davinci_common_init(&davinci_soc_info_da850); |
1112 | 1111 | ||
1113 | /* | 1112 | /* |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 5ab39f6360f9..383478116ef5 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -844,7 +844,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = { | |||
844 | .cpu_clks = dm355_clks, | 844 | .cpu_clks = dm355_clks, |
845 | .psc_bases = dm355_psc_bases, | 845 | .psc_bases = dm355_psc_bases, |
846 | .psc_bases_num = ARRAY_SIZE(dm355_psc_bases), | 846 | .psc_bases_num = ARRAY_SIZE(dm355_psc_bases), |
847 | .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), | 847 | .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, |
848 | .pinmux_pins = dm355_pins, | 848 | .pinmux_pins = dm355_pins, |
849 | .pinmux_pins_num = ARRAY_SIZE(dm355_pins), | 849 | .pinmux_pins_num = ARRAY_SIZE(dm355_pins), |
850 | .intc_base = DAVINCI_ARM_INTC_BASE, | 850 | .intc_base = DAVINCI_ARM_INTC_BASE, |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index be340ed1b707..e5e3dce4cfba 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -1049,7 +1049,7 @@ static struct davinci_soc_info davinci_soc_info_dm365 = { | |||
1049 | .cpu_clks = dm365_clks, | 1049 | .cpu_clks = dm365_clks, |
1050 | .psc_bases = dm365_psc_bases, | 1050 | .psc_bases = dm365_psc_bases, |
1051 | .psc_bases_num = ARRAY_SIZE(dm365_psc_bases), | 1051 | .psc_bases_num = ARRAY_SIZE(dm365_psc_bases), |
1052 | .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), | 1052 | .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, |
1053 | .pinmux_pins = dm365_pins, | 1053 | .pinmux_pins = dm365_pins, |
1054 | .pinmux_pins_num = ARRAY_SIZE(dm365_pins), | 1054 | .pinmux_pins_num = ARRAY_SIZE(dm365_pins), |
1055 | .intc_base = DAVINCI_ARM_INTC_BASE, | 1055 | .intc_base = DAVINCI_ARM_INTC_BASE, |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index d3aa1f7d0ab8..7ad15208b841 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -735,7 +735,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = { | |||
735 | .cpu_clks = dm644x_clks, | 735 | .cpu_clks = dm644x_clks, |
736 | .psc_bases = dm644x_psc_bases, | 736 | .psc_bases = dm644x_psc_bases, |
737 | .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases), | 737 | .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases), |
738 | .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), | 738 | .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, |
739 | .pinmux_pins = dm644x_pins, | 739 | .pinmux_pins = dm644x_pins, |
740 | .pinmux_pins_num = ARRAY_SIZE(dm644x_pins), | 740 | .pinmux_pins_num = ARRAY_SIZE(dm644x_pins), |
741 | .intc_base = DAVINCI_ARM_INTC_BASE, | 741 | .intc_base = DAVINCI_ARM_INTC_BASE, |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index e0153b30f446..94045656cff6 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -819,7 +819,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = { | |||
819 | .cpu_clks = dm646x_clks, | 819 | .cpu_clks = dm646x_clks, |
820 | .psc_bases = dm646x_psc_bases, | 820 | .psc_bases = dm646x_psc_bases, |
821 | .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases), | 821 | .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases), |
822 | .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE), | 822 | .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, |
823 | .pinmux_pins = dm646x_pins, | 823 | .pinmux_pins = dm646x_pins, |
824 | .pinmux_pins_num = ARRAY_SIZE(dm646x_pins), | 824 | .pinmux_pins_num = ARRAY_SIZE(dm646x_pins), |
825 | .intc_base = DAVINCI_ARM_INTC_BASE, | 825 | .intc_base = DAVINCI_ARM_INTC_BASE, |
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 005f6242e0ba..2e072482c119 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h | |||
@@ -51,7 +51,7 @@ struct davinci_soc_info { | |||
51 | struct clk_lookup *cpu_clks; | 51 | struct clk_lookup *cpu_clks; |
52 | u32 *psc_bases; | 52 | u32 *psc_bases; |
53 | unsigned long psc_bases_num; | 53 | unsigned long psc_bases_num; |
54 | void __iomem *pinmux_base; | 54 | u32 pinmux_base; |
55 | const struct mux_config *pinmux_pins; | 55 | const struct mux_config *pinmux_pins; |
56 | unsigned long pinmux_pins_num; | 56 | unsigned long pinmux_pins_num; |
57 | u32 intc_base; | 57 | u32 intc_base; |
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c index e9d530a8f79f..f34a8dcdae2b 100644 --- a/arch/arm/mach-davinci/mux.c +++ b/arch/arm/mach-davinci/mux.c | |||
@@ -22,6 +22,8 @@ | |||
22 | #include <mach/mux.h> | 22 | #include <mach/mux.h> |
23 | #include <mach/common.h> | 23 | #include <mach/common.h> |
24 | 24 | ||
25 | static void __iomem *pinmux_base; | ||
26 | |||
25 | /* | 27 | /* |
26 | * Sets the DAVINCI MUX register based on the table | 28 | * Sets the DAVINCI MUX register based on the table |
27 | */ | 29 | */ |
@@ -29,14 +31,19 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) | |||
29 | { | 31 | { |
30 | static DEFINE_SPINLOCK(mux_spin_lock); | 32 | static DEFINE_SPINLOCK(mux_spin_lock); |
31 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 33 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
32 | void __iomem *base = soc_info->pinmux_base; | ||
33 | unsigned long flags; | 34 | unsigned long flags; |
34 | const struct mux_config *cfg; | 35 | const struct mux_config *cfg; |
35 | unsigned int reg_orig = 0, reg = 0; | 36 | unsigned int reg_orig = 0, reg = 0; |
36 | unsigned int mask, warn = 0; | 37 | unsigned int mask, warn = 0; |
37 | 38 | ||
38 | if (!soc_info->pinmux_pins) | 39 | if (WARN_ON(!soc_info->pinmux_pins)) |
39 | BUG(); | 40 | return -ENODEV; |
41 | |||
42 | if (!pinmux_base) { | ||
43 | pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K); | ||
44 | if (WARN_ON(!pinmux_base)) | ||
45 | return -ENOMEM; | ||
46 | } | ||
40 | 47 | ||
41 | if (index >= soc_info->pinmux_pins_num) { | 48 | if (index >= soc_info->pinmux_pins_num) { |
42 | printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", | 49 | printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", |
@@ -57,7 +64,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) | |||
57 | unsigned tmp1, tmp2; | 64 | unsigned tmp1, tmp2; |
58 | 65 | ||
59 | spin_lock_irqsave(&mux_spin_lock, flags); | 66 | spin_lock_irqsave(&mux_spin_lock, flags); |
60 | reg_orig = __raw_readl(base + cfg->mux_reg); | 67 | reg_orig = __raw_readl(pinmux_base + cfg->mux_reg); |
61 | 68 | ||
62 | mask = (cfg->mask << cfg->mask_offset); | 69 | mask = (cfg->mask << cfg->mask_offset); |
63 | tmp1 = reg_orig & mask; | 70 | tmp1 = reg_orig & mask; |
@@ -69,7 +76,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index) | |||
69 | if (tmp1 != tmp2) | 76 | if (tmp1 != tmp2) |
70 | warn = 1; | 77 | warn = 1; |
71 | 78 | ||
72 | __raw_writel(reg, base + cfg->mux_reg); | 79 | __raw_writel(reg, pinmux_base + cfg->mux_reg); |
73 | spin_unlock_irqrestore(&mux_spin_lock, flags); | 80 | spin_unlock_irqrestore(&mux_spin_lock, flags); |
74 | } | 81 | } |
75 | 82 | ||