diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-02-20 20:38:27 -0500 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-03-29 04:18:36 -0400 |
commit | 76f14d0a70a664d15243b065d1926a54677b3449 (patch) | |
tree | ded663107f607ae97961642dda8c06d6b4229bb7 | |
parent | c08f4252a66bd89751bbba4c6fdfb181dc269486 (diff) |
ARM: sunxi: dt: Add A10 UARTs to the dtsi.
The Allwinner A10 SoC has 8 available UARTs, which is 6 more than on the
A13, so add the missing UARTs to the sun4i-a10 dtsi.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Emilio López <emilio@elopez.com.ar>
-rw-r--r-- | arch/arm/boot/dts/sun4i-a10.dtsi | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index b605672424ac..68a27fc4491f 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi | |||
@@ -57,5 +57,55 @@ | |||
57 | clocks = <&osc>; | 57 | clocks = <&osc>; |
58 | status = "disabled"; | 58 | status = "disabled"; |
59 | }; | 59 | }; |
60 | |||
61 | uart2: serial@01c28800 { | ||
62 | compatible = "snps,dw-apb-uart"; | ||
63 | reg = <0x01c28800 0x400>; | ||
64 | interrupts = <3>; | ||
65 | reg-shift = <2>; | ||
66 | reg-io-width = <4>; | ||
67 | clocks = <&osc>; | ||
68 | status = "disabled"; | ||
69 | }; | ||
70 | |||
71 | uart4: serial@01c29000 { | ||
72 | compatible = "snps,dw-apb-uart"; | ||
73 | reg = <0x01c29000 0x400>; | ||
74 | interrupts = <17>; | ||
75 | reg-shift = <2>; | ||
76 | reg-io-width = <4>; | ||
77 | clocks = <&osc>; | ||
78 | status = "disabled"; | ||
79 | }; | ||
80 | |||
81 | uart5: serial@01c29400 { | ||
82 | compatible = "snps,dw-apb-uart"; | ||
83 | reg = <0x01c29400 0x400>; | ||
84 | interrupts = <18>; | ||
85 | reg-shift = <2>; | ||
86 | reg-io-width = <4>; | ||
87 | clocks = <&osc>; | ||
88 | status = "disabled"; | ||
89 | }; | ||
90 | |||
91 | uart6: serial@01c29800 { | ||
92 | compatible = "snps,dw-apb-uart"; | ||
93 | reg = <0x01c29800 0x400>; | ||
94 | interrupts = <19>; | ||
95 | reg-shift = <2>; | ||
96 | reg-io-width = <4>; | ||
97 | clocks = <&osc>; | ||
98 | status = "disabled"; | ||
99 | }; | ||
100 | |||
101 | uart7: serial@01c29c00 { | ||
102 | compatible = "snps,dw-apb-uart"; | ||
103 | reg = <0x01c29c00 0x400>; | ||
104 | interrupts = <20>; | ||
105 | reg-shift = <2>; | ||
106 | reg-io-width = <4>; | ||
107 | clocks = <&osc>; | ||
108 | status = "disabled"; | ||
109 | }; | ||
60 | }; | 110 | }; |
61 | }; | 111 | }; |