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authorEmil Medve <Emilian.Medve@freescale.com>2014-11-05 10:18:53 -0500
committerScott Wood <scottwood@freescale.com>2014-11-13 00:53:44 -0500
commit76a4f03f3ec7221112c20d053a1233540a601473 (patch)
tree02176c34d9abc5033f054112e23d2065f64c5ce3
parent5f3af4008bfcb388a3193fd871e1b2e94ba4b09c (diff)
dt/bindings: Introduce the FSL QorIQ DPAA QMan
The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan supports queuing and QoS scheduling of frames to CPUs, network interfaces and DPAA logic modules, maintains packet ordering within flows. Besides providing flow-level queuing, is also responsible for congestion management functions such as RED/WRED, congestion notifications and tail discards. This binding covers the CCSR space programming model Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I3acb223893e42003d6c9dc061db568ec0b10d29b Signed-off-by: Scott Wood <scottwood@freescale.com>
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1QorIQ DPAA Queue Manager Device Tree Binding
2
3Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
4
5CONTENTS
6
7 - QMan Node
8 - QMan Private Memory Nodes
9 - Example
10
11QMan Node
12
13The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
14supports queuing and QoS scheduling of frames to CPUs, network interfaces and
15DPAA logic modules, maintains packet ordering within flows. Besides providing
16flow-level queuing, is also responsible for congestion management functions such
17as RED/WRED, congestion notifications and tail discards. This binding covers the
18CCSR space programming model
19
20PROPERTIES
21
22- compatible
23 Usage: Required
24 Value type: <stringlist>
25 Definition: Must include "fsl,qman"
26 May include "fsl,<SoC>-qman"
27
28- reg
29 Usage: Required
30 Value type: <prop-encoded-array>
31 Definition: Registers region within the CCSR address space
32
33The QMan revision information is located in the QMAN_IP_REV_1/2 registers which
34are located at offsets 0xbf8 and 0xbfc
35
36- interrupts
37 Usage: Required
38 Value type: <prop-encoded-array>
39 Definition: Standard property. The error interrupt
40
41- fsl,liodn
42 Usage: See pamu.txt
43 Value type: <prop-encoded-array>
44 Definition: PAMU property used for static LIODN assignment
45
46- fsl,iommu-parent
47 Usage: See pamu.txt
48 Value type: <phandle>
49 Definition: PAMU property used for dynamic LIODN assignment
50
51 For additional details about the PAMU/LIODN binding(s) see pamu.txt
52
53- clocks
54 Usage: See clock-bindings.txt and qoriq-clock.txt
55 Value type: <prop-encoded-array>
56 Definition: Reference input clock. Its frequency is half of the
57 platform clock
58
59Devices connected to a QMan instance via Direct Connect Portals (DCP) must link
60to the respective QMan instance
61
62- fsl,qman
63 Usage: Required
64 Value type: <prop-encoded-array>
65 Description: List of phandle and DCP index pairs, to the QMan instance
66 to which this device is connected via the DCP
67
68QMan Private Memory Nodes
69
70QMan requires two contiguous range of physical memory used for the backing store
71for QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).
72This memory is reserved/allocated as a nodes under the /reserved-memory node
73
74The QMan FQD memory node must be named "qman-fqd"
75
76PROPERTIES
77
78- compatible
79 Usage: required
80 Value type: <stringlist>
81 Definition: Must inclide "fsl,qman-fqd"
82
83The QMan PFDR memory node must be named "qman-pfdr"
84
85PROPERTIES
86
87- compatible
88 Usage: required
89 Value type: <stringlist>
90 Definition: Must inclide "fsl,qman-pfdr"
91
92The following constraints are relevant to the FQD and PFDR private memory:
93 - The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
94 1 GiB
95 - The alignment must be a muliptle of the memory size
96
97The size of the FQD and PFDP must be chosen by observing the hardware features
98configured via the Reset Configuration Word (RCW) and that are relevant to a
99specific board (e.g. number of MAC(s) pinned-out, number of offline/host command
100FMan ports, etc.). The size configured in the DT must reflect the hardware
101capabilities and not the specific needs of an application
102
103For additional details about reserved memory regions see reserved-memory.txt
104
105EXAMPLE
106
107The example below shows a QMan FQD and a PFDR dynamic allocation memory nodes
108
109 reserved-memory {
110 #address-cells = <2>;
111 #size-cells = <2>;
112 ranges;
113
114 qman_fqd: qman-fqd {
115 compatible = "fsl,qman-fqd";
116 alloc-ranges = <0 0 0xf 0xffffffff>;
117 size = <0 0x400000>;
118 alignment = <0 0x400000>;
119 };
120 qman_pfdr: qman-pfdr {
121 compatible = "fsl,qman-pfdr";
122 alloc-ranges = <0 0 0xf 0xffffffff>;
123 size = <0 0x2000000>;
124 alignment = <0 0x2000000>;
125 };
126 };
127
128The example below shows a (P4080) QMan CCSR-space node
129
130 clockgen: global-utilities@e1000 {
131 ...
132 sysclk: sysclk {
133 ...
134 };
135 ...
136 platform_pll: platform-pll@c00 {
137 #clock-cells = <1>;
138 reg = <0xc00 0x4>;
139 compatible = "fsl,qoriq-platform-pll-1.0";
140 clocks = <&sysclk>;
141 clock-output-names = "platform-pll", "platform-pll-div2";
142 };
143 ...
144 };
145
146 crypto@300000 {
147 ...
148 fsl,qman = <&qman, 2>;
149 ...
150 };
151
152 qman: qman@318000 {
153 compatible = "fsl,qman";
154 reg = <0x318000 0x1000>;
155 interrupts = <16 2 1 3>
156 fsl,liodn = <0x16>;
157 memory-region = <&qman_fqd &qman_pfdr>;
158 clocks = <&platform_pll 1>;
159 };
160
161 fman@400000 {
162 ...
163 fsl,qman = <&qman, 0>;
164 ...
165 };