ARM: dts: imx6: add anatop phandle for usbphy

Add anatop phandle for usbphy

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

2 files changed, 4 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 8a7ce97ccf94..e78497eebdef 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -576,6 +576,7 @@
                                 reg = <0x020c9000 0x1000>;
                                 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
                                 clocks = <&clks 182>;
+                                fsl,anatop = <&anatop>;
                         };
 
                         usbphy2: usbphy@020ca000 {
@@ -583,6 +584,7 @@
                                 reg = <0x020ca000 0x1000>;
                                 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
                                 clocks = <&clks 183>;
+                                fsl,anatop = <&anatop>;
                         };
 
                         snvs@020cc000 {
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 8e7bce20ee51..e27d3bb33bb9 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -519,6 +519,7 @@
                                 reg = <0x020c9000 0x1000>;
                                 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
                                 clocks = <&clks IMX6SL_CLK_USBPHY1>;
+                                fsl,anatop = <&anatop>;
                         };
 
                         usbphy2: usbphy@020ca000 {
@@ -526,6 +527,7 @@
                                 reg = <0x020ca000 0x1000>;
                                 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
                                 clocks = <&clks IMX6SL_CLK_USBPHY2>;
+                                fsl,anatop = <&anatop>;
                         };
 
                         snvs@020cc000 {