Merge tag 'zynq-dt-for-3.20' of https://github.com/Xilinx/linux-xlnx into next/dt

Merge "Zync DT for v3.20" from Michal Simek:

arm: Xilinx Zynq dt patches for v3.20

- Add USB chipidea driver to DT
- Add pincontrol
- Add aliases node
- Fix WDT node

* tag 'zynq-dt-for-3.20' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: DT: Add aliases node
  ARM: zynq: DT: Fix binding for cadence WDT
  ARM: zynq: DT: Add pinctrl information to USB nodes
  ARM: zynq: DT: Remove bogus value from 'bias-disable' property
  ARM: zynq: DT: Add pinctrl information
  ARM: zynq: DT: Add USB to device tree

Signed-off-by: Olof Johansson <olof@lixom.net>

4 files changed, 461 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index ee3e5d675b05..a5cd2eda3edf 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -237,7 +237,7 @@
                 slcr: slcr@f8000000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        compatible = "xlnx,zynq-slcr", "syscon";
+                        compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
                         reg = <0xF8000000 0x1000>;
                         ranges;
                         clkc: clkc@100 {
@@ -257,6 +257,12 @@
                                                 "dbg_trc", "dbg_apb";
                                 reg = <0x100 0x100>;
                         };
+
+                        pinctrl0: pinctrl@700 {
+                                compatible = "xlnx,pinctrl-zynq";
+                                reg = <0x700 0x200>;
+                                syscon = <&slcr>;
+                        };
                 };
 
                 dmac_s: dmac@f8003000 {
@@ -314,14 +320,32 @@
                         clocks = <&clkc 4>;
                 };
 
+                usb0: usb@e0002000 {
+                        compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
+                        status = "disabled";
+                        clocks = <&clkc 28>;
+                        interrupt-parent = <&intc>;
+                        interrupts = <0 21 4>;
+                        reg = <0xe0002000 0x1000>;
+                        phy_type = "ulpi";
+                };
+
+                usb1: usb@e0003000 {
+                        compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
+                        status = "disabled";
+                        clocks = <&clkc 29>;
+                        interrupt-parent = <&intc>;
+                        interrupts = <0 44 4>;
+                        reg = <0xe0003000 0x1000>;
+                        phy_type = "ulpi";
+                };
+
                 watchdog0: watchdog@f8005000 {
                         clocks = <&clkc 45>;
-                        compatible = "xlnx,zynq-wdt-r1p2";
-                        device_type = "watchdog";
+                        compatible = "cdns,wdt-r1p2";
                         interrupt-parent = <&intc>;
                         interrupts = <0 9 1>;
                         reg = <0xf8005000 0x1000>;
-                        reset = <0>;
                         timeout-sec = <10>;
                 };
         };
diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
index 280f02dd4ddc..1fc1d3911e9b 100644
--- a/arch/arm/boot/dts/zynq-zc702.dts
+++ b/arch/arm/boot/dts/zynq-zc702.dts
@@ -18,6 +18,12 @@
         model = "Zynq ZC702 Development Board";
         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
 
+        aliases {
+                ethernet0 = &gem0;
+                i2c0 = &i2c0;
+                serial0 = &uart1;
+        };
+
         memory {
                 device_type = "memory";
                 reg = <0x0 0x40000000>;
@@ -36,10 +42,17 @@
                         linux,default-trigger = "heartbeat";
                 };
         };
+
+        usb_phy0: phy0 {
+                compatible = "usb-nop-xceiv";
+                #phy-cells = <0>;
+        };
 };
 
 &can0 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_can0_default>;
 };
 
 &clkc {
@@ -50,15 +63,24 @@
         status = "okay";
         phy-mode = "rgmii-id";
         phy-handle = <&ethernet_phy>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gem0_default>;
 
         ethernet_phy: ethernet-phy@7 {
                 reg = <7>;
         };
 };
 
+&gpio0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gpio0_default>;
+};
+
 &i2c0 {
         status = "okay";
         clock-frequency = <400000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c0_default>;
 
         i2cswitch@74 {
                 compatible = "nxp,pca9548";
@@ -132,10 +154,212 @@
         };
 };
 
+&pinctrl0 {
+        pinctrl_can0_default: can0-default {
+                mux {
+                        function = "can0";
+                        groups = "can0_9_grp";
+                };
+
+                conf {
+                        groups = "can0_9_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-rx {
+                        pins = "MIO46";
+                        bias-high-impedance;
+                };
+
+                conf-tx {
+                        pins = "MIO47";
+                        bias-disable;
+                };
+        };
+
+        pinctrl_gem0_default: gem0-default {
+                mux {
+                        function = "ethernet0";
+                        groups = "ethernet0_0_grp";
+                };
+
+                conf {
+                        groups = "ethernet0_0_grp";
+                        slew-rate = <0>;
+                        io-standard = <4>;
+                };
+
+                conf-rx {
+                        pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
+                        bias-high-impedance;
+                        low-power-disable;
+                };
+
+                conf-tx {
+                        pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
+                        bias-disable;
+                        low-power-enable;
+                };
+
+                mux-mdio {
+                        function = "mdio0";
+                        groups = "mdio0_0_grp";
+                };
+
+                conf-mdio {
+                        groups = "mdio0_0_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                        bias-disable;
+                };
+        };
+
+        pinctrl_gpio0_default: gpio0-default {
+                mux {
+                        function = "gpio0";
+                        groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
+                                 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
+                                 "gpio0_13_grp", "gpio0_14_grp";
+                };
+
+                conf {
+                        groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
+                                 "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
+                                 "gpio0_13_grp", "gpio0_14_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-pull-up {
+                        pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
+                        bias-pull-up;
+                };
+
+                conf-pull-none {
+                        pins = "MIO7", "MIO8";
+                        bias-disable;
+                };
+        };
+
+        pinctrl_i2c0_default: i2c0-default {
+                mux {
+                        groups = "i2c0_10_grp";
+                        function = "i2c0";
+                };
+
+                conf {
+                        groups = "i2c0_10_grp";
+                        bias-pull-up;
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+        };
+
+        pinctrl_sdhci0_default: sdhci0-default {
+                mux {
+                        groups = "sdio0_2_grp";
+                        function = "sdio0";
+                };
+
+                conf {
+                        groups = "sdio0_2_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                        bias-disable;
+                };
+
+                mux-cd {
+                        groups = "gpio0_0_grp";
+                        function = "sdio0_cd";
+                };
+
+                conf-cd {
+                        groups = "gpio0_0_grp";
+                        bias-high-impedance;
+                        bias-pull-up;
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                mux-wp {
+                        groups = "gpio0_15_grp";
+                        function = "sdio0_wp";
+                };
+
+                conf-wp {
+                        groups = "gpio0_15_grp";
+                        bias-high-impedance;
+                        bias-pull-up;
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+        };
+
+        pinctrl_uart1_default: uart1-default {
+                mux {
+                        groups = "uart1_10_grp";
+                        function = "uart1";
+                };
+
+                conf {
+                        groups = "uart1_10_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-rx {
+                        pins = "MIO49";
+                        bias-high-impedance;
+                };
+
+                conf-tx {
+                        pins = "MIO48";
+                        bias-disable;
+                };
+        };
+
+        pinctrl_usb0_default: usb0-default {
+                mux {
+                        groups = "usb0_0_grp";
+                        function = "usb0";
+                };
+
+                conf {
+                        groups = "usb0_0_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-rx {
+                        pins = "MIO29", "MIO31", "MIO36";
+                        bias-high-impedance;
+                };
+
+                conf-tx {
+                        pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
+                               "MIO35", "MIO37", "MIO38", "MIO39";
+                        bias-disable;
+                };
+        };
+};
+
 &sdhci0 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_sdhci0_default>;
 };
 
 &uart1 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1_default>;
+};
+
+&usb0 {
+        status = "okay";
+        dr_mode = "host";
+        usb-phy = <&usb_phy0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usb0_default>;
 };
diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts
index 34f7812d2ee8..850518d9b8ac 100644
--- a/arch/arm/boot/dts/zynq-zc706.dts
+++ b/arch/arm/boot/dts/zynq-zc706.dts
@@ -18,6 +18,12 @@
         model = "Zynq ZC706 Development Board";
         compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
 
+        aliases {
+                ethernet0 = &gem0;
+                i2c0 = &i2c0;
+                serial0 = &uart1;
+        };
+
         memory {
                 device_type = "memory";
                 reg = <0x0 0x40000000>;
@@ -27,6 +33,10 @@
                 bootargs = "console=ttyPS0,115200 earlyprintk";
         };
 
+        usb_phy0: phy0 {
+                compatible = "usb-nop-xceiv";
+                #phy-cells = <0>;
+        };
 };
 
 &clkc {
@@ -37,15 +47,24 @@
         status = "okay";
         phy-mode = "rgmii-id";
         phy-handle = <&ethernet_phy>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gem0_default>;
 
         ethernet_phy: ethernet-phy@7 {
                 reg = <7>;
         };
 };
 
+&gpio0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gpio0_default>;
+};
+
 &i2c0 {
         status = "okay";
         clock-frequency = <400000>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_i2c0_default>;
 
         i2cswitch@74 {
                 compatible = "nxp,pca9548";
@@ -111,10 +130,185 @@
         };
 };
 
+&pinctrl0 {
+        pinctrl_gem0_default: gem0-default {
+                mux {
+                        function = "ethernet0";
+                        groups = "ethernet0_0_grp";
+                };
+
+                conf {
+                        groups = "ethernet0_0_grp";
+                        slew-rate = <0>;
+                        io-standard = <4>;
+                };
+
+                conf-rx {
+                        pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
+                        bias-high-impedance;
+                        low-power-disable;
+                };
+
+                conf-tx {
+                        pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
+                        low-power-enable;
+                        bias-disable;
+                };
+
+                mux-mdio {
+                        function = "mdio0";
+                        groups = "mdio0_0_grp";
+                };
+
+                conf-mdio {
+                        groups = "mdio0_0_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                        bias-disable;
+                };
+        };
+
+        pinctrl_gpio0_default: gpio0-default {
+                mux {
+                        function = "gpio0";
+                        groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
+                };
+
+                conf {
+                        groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-pull-up {
+                        pins = "MIO46", "MIO47";
+                        bias-pull-up;
+                };
+
+                conf-pull-none {
+                        pins = "MIO7";
+                        bias-disable;
+                };
+        };
+
+        pinctrl_i2c0_default: i2c0-default {
+                mux {
+                        groups = "i2c0_10_grp";
+                        function = "i2c0";
+                };
+
+                conf {
+                        groups = "i2c0_10_grp";
+                        bias-pull-up;
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+        };
+
+        pinctrl_sdhci0_default: sdhci0-default {
+                mux {
+                        groups = "sdio0_2_grp";
+                        function = "sdio0";
+                };
+
+                conf {
+                        groups = "sdio0_2_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                        bias-disable;
+                };
+
+                mux-cd {
+                        groups = "gpio0_14_grp";
+                        function = "sdio0_cd";
+                };
+
+                conf-cd {
+                        groups = "gpio0_14_grp";
+                        bias-high-impedance;
+                        bias-pull-up;
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                mux-wp {
+                        groups = "gpio0_15_grp";
+                        function = "sdio0_wp";
+                };
+
+                conf-wp {
+                        groups = "gpio0_15_grp";
+                        bias-high-impedance;
+                        bias-pull-up;
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+        };
+
+        pinctrl_uart1_default: uart1-default {
+                mux {
+                        groups = "uart1_10_grp";
+                        function = "uart1";
+                };
+
+                conf {
+                        groups = "uart1_10_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-rx {
+                        pins = "MIO49";
+                        bias-high-impedance;
+                };
+
+                conf-tx {
+                        pins = "MIO48";
+                        bias-disable;
+                };
+        };
+
+        pinctrl_usb0_default: usb0-default {
+                mux {
+                        groups = "usb0_0_grp";
+                        function = "usb0";
+                };
+
+                conf {
+                        groups = "usb0_0_grp";
+                        slew-rate = <0>;
+                        io-standard = <1>;
+                };
+
+                conf-rx {
+                        pins = "MIO29", "MIO31", "MIO36";
+                        bias-high-impedance;
+                };
+
+                conf-tx {
+                        pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
+                               "MIO35", "MIO37", "MIO38", "MIO39";
+                        bias-disable;
+                };
+        };
+};
+
 &sdhci0 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_sdhci0_default>;
 };
 
 &uart1 {
         status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart1_default>;
+};
+
+&usb0 {
+        status = "okay";
+        dr_mode = "host";
+        usb-phy = <&usb_phy0>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usb0_default>;
 };
diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts
index 1c7cc990b47a..5658bc8434de 100644
--- a/arch/arm/boot/dts/zynq-zed.dts
+++ b/arch/arm/boot/dts/zynq-zed.dts
@@ -18,6 +18,11 @@
         model = "Zynq Zed Development Board";
         compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
 
+        aliases {
+                ethernet0 = &gem0;
+                serial0 = &uart1;
+        };
+
         memory {
                 device_type = "memory";
                 reg = <0x0 0x20000000>;
@@ -27,6 +32,10 @@
                 bootargs = "console=ttyPS0,115200 earlyprintk";
         };
 
+        usb_phy0: phy0 {
+                compatible = "usb-nop-xceiv";
+                #phy-cells = <0>;
+        };
 };
 
 &clkc {
@@ -50,3 +59,9 @@
 &uart1 {
         status = "okay";
 };
+
+&usb0 {
+        status = "okay";
+        dr_mode = "host";
+        usb-phy = <&usb_phy0>;
+};