diff options
| author | Will Deacon <will.deacon@arm.com> | 2011-01-12 12:10:45 -0500 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2011-07-07 14:20:52 -0400 |
| commit | 7665d9d2df2eb26284467c2f8591004bd511c75f (patch) | |
| tree | aed8e0f577c63961a4b8c7ffef50e9b6c004e3f7 | |
| parent | 15eb169bfec291faf25b158cfa9842b72f7803ad (diff) | |
ARM: proc: add proc info for Cortex-A15MP using classic page tables
Multicore implementations of the Cortex-A15 require bit 6 of the
auxiliary control register to be set in order for cache and TLB
maintenance operations to be broadcast between CPUs.
This patch adds a new proc_info structure for Cortex-A15, which enables
the SMP bit during setup and includes the new HWCAP for integer
division.
Signed-off-by: Will Deacon <will.deacon@arm.com>
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 3185da27a537..593285419e75 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
| @@ -280,12 +280,18 @@ cpu_resume_l1_flags: | |||
| 280 | */ | 280 | */ |
| 281 | __v7_ca5mp_setup: | 281 | __v7_ca5mp_setup: |
| 282 | __v7_ca9mp_setup: | 282 | __v7_ca9mp_setup: |
| 283 | mov r10, #(1 << 0) @ TLB ops broadcasting | ||
| 284 | b 1f | ||
| 285 | __v7_ca15mp_setup: | ||
| 286 | mov r10, #0 | ||
| 287 | 1: | ||
| 283 | #ifdef CONFIG_SMP | 288 | #ifdef CONFIG_SMP |
| 284 | ALT_SMP(mrc p15, 0, r0, c1, c0, 1) | 289 | ALT_SMP(mrc p15, 0, r0, c1, c0, 1) |
| 285 | ALT_UP(mov r0, #(1 << 6)) @ fake it for UP | 290 | ALT_UP(mov r0, #(1 << 6)) @ fake it for UP |
| 286 | tst r0, #(1 << 6) @ SMP/nAMP mode enabled? | 291 | tst r0, #(1 << 6) @ SMP/nAMP mode enabled? |
| 287 | orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and | 292 | orreq r0, r0, #(1 << 6) @ Enable SMP/nAMP mode |
| 288 | mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting | 293 | orreq r0, r0, r10 @ Enable CPU-specific SMP bits |
| 294 | mcreq p15, 0, r0, c1, c0, 1 | ||
| 289 | #endif | 295 | #endif |
| 290 | __v7_setup: | 296 | __v7_setup: |
| 291 | adr r12, __v7_setup_stack @ the local stack | 297 | adr r12, __v7_setup_stack @ the local stack |
| @@ -465,6 +471,16 @@ __v7_ca9mp_proc_info: | |||
| 465 | .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info | 471 | .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info |
| 466 | 472 | ||
| 467 | /* | 473 | /* |
| 474 | * ARM Ltd. Cortex A15 processor. | ||
| 475 | */ | ||
| 476 | .type __v7_ca15mp_proc_info, #object | ||
| 477 | __v7_ca15mp_proc_info: | ||
| 478 | .long 0x410fc0f0 | ||
| 479 | .long 0xff0ffff0 | ||
| 480 | __v7_proc __v7_ca15mp_setup, hwcaps = HWCAP_IDIV | ||
| 481 | .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info | ||
| 482 | |||
| 483 | /* | ||
| 468 | * Match any ARMv7 processor core. | 484 | * Match any ARMv7 processor core. |
| 469 | */ | 485 | */ |
| 470 | .type __v7_proc_info, #object | 486 | .type __v7_proc_info, #object |
