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authorBruno Randolf <br1@einfach.org>2011-01-19 04:21:02 -0500
committerJohn W. Linville <linville@tuxdriver.com>2011-01-21 15:35:46 -0500
commit75f9569bfc4f3b138d196091b85c91678183520e (patch)
tree2ba76ea0566afb4570b85ed281e478fe5261ae4f
parent410e6120a500edcf3fb8239301deabf20a4310db (diff)
ath5: Remove unused CTL definitions
They are unused in ath5k and a more detailled definition is in ath/regd_common.h. Signed-off-by: Bruno Randolf <br1@einfach.org> Acked-by: Bob Copeland <me@bobcopeland.com> Acked-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.h23
1 files changed, 0 insertions, 23 deletions
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.h b/drivers/net/wireless/ath/ath5k/eeprom.h
index d46f1056f447..6511c27d938e 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.h
+++ b/drivers/net/wireless/ath/ath5k/eeprom.h
@@ -268,29 +268,6 @@ enum ath5k_ctl_mode {
268 AR5K_CTL_MODE_M = 15, 268 AR5K_CTL_MODE_M = 15,
269}; 269};
270 270
271/* Default CTL ids for the 3 main reg domains.
272 * Atheros only uses these by default but vendors
273 * can have up to 32 different CTLs for different
274 * scenarios. Note that theese values are ORed with
275 * the mode id (above) so we can have up to 24 CTL
276 * datasets out of these 3 main regdomains. That leaves
277 * 8 ids that can be used by vendors and since 0x20 is
278 * missing from HAL sources i guess this is the set of
279 * custom CTLs vendors can use. */
280#define AR5K_CTL_FCC 0x10
281#define AR5K_CTL_CUSTOM 0x20
282#define AR5K_CTL_ETSI 0x30
283#define AR5K_CTL_MKK 0x40
284
285/* Indicates a CTL with only mode set and
286 * no reg domain mapping, such CTLs are used
287 * for world roaming domains or simply when
288 * a reg domain is not set */
289#define AR5K_CTL_NO_REGDOMAIN 0xf0
290
291/* Indicates an empty (invalid) CTL */
292#define AR5K_CTL_NO_CTL 0xff
293
294/* Per channel calibration data, used for power table setup */ 271/* Per channel calibration data, used for power table setup */
295struct ath5k_chan_pcal_info_rf5111 { 272struct ath5k_chan_pcal_info_rf5111 {
296 /* Power levels in half dbm units 273 /* Power levels in half dbm units