diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2009-05-17 17:44:33 -0400 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-18 11:26:03 -0400 |
| commit | 75cbcff3729fe2568dff38d16d6494f8fb7f59fe (patch) | |
| tree | 55d7eca0d47aa0ab2bf586d347f52a1baf8b30da | |
| parent | fda7b2b097fed9f88bc93ed3de0caea87ffe778e (diff) | |
[ARM] S3C24XX: GPIO: Add S3C64XX style GPIO numbering
Move the new style of GPIO numbering by using a single
macro for each GPIO bank. This means S3C2410_GPA0 becomes
S3C2410_GPA(0), and so on.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
| -rw-r--r-- | arch/arm/mach-s3c2410/include/mach/gpio-nrs.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h index ce1ec69806a1..5213e453df1c 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h | |||
| @@ -11,6 +11,9 @@ | |||
| 11 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
| 12 | */ | 12 | */ |
| 13 | 13 | ||
| 14 | #ifndef __MACH_GPIONRS_H | ||
| 15 | #define __MACH_GPIONRS_H | ||
| 16 | |||
| 14 | #define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) | 17 | #define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) |
| 15 | 18 | ||
| 16 | #define S3C2410_GPIO_BANKA (32*0) | 19 | #define S3C2410_GPIO_BANKA (32*0) |
| @@ -21,3 +24,49 @@ | |||
| 21 | #define S3C2410_GPIO_BANKF (32*5) | 24 | #define S3C2410_GPIO_BANKF (32*5) |
| 22 | #define S3C2410_GPIO_BANKG (32*6) | 25 | #define S3C2410_GPIO_BANKG (32*6) |
| 23 | #define S3C2410_GPIO_BANKH (32*7) | 26 | #define S3C2410_GPIO_BANKH (32*7) |
| 27 | |||
| 28 | /* GPIO bank sizes */ | ||
| 29 | #define S3C2410_GPIO_A_NR (32) | ||
| 30 | #define S3C2410_GPIO_B_NR (32) | ||
| 31 | #define S3C2410_GPIO_C_NR (32) | ||
| 32 | #define S3C2410_GPIO_D_NR (32) | ||
| 33 | #define S3C2410_GPIO_E_NR (32) | ||
| 34 | #define S3C2410_GPIO_F_NR (32) | ||
| 35 | #define S3C2410_GPIO_G_NR (32) | ||
| 36 | #define S3C2410_GPIO_H_NR (32) | ||
| 37 | |||
| 38 | #if CONFIG_S3C_GPIO_SPACE != 0 | ||
| 39 | #error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment | ||
| 40 | #endif | ||
| 41 | |||
| 42 | #define S3C2410_GPIO_NEXT(__gpio) \ | ||
| 43 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0) | ||
| 44 | |||
| 45 | #ifndef __ASSEMBLY__ | ||
| 46 | |||
| 47 | enum s3c_gpio_number { | ||
| 48 | S3C2410_GPIO_A_START = 0, | ||
| 49 | S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A), | ||
| 50 | S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B), | ||
| 51 | S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C), | ||
| 52 | S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D), | ||
| 53 | S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), | ||
| 54 | S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), | ||
| 55 | S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), | ||
| 56 | }; | ||
| 57 | |||
| 58 | #endif /* __ASSEMBLY__ */ | ||
| 59 | |||
| 60 | /* S3C2410 GPIO number definitions. */ | ||
| 61 | |||
| 62 | #define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr)) | ||
| 63 | #define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr)) | ||
| 64 | #define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr)) | ||
| 65 | #define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr)) | ||
| 66 | #define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr)) | ||
| 67 | #define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) | ||
| 68 | #define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) | ||
| 69 | #define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) | ||
| 70 | |||
| 71 | #endif /* __MACH_GPIONRS_H */ | ||
| 72 | |||
