diff options
| author | John Stultz <johnstul@us.ibm.com> | 2010-04-26 23:23:11 -0400 |
|---|---|---|
| committer | John Stultz <john.stultz@linaro.org> | 2011-02-21 16:33:50 -0500 |
| commit | 75c4fd8c7862f37eeae5c80f33bbe4dce97571d4 (patch) | |
| tree | d222dd777a673962f4e819b7b6e9be10295e8c95 | |
| parent | 39280742efb00ab61ad62486c737fdd3e980c30f (diff) | |
mips: convert to clocksource_register_hz/khz
This converts the mips clocksources to use clocksource_register_hz/khz
CC: Ralf Baechle <ralf@linux-mips.org>
CC: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: John Stultz <johnstul@us.ibm.com>
| -rw-r--r-- | arch/mips/alchemy/common/time.c | 3 | ||||
| -rw-r--r-- | arch/mips/cavium-octeon/csrc-octeon.c | 3 | ||||
| -rw-r--r-- | arch/mips/include/asm/time.h | 6 | ||||
| -rw-r--r-- | arch/mips/jz4740/time.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/cevt-txx9.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/csrc-bcm1480.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/csrc-ioasic.c | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/csrc-powertv.c | 35 | ||||
| -rw-r--r-- | arch/mips/kernel/csrc-r4k.c | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/csrc-sb1250.c | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/i8253.c | 5 | ||||
| -rw-r--r-- | arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | 5 | ||||
| -rw-r--r-- | arch/mips/sgi-ip27/ip27-timer.c | 3 |
13 files changed, 14 insertions, 66 deletions
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index 2aecb2fdf982..d5da6adbf634 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c | |||
| @@ -141,8 +141,7 @@ static int __init alchemy_time_init(unsigned int m2int) | |||
| 141 | goto cntr_err; | 141 | goto cntr_err; |
| 142 | 142 | ||
| 143 | /* register counter1 clocksource and event device */ | 143 | /* register counter1 clocksource and event device */ |
| 144 | clocksource_set_clock(&au1x_counter1_clocksource, 32768); | 144 | clocksource_register_hz(&au1x_counter1_clocksource, 32768); |
| 145 | clocksource_register(&au1x_counter1_clocksource); | ||
| 146 | 145 | ||
| 147 | cd->shift = 32; | 146 | cd->shift = 32; |
| 148 | cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift); | 147 | cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift); |
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c index 26bf71130bf8..29d56afbb02d 100644 --- a/arch/mips/cavium-octeon/csrc-octeon.c +++ b/arch/mips/cavium-octeon/csrc-octeon.c | |||
| @@ -105,8 +105,7 @@ unsigned long long notrace sched_clock(void) | |||
| 105 | void __init plat_time_init(void) | 105 | void __init plat_time_init(void) |
| 106 | { | 106 | { |
| 107 | clocksource_mips.rating = 300; | 107 | clocksource_mips.rating = 300; |
| 108 | clocksource_set_clock(&clocksource_mips, octeon_get_clock_rate()); | 108 | clocksource_register_hz(&clocksource_mips, octeon_get_clock_rate()); |
| 109 | clocksource_register(&clocksource_mips); | ||
| 110 | } | 109 | } |
| 111 | 110 | ||
| 112 | static u64 octeon_udelay_factor; | 111 | static u64 octeon_udelay_factor; |
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index c7f1bfef1574..bc14447e69b5 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h | |||
| @@ -84,12 +84,6 @@ static inline int init_mips_clocksource(void) | |||
| 84 | #endif | 84 | #endif |
| 85 | } | 85 | } |
| 86 | 86 | ||
| 87 | static inline void clocksource_set_clock(struct clocksource *cs, | ||
| 88 | unsigned int clock) | ||
| 89 | { | ||
| 90 | clocksource_calc_mult_shift(cs, clock, 4); | ||
| 91 | } | ||
| 92 | |||
| 93 | static inline void clockevent_set_clock(struct clock_event_device *cd, | 87 | static inline void clockevent_set_clock(struct clock_event_device *cd, |
| 94 | unsigned int clock) | 88 | unsigned int clock) |
| 95 | { | 89 | { |
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c index fe01678d94fd..03dfd4e0da4e 100644 --- a/arch/mips/jz4740/time.c +++ b/arch/mips/jz4740/time.c | |||
| @@ -121,8 +121,7 @@ void __init plat_time_init(void) | |||
| 121 | 121 | ||
| 122 | clockevents_register_device(&jz4740_clockevent); | 122 | clockevents_register_device(&jz4740_clockevent); |
| 123 | 123 | ||
| 124 | clocksource_set_clock(&jz4740_clocksource, clk_rate); | 124 | ret = clocksource_register_hz(&jz4740_clocksource, clk_rate); |
| 125 | ret = clocksource_register(&jz4740_clocksource); | ||
| 126 | 125 | ||
| 127 | if (ret) | 126 | if (ret) |
| 128 | printk(KERN_ERR "Failed to register clocksource: %d\n", ret); | 127 | printk(KERN_ERR "Failed to register clocksource: %d\n", ret); |
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c index 0b7377361e22..f0ab92a1b057 100644 --- a/arch/mips/kernel/cevt-txx9.c +++ b/arch/mips/kernel/cevt-txx9.c | |||
| @@ -51,8 +51,7 @@ void __init txx9_clocksource_init(unsigned long baseaddr, | |||
| 51 | { | 51 | { |
| 52 | struct txx9_tmr_reg __iomem *tmrptr; | 52 | struct txx9_tmr_reg __iomem *tmrptr; |
| 53 | 53 | ||
| 54 | clocksource_set_clock(&txx9_clocksource.cs, TIMER_CLK(imbusclk)); | 54 | clocksource_register_hz(&txx9_clocksource.cs, TIMER_CLK(imbusclk)); |
| 55 | clocksource_register(&txx9_clocksource.cs); | ||
| 56 | 55 | ||
| 57 | tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); | 56 | tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); |
| 58 | __raw_writel(TCR_BASE, &tmrptr->tcr); | 57 | __raw_writel(TCR_BASE, &tmrptr->tcr); |
diff --git a/arch/mips/kernel/csrc-bcm1480.c b/arch/mips/kernel/csrc-bcm1480.c index 51489f8a825e..f96f99c794a3 100644 --- a/arch/mips/kernel/csrc-bcm1480.c +++ b/arch/mips/kernel/csrc-bcm1480.c | |||
| @@ -49,6 +49,5 @@ void __init sb1480_clocksource_init(void) | |||
| 49 | 49 | ||
| 50 | plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); | 50 | plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); |
| 51 | zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000); | 51 | zbbus = ((plldiv >> 1) * 50000000) + ((plldiv & 1) * 25000000); |
| 52 | clocksource_set_clock(cs, zbbus); | 52 | clocksource_register_hz(cs, zbbus); |
| 53 | clocksource_register(cs); | ||
| 54 | } | 53 | } |
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c index 23da108506b0..46bd7fa98d6c 100644 --- a/arch/mips/kernel/csrc-ioasic.c +++ b/arch/mips/kernel/csrc-ioasic.c | |||
| @@ -59,7 +59,5 @@ void __init dec_ioasic_clocksource_init(void) | |||
| 59 | printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq); | 59 | printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq); |
| 60 | 60 | ||
| 61 | clocksource_dec.rating = 200 + freq / 10000000; | 61 | clocksource_dec.rating = 200 + freq / 10000000; |
| 62 | clocksource_set_clock(&clocksource_dec, freq); | 62 | clocksource_register_hz(&clocksource_dec, freq); |
| 63 | |||
| 64 | clocksource_register(&clocksource_dec); | ||
| 65 | } | 63 | } |
diff --git a/arch/mips/kernel/csrc-powertv.c b/arch/mips/kernel/csrc-powertv.c index a27c16c8690e..2e7c5232da8d 100644 --- a/arch/mips/kernel/csrc-powertv.c +++ b/arch/mips/kernel/csrc-powertv.c | |||
| @@ -78,9 +78,7 @@ static void __init powertv_c0_hpt_clocksource_init(void) | |||
| 78 | 78 | ||
| 79 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; | 79 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; |
| 80 | 80 | ||
| 81 | clocksource_set_clock(&clocksource_mips, mips_hpt_frequency); | 81 | clocksource_register_hz(&clocksource_mips, mips_hpt_frequency); |
| 82 | |||
| 83 | clocksource_register(&clocksource_mips); | ||
| 84 | } | 82 | } |
| 85 | 83 | ||
| 86 | /** | 84 | /** |
| @@ -130,43 +128,16 @@ static struct clocksource clocksource_tim_c = { | |||
| 130 | /** | 128 | /** |
| 131 | * powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock | 129 | * powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock |
| 132 | * | 130 | * |
| 133 | * The hard part here is coming up with a constant k and shift s such that | ||
| 134 | * the 48-bit TIM_C value multiplied by k doesn't overflow and that value, | ||
| 135 | * when shifted right by s, yields the corresponding number of nanoseconds. | ||
| 136 | * We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to | 131 | * We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to |
| 137 | * 1 / (27,000,000/8) seconds. Multiply that by a billion and you get the | 132 | * 1 / (27,000,000/8) seconds. |
| 138 | * number of nanoseconds. Since the TIM_C value has 48 bits and the math is | ||
| 139 | * done in 64 bits, avoiding an overflow means that k must be less than | ||
| 140 | * 64 - 48 = 16 bits. | ||
| 141 | */ | 133 | */ |
| 142 | static void __init powertv_tim_c_clocksource_init(void) | 134 | static void __init powertv_tim_c_clocksource_init(void) |
| 143 | { | 135 | { |
| 144 | int prescale; | ||
| 145 | unsigned long dividend; | ||
| 146 | unsigned long k; | ||
| 147 | int s; | ||
| 148 | const int max_k_bits = (64 - 48) - 1; | ||
| 149 | const unsigned long billion = 1000000000; | ||
| 150 | const unsigned long counts_per_second = 27000000 / 8; | 136 | const unsigned long counts_per_second = 27000000 / 8; |
| 151 | 137 | ||
| 152 | prescale = BITS_PER_LONG - ilog2(billion) - 1; | ||
| 153 | dividend = billion << prescale; | ||
| 154 | k = dividend / counts_per_second; | ||
| 155 | s = ilog2(k) - max_k_bits; | ||
| 156 | |||
| 157 | if (s < 0) | ||
| 158 | s = prescale; | ||
| 159 | |||
| 160 | else { | ||
| 161 | k >>= s; | ||
| 162 | s += prescale; | ||
| 163 | } | ||
| 164 | |||
| 165 | clocksource_tim_c.mult = k; | ||
| 166 | clocksource_tim_c.shift = s; | ||
| 167 | clocksource_tim_c.rating = 200; | 138 | clocksource_tim_c.rating = 200; |
| 168 | 139 | ||
| 169 | clocksource_register(&clocksource_tim_c); | 140 | clocksource_register_hz(&clocksource_tim_c, counts_per_second); |
| 170 | tim_c = (struct tim_c *) asic_reg_addr(tim_ch); | 141 | tim_c = (struct tim_c *) asic_reg_addr(tim_ch); |
| 171 | } | 142 | } |
| 172 | 143 | ||
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c index e95a3cd48eea..decd1fa38d55 100644 --- a/arch/mips/kernel/csrc-r4k.c +++ b/arch/mips/kernel/csrc-r4k.c | |||
| @@ -30,9 +30,7 @@ int __init init_r4k_clocksource(void) | |||
| 30 | /* Calculate a somewhat reasonable rating value */ | 30 | /* Calculate a somewhat reasonable rating value */ |
| 31 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; | 31 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; |
| 32 | 32 | ||
| 33 | clocksource_set_clock(&clocksource_mips, mips_hpt_frequency); | 33 | clocksource_register_hz(&clocksource_mips, mips_hpt_frequency); |
| 34 | |||
| 35 | clocksource_register(&clocksource_mips); | ||
| 36 | 34 | ||
| 37 | return 0; | 35 | return 0; |
| 38 | } | 36 | } |
diff --git a/arch/mips/kernel/csrc-sb1250.c b/arch/mips/kernel/csrc-sb1250.c index d14d3d1907fa..e9606d907685 100644 --- a/arch/mips/kernel/csrc-sb1250.c +++ b/arch/mips/kernel/csrc-sb1250.c | |||
| @@ -65,6 +65,5 @@ void __init sb1250_clocksource_init(void) | |||
| 65 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, | 65 | IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, |
| 66 | R_SCD_TIMER_CFG))); | 66 | R_SCD_TIMER_CFG))); |
| 67 | 67 | ||
| 68 | clocksource_set_clock(cs, V_SCD_TIMER_FREQ); | 68 | clocksource_register_hz(cs, V_SCD_TIMER_FREQ); |
| 69 | clocksource_register(cs); | ||
| 70 | } | 69 | } |
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c index 2392a7a296d4..9fadd17888d9 100644 --- a/arch/mips/kernel/i8253.c +++ b/arch/mips/kernel/i8253.c | |||
| @@ -196,8 +196,6 @@ static struct clocksource clocksource_pit = { | |||
| 196 | .rating = 110, | 196 | .rating = 110, |
| 197 | .read = pit_read, | 197 | .read = pit_read, |
| 198 | .mask = CLOCKSOURCE_MASK(32), | 198 | .mask = CLOCKSOURCE_MASK(32), |
| 199 | .mult = 0, | ||
| 200 | .shift = 20, | ||
| 201 | }; | 199 | }; |
| 202 | 200 | ||
| 203 | static int __init init_pit_clocksource(void) | 201 | static int __init init_pit_clocksource(void) |
| @@ -205,7 +203,6 @@ static int __init init_pit_clocksource(void) | |||
| 205 | if (num_possible_cpus() > 1) /* PIT does not scale! */ | 203 | if (num_possible_cpus() > 1) /* PIT does not scale! */ |
| 206 | return 0; | 204 | return 0; |
| 207 | 205 | ||
| 208 | clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20); | 206 | return clocksource_register_hz(&clocksource_pit, CLOCK_TICK_RATE); |
| 209 | return clocksource_register(&clocksource_pit); | ||
| 210 | } | 207 | } |
| 211 | arch_initcall(init_pit_clocksource); | 208 | arch_initcall(init_pit_clocksource); |
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c index 8c807c965199..0cb1b9760e34 100644 --- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c +++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | |||
| @@ -201,8 +201,6 @@ static struct clocksource clocksource_mfgpt = { | |||
| 201 | .rating = 120, /* Functional for real use, but not desired */ | 201 | .rating = 120, /* Functional for real use, but not desired */ |
| 202 | .read = mfgpt_read, | 202 | .read = mfgpt_read, |
| 203 | .mask = CLOCKSOURCE_MASK(32), | 203 | .mask = CLOCKSOURCE_MASK(32), |
| 204 | .mult = 0, | ||
| 205 | .shift = 22, | ||
| 206 | }; | 204 | }; |
| 207 | 205 | ||
| 208 | int __init init_mfgpt_clocksource(void) | 206 | int __init init_mfgpt_clocksource(void) |
| @@ -210,8 +208,7 @@ int __init init_mfgpt_clocksource(void) | |||
| 210 | if (num_possible_cpus() > 1) /* MFGPT does not scale! */ | 208 | if (num_possible_cpus() > 1) /* MFGPT does not scale! */ |
| 211 | return 0; | 209 | return 0; |
| 212 | 210 | ||
| 213 | clocksource_mfgpt.mult = clocksource_hz2mult(MFGPT_TICK_RATE, 22); | 211 | return clocksource_register_hz(&clocksource_mfgpt, MFGPT_TICK_RATE); |
| 214 | return clocksource_register(&clocksource_mfgpt); | ||
| 215 | } | 212 | } |
| 216 | 213 | ||
| 217 | arch_initcall(init_mfgpt_clocksource); | 214 | arch_initcall(init_mfgpt_clocksource); |
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index d6802d6d1f82..3cac88382d4c 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c | |||
| @@ -177,8 +177,7 @@ static void __init hub_rt_clocksource_init(void) | |||
| 177 | { | 177 | { |
| 178 | struct clocksource *cs = &hub_rt_clocksource; | 178 | struct clocksource *cs = &hub_rt_clocksource; |
| 179 | 179 | ||
| 180 | clocksource_set_clock(cs, CYCLES_PER_SEC); | 180 | clocksource_register_hz(cs, CYCLES_PER_SEC); |
| 181 | clocksource_register(cs); | ||
| 182 | } | 181 | } |
| 183 | 182 | ||
| 184 | void __init plat_time_init(void) | 183 | void __init plat_time_init(void) |
