Merge tag 'fixes-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A slightly larger set of fixes than we'd like at this point in the
  release.  Hopefully our very last batch before 3.15:

  OMAP:
   - Fix boot regression with CPU_IDLE enabled
   - Fixes for audio playback on OMAP5
   - Clock rate setting fix for OMAP3
   - Misc idle/PM fixes
  Exynos:
   - Removal of a couple of power domains to work around issues with
     access when they are powered down
   - Enabling missing highspeed-i2c driver to make MMC regulators work
   - Secondary CPU spin-up fix for 4212
   - Remove MDMA1 engine to avoid conflicts on secure mode platforms
   - A few other DT fixes
  Marvell:
   - PCI-e fixes for clocks and resource allocation

  plus a few other smaller fixes, add a MAINTAINERS entry for reset
  drivers, etc"

* tag 'fixes-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits)
  MAINTAINERS: Add reset controller framework entry
  ARM: trusted_foundations: fix compile error on non-SMP
  ARM: at91: sam9260: fix compilation issues
  ARM: mvebu: fix definitions of PCIe interfaces on Armada 38x
  ARM: imx: fix error handling in ipu device registration
  ARM: OMAP4: Fix the boot regression with CPU_IDLE enabled
  ARM: dts: Keep LDO4 always ON for exynos5250-arndale board
  ARM: dts: Fix SPI interrupt numbers for exynos5420
  ARM: dts: fix incorrect ak8975 compatible for exynos4412-trats2 board
  ARM: OMAP2+: Fix DMA hang after off-idle
  ARM: OMAP2+: nand: Fix NAND on OMAP2 and OMAP3 boards
  ARM: dts: Remove g2d_pd node for exynos5420
  ARM: dts: Remove mau_pd node for exynos5420
  ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount
  ARM: dts: disable MDMA1 node for exynos5420
  ARM: EXYNOS: fix the secondary CPU boot of exynos4212
  ARM: omap5: hwmod_data: Correct IDLEMODE for McPDM
  ARM: mvebu: mvebu-soc-id: keep clock enabled if PCIe unit is enabled
  ARM: mvebu: mvebu-soc-id: add missing clk_put() call
  ARM: at91/dt: sam9260: correct external trigger value
  ...

19 files changed, 93 insertions, 45 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index cc4511177949..8ccf31c95a15 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7405,6 +7405,14 @@ F:	drivers/rpmsg/
 F:      Documentation/rpmsg.txt
 F:      include/linux/rpmsg.h
 
+RESET CONTROLLER FRAMEWORK
+M:      Philipp Zabel <p.zabel@pengutronix.de>
+S:      Maintained
+F:      drivers/reset/
+F:      Documentation/devicetree/bindings/reset/
+F:      include/linux/reset.h
+F:      include/linux/reset-controller.h
+
 RFKILL
 M:      Johannes Berg <johannes@sipsolutions.net>
 L:      linux-wireless@vger.kernel.org
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 068031f0f263..6d0f03c98ee9 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -99,7 +99,7 @@
                         pcie@3,0 {
                                 device_type = "pci";
                                 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
-                                reg = <0x1000 0 0 0 0>;
+                                reg = <0x1800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
                                 #interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index e2919f02e1d4..da801964a257 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -110,7 +110,7 @@
                         pcie@3,0 {
                                 device_type = "pci";
                                 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
-                                reg = <0x1000 0 0 0 0>;
+                                reg = <0x1800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
                                 #interrupt-cells = <1>;
@@ -131,7 +131,7 @@
                         pcie@4,0 {
                                 device_type = "pci";
                                 assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
-                                reg = <0x1000 0 0 0 0>;
+                                reg = <0x2000 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
                                 #interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 366fc2cbcd64..c0e0eae16a27 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -641,7 +641,7 @@
                                 trigger@3 {
                                         reg = <3>;
                                         trigger-name = "external";
-                                        trigger-value = <0x13>;
+                                        trigger-value = <0xd>;
                                         trigger-external;
                                 };
                         };
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 9583563dd0ef..8a558b7ac999 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -503,7 +503,7 @@
                 status = "okay";
 
                 ak8975@0c {
-                        compatible = "ak,ak8975";
+                        compatible = "asahi-kasei,ak8975";
                         reg = <0x0c>;
                         gpios = <&gpj0 7 0>;
                 };
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 090f9830b129..cde19c818667 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -107,6 +107,7 @@
                                         regulator-name = "VDD_IOPERI_1.8V";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
                                         op_mode = <1>;
                                 };
 
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 80a3bf4c5986..896a2a6619e0 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -364,16 +364,4 @@
                         gpio-key,wakeup;
                 };
         };
-
-        amba {
-                mdma1: mdma@11C10000 {
-                        /*
-                         * MDMA1 can support both secure and non-secure
-                         * AXI transactions. When this is enabled in the kernel
-                         * for boards that run in secure mode, we are getting
-                         * imprecise external aborts causing the kernel to oops.
-                         */
-                        status = "disabled";
-                };
-        };
 };
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index c3a9a66c5767..b69fbcb7dcb8 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -219,16 +219,6 @@
                 reg = <0x100440C0 0x20>;
         };
 
-        mau_pd: power-domain@100440E0 {
-                compatible = "samsung,exynos4210-pd";
-                reg = <0x100440E0 0x20>;
-        };
-
-        g2d_pd: power-domain@10044100 {
-                compatible = "samsung,exynos4210-pd";
-                reg = <0x10044100 0x20>;
-        };
-
         msc_pd: power-domain@10044120 {
                 compatible = "samsung,exynos4210-pd";
                 reg = <0x10044120 0x20>;
@@ -336,6 +326,13 @@
                         #dma-cells = <1>;
                         #dma-channels = <8>;
                         #dma-requests = <1>;
+                        /*
+                         * MDMA1 can support both secure and non-secure
+                         * AXI transactions. When this is enabled in the kernel
+                         * for boards that run in secure mode, we are getting
+                         * imprecise external aborts causing the kernel to oops.
+                         */
+                        status = "disabled";
                 };
         };
 
@@ -385,7 +382,7 @@
         spi_0: spi@12d20000 {
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x12d20000 0x100>;
-                interrupts = <0 66 0>;
+                interrupts = <0 68 0>;
                 dmas = <&pdma0 5
                         &pdma0 4>;
                 dma-names = "tx", "rx";
@@ -401,7 +398,7 @@
         spi_1: spi@12d30000 {
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x12d30000 0x100>;
-                interrupts = <0 67 0>;
+                interrupts = <0 69 0>;
                 dmas = <&pdma1 5
                         &pdma1 4>;
                 dma-names = "tx", "rx";
@@ -417,7 +414,7 @@
         spi_2: spi@12d40000 {
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x12d40000 0x100>;
-                interrupts = <0 68 0>;
+                interrupts = <0 70 0>;
                 dmas = <&pdma0 7
                         &pdma0 6>;
                 dma-names = "tx", "rx";
@@ -730,6 +727,5 @@
                 interrupts = <0 112 0>;
                 clocks = <&clock 471>;
                 clock-names = "secss";
-                samsung,power-domain = <&g2d_pd>;
         };
 };
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
index 4ce7b70ea901..e07a227ec0db 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
 CONFIG_I2C=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_ARB_GPIO_CHALLENGE=y
+CONFIG_I2C_EXYNOS5=y
 CONFIG_I2C_S3C2410=y
 CONFIG_DEBUG_GPIO=y
 # CONFIG_HWMON is not set
diff --git a/arch/arm/include/asm/trusted_foundations.h b/arch/arm/include/asm/trusted_foundations.h
index b5f7705abcb0..624e1d436c6c 100644
--- a/arch/arm/include/asm/trusted_foundations.h
+++ b/arch/arm/include/asm/trusted_foundations.h
@@ -54,7 +54,9 @@ static inline void register_trusted_foundations(
          */
         pr_err("No support for Trusted Foundations, continuing in degraded mode.\n");
         pr_err("Secondary processors as well as CPU PM will be disabled.\n");
+#if IS_ENABLED(CONFIG_SMP)
         setup_max_cpus = 0;
+#endif
         cpu_idle_poll_ctrl(true);
 }
 
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index a0282928e9c1..7cd6f19945ed 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1308,19 +1308,19 @@ static struct platform_device at91_adc_device = {
 static struct at91_adc_trigger at91_adc_triggers[] = {
         [0] = {
                 .name = "timer-counter-0",
-                .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN,
+                .value = 0x1,
         },
         [1] = {
                 .name = "timer-counter-1",
-                .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN,
+                .value = 0x3,
         },
         [2] = {
                 .name = "timer-counter-2",
-                .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN,
+                .value = 0x5,
         },
         [3] = {
                 .name = "external",
-                .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN,
+                .value = 0xd,
                 .is_external = true,
         },
 };
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 932129ef26c6..aa01c4222b40 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -18,6 +18,8 @@
 
 #include <mach/map.h>
 
+#include <plat/cpu.h>
+
 #include "smc.h"
 
 static int exynos_do_idle(void)
@@ -28,13 +30,24 @@ static int exynos_do_idle(void)
 
 static int exynos_cpu_boot(int cpu)
 {
+        /*
+         * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
+         * But, Exynos4212 has only one secondary CPU so second parameter
+         * isn't used for informing secure firmware about CPU id.
+         */
+        if (soc_is_exynos4212())
+                cpu = 0;
+
         exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
         return 0;
 }
 
 static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 {
-        void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+        void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
+
+        if (!soc_is_exynos4212())
+                boot_reg += 4*cpu;
 
         __raw_writel(boot_addr, boot_reg);
         return 0;
diff --git a/arch/arm/mach-imx/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c
index fc4dd7cedc11..6bd7c3f37ac0 100644
--- a/arch/arm/mach-imx/devices/platform-ipu-core.c
+++ b/arch/arm/mach-imx/devices/platform-ipu-core.c
@@ -77,7 +77,7 @@ struct platform_device *__init imx_alloc_mx3_camera(
 
         pdev = platform_device_alloc("mx3-camera", 0);
         if (!pdev)
-                goto err;
+                return ERR_PTR(-ENOMEM);
 
         pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
         if (!pdev->dev.dma_mask)
diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c
index f3d4cf53f746..09520e19b78e 100644
--- a/arch/arm/mach-mvebu/mvebu-soc-id.c
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -108,7 +108,18 @@ static int __init mvebu_soc_id_init(void)
         iounmap(pci_base);
 
 res_ioremap:
-        clk_disable_unprepare(clk);
+        /*
+         * If the PCIe unit is actually enabled and we have PCI
+         * support in the kernel, we intentionally do not release the
+         * reference to the clock. We want to keep it running since
+         * the bootloader does some PCIe link configuration that the
+         * kernel is for now unable to do, and gating the clock would
+         * make us loose this precious configuration.
+         */
+        if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) {
+                clk_disable_unprepare(clk);
+                clk_put(clk);
+        }
 
 clk_err:
         of_node_put(child);
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index ac82512b9c8c..b6885e42c0a0 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
         board_nand_data.nr_parts        = nr_parts;
         board_nand_data.devsize         = nand_type;
 
-        board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW;
+        board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_HW;
         gpmc_nand_init(&board_nand_data, gpmc_t);
 }
 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 8f5121b89688..eb8c75ec3b1a 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -456,7 +456,8 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = {
         .clkdm_name     = "dpll4_clkdm",
 };
 
-DEFINE_STRUCT_CLK(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names, dpll4_m5x2_ck_ops);
+DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
+                        dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
 
 static struct clk dpll4_m5x2_ck_3630 = {
         .name           = "dpll4_m5x2_ck",
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 01fc710c8181..2498ab025fa2 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -14,6 +14,7 @@
 #include <linux/cpuidle.h>
 #include <linux/cpu_pm.h>
 #include <linux/export.h>
+#include <linux/clockchips.h>
 
 #include <asm/cpuidle.h>
 #include <asm/proc-fns.h>
@@ -83,6 +84,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
 {
         struct idle_statedata *cx = state_ptr + index;
         u32 mpuss_can_lose_context = 0;
+        int cpu_id = smp_processor_id();
 
         /*
          * CPU0 has to wait and stay ON until CPU1 is OFF state.
@@ -110,6 +112,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
         mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
                                  (cx->mpu_logic_state == PWRDM_POWER_OFF);
 
+        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
+
         /*
          * Call idle CPU PM enter notifier chain so that
          * VFP and per CPU interrupt context is saved.
@@ -165,6 +169,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
         if (dev->cpu == 0 && mpuss_can_lose_context)
                 cpu_cluster_pm_exit();
 
+        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
+
 fail:
         cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
         cpu_done[dev->cpu] = false;
@@ -172,6 +178,16 @@ fail:
         return index;
 }
 
+/*
+ * For each cpu, setup the broadcast timer because local timers
+ * stops for the states above C1.
+ */
+static void omap_setup_broadcast_timer(void *arg)
+{
+        int cpu = smp_processor_id();
+        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
+}
+
 static struct cpuidle_driver omap4_idle_driver = {
         .name                           = "omap4_idle",
         .owner                          = THIS_MODULE,
@@ -189,8 +205,7 @@ static struct cpuidle_driver omap4_idle_driver = {
                         /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
                         .exit_latency = 328 + 440,
                         .target_residency = 960,
-                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
-                                 CPUIDLE_FLAG_TIMER_STOP,
+                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
                         .enter = omap_enter_idle_coupled,
                         .name = "C2",
                         .desc = "CPUx OFF, MPUSS CSWR",
@@ -199,8 +214,7 @@ static struct cpuidle_driver omap4_idle_driver = {
                         /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
                         .exit_latency = 460 + 518,
                         .target_residency = 1100,
-                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
-                                 CPUIDLE_FLAG_TIMER_STOP,
+                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
                         .enter = omap_enter_idle_coupled,
                         .name = "C3",
                         .desc = "CPUx OFF, MPUSS OSWR",
@@ -231,5 +245,8 @@ int __init omap4_idle_init(void)
         if (!cpu_clkdm[0] || !cpu_clkdm[1])
                 return -ENODEV;
 
+        /* Configure the broadcast timer on each cpu */
+        on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
+
         return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 892317294fdc..e829664e6a6c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -895,7 +895,7 @@ static struct omap_hwmod omap54xx_mcpdm_hwmod = {
          * current exception.
          */
 
-        .flags          = HWMOD_EXT_OPT_MAIN_CLK,
+        .flags          = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
         .main_clk       = "pad_clks_ck",
         .prcm = {
                 .omap4 = {
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5f5b975887fc..b5608b1f9fbd 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -70,6 +70,7 @@ static u32 errata;
 
 static struct omap_dma_global_context_registers {
         u32 dma_irqenable_l0;
+        u32 dma_irqenable_l1;
         u32 dma_ocp_sysconfig;
         u32 dma_gcr;
 } omap_dma_global_context;
@@ -1973,10 +1974,17 @@ static struct irqaction omap24xx_dma_irq;
 
 /*----------------------------------------------------------------------------*/
 
+/*
+ * Note that we are currently using only IRQENABLE_L0 and L1.
+ * As the DSP may be using IRQENABLE_L2 and L3, let's not
+ * touch those for now.
+ */
 void omap_dma_global_context_save(void)
 {
         omap_dma_global_context.dma_irqenable_l0 =
                 p->dma_read(IRQENABLE_L0, 0);
+        omap_dma_global_context.dma_irqenable_l1 =
+                p->dma_read(IRQENABLE_L1, 0);
         omap_dma_global_context.dma_ocp_sysconfig =
                 p->dma_read(OCP_SYSCONFIG, 0);
         omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0);
@@ -1991,6 +1999,8 @@ void omap_dma_global_context_restore(void)
                 OCP_SYSCONFIG, 0);
         p->dma_write(omap_dma_global_context.dma_irqenable_l0,
                 IRQENABLE_L0, 0);
+        p->dma_write(omap_dma_global_context.dma_irqenable_l1,
+                IRQENABLE_L1, 0);
 
         if (IS_DMA_ERRATA(DMA_ROMCODE_BUG))
                 p->dma_write(0x3 , IRQSTATUS_L0, 0);