diff options
author | Giridhar Malavali <giridhar.malavali@qlogic.com> | 2013-06-25 11:27:16 -0400 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2013-07-08 12:10:50 -0400 |
commit | 754d1243915d0fda6874fa0f1a926d85eb09e0b4 (patch) | |
tree | 9da0f631c0641f3832df608de3a88b8682c676b4 | |
parent | bb6a4df6db9e69e225bfc5a9d95a1675342e1873 (diff) |
[SCSI] qla2xxx: Clear the MBX_INTR_WAIT flag when the mailbox time-out happens.
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
-rw-r--r-- | drivers/scsi/qla2xxx/qla_dbg.c | 2 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_mbx.c | 10 |
2 files changed, 9 insertions, 3 deletions
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index cfa2a20dee97..3cc2105dd902 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c | |||
@@ -12,7 +12,7 @@ | |||
12 | * | Level | Last Value Used | Holes | | 12 | * | Level | Last Value Used | Holes | |
13 | * ---------------------------------------------------------------------- | 13 | * ---------------------------------------------------------------------- |
14 | * | Module Init and Probe | 0x014f | 0x4b,0xba,0xfa | | 14 | * | Module Init and Probe | 0x014f | 0x4b,0xba,0xfa | |
15 | * | Mailbox commands | 0x1179 | 0x111a-0x111b | | 15 | * | Mailbox commands | 0x117a | 0x111a-0x111b | |
16 | * | | | 0x1155-0x1158 | | 16 | * | | | 0x1155-0x1158 | |
17 | * | Device Discovery | 0x2095 | 0x2020-0x2022, | | 17 | * | Device Discovery | 0x2095 | 0x2020-0x2022, | |
18 | * | | | 0x2016 | | 18 | * | | | 0x2016 | |
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index 3587ec267fa6..144effd45ddf 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -177,8 +177,14 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
177 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | 177 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); |
178 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 178 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
179 | 179 | ||
180 | wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ); | 180 | if (!wait_for_completion_timeout(&ha->mbx_intr_comp, |
181 | 181 | mcp->tov * HZ)) { | |
182 | ql_dbg(ql_dbg_mbx, vha, 0x117a, | ||
183 | "cmd=%x Timeout.\n", command); | ||
184 | spin_lock_irqsave(&ha->hardware_lock, flags); | ||
185 | clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); | ||
186 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
187 | } | ||
182 | } else { | 188 | } else { |
183 | ql_dbg(ql_dbg_mbx, vha, 0x1011, | 189 | ql_dbg(ql_dbg_mbx, vha, 0x1011, |
184 | "Cmd=%x Polling Mode.\n", command); | 190 | "Cmd=%x Polling Mode.\n", command); |