diff options
author | Geert Uytterhoeven <geert+renesas@linux-m68k.org> | 2014-01-24 03:43:53 -0500 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-01-27 15:02:09 -0500 |
commit | 74da76865d57161cadf8f324281f23ed3eb5db9c (patch) | |
tree | d2d038d5ffbb99cfc0b632bd0dbfae14ef5da581 | |
parent | 79d2349542f38663c3096f389115b1f131d6e564 (diff) |
spi: rspi: Abstract 8/16-bit Data Register access
Add rspi_{write,read}_data(), to abstract 8-bit (QSPI, and RSPI on RZ/A1H)
versus 16-bit (RSPI) Data Register access.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | drivers/spi/spi-rspi.c | 56 |
1 files changed, 35 insertions, 21 deletions
diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 0e4d169c90d7..a0bb3c28ae91 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c | |||
@@ -192,6 +192,7 @@ struct rspi_data { | |||
192 | 192 | ||
193 | unsigned dma_width_16bit:1; | 193 | unsigned dma_width_16bit:1; |
194 | unsigned dma_callbacked:1; | 194 | unsigned dma_callbacked:1; |
195 | unsigned byte_access:1; | ||
195 | }; | 196 | }; |
196 | 197 | ||
197 | static void rspi_write8(const struct rspi_data *rspi, u8 data, u16 offset) | 198 | static void rspi_write8(const struct rspi_data *rspi, u8 data, u16 offset) |
@@ -219,10 +220,25 @@ static u16 rspi_read16(const struct rspi_data *rspi, u16 offset) | |||
219 | return ioread16(rspi->addr + offset); | 220 | return ioread16(rspi->addr + offset); |
220 | } | 221 | } |
221 | 222 | ||
223 | static void rspi_write_data(const struct rspi_data *rspi, u16 data) | ||
224 | { | ||
225 | if (rspi->byte_access) | ||
226 | rspi_write8(rspi, data, RSPI_SPDR); | ||
227 | else /* 16 bit */ | ||
228 | rspi_write16(rspi, data, RSPI_SPDR); | ||
229 | } | ||
230 | |||
231 | static u16 rspi_read_data(const struct rspi_data *rspi) | ||
232 | { | ||
233 | if (rspi->byte_access) | ||
234 | return rspi_read8(rspi, RSPI_SPDR); | ||
235 | else /* 16 bit */ | ||
236 | return rspi_read16(rspi, RSPI_SPDR); | ||
237 | } | ||
238 | |||
222 | /* optional functions */ | 239 | /* optional functions */ |
223 | struct spi_ops { | 240 | struct spi_ops { |
224 | int (*set_config_register)(const struct rspi_data *rspi, | 241 | int (*set_config_register)(struct rspi_data *rspi, int access_size); |
225 | int access_size); | ||
226 | int (*send_pio)(struct rspi_data *rspi, struct spi_transfer *t); | 242 | int (*send_pio)(struct rspi_data *rspi, struct spi_transfer *t); |
227 | int (*receive_pio)(struct rspi_data *rspi, struct spi_transfer *t); | 243 | int (*receive_pio)(struct rspi_data *rspi, struct spi_transfer *t); |
228 | }; | 244 | }; |
@@ -230,8 +246,7 @@ struct spi_ops { | |||
230 | /* | 246 | /* |
231 | * functions for RSPI | 247 | * functions for RSPI |
232 | */ | 248 | */ |
233 | static int rspi_set_config_register(const struct rspi_data *rspi, | 249 | static int rspi_set_config_register(struct rspi_data *rspi, int access_size) |
234 | int access_size) | ||
235 | { | 250 | { |
236 | int spbr; | 251 | int spbr; |
237 | 252 | ||
@@ -242,8 +257,9 @@ static int rspi_set_config_register(const struct rspi_data *rspi, | |||
242 | spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1; | 257 | spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1; |
243 | rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); | 258 | rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); |
244 | 259 | ||
245 | /* Sets number of frames to be used: 1 frame */ | 260 | /* Disable dummy transmission, set 16-bit word access, 1 frame */ |
246 | rspi_write8(rspi, 0x00, RSPI_SPDCR); | 261 | rspi_write8(rspi, 0, RSPI_SPDCR); |
262 | rspi->byte_access = 0; | ||
247 | 263 | ||
248 | /* Sets RSPCK, SSL, next-access delay value */ | 264 | /* Sets RSPCK, SSL, next-access delay value */ |
249 | rspi_write8(rspi, 0x00, RSPI_SPCKD); | 265 | rspi_write8(rspi, 0x00, RSPI_SPCKD); |
@@ -266,8 +282,7 @@ static int rspi_set_config_register(const struct rspi_data *rspi, | |||
266 | /* | 282 | /* |
267 | * functions for QSPI | 283 | * functions for QSPI |
268 | */ | 284 | */ |
269 | static int qspi_set_config_register(const struct rspi_data *rspi, | 285 | static int qspi_set_config_register(struct rspi_data *rspi, int access_size) |
270 | int access_size) | ||
271 | { | 286 | { |
272 | u16 spcmd; | 287 | u16 spcmd; |
273 | int spbr; | 288 | int spbr; |
@@ -279,8 +294,9 @@ static int qspi_set_config_register(const struct rspi_data *rspi, | |||
279 | spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz); | 294 | spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz); |
280 | rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); | 295 | rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR); |
281 | 296 | ||
282 | /* Sets number of frames to be used: 1 frame */ | 297 | /* Disable dummy transmission, set byte access */ |
283 | rspi_write8(rspi, 0x00, RSPI_SPDCR); | 298 | rspi_write8(rspi, 0, RSPI_SPDCR); |
299 | rspi->byte_access = 1; | ||
284 | 300 | ||
285 | /* Sets RSPCK, SSL, next-access delay value */ | 301 | /* Sets RSPCK, SSL, next-access delay value */ |
286 | rspi_write8(rspi, 0x00, RSPI_SPCKD); | 302 | rspi_write8(rspi, 0x00, RSPI_SPCKD); |
@@ -354,7 +370,7 @@ static int rspi_send_pio(struct rspi_data *rspi, struct spi_transfer *t) | |||
354 | return -ETIMEDOUT; | 370 | return -ETIMEDOUT; |
355 | } | 371 | } |
356 | 372 | ||
357 | rspi_write16(rspi, *data, RSPI_SPDR); | 373 | rspi_write_data(rspi, *data); |
358 | data++; | 374 | data++; |
359 | remain--; | 375 | remain--; |
360 | } | 376 | } |
@@ -380,14 +396,14 @@ static int qspi_send_pio(struct rspi_data *rspi, struct spi_transfer *t) | |||
380 | "%s: tx empty timeout\n", __func__); | 396 | "%s: tx empty timeout\n", __func__); |
381 | return -ETIMEDOUT; | 397 | return -ETIMEDOUT; |
382 | } | 398 | } |
383 | rspi_write8(rspi, *data++, RSPI_SPDR); | 399 | rspi_write_data(rspi, *data++); |
384 | 400 | ||
385 | if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { | 401 | if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { |
386 | dev_err(&rspi->master->dev, | 402 | dev_err(&rspi->master->dev, |
387 | "%s: receive timeout\n", __func__); | 403 | "%s: receive timeout\n", __func__); |
388 | return -ETIMEDOUT; | 404 | return -ETIMEDOUT; |
389 | } | 405 | } |
390 | rspi_read8(rspi, RSPI_SPDR); | 406 | rspi_read_data(rspi); |
391 | 407 | ||
392 | remain--; | 408 | remain--; |
393 | } | 409 | } |
@@ -525,7 +541,7 @@ static void rspi_receive_init(const struct rspi_data *rspi) | |||
525 | 541 | ||
526 | spsr = rspi_read8(rspi, RSPI_SPSR); | 542 | spsr = rspi_read8(rspi, RSPI_SPSR); |
527 | if (spsr & SPSR_SPRF) | 543 | if (spsr & SPSR_SPRF) |
528 | rspi_read16(rspi, RSPI_SPDR); /* dummy read */ | 544 | rspi_read_data(rspi); /* dummy read */ |
529 | if (spsr & SPSR_OVRF) | 545 | if (spsr & SPSR_OVRF) |
530 | rspi_write8(rspi, rspi_read8(rspi, RSPI_SPSR) & ~SPSR_OVRF, | 546 | rspi_write8(rspi, rspi_read8(rspi, RSPI_SPSR) & ~SPSR_OVRF, |
531 | RSPI_SPSR); | 547 | RSPI_SPSR); |
@@ -549,15 +565,14 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_transfer *t) | |||
549 | return -ETIMEDOUT; | 565 | return -ETIMEDOUT; |
550 | } | 566 | } |
551 | /* dummy write for generate clock */ | 567 | /* dummy write for generate clock */ |
552 | rspi_write16(rspi, DUMMY_DATA, RSPI_SPDR); | 568 | rspi_write_data(rspi, DUMMY_DATA); |
553 | 569 | ||
554 | if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { | 570 | if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { |
555 | dev_err(&rspi->master->dev, | 571 | dev_err(&rspi->master->dev, |
556 | "%s: receive timeout\n", __func__); | 572 | "%s: receive timeout\n", __func__); |
557 | return -ETIMEDOUT; | 573 | return -ETIMEDOUT; |
558 | } | 574 | } |
559 | /* SPDR allows 16 or 32-bit access only */ | 575 | *data = rspi_read_data(rspi); |
560 | *data = (u8)rspi_read16(rspi, RSPI_SPDR); | ||
561 | 576 | ||
562 | data++; | 577 | data++; |
563 | remain--; | 578 | remain--; |
@@ -572,7 +587,7 @@ static void qspi_receive_init(const struct rspi_data *rspi) | |||
572 | 587 | ||
573 | spsr = rspi_read8(rspi, RSPI_SPSR); | 588 | spsr = rspi_read8(rspi, RSPI_SPSR); |
574 | if (spsr & SPSR_SPRF) | 589 | if (spsr & SPSR_SPRF) |
575 | rspi_read8(rspi, RSPI_SPDR); /* dummy read */ | 590 | rspi_read_data(rspi); /* dummy read */ |
576 | rspi_write8(rspi, SPBFCR_TXRST | SPBFCR_RXRST, QSPI_SPBFCR); | 591 | rspi_write8(rspi, SPBFCR_TXRST | SPBFCR_RXRST, QSPI_SPBFCR); |
577 | rspi_write8(rspi, 0x00, QSPI_SPBFCR); | 592 | rspi_write8(rspi, 0x00, QSPI_SPBFCR); |
578 | } | 593 | } |
@@ -593,15 +608,14 @@ static int qspi_receive_pio(struct rspi_data *rspi, struct spi_transfer *t) | |||
593 | return -ETIMEDOUT; | 608 | return -ETIMEDOUT; |
594 | } | 609 | } |
595 | /* dummy write for generate clock */ | 610 | /* dummy write for generate clock */ |
596 | rspi_write8(rspi, DUMMY_DATA, RSPI_SPDR); | 611 | rspi_write_data(rspi, DUMMY_DATA); |
597 | 612 | ||
598 | if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { | 613 | if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) { |
599 | dev_err(&rspi->master->dev, | 614 | dev_err(&rspi->master->dev, |
600 | "%s: receive timeout\n", __func__); | 615 | "%s: receive timeout\n", __func__); |
601 | return -ETIMEDOUT; | 616 | return -ETIMEDOUT; |
602 | } | 617 | } |
603 | /* SPDR allows 8, 16 or 32-bit access */ | 618 | *data++ = rspi_read_data(rspi); |
604 | *data++ = rspi_read8(rspi, RSPI_SPDR); | ||
605 | remain--; | 619 | remain--; |
606 | } | 620 | } |
607 | 621 | ||