diff options
author | Andrey Gusakov <andrey.gusakov@cogentembedded.com> | 2014-12-18 15:43:03 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-12-22 19:18:23 -0500 |
commit | 7408d3061d2f04181820902fae6e92e4a73d5cc0 (patch) | |
tree | ba11de82bccd5834c3ac1c165b82858233f1dd94 | |
parent | f6b5dd4088d082b53eb135e1d6b4b213bf5ce127 (diff) |
ARM: shmobile: r8a7791: add MLB+ clock
Add MLB+ clock to R8A7791 device tree.
Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 10 | ||||
-rw-r--r-- | include/dt-bindings/clock/r8a7791-clock.h | 1 |
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 78d637135e77..28102265cc71 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi | |||
@@ -1154,17 +1154,17 @@ | |||
1154 | mstp8_clks: mstp8_clks@e6150990 { | 1154 | mstp8_clks: mstp8_clks@e6150990 { |
1155 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | 1155 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
1156 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; | 1156 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; |
1157 | clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, | 1157 | clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, |
1158 | <&zs_clk>, <&zs_clk>; | 1158 | <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; |
1159 | #clock-cells = <1>; | 1159 | #clock-cells = <1>; |
1160 | clock-indices = < | 1160 | clock-indices = < |
1161 | R8A7791_CLK_IPMMU_SGX | 1161 | R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB |
1162 | R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 | 1162 | R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 |
1163 | R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 | 1163 | R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 |
1164 | >; | 1164 | >; |
1165 | clock-output-names = | 1165 | clock-output-names = |
1166 | "ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", | 1166 | "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether", |
1167 | "sata0"; | 1167 | "sata1", "sata0"; |
1168 | }; | 1168 | }; |
1169 | mstp9_clks: mstp9_clks@e6150994 { | 1169 | mstp9_clks: mstp9_clks@e6150994 { |
1170 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; | 1170 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index ee9bb94423f3..f096f3f6c16a 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h | |||
@@ -92,6 +92,7 @@ | |||
92 | 92 | ||
93 | /* MSTP8 */ | 93 | /* MSTP8 */ |
94 | #define R8A7791_CLK_IPMMU_SGX 0 | 94 | #define R8A7791_CLK_IPMMU_SGX 0 |
95 | #define R8A7791_CLK_MLB 2 | ||
95 | #define R8A7791_CLK_VIN2 9 | 96 | #define R8A7791_CLK_VIN2 9 |
96 | #define R8A7791_CLK_VIN1 10 | 97 | #define R8A7791_CLK_VIN1 10 |
97 | #define R8A7791_CLK_VIN0 11 | 98 | #define R8A7791_CLK_VIN0 11 |