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authorMagnus Damm <damm@opensource.se>2013-02-18 08:46:57 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-03-12 13:13:20 -0400
commit73e5709875e8b28c63ef8261d61c9eb06b499964 (patch)
treec8441fa6e73a126a17424b768d692526b38e624c
parent8819ce4b8874ac1db7b52f7eac7cf9d8e3989102 (diff)
ARM: shmobile: Fix base address readout in headsmp-scu.S
Rework the early SCU setup code in headsmp-scu.S to read the base address in the same way as we use to fetch the address of the invalidation function. Reported-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/headsmp-scu.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
index 0b9317062b2a..7d113f898e7f 100644
--- a/arch/arm/mach-shmobile/headsmp-scu.S
+++ b/arch/arm/mach-shmobile/headsmp-scu.S
@@ -39,7 +39,7 @@ ENTRY(shmobile_secondary_vector_scu)
39 mrc p15, 0, r0, c0, c0, 5 @ read MIPDR 39 mrc p15, 0, r0, c0, c0, 5 @ read MIPDR
40 and r0, r0, #3 @ mask out cpu ID 40 and r0, r0, #3 @ mask out cpu ID
41 lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits 41 lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits
42 ldr r1, =shmobile_scu_base 42 ldr r1, 2f
43 ldr r1, [r1] @ SCU base address 43 ldr r1, [r1] @ SCU base address
44 ldr r2, [r1, #8] @ SCU Power Status Register 44 ldr r2, [r1, #8] @ SCU Power Status Register
45 mov r3, #3 45 mov r3, #3
@@ -48,6 +48,7 @@ ENTRY(shmobile_secondary_vector_scu)
48 48
49 ldr pc, 1f 49 ldr pc, 1f
501: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET 501: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
512: .long shmobile_scu_base - PAGE_OFFSET + PLAT_PHYS_OFFSET
51ENDPROC(shmobile_secondary_vector_scu) 52ENDPROC(shmobile_secondary_vector_scu)
52 53
53 .text 54 .text