diff options
| author | Akeem G. Abodunrin <akeem.g.abodunrin@intel.com> | 2013-01-29 05:14:55 -0500 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2013-02-15 04:40:16 -0500 |
| commit | 73bfcd9a2d38cc4b0a482ce8cbdf67b0fc85aa46 (patch) | |
| tree | de80dce46a4db664f1ba760ce786797266340780 | |
| parent | 21ba6fe19370f8008d1edd9aedd6dadd7e3fa8f8 (diff) | |
igb: Initialize PHY function pointers
This patch initializes PHY function pointers for device configuration.
Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| -rw-r--r-- | drivers/net/ethernet/intel/igb/e1000_82575.c | 112 |
1 files changed, 112 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c index 54a7c20d9fa0..fc69414f8250 100644 --- a/drivers/net/ethernet/intel/igb/e1000_82575.c +++ b/drivers/net/ethernet/intel/igb/e1000_82575.c | |||
| @@ -111,6 +111,118 @@ static bool igb_sgmii_uses_mdio_82575(struct e1000_hw *hw) | |||
| 111 | return ext_mdio; | 111 | return ext_mdio; |
| 112 | } | 112 | } |
| 113 | 113 | ||
| 114 | /** | ||
| 115 | * igb_init_phy_params_82575 - Init PHY func ptrs. | ||
| 116 | * @hw: pointer to the HW structure | ||
| 117 | **/ | ||
| 118 | static s32 igb_init_phy_params_82575(struct e1000_hw *hw) | ||
| 119 | { | ||
| 120 | struct e1000_phy_info *phy = &hw->phy; | ||
| 121 | s32 ret_val = 0; | ||
| 122 | u32 ctrl_ext; | ||
| 123 | |||
| 124 | if (hw->phy.media_type != e1000_media_type_copper) { | ||
| 125 | phy->type = e1000_phy_none; | ||
| 126 | goto out; | ||
| 127 | } | ||
| 128 | |||
| 129 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; | ||
| 130 | phy->reset_delay_us = 100; | ||
| 131 | |||
| 132 | ctrl_ext = rd32(E1000_CTRL_EXT); | ||
| 133 | |||
| 134 | if (igb_sgmii_active_82575(hw)) { | ||
| 135 | phy->ops.reset = igb_phy_hw_reset_sgmii_82575; | ||
| 136 | ctrl_ext |= E1000_CTRL_I2C_ENA; | ||
| 137 | } else { | ||
| 138 | phy->ops.reset = igb_phy_hw_reset; | ||
| 139 | ctrl_ext &= ~E1000_CTRL_I2C_ENA; | ||
| 140 | } | ||
| 141 | |||
| 142 | wr32(E1000_CTRL_EXT, ctrl_ext); | ||
| 143 | igb_reset_mdicnfg_82580(hw); | ||
| 144 | |||
| 145 | if (igb_sgmii_active_82575(hw) && !igb_sgmii_uses_mdio_82575(hw)) { | ||
| 146 | phy->ops.read_reg = igb_read_phy_reg_sgmii_82575; | ||
| 147 | phy->ops.write_reg = igb_write_phy_reg_sgmii_82575; | ||
| 148 | } else { | ||
| 149 | switch (hw->mac.type) { | ||
| 150 | case e1000_82580: | ||
| 151 | case e1000_i350: | ||
| 152 | phy->ops.read_reg = igb_read_phy_reg_82580; | ||
| 153 | phy->ops.write_reg = igb_write_phy_reg_82580; | ||
| 154 | break; | ||
| 155 | case e1000_i210: | ||
| 156 | case e1000_i211: | ||
| 157 | phy->ops.read_reg = igb_read_phy_reg_gs40g; | ||
| 158 | phy->ops.write_reg = igb_write_phy_reg_gs40g; | ||
| 159 | break; | ||
| 160 | default: | ||
| 161 | phy->ops.read_reg = igb_read_phy_reg_igp; | ||
| 162 | phy->ops.write_reg = igb_write_phy_reg_igp; | ||
| 163 | } | ||
| 164 | } | ||
| 165 | |||
| 166 | /* set lan id */ | ||
| 167 | hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >> | ||
| 168 | E1000_STATUS_FUNC_SHIFT; | ||
| 169 | |||
| 170 | /* Set phy->phy_addr and phy->id. */ | ||
| 171 | ret_val = igb_get_phy_id_82575(hw); | ||
| 172 | if (ret_val) | ||
| 173 | return ret_val; | ||
| 174 | |||
| 175 | /* Verify phy id and set remaining function pointers */ | ||
| 176 | switch (phy->id) { | ||
| 177 | case I347AT4_E_PHY_ID: | ||
| 178 | case M88E1112_E_PHY_ID: | ||
| 179 | case M88E1111_I_PHY_ID: | ||
| 180 | phy->type = e1000_phy_m88; | ||
| 181 | phy->ops.get_phy_info = igb_get_phy_info_m88; | ||
| 182 | if (phy->id == I347AT4_E_PHY_ID || | ||
| 183 | phy->id == M88E1112_E_PHY_ID) | ||
| 184 | phy->ops.get_cable_length = | ||
| 185 | igb_get_cable_length_m88_gen2; | ||
| 186 | else | ||
| 187 | phy->ops.get_cable_length = igb_get_cable_length_m88; | ||
| 188 | phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; | ||
| 189 | break; | ||
| 190 | case IGP03E1000_E_PHY_ID: | ||
| 191 | phy->type = e1000_phy_igp_3; | ||
| 192 | phy->ops.get_phy_info = igb_get_phy_info_igp; | ||
| 193 | phy->ops.get_cable_length = igb_get_cable_length_igp_2; | ||
| 194 | phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_igp; | ||
| 195 | phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82575; | ||
| 196 | phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state; | ||
| 197 | break; | ||
| 198 | case I82580_I_PHY_ID: | ||
| 199 | case I350_I_PHY_ID: | ||
| 200 | phy->type = e1000_phy_82580; | ||
| 201 | phy->ops.force_speed_duplex = | ||
| 202 | igb_phy_force_speed_duplex_82580; | ||
| 203 | phy->ops.get_cable_length = igb_get_cable_length_82580; | ||
| 204 | phy->ops.get_phy_info = igb_get_phy_info_82580; | ||
| 205 | phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580; | ||
| 206 | phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580; | ||
| 207 | break; | ||
| 208 | case I210_I_PHY_ID: | ||
| 209 | phy->type = e1000_phy_i210; | ||
| 210 | phy->ops.check_polarity = igb_check_polarity_m88; | ||
| 211 | phy->ops.get_phy_info = igb_get_phy_info_m88; | ||
| 212 | phy->ops.get_cable_length = igb_get_cable_length_m88_gen2; | ||
| 213 | phy->ops.set_d0_lplu_state = igb_set_d0_lplu_state_82580; | ||
| 214 | phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580; | ||
| 215 | phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; | ||
| 216 | break; | ||
| 217 | default: | ||
| 218 | ret_val = -E1000_ERR_PHY; | ||
| 219 | goto out; | ||
| 220 | } | ||
| 221 | |||
| 222 | out: | ||
| 223 | return ret_val; | ||
| 224 | } | ||
| 225 | |||
| 114 | static s32 igb_get_invariants_82575(struct e1000_hw *hw) | 226 | static s32 igb_get_invariants_82575(struct e1000_hw *hw) |
| 115 | { | 227 | { |
| 116 | struct e1000_phy_info *phy = &hw->phy; | 228 | struct e1000_phy_info *phy = &hw->phy; |
