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authorPaul Mackerras <paulus@samba.org>2014-03-24 19:47:08 -0400
committerPaul Mackerras <paulus@samba.org>2014-03-29 04:58:52 -0400
commit72cde5a88d37ba88ad1d47aecf957a9e528636d7 (patch)
tree0354d35ef6385dfb433f1ef565d9d01473afda0c
parentc5fb80d3b24f6280bd6f608d8f2a02139a0fabaf (diff)
KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8
Currently we save the host PMU configuration, counter values, etc., when entering a guest, and restore it on return from the guest. (We have to do this because the guest has control of the PMU while it is executing.) However, we missed saving/restoring the SIAR and SDAR registers, as well as the registers which are new on POWER8, namely SIER and MMCR2. This adds code to save the values of these registers when entering the guest and restore them on exit. This also works around the bug in POWER8 where setting PMAE with a counter already negative doesn't generate an interrupt. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--arch/powerpc/include/asm/kvm_book3s_asm.h2
-rw-r--r--arch/powerpc/kvm/book3s_hv_interrupts.S22
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S10
3 files changed, 33 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h
index f3a91dc02c98..821725c1bf46 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -94,7 +94,7 @@ struct kvmppc_host_state {
94 unsigned long xics_phys; 94 unsigned long xics_phys;
95 u32 saved_xirr; 95 u32 saved_xirr;
96 u64 dabr; 96 u64 dabr;
97 u64 host_mmcr[3]; 97 u64 host_mmcr[7]; /* MMCR 0,1,A, SIAR, SDAR, MMCR2, SIER */
98 u32 host_pmc[8]; 98 u32 host_pmc[8];
99 u64 host_purr; 99 u64 host_purr;
100 u64 host_spurr; 100 u64 host_spurr;
diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S b/arch/powerpc/kvm/book3s_hv_interrupts.S
index e873796b1a29..e18e3cfc32de 100644
--- a/arch/powerpc/kvm/book3s_hv_interrupts.S
+++ b/arch/powerpc/kvm/book3s_hv_interrupts.S
@@ -71,6 +71,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
71 mtmsrd r10,1 71 mtmsrd r10,1
72 72
73 /* Save host PMU registers */ 73 /* Save host PMU registers */
74BEGIN_FTR_SECTION
75 /* Work around P8 PMAE bug */
76 li r3, -1
77 clrrdi r3, r3, 10
78 mfspr r8, SPRN_MMCR2
79 mtspr SPRN_MMCR2, r3 /* freeze all counters using MMCR2 */
80 isync
81END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
74 li r3, 1 82 li r3, 1
75 sldi r3, r3, 31 /* MMCR0_FC (freeze counters) bit */ 83 sldi r3, r3, 31 /* MMCR0_FC (freeze counters) bit */
76 mfspr r7, SPRN_MMCR0 /* save MMCR0 */ 84 mfspr r7, SPRN_MMCR0 /* save MMCR0 */
@@ -87,9 +95,18 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
87 cmpwi r5, 0 95 cmpwi r5, 0
88 beq 31f /* skip if not */ 96 beq 31f /* skip if not */
89 mfspr r5, SPRN_MMCR1 97 mfspr r5, SPRN_MMCR1
98 mfspr r9, SPRN_SIAR
99 mfspr r10, SPRN_SDAR
90 std r7, HSTATE_MMCR(r13) 100 std r7, HSTATE_MMCR(r13)
91 std r5, HSTATE_MMCR + 8(r13) 101 std r5, HSTATE_MMCR + 8(r13)
92 std r6, HSTATE_MMCR + 16(r13) 102 std r6, HSTATE_MMCR + 16(r13)
103 std r9, HSTATE_MMCR + 24(r13)
104 std r10, HSTATE_MMCR + 32(r13)
105BEGIN_FTR_SECTION
106 mfspr r9, SPRN_SIER
107 std r8, HSTATE_MMCR + 40(r13)
108 std r9, HSTATE_MMCR + 48(r13)
109END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
93 mfspr r3, SPRN_PMC1 110 mfspr r3, SPRN_PMC1
94 mfspr r5, SPRN_PMC2 111 mfspr r5, SPRN_PMC2
95 mfspr r6, SPRN_PMC3 112 mfspr r6, SPRN_PMC3
@@ -110,6 +127,11 @@ BEGIN_FTR_SECTION
110 stw r10, HSTATE_PMC + 24(r13) 127 stw r10, HSTATE_PMC + 24(r13)
111 stw r11, HSTATE_PMC + 28(r13) 128 stw r11, HSTATE_PMC + 28(r13)
112END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) 129END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
130BEGIN_FTR_SECTION
131 mfspr r9, SPRN_SIER
132 std r8, HSTATE_MMCR + 40(r13)
133 std r9, HSTATE_MMCR + 48(r13)
134END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
11331: 13531:
114 136
115 /* 137 /*
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 42bd2e694b1b..4963335198fa 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -109,8 +109,18 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
109 ld r3, HSTATE_MMCR(r13) 109 ld r3, HSTATE_MMCR(r13)
110 ld r4, HSTATE_MMCR + 8(r13) 110 ld r4, HSTATE_MMCR + 8(r13)
111 ld r5, HSTATE_MMCR + 16(r13) 111 ld r5, HSTATE_MMCR + 16(r13)
112 ld r6, HSTATE_MMCR + 24(r13)
113 ld r7, HSTATE_MMCR + 32(r13)
112 mtspr SPRN_MMCR1, r4 114 mtspr SPRN_MMCR1, r4
113 mtspr SPRN_MMCRA, r5 115 mtspr SPRN_MMCRA, r5
116 mtspr SPRN_SIAR, r6
117 mtspr SPRN_SDAR, r7
118BEGIN_FTR_SECTION
119 ld r8, HSTATE_MMCR + 40(r13)
120 ld r9, HSTATE_MMCR + 48(r13)
121 mtspr SPRN_MMCR2, r8
122 mtspr SPRN_SIER, r9
123END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
114 mtspr SPRN_MMCR0, r3 124 mtspr SPRN_MMCR0, r3
115 isync 125 isync
11623: 12623: