diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-07-17 12:09:25 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-08-05 08:53:33 -0400 |
| commit | 71ecc97eaa365b5020cd85a793f4d59c96c81e68 (patch) | |
| tree | 88dc4a28b58021bd28388ff6d50e9b23b92b68be | |
| parent | 02376d8282b88f07d0716da6155094c8760b1a13 (diff) | |
drm/radeon: track pinned memory (v2)
So we know how large an allocation we can allow.
v2: incorporate Michel's comments
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.c | 16 |
2 files changed, 17 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 67e9931fd76a..ee101b24ede1 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -2353,6 +2353,10 @@ struct radeon_device { | |||
| 2353 | 2353 | ||
| 2354 | struct dev_pm_domain vga_pm_domain; | 2354 | struct dev_pm_domain vga_pm_domain; |
| 2355 | bool have_disp_power_ref; | 2355 | bool have_disp_power_ref; |
| 2356 | |||
| 2357 | /* tracking pinned memory */ | ||
| 2358 | u64 vram_pin_size; | ||
| 2359 | u64 gart_pin_size; | ||
| 2356 | }; | 2360 | }; |
| 2357 | 2361 | ||
| 2358 | bool radeon_is_px(struct drm_device *dev); | 2362 | bool radeon_is_px(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 1b05a4de5c0a..a00cf17a0510 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
| @@ -306,9 +306,13 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, | |||
| 306 | bo->pin_count = 1; | 306 | bo->pin_count = 1; |
| 307 | if (gpu_addr != NULL) | 307 | if (gpu_addr != NULL) |
| 308 | *gpu_addr = radeon_bo_gpu_offset(bo); | 308 | *gpu_addr = radeon_bo_gpu_offset(bo); |
| 309 | } | 309 | if (domain == RADEON_GEM_DOMAIN_VRAM) |
| 310 | if (unlikely(r != 0)) | 310 | bo->rdev->vram_pin_size += radeon_bo_size(bo); |
| 311 | else | ||
| 312 | bo->rdev->gart_pin_size += radeon_bo_size(bo); | ||
| 313 | } else { | ||
| 311 | dev_err(bo->rdev->dev, "%p pin failed\n", bo); | 314 | dev_err(bo->rdev->dev, "%p pin failed\n", bo); |
| 315 | } | ||
| 312 | return r; | 316 | return r; |
| 313 | } | 317 | } |
| 314 | 318 | ||
| @@ -331,8 +335,14 @@ int radeon_bo_unpin(struct radeon_bo *bo) | |||
| 331 | for (i = 0; i < bo->placement.num_placement; i++) | 335 | for (i = 0; i < bo->placement.num_placement; i++) |
| 332 | bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; | 336 | bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; |
| 333 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); | 337 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); |
| 334 | if (unlikely(r != 0)) | 338 | if (likely(r == 0)) { |
| 339 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) | ||
| 340 | bo->rdev->vram_pin_size -= radeon_bo_size(bo); | ||
| 341 | else | ||
| 342 | bo->rdev->gart_pin_size -= radeon_bo_size(bo); | ||
| 343 | } else { | ||
| 335 | dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); | 344 | dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); |
| 345 | } | ||
| 336 | return r; | 346 | return r; |
| 337 | } | 347 | } |
| 338 | 348 | ||