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authorDave Airlie <airlied@redhat.com>2015-05-03 18:56:47 -0400
committerDave Airlie <airlied@redhat.com>2015-05-03 18:56:47 -0400
commit71aee81937963ccb07b3fa1b912e4cc6cd77dfa8 (patch)
treef888b081e7855494e30407711d98b93525220d5b
parentdf9ebeb2da3ae0122f44521ee833d31e1a2b3845 (diff)
parenta04f90a33fab74789b91fc9739999012f11022d1 (diff)
Merge tag 'drm-intel-fixes-2015-04-30' of git://anongit.freedesktop.org/drm-intel into drm-fixes
Just a single intel fix * tag 'drm-intel-fixes-2015-04-30' of git://anongit.freedesktop.org/drm-intel: drm/i915/chv: Implement WaDisableShadowRegForCpd
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/intel_uncore.c8
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 3da1af46625c..773d1d24e604 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6074,6 +6074,8 @@ enum skl_disp_power_wells {
6074#define GTFIFOCTL 0x120008 6074#define GTFIFOCTL 0x120008
6075#define GT_FIFO_FREE_ENTRIES_MASK 0x7f 6075#define GT_FIFO_FREE_ENTRIES_MASK 0x7f
6076#define GT_FIFO_NUM_RESERVED_ENTRIES 20 6076#define GT_FIFO_NUM_RESERVED_ENTRIES 20
6077#define GT_FIFO_CTL_BLOCK_ALL_POLICY_STALL (1 << 12)
6078#define GT_FIFO_CTL_RC6_POLICY_STALL (1 << 11)
6077 6079
6078#define HSW_IDICR 0x9008 6080#define HSW_IDICR 0x9008
6079#define IDIHASHMSK(x) (((x) & 0x3f) << 16) 6081#define IDIHASHMSK(x) (((x) & 0x3f) << 16)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index ab5cc94588e1..ff2a74651dd4 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -360,6 +360,14 @@ static void __intel_uncore_early_sanitize(struct drm_device *dev,
360 __raw_i915_write32(dev_priv, GTFIFODBG, 360 __raw_i915_write32(dev_priv, GTFIFODBG,
361 __raw_i915_read32(dev_priv, GTFIFODBG)); 361 __raw_i915_read32(dev_priv, GTFIFODBG));
362 362
363 /* WaDisableShadowRegForCpd:chv */
364 if (IS_CHERRYVIEW(dev)) {
365 __raw_i915_write32(dev_priv, GTFIFOCTL,
366 __raw_i915_read32(dev_priv, GTFIFOCTL) |
367 GT_FIFO_CTL_BLOCK_ALL_POLICY_STALL |
368 GT_FIFO_CTL_RC6_POLICY_STALL);
369 }
370
363 intel_uncore_forcewake_reset(dev, restore_forcewake); 371 intel_uncore_forcewake_reset(dev, restore_forcewake);
364} 372}
365 373