aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAntoine Ténart <antoine.tenart@free-electrons.com>2014-07-30 14:14:00 -0400
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2014-10-29 14:44:28 -0400
commit70a2b717d0a32d4702ae45880fc1370d9ce93ec0 (patch)
treec9d304f321937d0859fd961db31050bbcd1d21b6
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
ARM: dts: berlin: add the AHCI node for the BG2Q
The BG2Q has an AHCI SATA controller. Add the corresponding nodes (AHCI, PHY) into its device tree. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-rw-r--r--arch/arm/boot/dts/berlin2q.dtsi39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 891d56b03922..c96a0135f0f8 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -364,6 +364,45 @@
364 }; 364 };
365 }; 365 };
366 366
367 ahci: sata@e90000 {
368 compatible = "marvell,berlin2q-ahci", "generic-ahci";
369 reg = <0xe90000 0x1000>;
370 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
371 clocks = <&chip CLKID_SATA>;
372 #address-cells = <1>;
373 #size-cells = <0>;
374
375 sata0: sata-port@0 {
376 reg = <0>;
377 phys = <&sata_phy 0>;
378 status = "disabled";
379 };
380
381 sata1: sata-port@1 {
382 reg = <1>;
383 phys = <&sata_phy 1>;
384 status = "disabled";
385 };
386 };
387
388 sata_phy: phy@e900a0 {
389 compatible = "marvell,berlin2q-sata-phy";
390 reg = <0xe900a0 0x200>;
391 clocks = <&chip CLKID_SATA>;
392 #address-cells = <1>;
393 #size-cells = <0>;
394 #phy-cells = <1>;
395 status = "disabled";
396
397 sata-phy@0 {
398 reg = <0>;
399 };
400
401 sata-phy@1 {
402 reg = <1>;
403 };
404 };
405
367 apb@fc0000 { 406 apb@fc0000 {
368 compatible = "simple-bus"; 407 compatible = "simple-bus";
369 #address-cells = <1>; 408 #address-cells = <1>;