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authorDamien Lespiau <damien.lespiau@intel.com>2015-02-09 14:33:07 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-02-13 17:28:31 -0500
commit6f97235b8be5ee8721e784d0b3b95ef2f95edf7c (patch)
tree496a222255e484e9d4d0035ee523af946ef83d6e
parente25dca861395dd69270a19058932a6676c966522 (diff)
drm/i915/skl: Document the WM read latency W/A with its name
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Nick Hoath <nicholas.hoath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9b9433f1e1c7..613827596aad 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1701,6 +1701,8 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[8])
1701 GEN9_MEM_LATENCY_LEVEL_MASK; 1701 GEN9_MEM_LATENCY_LEVEL_MASK;
1702 1702
1703 /* 1703 /*
1704 * WaWmMemoryReadLatency:skl
1705 *
1704 * punit doesn't take into account the read latency so we need 1706 * punit doesn't take into account the read latency so we need
1705 * to add 2us to the various latency levels we retrieve from 1707 * to add 2us to the various latency levels we retrieve from
1706 * the punit. 1708 * the punit.