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authorChandrabhanu Mahapatra <cmahapatra@ti.com>2012-06-21 01:53:56 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-06-29 02:41:29 -0400
commit6f1891fc70d99eef9877925821572b8a3c5d9fd5 (patch)
treec1f72579e5b8e4721da303cb0c083515601f14fa
parente86d456a23f3ecbb97704e63899ecfd6ec54b8d8 (diff)
OMAPDSS: Add dump and debug support for LCD3
DISPC functions have been modified to provide clock and register dumps and debug support for the LCD3 manager. Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r--drivers/video/omap2/dss/dispc.c70
1 files changed, 40 insertions, 30 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index d19665e74e72..e48d1c10a3cf 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2853,12 +2853,32 @@ unsigned long dispc_core_clk_rate(void)
2853 return fclk / lcd; 2853 return fclk / lcd;
2854} 2854}
2855 2855
2856void dispc_dump_clocks(struct seq_file *s) 2856static void dispc_dump_clocks_channel(struct seq_file *s, enum omap_channel channel)
2857{ 2857{
2858 int lcd, pcd; 2858 int lcd, pcd;
2859 enum omap_dss_clk_source lcd_clk_src;
2860
2861 seq_printf(s, "- %s -\n", mgr_desc[channel].name);
2862
2863 lcd_clk_src = dss_get_lcd_clk_source(channel);
2864
2865 seq_printf(s, "%s clk source = %s (%s)\n", mgr_desc[channel].name,
2866 dss_get_generic_clk_source_name(lcd_clk_src),
2867 dss_feat_get_clk_source_name(lcd_clk_src));
2868
2869 dispc_mgr_get_lcd_divisor(channel, &lcd, &pcd);
2870
2871 seq_printf(s, "lck\t\t%-16lulck div\t%u\n",
2872 dispc_mgr_lclk_rate(channel), lcd);
2873 seq_printf(s, "pck\t\t%-16lupck div\t%u\n",
2874 dispc_mgr_pclk_rate(channel), pcd);
2875}
2876
2877void dispc_dump_clocks(struct seq_file *s)
2878{
2879 int lcd;
2859 u32 l; 2880 u32 l;
2860 enum omap_dss_clk_source dispc_clk_src = dss_get_dispc_clk_source(); 2881 enum omap_dss_clk_source dispc_clk_src = dss_get_dispc_clk_source();
2861 enum omap_dss_clk_source lcd_clk_src;
2862 2882
2863 if (dispc_runtime_get()) 2883 if (dispc_runtime_get())
2864 return; 2884 return;
@@ -2879,36 +2899,13 @@ void dispc_dump_clocks(struct seq_file *s)
2879 seq_printf(s, "lck\t\t%-16lulck div\t%u\n", 2899 seq_printf(s, "lck\t\t%-16lulck div\t%u\n",
2880 (dispc_fclk_rate()/lcd), lcd); 2900 (dispc_fclk_rate()/lcd), lcd);
2881 } 2901 }
2882 seq_printf(s, "- LCD1 -\n");
2883 2902
2884 lcd_clk_src = dss_get_lcd_clk_source(OMAP_DSS_CHANNEL_LCD); 2903 dispc_dump_clocks_channel(s, OMAP_DSS_CHANNEL_LCD);
2885 2904
2886 seq_printf(s, "lcd1_clk source = %s (%s)\n", 2905 if (dss_has_feature(FEAT_MGR_LCD2))
2887 dss_get_generic_clk_source_name(lcd_clk_src), 2906 dispc_dump_clocks_channel(s, OMAP_DSS_CHANNEL_LCD2);
2888 dss_feat_get_clk_source_name(lcd_clk_src)); 2907 if (dss_has_feature(FEAT_MGR_LCD3))
2889 2908 dispc_dump_clocks_channel(s, OMAP_DSS_CHANNEL_LCD3);
2890 dispc_mgr_get_lcd_divisor(OMAP_DSS_CHANNEL_LCD, &lcd, &pcd);
2891
2892 seq_printf(s, "lck\t\t%-16lulck div\t%u\n",
2893 dispc_mgr_lclk_rate(OMAP_DSS_CHANNEL_LCD), lcd);
2894 seq_printf(s, "pck\t\t%-16lupck div\t%u\n",
2895 dispc_mgr_pclk_rate(OMAP_DSS_CHANNEL_LCD), pcd);
2896 if (dss_has_feature(FEAT_MGR_LCD2)) {
2897 seq_printf(s, "- LCD2 -\n");
2898
2899 lcd_clk_src = dss_get_lcd_clk_source(OMAP_DSS_CHANNEL_LCD2);
2900
2901 seq_printf(s, "lcd2_clk source = %s (%s)\n",
2902 dss_get_generic_clk_source_name(lcd_clk_src),
2903 dss_feat_get_clk_source_name(lcd_clk_src));
2904
2905 dispc_mgr_get_lcd_divisor(OMAP_DSS_CHANNEL_LCD2, &lcd, &pcd);
2906
2907 seq_printf(s, "lck\t\t%-16lulck div\t%u\n",
2908 dispc_mgr_lclk_rate(OMAP_DSS_CHANNEL_LCD2), lcd);
2909 seq_printf(s, "pck\t\t%-16lupck div\t%u\n",
2910 dispc_mgr_pclk_rate(OMAP_DSS_CHANNEL_LCD2), pcd);
2911 }
2912 2909
2913 dispc_runtime_put(); 2910 dispc_runtime_put();
2914} 2911}
@@ -2961,6 +2958,12 @@ void dispc_dump_irqs(struct seq_file *s)
2961 PIS(ACBIAS_COUNT_STAT2); 2958 PIS(ACBIAS_COUNT_STAT2);
2962 PIS(SYNC_LOST2); 2959 PIS(SYNC_LOST2);
2963 } 2960 }
2961 if (dss_has_feature(FEAT_MGR_LCD3)) {
2962 PIS(FRAMEDONE3);
2963 PIS(VSYNC3);
2964 PIS(ACBIAS_COUNT_STAT3);
2965 PIS(SYNC_LOST3);
2966 }
2964#undef PIS 2967#undef PIS
2965} 2968}
2966#endif 2969#endif
@@ -2972,6 +2975,7 @@ static void dispc_dump_regs(struct seq_file *s)
2972 [OMAP_DSS_CHANNEL_LCD] = "LCD", 2975 [OMAP_DSS_CHANNEL_LCD] = "LCD",
2973 [OMAP_DSS_CHANNEL_DIGIT] = "TV", 2976 [OMAP_DSS_CHANNEL_DIGIT] = "TV",
2974 [OMAP_DSS_CHANNEL_LCD2] = "LCD2", 2977 [OMAP_DSS_CHANNEL_LCD2] = "LCD2",
2978 [OMAP_DSS_CHANNEL_LCD3] = "LCD3",
2975 }; 2979 };
2976 const char *ovl_names[] = { 2980 const char *ovl_names[] = {
2977 [OMAP_DSS_GFX] = "GFX", 2981 [OMAP_DSS_GFX] = "GFX",
@@ -3004,6 +3008,10 @@ static void dispc_dump_regs(struct seq_file *s)
3004 DUMPREG(DISPC_CONTROL2); 3008 DUMPREG(DISPC_CONTROL2);
3005 DUMPREG(DISPC_CONFIG2); 3009 DUMPREG(DISPC_CONFIG2);
3006 } 3010 }
3011 if (dss_has_feature(FEAT_MGR_LCD3)) {
3012 DUMPREG(DISPC_CONTROL3);
3013 DUMPREG(DISPC_CONFIG3);
3014 }
3007 3015
3008#undef DUMPREG 3016#undef DUMPREG
3009 3017
@@ -3386,6 +3394,8 @@ static void print_irq_status(u32 status)
3386 PIS(SYNC_LOST_DIGIT); 3394 PIS(SYNC_LOST_DIGIT);
3387 if (dss_has_feature(FEAT_MGR_LCD2)) 3395 if (dss_has_feature(FEAT_MGR_LCD2))
3388 PIS(SYNC_LOST2); 3396 PIS(SYNC_LOST2);
3397 if (dss_has_feature(FEAT_MGR_LCD3))
3398 PIS(SYNC_LOST3);
3389#undef PIS 3399#undef PIS
3390 3400
3391 printk("\n"); 3401 printk("\n");