diff options
author | Dave Airlie <airlied@redhat.com> | 2013-07-01 23:31:26 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2013-07-01 23:31:26 -0400 |
commit | 6ef92fbea2b5680204da5b8796e8972109d01bd3 (patch) | |
tree | 8f671df217823306b7e469e4df7aff09d3f7a943 | |
parent | f7d452f4fd5d86f764807a1234a407deb5b105ef (diff) | |
parent | 7982128c3d447df27db963af67bc6b8dc7efb1de (diff) |
Merge branch 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more patches for 3.11:
- add debugfs interface to check current DPM state
- Fix a bug that caused problems with DPM on BTC+ asics.
* 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon/dpm: add debugfs support for SI
drm/radeon/dpm: add debugfs support for cayman
drm/radeon/dpm: add debugfs support for TN
drm/radeon/dpm: add debugfs support for ON/LN
drm/radeon/dpm: add debugfs support for 7xx/evergreen/btc
drm/radeon/dpm: add debugfs support for rv6xx
drm/radeon/dpm: add infrastructure to support debugfs info
drm/radeon/dpm: re-enable state transitions for Cayman
drm/radeon/dpm: re-enable state transitions for BTC
drm/radeon: fix typo in radeon_atom_init_mc_reg_table()
drm/radeon/atom: fix endian bug in radeon_atom_init_mc_reg_table()
drm/radeon: remove sumo dpm/uvd bringup leftovers
-rw-r--r-- | drivers/gpu/drm/radeon/btc_dpm.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dpm.c | 25 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/nid.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 40 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv6xx_dpm.c | 25 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770_dpm.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770d.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/sid.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/sumo_dpm.c | 45 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/trinity_dpm.c | 21 |
15 files changed, 206 insertions, 39 deletions
diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c index bab018583417..f072660c7665 100644 --- a/drivers/gpu/drm/radeon/btc_dpm.c +++ b/drivers/gpu/drm/radeon/btc_dpm.c | |||
@@ -2326,14 +2326,11 @@ int btc_dpm_set_power_state(struct radeon_device *rdev) | |||
2326 | return ret; | 2326 | return ret; |
2327 | } | 2327 | } |
2328 | 2328 | ||
2329 | #if 0 | ||
2330 | /* XXX */ | ||
2331 | ret = rv770_unrestrict_performance_levels_after_switch(rdev); | 2329 | ret = rv770_unrestrict_performance_levels_after_switch(rdev); |
2332 | if (ret) { | 2330 | if (ret) { |
2333 | DRM_ERROR("rv770_unrestrict_performance_levels_after_switch failed\n"); | 2331 | DRM_ERROR("rv770_unrestrict_performance_levels_after_switch failed\n"); |
2334 | return ret; | 2332 | return ret; |
2335 | } | 2333 | } |
2336 | #endif | ||
2337 | 2334 | ||
2338 | return 0; | 2335 | return 0; |
2339 | } | 2336 | } |
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 777d17e61312..8497ca6bb0b1 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c | |||
@@ -1036,7 +1036,6 @@ static int ni_restrict_performance_levels_before_switch(struct radeon_device *rd | |||
1036 | 0 : -EINVAL; | 1036 | 0 : -EINVAL; |
1037 | } | 1037 | } |
1038 | 1038 | ||
1039 | #if 0 | ||
1040 | static int ni_unrestrict_performance_levels_after_switch(struct radeon_device *rdev) | 1039 | static int ni_unrestrict_performance_levels_after_switch(struct radeon_device *rdev) |
1041 | { | 1040 | { |
1042 | if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) | 1041 | if (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetForcedLevels, 0) != PPSMC_Result_OK) |
@@ -1045,7 +1044,6 @@ static int ni_unrestrict_performance_levels_after_switch(struct radeon_device *r | |||
1045 | return (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 0) == PPSMC_Result_OK) ? | 1044 | return (ni_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_SetEnabledLevels, 0) == PPSMC_Result_OK) ? |
1046 | 0 : -EINVAL; | 1045 | 0 : -EINVAL; |
1047 | } | 1046 | } |
1048 | #endif | ||
1049 | 1047 | ||
1050 | static void ni_stop_smc(struct radeon_device *rdev) | 1048 | static void ni_stop_smc(struct radeon_device *rdev) |
1051 | { | 1049 | { |
@@ -3832,14 +3830,11 @@ int ni_dpm_set_power_state(struct radeon_device *rdev) | |||
3832 | return ret; | 3830 | return ret; |
3833 | } | 3831 | } |
3834 | 3832 | ||
3835 | #if 0 | ||
3836 | /* XXX */ | ||
3837 | ret = ni_unrestrict_performance_levels_after_switch(rdev); | 3833 | ret = ni_unrestrict_performance_levels_after_switch(rdev); |
3838 | if (ret) { | 3834 | if (ret) { |
3839 | DRM_ERROR("ni_unrestrict_performance_levels_after_switch failed\n"); | 3835 | DRM_ERROR("ni_unrestrict_performance_levels_after_switch failed\n"); |
3840 | return ret; | 3836 | return ret; |
3841 | } | 3837 | } |
3842 | #endif | ||
3843 | 3838 | ||
3844 | return 0; | 3839 | return 0; |
3845 | } | 3840 | } |
@@ -4292,6 +4287,26 @@ void ni_dpm_print_power_state(struct radeon_device *rdev, | |||
4292 | r600_dpm_print_ps_status(rdev, rps); | 4287 | r600_dpm_print_ps_status(rdev, rps); |
4293 | } | 4288 | } |
4294 | 4289 | ||
4290 | void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
4291 | struct seq_file *m) | ||
4292 | { | ||
4293 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; | ||
4294 | struct ni_ps *ps = ni_get_ps(rps); | ||
4295 | struct rv7xx_pl *pl; | ||
4296 | u32 current_index = | ||
4297 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >> | ||
4298 | CURRENT_STATE_INDEX_SHIFT; | ||
4299 | |||
4300 | if (current_index >= ps->performance_level_count) { | ||
4301 | seq_printf(m, "invalid dpm profile %d\n", current_index); | ||
4302 | } else { | ||
4303 | pl = &ps->performance_levels[current_index]; | ||
4304 | seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); | ||
4305 | seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n", | ||
4306 | current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); | ||
4307 | } | ||
4308 | } | ||
4309 | |||
4295 | u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low) | 4310 | u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low) |
4296 | { | 4311 | { |
4297 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); | 4312 | struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); |
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h index 95693c77351d..fe24a93542ec 100644 --- a/drivers/gpu/drm/radeon/nid.h +++ b/drivers/gpu/drm/radeon/nid.h | |||
@@ -618,6 +618,10 @@ | |||
618 | # define MRDCKD0_BYPASS (1 << 30) | 618 | # define MRDCKD0_BYPASS (1 << 30) |
619 | # define MRDCKD1_BYPASS (1 << 31) | 619 | # define MRDCKD1_BYPASS (1 << 31) |
620 | 620 | ||
621 | #define TARGET_AND_CURRENT_PROFILE_INDEX 0x66c | ||
622 | # define CURRENT_STATE_INDEX_MASK (0xf << 4) | ||
623 | # define CURRENT_STATE_INDEX_SHIFT 4 | ||
624 | |||
621 | #define CG_AT 0x6d4 | 625 | #define CG_AT 0x6d4 |
622 | # define CG_R(x) ((x) << 0) | 626 | # define CG_R(x) ((x) << 0) |
623 | # define CG_R_MASK (0xffff << 0) | 627 | # define CG_R_MASK (0xffff << 0) |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 7e3fef4e6938..f51807f04f65 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -1667,6 +1667,7 @@ struct radeon_asic { | |||
1667 | u32 (*get_sclk)(struct radeon_device *rdev, bool low); | 1667 | u32 (*get_sclk)(struct radeon_device *rdev, bool low); |
1668 | u32 (*get_mclk)(struct radeon_device *rdev, bool low); | 1668 | u32 (*get_mclk)(struct radeon_device *rdev, bool low); |
1669 | void (*print_power_state)(struct radeon_device *rdev, struct radeon_ps *ps); | 1669 | void (*print_power_state)(struct radeon_device *rdev, struct radeon_ps *ps); |
1670 | void (*debugfs_print_current_performance_level)(struct radeon_device *rdev, struct seq_file *m); | ||
1670 | } dpm; | 1671 | } dpm; |
1671 | /* pageflipping */ | 1672 | /* pageflipping */ |
1672 | struct { | 1673 | struct { |
@@ -2433,6 +2434,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v); | |||
2433 | #define radeon_dpm_get_sclk(rdev, l) rdev->asic->dpm.get_sclk((rdev), (l)) | 2434 | #define radeon_dpm_get_sclk(rdev, l) rdev->asic->dpm.get_sclk((rdev), (l)) |
2434 | #define radeon_dpm_get_mclk(rdev, l) rdev->asic->dpm.get_mclk((rdev), (l)) | 2435 | #define radeon_dpm_get_mclk(rdev, l) rdev->asic->dpm.get_mclk((rdev), (l)) |
2435 | #define radeon_dpm_print_power_state(rdev, ps) rdev->asic->dpm.print_power_state((rdev), (ps)) | 2436 | #define radeon_dpm_print_power_state(rdev, ps) rdev->asic->dpm.print_power_state((rdev), (ps)) |
2437 | #define radeon_dpm_debugfs_print_current_performance_level(rdev, m) rdev->asic->dpm.debugfs_print_current_performance_level((rdev), (m)) | ||
2436 | 2438 | ||
2437 | /* Common functions */ | 2439 | /* Common functions */ |
2438 | /* AGP */ | 2440 | /* AGP */ |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index c3df589715a0..a5b244dc50ca 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -1160,6 +1160,7 @@ static struct radeon_asic rv6xx_asic = { | |||
1160 | .get_sclk = &rv6xx_dpm_get_sclk, | 1160 | .get_sclk = &rv6xx_dpm_get_sclk, |
1161 | .get_mclk = &rv6xx_dpm_get_mclk, | 1161 | .get_mclk = &rv6xx_dpm_get_mclk, |
1162 | .print_power_state = &rv6xx_dpm_print_power_state, | 1162 | .print_power_state = &rv6xx_dpm_print_power_state, |
1163 | .debugfs_print_current_performance_level = &rv6xx_dpm_debugfs_print_current_performance_level, | ||
1163 | }, | 1164 | }, |
1164 | .pflip = { | 1165 | .pflip = { |
1165 | .pre_page_flip = &rs600_pre_page_flip, | 1166 | .pre_page_flip = &rs600_pre_page_flip, |
@@ -1391,6 +1392,7 @@ static struct radeon_asic rv770_asic = { | |||
1391 | .get_sclk = &rv770_dpm_get_sclk, | 1392 | .get_sclk = &rv770_dpm_get_sclk, |
1392 | .get_mclk = &rv770_dpm_get_mclk, | 1393 | .get_mclk = &rv770_dpm_get_mclk, |
1393 | .print_power_state = &rv770_dpm_print_power_state, | 1394 | .print_power_state = &rv770_dpm_print_power_state, |
1395 | .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level, | ||
1394 | }, | 1396 | }, |
1395 | .pflip = { | 1397 | .pflip = { |
1396 | .pre_page_flip = &rs600_pre_page_flip, | 1398 | .pre_page_flip = &rs600_pre_page_flip, |
@@ -1513,6 +1515,7 @@ static struct radeon_asic evergreen_asic = { | |||
1513 | .get_sclk = &rv770_dpm_get_sclk, | 1515 | .get_sclk = &rv770_dpm_get_sclk, |
1514 | .get_mclk = &rv770_dpm_get_mclk, | 1516 | .get_mclk = &rv770_dpm_get_mclk, |
1515 | .print_power_state = &rv770_dpm_print_power_state, | 1517 | .print_power_state = &rv770_dpm_print_power_state, |
1518 | .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level, | ||
1516 | }, | 1519 | }, |
1517 | .pflip = { | 1520 | .pflip = { |
1518 | .pre_page_flip = &evergreen_pre_page_flip, | 1521 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -1635,6 +1638,7 @@ static struct radeon_asic sumo_asic = { | |||
1635 | .get_sclk = &sumo_dpm_get_sclk, | 1638 | .get_sclk = &sumo_dpm_get_sclk, |
1636 | .get_mclk = &sumo_dpm_get_mclk, | 1639 | .get_mclk = &sumo_dpm_get_mclk, |
1637 | .print_power_state = &sumo_dpm_print_power_state, | 1640 | .print_power_state = &sumo_dpm_print_power_state, |
1641 | .debugfs_print_current_performance_level = &sumo_dpm_debugfs_print_current_performance_level, | ||
1638 | }, | 1642 | }, |
1639 | .pflip = { | 1643 | .pflip = { |
1640 | .pre_page_flip = &evergreen_pre_page_flip, | 1644 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -1757,6 +1761,7 @@ static struct radeon_asic btc_asic = { | |||
1757 | .get_sclk = &btc_dpm_get_sclk, | 1761 | .get_sclk = &btc_dpm_get_sclk, |
1758 | .get_mclk = &btc_dpm_get_mclk, | 1762 | .get_mclk = &btc_dpm_get_mclk, |
1759 | .print_power_state = &rv770_dpm_print_power_state, | 1763 | .print_power_state = &rv770_dpm_print_power_state, |
1764 | .debugfs_print_current_performance_level = &rv770_dpm_debugfs_print_current_performance_level, | ||
1760 | }, | 1765 | }, |
1761 | .pflip = { | 1766 | .pflip = { |
1762 | .pre_page_flip = &evergreen_pre_page_flip, | 1767 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -1931,6 +1936,7 @@ static struct radeon_asic cayman_asic = { | |||
1931 | .get_sclk = &ni_dpm_get_sclk, | 1936 | .get_sclk = &ni_dpm_get_sclk, |
1932 | .get_mclk = &ni_dpm_get_mclk, | 1937 | .get_mclk = &ni_dpm_get_mclk, |
1933 | .print_power_state = &ni_dpm_print_power_state, | 1938 | .print_power_state = &ni_dpm_print_power_state, |
1939 | .debugfs_print_current_performance_level = &ni_dpm_debugfs_print_current_performance_level, | ||
1934 | }, | 1940 | }, |
1935 | .pflip = { | 1941 | .pflip = { |
1936 | .pre_page_flip = &evergreen_pre_page_flip, | 1942 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -2103,6 +2109,7 @@ static struct radeon_asic trinity_asic = { | |||
2103 | .get_sclk = &trinity_dpm_get_sclk, | 2109 | .get_sclk = &trinity_dpm_get_sclk, |
2104 | .get_mclk = &trinity_dpm_get_mclk, | 2110 | .get_mclk = &trinity_dpm_get_mclk, |
2105 | .print_power_state = &trinity_dpm_print_power_state, | 2111 | .print_power_state = &trinity_dpm_print_power_state, |
2112 | .debugfs_print_current_performance_level = &trinity_dpm_debugfs_print_current_performance_level, | ||
2106 | }, | 2113 | }, |
2107 | .pflip = { | 2114 | .pflip = { |
2108 | .pre_page_flip = &evergreen_pre_page_flip, | 2115 | .pre_page_flip = &evergreen_pre_page_flip, |
@@ -2275,6 +2282,7 @@ static struct radeon_asic si_asic = { | |||
2275 | .get_sclk = &ni_dpm_get_sclk, | 2282 | .get_sclk = &ni_dpm_get_sclk, |
2276 | .get_mclk = &ni_dpm_get_mclk, | 2283 | .get_mclk = &ni_dpm_get_mclk, |
2277 | .print_power_state = &ni_dpm_print_power_state, | 2284 | .print_power_state = &ni_dpm_print_power_state, |
2285 | .debugfs_print_current_performance_level = &si_dpm_debugfs_print_current_performance_level, | ||
2278 | }, | 2286 | }, |
2279 | .pflip = { | 2287 | .pflip = { |
2280 | .pre_page_flip = &evergreen_pre_page_flip, | 2288 | .pre_page_flip = &evergreen_pre_page_flip, |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 2497d0a02de5..6822c7aeacaa 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -416,6 +416,8 @@ u32 rv6xx_dpm_get_sclk(struct radeon_device *rdev, bool low); | |||
416 | u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low); | 416 | u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low); |
417 | void rv6xx_dpm_print_power_state(struct radeon_device *rdev, | 417 | void rv6xx_dpm_print_power_state(struct radeon_device *rdev, |
418 | struct radeon_ps *ps); | 418 | struct radeon_ps *ps); |
419 | void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
420 | struct seq_file *m); | ||
419 | /* rs780 dpm */ | 421 | /* rs780 dpm */ |
420 | int rs780_dpm_init(struct radeon_device *rdev); | 422 | int rs780_dpm_init(struct radeon_device *rdev); |
421 | int rs780_dpm_enable(struct radeon_device *rdev); | 423 | int rs780_dpm_enable(struct radeon_device *rdev); |
@@ -474,6 +476,8 @@ u32 rv770_dpm_get_sclk(struct radeon_device *rdev, bool low); | |||
474 | u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low); | 476 | u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low); |
475 | void rv770_dpm_print_power_state(struct radeon_device *rdev, | 477 | void rv770_dpm_print_power_state(struct radeon_device *rdev, |
476 | struct radeon_ps *ps); | 478 | struct radeon_ps *ps); |
479 | void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
480 | struct seq_file *m); | ||
477 | 481 | ||
478 | /* | 482 | /* |
479 | * evergreen | 483 | * evergreen |
@@ -561,6 +565,8 @@ u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low); | |||
561 | u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low); | 565 | u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low); |
562 | void sumo_dpm_print_power_state(struct radeon_device *rdev, | 566 | void sumo_dpm_print_power_state(struct radeon_device *rdev, |
563 | struct radeon_ps *ps); | 567 | struct radeon_ps *ps); |
568 | void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
569 | struct seq_file *m); | ||
564 | 570 | ||
565 | /* | 571 | /* |
566 | * cayman | 572 | * cayman |
@@ -607,6 +613,8 @@ u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low); | |||
607 | u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low); | 613 | u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low); |
608 | void ni_dpm_print_power_state(struct radeon_device *rdev, | 614 | void ni_dpm_print_power_state(struct radeon_device *rdev, |
609 | struct radeon_ps *ps); | 615 | struct radeon_ps *ps); |
616 | void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
617 | struct seq_file *m); | ||
610 | int trinity_dpm_init(struct radeon_device *rdev); | 618 | int trinity_dpm_init(struct radeon_device *rdev); |
611 | int trinity_dpm_enable(struct radeon_device *rdev); | 619 | int trinity_dpm_enable(struct radeon_device *rdev); |
612 | void trinity_dpm_disable(struct radeon_device *rdev); | 620 | void trinity_dpm_disable(struct radeon_device *rdev); |
@@ -620,6 +628,8 @@ u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low); | |||
620 | u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low); | 628 | u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low); |
621 | void trinity_dpm_print_power_state(struct radeon_device *rdev, | 629 | void trinity_dpm_print_power_state(struct radeon_device *rdev, |
622 | struct radeon_ps *ps); | 630 | struct radeon_ps *ps); |
631 | void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
632 | struct seq_file *m); | ||
623 | 633 | ||
624 | /* DCE6 - SI */ | 634 | /* DCE6 - SI */ |
625 | void dce6_bandwidth_update(struct radeon_device *rdev); | 635 | void dce6_bandwidth_update(struct radeon_device *rdev); |
@@ -667,6 +677,8 @@ int si_dpm_set_power_state(struct radeon_device *rdev); | |||
667 | void si_dpm_post_set_power_state(struct radeon_device *rdev); | 677 | void si_dpm_post_set_power_state(struct radeon_device *rdev); |
668 | void si_dpm_fini(struct radeon_device *rdev); | 678 | void si_dpm_fini(struct radeon_device *rdev); |
669 | void si_dpm_display_configuration_changed(struct radeon_device *rdev); | 679 | void si_dpm_display_configuration_changed(struct radeon_device *rdev); |
680 | void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
681 | struct seq_file *m); | ||
670 | 682 | ||
671 | /* DCE8 - CIK */ | 683 | /* DCE8 - CIK */ |
672 | void dce8_bandwidth_update(struct radeon_device *rdev); | 684 | void dce8_bandwidth_update(struct radeon_device *rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index a8296e0f8543..70d8687e60e0 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -3732,7 +3732,8 @@ int radeon_atom_init_mc_reg_table(struct radeon_device *rdev, | |||
3732 | } | 3732 | } |
3733 | num_ranges++; | 3733 | num_ranges++; |
3734 | } | 3734 | } |
3735 | reg_data += reg_block->usRegDataBlkSize; | 3735 | reg_data = (ATOM_MEMORY_SETTING_DATA_BLOCK *) |
3736 | ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); | ||
3736 | } | 3737 | } |
3737 | if (*(u32 *)reg_data != END_OF_REG_DATA_BLOCK) | 3738 | if (*(u32 *)reg_data != END_OF_REG_DATA_BLOCK) |
3738 | return -EINVAL; | 3739 | return -EINVAL; |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 9737baeb711d..075f2fa56897 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -1062,6 +1062,11 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev) | |||
1062 | ret = device_create_file(rdev->dev, &dev_attr_power_method); | 1062 | ret = device_create_file(rdev->dev, &dev_attr_power_method); |
1063 | if (ret) | 1063 | if (ret) |
1064 | DRM_ERROR("failed to create device file for power method\n"); | 1064 | DRM_ERROR("failed to create device file for power method\n"); |
1065 | |||
1066 | if (radeon_debugfs_pm_init(rdev)) { | ||
1067 | DRM_ERROR("Failed to register debugfs file for dpm!\n"); | ||
1068 | } | ||
1069 | |||
1065 | DRM_INFO("radeon: dpm initialized\n"); | 1070 | DRM_INFO("radeon: dpm initialized\n"); |
1066 | } | 1071 | } |
1067 | 1072 | ||
@@ -1389,19 +1394,28 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data) | |||
1389 | struct drm_device *dev = node->minor->dev; | 1394 | struct drm_device *dev = node->minor->dev; |
1390 | struct radeon_device *rdev = dev->dev_private; | 1395 | struct radeon_device *rdev = dev->dev_private; |
1391 | 1396 | ||
1392 | seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); | 1397 | if (rdev->pm.dpm_enabled) { |
1393 | /* radeon_get_engine_clock is not reliable on APUs so just print the current clock */ | 1398 | mutex_lock(&rdev->pm.mutex); |
1394 | if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) | 1399 | if (rdev->asic->dpm.debugfs_print_current_performance_level) |
1395 | seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); | 1400 | radeon_dpm_debugfs_print_current_performance_level(rdev, m); |
1396 | else | 1401 | else |
1397 | seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); | 1402 | seq_printf(m, "Unsupported\n"); |
1398 | seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); | 1403 | mutex_unlock(&rdev->pm.mutex); |
1399 | if (rdev->asic->pm.get_memory_clock) | 1404 | } else { |
1400 | seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); | 1405 | seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); |
1401 | if (rdev->pm.current_vddc) | 1406 | /* radeon_get_engine_clock is not reliable on APUs so just print the current clock */ |
1402 | seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); | 1407 | if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP)) |
1403 | if (rdev->asic->pm.get_pcie_lanes) | 1408 | seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); |
1404 | seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); | 1409 | else |
1410 | seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); | ||
1411 | seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); | ||
1412 | if (rdev->asic->pm.get_memory_clock) | ||
1413 | seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); | ||
1414 | if (rdev->pm.current_vddc) | ||
1415 | seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); | ||
1416 | if (rdev->asic->pm.get_pcie_lanes) | ||
1417 | seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); | ||
1418 | } | ||
1405 | 1419 | ||
1406 | return 0; | 1420 | return 0; |
1407 | } | 1421 | } |
diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c b/drivers/gpu/drm/radeon/rv6xx_dpm.c index 0e8b7d9b954b..33705c5c8369 100644 --- a/drivers/gpu/drm/radeon/rv6xx_dpm.c +++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c | |||
@@ -2027,6 +2027,31 @@ void rv6xx_dpm_print_power_state(struct radeon_device *rdev, | |||
2027 | r600_dpm_print_ps_status(rdev, rps); | 2027 | r600_dpm_print_ps_status(rdev, rps); |
2028 | } | 2028 | } |
2029 | 2029 | ||
2030 | void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
2031 | struct seq_file *m) | ||
2032 | { | ||
2033 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; | ||
2034 | struct rv6xx_ps *ps = rv6xx_get_ps(rps); | ||
2035 | struct rv6xx_pl *pl; | ||
2036 | u32 current_index = | ||
2037 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> | ||
2038 | CURRENT_PROFILE_INDEX_SHIFT; | ||
2039 | |||
2040 | if (current_index > 2) { | ||
2041 | seq_printf(m, "invalid dpm profile %d\n", current_index); | ||
2042 | } else { | ||
2043 | if (current_index == 0) | ||
2044 | pl = &ps->low; | ||
2045 | else if (current_index == 1) | ||
2046 | pl = &ps->medium; | ||
2047 | else /* current_index == 2 */ | ||
2048 | pl = &ps->high; | ||
2049 | seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); | ||
2050 | seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u\n", | ||
2051 | current_index, pl->sclk, pl->mclk, pl->vddc); | ||
2052 | } | ||
2053 | } | ||
2054 | |||
2030 | void rv6xx_dpm_fini(struct radeon_device *rdev) | 2055 | void rv6xx_dpm_fini(struct radeon_device *rdev) |
2031 | { | 2056 | { |
2032 | int i; | 2057 | int i; |
diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c index 7f6fa6221234..2436b5c7e66e 100644 --- a/drivers/gpu/drm/radeon/rv770_dpm.c +++ b/drivers/gpu/drm/radeon/rv770_dpm.c | |||
@@ -2430,6 +2430,36 @@ void rv770_dpm_print_power_state(struct radeon_device *rdev, | |||
2430 | r600_dpm_print_ps_status(rdev, rps); | 2430 | r600_dpm_print_ps_status(rdev, rps); |
2431 | } | 2431 | } |
2432 | 2432 | ||
2433 | void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
2434 | struct seq_file *m) | ||
2435 | { | ||
2436 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; | ||
2437 | struct rv7xx_ps *ps = rv770_get_ps(rps); | ||
2438 | struct rv7xx_pl *pl; | ||
2439 | u32 current_index = | ||
2440 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >> | ||
2441 | CURRENT_PROFILE_INDEX_SHIFT; | ||
2442 | |||
2443 | if (current_index > 2) { | ||
2444 | seq_printf(m, "invalid dpm profile %d\n", current_index); | ||
2445 | } else { | ||
2446 | if (current_index == 0) | ||
2447 | pl = &ps->low; | ||
2448 | else if (current_index == 1) | ||
2449 | pl = &ps->medium; | ||
2450 | else /* current_index == 2 */ | ||
2451 | pl = &ps->high; | ||
2452 | seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); | ||
2453 | if (rdev->family >= CHIP_CEDAR) { | ||
2454 | seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n", | ||
2455 | current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); | ||
2456 | } else { | ||
2457 | seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u\n", | ||
2458 | current_index, pl->sclk, pl->mclk, pl->vddc); | ||
2459 | } | ||
2460 | } | ||
2461 | } | ||
2462 | |||
2433 | void rv770_dpm_fini(struct radeon_device *rdev) | 2463 | void rv770_dpm_fini(struct radeon_device *rdev) |
2434 | { | 2464 | { |
2435 | int i; | 2465 | int i; |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index 784eeaf315c3..6bef2b7d601b 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
@@ -207,6 +207,10 @@ | |||
207 | # define MUX_TCLK_TO_XCLK (1 << 8) | 207 | # define MUX_TCLK_TO_XCLK (1 << 8) |
208 | # define XTALIN_DIVIDE (1 << 9) | 208 | # define XTALIN_DIVIDE (1 << 9) |
209 | 209 | ||
210 | #define TARGET_AND_CURRENT_PROFILE_INDEX 0x66c | ||
211 | # define CURRENT_PROFILE_INDEX_MASK (0xf << 4) | ||
212 | # define CURRENT_PROFILE_INDEX_SHIFT 4 | ||
213 | |||
210 | #define S0_VID_LOWER_SMIO_CNTL 0x678 | 214 | #define S0_VID_LOWER_SMIO_CNTL 0x678 |
211 | #define S1_VID_LOWER_SMIO_CNTL 0x67c | 215 | #define S1_VID_LOWER_SMIO_CNTL 0x67c |
212 | #define S2_VID_LOWER_SMIO_CNTL 0x680 | 216 | #define S2_VID_LOWER_SMIO_CNTL 0x680 |
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index 6918f070eb52..46e9fc56cee7 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c | |||
@@ -6385,3 +6385,22 @@ void si_dpm_fini(struct radeon_device *rdev) | |||
6385 | r600_free_extended_power_table(rdev); | 6385 | r600_free_extended_power_table(rdev); |
6386 | } | 6386 | } |
6387 | 6387 | ||
6388 | void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
6389 | struct seq_file *m) | ||
6390 | { | ||
6391 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; | ||
6392 | struct ni_ps *ps = ni_get_ps(rps); | ||
6393 | struct rv7xx_pl *pl; | ||
6394 | u32 current_index = | ||
6395 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_INDEX_MASK) >> | ||
6396 | CURRENT_STATE_INDEX_SHIFT; | ||
6397 | |||
6398 | if (current_index >= ps->performance_level_count) { | ||
6399 | seq_printf(m, "invalid dpm profile %d\n", current_index); | ||
6400 | } else { | ||
6401 | pl = &ps->performance_levels[current_index]; | ||
6402 | seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); | ||
6403 | seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u\n", | ||
6404 | current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); | ||
6405 | } | ||
6406 | } | ||
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 299d657d0168..12a20eb77d0c 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h | |||
@@ -220,6 +220,10 @@ | |||
220 | # define GFX_CLK_OFF_ACPI_D3 (1 << 13) | 220 | # define GFX_CLK_OFF_ACPI_D3 (1 << 13) |
221 | # define DYN_LIGHT_SLEEP_EN (1 << 14) | 221 | # define DYN_LIGHT_SLEEP_EN (1 << 14) |
222 | 222 | ||
223 | #define TARGET_AND_CURRENT_PROFILE_INDEX 0x798 | ||
224 | # define CURRENT_STATE_INDEX_MASK (0xf << 4) | ||
225 | # define CURRENT_STATE_INDEX_SHIFT 4 | ||
226 | |||
223 | #define CG_FTV 0x7bc | 227 | #define CG_FTV 0x7bc |
224 | 228 | ||
225 | #define CG_FFCT_0 0x7c0 | 229 | #define CG_FFCT_0 0x7c0 |
diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c index dbad293bfed5..68fefb916582 100644 --- a/drivers/gpu/drm/radeon/sumo_dpm.c +++ b/drivers/gpu/drm/radeon/sumo_dpm.c | |||
@@ -1133,22 +1133,6 @@ static void sumo_cleanup_asic(struct radeon_device *rdev) | |||
1133 | sumo_take_smu_control(rdev, false); | 1133 | sumo_take_smu_control(rdev, false); |
1134 | } | 1134 | } |
1135 | 1135 | ||
1136 | static void sumo_uvd_init(struct radeon_device *rdev) | ||
1137 | { | ||
1138 | u32 tmp; | ||
1139 | |||
1140 | tmp = RREG32(CG_VCLK_CNTL); | ||
1141 | tmp &= ~VCLK_DIR_CNTL_EN; | ||
1142 | WREG32(CG_VCLK_CNTL, tmp); | ||
1143 | |||
1144 | tmp = RREG32(CG_DCLK_CNTL); | ||
1145 | tmp &= ~DCLK_DIR_CNTL_EN; | ||
1146 | WREG32(CG_DCLK_CNTL, tmp); | ||
1147 | |||
1148 | /* 100 Mhz */ | ||
1149 | radeon_set_uvd_clocks(rdev, 10000, 10000); | ||
1150 | } | ||
1151 | |||
1152 | static int sumo_set_thermal_temperature_range(struct radeon_device *rdev, | 1136 | static int sumo_set_thermal_temperature_range(struct radeon_device *rdev, |
1153 | int min_temp, int max_temp) | 1137 | int min_temp, int max_temp) |
1154 | { | 1138 | { |
@@ -1348,7 +1332,6 @@ void sumo_dpm_setup_asic(struct radeon_device *rdev) | |||
1348 | sumo_program_acpi_power_level(rdev); | 1332 | sumo_program_acpi_power_level(rdev); |
1349 | sumo_enable_acpi_pm(rdev); | 1333 | sumo_enable_acpi_pm(rdev); |
1350 | sumo_take_smu_control(rdev, true); | 1334 | sumo_take_smu_control(rdev, true); |
1351 | sumo_uvd_init(rdev); | ||
1352 | } | 1335 | } |
1353 | 1336 | ||
1354 | void sumo_dpm_display_configuration_changed(struct radeon_device *rdev) | 1337 | void sumo_dpm_display_configuration_changed(struct radeon_device *rdev) |
@@ -1769,6 +1752,34 @@ void sumo_dpm_print_power_state(struct radeon_device *rdev, | |||
1769 | r600_dpm_print_ps_status(rdev, rps); | 1752 | r600_dpm_print_ps_status(rdev, rps); |
1770 | } | 1753 | } |
1771 | 1754 | ||
1755 | void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
1756 | struct seq_file *m) | ||
1757 | { | ||
1758 | struct sumo_power_info *pi = sumo_get_pi(rdev); | ||
1759 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; | ||
1760 | struct sumo_ps *ps = sumo_get_ps(rps); | ||
1761 | struct sumo_pl *pl; | ||
1762 | u32 current_index = | ||
1763 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_INDEX_MASK) >> | ||
1764 | CURR_INDEX_SHIFT; | ||
1765 | |||
1766 | if (current_index == BOOST_DPM_LEVEL) { | ||
1767 | pl = &pi->boost_pl; | ||
1768 | seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); | ||
1769 | seq_printf(m, "power level %d sclk: %u vddc: %u\n", | ||
1770 | current_index, pl->sclk, | ||
1771 | sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); | ||
1772 | } else if (current_index >= ps->num_levels) { | ||
1773 | seq_printf(m, "invalid dpm profile %d\n", current_index); | ||
1774 | } else { | ||
1775 | pl = &ps->levels[current_index]; | ||
1776 | seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); | ||
1777 | seq_printf(m, "power level %d sclk: %u vddc: %u\n", | ||
1778 | current_index, pl->sclk, | ||
1779 | sumo_convert_voltage_index_to_value(rdev, pl->vddc_index)); | ||
1780 | } | ||
1781 | } | ||
1782 | |||
1772 | void sumo_dpm_fini(struct radeon_device *rdev) | 1783 | void sumo_dpm_fini(struct radeon_device *rdev) |
1773 | { | 1784 | { |
1774 | int i; | 1785 | int i; |
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c index fce825e112ff..502d9153c4d5 100644 --- a/drivers/gpu/drm/radeon/trinity_dpm.c +++ b/drivers/gpu/drm/radeon/trinity_dpm.c | |||
@@ -1855,6 +1855,27 @@ void trinity_dpm_print_power_state(struct radeon_device *rdev, | |||
1855 | r600_dpm_print_ps_status(rdev, rps); | 1855 | r600_dpm_print_ps_status(rdev, rps); |
1856 | } | 1856 | } |
1857 | 1857 | ||
1858 | void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, | ||
1859 | struct seq_file *m) | ||
1860 | { | ||
1861 | struct radeon_ps *rps = rdev->pm.dpm.current_ps; | ||
1862 | struct trinity_ps *ps = trinity_get_ps(rps); | ||
1863 | struct trinity_pl *pl; | ||
1864 | u32 current_index = | ||
1865 | (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_STATE_MASK) >> | ||
1866 | CURRENT_STATE_SHIFT; | ||
1867 | |||
1868 | if (current_index >= ps->num_levels) { | ||
1869 | seq_printf(m, "invalid dpm profile %d\n", current_index); | ||
1870 | } else { | ||
1871 | pl = &ps->levels[current_index]; | ||
1872 | seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); | ||
1873 | seq_printf(m, "power level %d sclk: %u vddc: %u\n", | ||
1874 | current_index, pl->sclk, | ||
1875 | trinity_convert_voltage_index_to_value(rdev, pl->vddc_index)); | ||
1876 | } | ||
1877 | } | ||
1878 | |||
1858 | void trinity_dpm_fini(struct radeon_device *rdev) | 1879 | void trinity_dpm_fini(struct radeon_device *rdev) |
1859 | { | 1880 | { |
1860 | int i; | 1881 | int i; |