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authorGabor Juhos <juhosg@openwrt.org>2013-02-04 05:58:49 -0500
committerJohn Crispin <blogic@openwrt.org>2013-02-16 19:25:36 -0500
commit6e783865b4e60f2ecf7708f8ea24db5c5ea07ced (patch)
tree2f4cd8df0733cf177bbf74ae1ec7e079d4b6b013
parent9fc1ca5b73a82daedffa2d1d5daa48dd2093c39a (diff)
MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions
The functions are unused now, so remove them. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4909/ Signed-off-by: John Crispin <blogic@openwrt.org>
-rw-r--r--arch/mips/ath79/pci.c1
-rw-r--r--arch/mips/include/asm/mach-ath79/pci.h28
-rw-r--r--arch/mips/pci/pci-ar71xx.c26
-rw-r--r--arch/mips/pci/pci-ar724x.c32
4 files changed, 0 insertions, 87 deletions
diff --git a/arch/mips/ath79/pci.c b/arch/mips/ath79/pci.c
index 81ef5797944a..c94bcec169ab 100644
--- a/arch/mips/ath79/pci.c
+++ b/arch/mips/ath79/pci.c
@@ -19,7 +19,6 @@
19#include <asm/mach-ath79/ar71xx_regs.h> 19#include <asm/mach-ath79/ar71xx_regs.h>
20#include <asm/mach-ath79/ath79.h> 20#include <asm/mach-ath79/ath79.h>
21#include <asm/mach-ath79/irq.h> 21#include <asm/mach-ath79/irq.h>
22#include <asm/mach-ath79/pci.h>
23#include "pci.h" 22#include "pci.h"
24 23
25static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev); 24static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev);
diff --git a/arch/mips/include/asm/mach-ath79/pci.h b/arch/mips/include/asm/mach-ath79/pci.h
deleted file mode 100644
index 7868f7fa028f..000000000000
--- a/arch/mips/include/asm/mach-ath79/pci.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * Atheros AR71XX/AR724X PCI support
3 *
4 * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
5 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13#ifndef __ASM_MACH_ATH79_PCI_H
14#define __ASM_MACH_ATH79_PCI_H
15
16#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX)
17int ar71xx_pcibios_init(void);
18#else
19static inline int ar71xx_pcibios_init(void) { return 0; }
20#endif
21
22#if defined(CONFIG_PCI_AR724X)
23int ar724x_pcibios_init(int irq);
24#else
25static inline int ar724x_pcibios_init(int irq) { return 0; }
26#endif
27
28#endif /* __ASM_MACH_ATH79_PCI_H */
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c
index 35ee23450d87..69e0bb47de08 100644
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -23,7 +23,6 @@
23 23
24#include <asm/mach-ath79/ar71xx_regs.h> 24#include <asm/mach-ath79/ar71xx_regs.h>
25#include <asm/mach-ath79/ath79.h> 25#include <asm/mach-ath79/ath79.h>
26#include <asm/mach-ath79/pci.h>
27 26
28#define AR71XX_PCI_REG_CRP_AD_CBE 0x00 27#define AR71XX_PCI_REG_CRP_AD_CBE 0x00
29#define AR71XX_PCI_REG_CRP_WRDATA 0x04 28#define AR71XX_PCI_REG_CRP_WRDATA 0x04
@@ -335,31 +334,6 @@ static void ar71xx_pci_reset(void)
335 mdelay(100); 334 mdelay(100);
336} 335}
337 336
338__init int ar71xx_pcibios_init(void)
339{
340 u32 t;
341
342 ar71xx_pcicfg_base = ioremap(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE);
343 if (ar71xx_pcicfg_base == NULL)
344 return -ENOMEM;
345
346 ar71xx_pci_reset();
347
348 /* setup COMMAND register */
349 t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
350 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
351 ar71xx_pci_local_write(PCI_COMMAND, 4, t);
352
353 /* clear bus errors */
354 ar71xx_pci_check_error(1);
355
356 ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2);
357
358 register_pci_controller(&ar71xx_pci_controller);
359
360 return 0;
361}
362
363static int ar71xx_pci_probe(struct platform_device *pdev) 337static int ar71xx_pci_probe(struct platform_device *pdev)
364{ 338{
365 struct resource *res; 339 struct resource *res;
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c
index b3f9d093c066..8f008d9a112c 100644
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -15,7 +15,6 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <asm/mach-ath79/ath79.h> 16#include <asm/mach-ath79/ath79.h>
17#include <asm/mach-ath79/ar71xx_regs.h> 17#include <asm/mach-ath79/ar71xx_regs.h>
18#include <asm/mach-ath79/pci.h>
19 18
20#define AR724X_PCI_REG_RESET 0x18 19#define AR724X_PCI_REG_RESET 0x18
21#define AR724X_PCI_REG_INT_STATUS 0x4c 20#define AR724X_PCI_REG_INT_STATUS 0x4c
@@ -276,37 +275,6 @@ static void ar724x_pci_irq_init(int irq)
276 irq_set_chained_handler(irq, ar724x_pci_irq_handler); 275 irq_set_chained_handler(irq, ar724x_pci_irq_handler);
277} 276}
278 277
279int ar724x_pcibios_init(int irq)
280{
281 int ret;
282
283 ret = -ENOMEM;
284
285 ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
286 AR724X_PCI_CFG_SIZE);
287 if (ar724x_pci_devcfg_base == NULL)
288 goto err;
289
290 ar724x_pci_ctrl_base = ioremap(AR724X_PCI_CTRL_BASE,
291 AR724X_PCI_CTRL_SIZE);
292 if (ar724x_pci_ctrl_base == NULL)
293 goto err_unmap_devcfg;
294
295 ar724x_pci_link_up = ar724x_pci_check_link();
296 if (!ar724x_pci_link_up)
297 pr_warn("ar724x: PCIe link is down\n");
298
299 ar724x_pci_irq_init(irq);
300 register_pci_controller(&ar724x_pci_controller);
301
302 return PCIBIOS_SUCCESSFUL;
303
304err_unmap_devcfg:
305 iounmap(ar724x_pci_devcfg_base);
306err:
307 return ret;
308}
309
310static int ar724x_pci_probe(struct platform_device *pdev) 278static int ar724x_pci_probe(struct platform_device *pdev)
311{ 279{
312 struct resource *res; 280 struct resource *res;