diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2012-09-06 12:30:37 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2012-09-20 13:10:43 -0400 |
| commit | 6e76a2df91c516714bf1f039b9614696aaaeaeb2 (patch) | |
| tree | 4cc93f35e9ca6eaac72381496e57e208ea6030dd | |
| parent | 2f6fa79a7e4cc380cc55ef967101cee340b8364b (diff) | |
drm/radeon: white space cleanup in transmitter setup
Makes it more consistent with the surrounding code.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_encoders.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index 7dc3ba2792a2..784f6e784604 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c | |||
| @@ -1013,8 +1013,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 1013 | args.v1.asMode.ucLaneSet = lane_set; | 1013 | args.v1.asMode.ucLaneSet = lane_set; |
| 1014 | } else { | 1014 | } else { |
| 1015 | if (is_dp) | 1015 | if (is_dp) |
| 1016 | args.v1.usPixelClock = | 1016 | args.v1.usPixelClock = cpu_to_le16(dp_clock / 10); |
| 1017 | cpu_to_le16(dp_clock / 10); | ||
| 1018 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) | 1017 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) |
| 1019 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | 1018 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
| 1020 | else | 1019 | else |
| @@ -1071,8 +1070,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 1071 | args.v2.asMode.ucLaneSet = lane_set; | 1070 | args.v2.asMode.ucLaneSet = lane_set; |
| 1072 | } else { | 1071 | } else { |
| 1073 | if (is_dp) | 1072 | if (is_dp) |
| 1074 | args.v2.usPixelClock = | 1073 | args.v2.usPixelClock = cpu_to_le16(dp_clock / 10); |
| 1075 | cpu_to_le16(dp_clock / 10); | ||
| 1076 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) | 1074 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) |
| 1077 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | 1075 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
| 1078 | else | 1076 | else |
| @@ -1114,8 +1112,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 1114 | args.v3.asMode.ucLaneSet = lane_set; | 1112 | args.v3.asMode.ucLaneSet = lane_set; |
| 1115 | } else { | 1113 | } else { |
| 1116 | if (is_dp) | 1114 | if (is_dp) |
| 1117 | args.v3.usPixelClock = | 1115 | args.v3.usPixelClock = cpu_to_le16(dp_clock / 10); |
| 1118 | cpu_to_le16(dp_clock / 10); | ||
| 1119 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) | 1116 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) |
| 1120 | args.v3.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | 1117 | args.v3.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
| 1121 | else | 1118 | else |
| @@ -1174,8 +1171,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 1174 | args.v4.asMode.ucLaneSet = lane_set; | 1171 | args.v4.asMode.ucLaneSet = lane_set; |
| 1175 | } else { | 1172 | } else { |
| 1176 | if (is_dp) | 1173 | if (is_dp) |
| 1177 | args.v4.usPixelClock = | 1174 | args.v4.usPixelClock = cpu_to_le16(dp_clock / 10); |
| 1178 | cpu_to_le16(dp_clock / 10); | ||
| 1179 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) | 1175 | else if (radeon_dig_monitor_is_duallink(encoder, radeon_encoder->pixel_clock)) |
| 1180 | args.v4.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | 1176 | args.v4.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
| 1181 | else | 1177 | else |