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authorHauke Mehrtens <hauke@hauke-m.de>2014-01-04 19:10:47 -0500
committerDavid S. Miller <davem@davemloft.net>2014-01-04 20:25:20 -0500
commit6df4aff972f0294f210559ce898a8a958e23b2c6 (patch)
treea8663d93ecd3624537eb34357271c8906b96c4f4
parent622a521fa46b37d3a01f2b2d59df9299dbdba16f (diff)
bgmac: add support for Northstar SoC (BCM4707, BCM53018)
This adds support for the Northstar SoC. This SoC does not have a PMU in bcma and no register on it should be called. In addition it support 2.5 GBit/s Ethernet to the PHY. This GMAC core is not fully working there are still problems with the DMA controller. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/broadcom/bgmac.c63
-rw-r--r--drivers/net/ethernet/broadcom/bgmac.h1
2 files changed, 46 insertions, 18 deletions
diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c
index 2cdacb852e81..5d41f414e11a 100644
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -848,6 +848,9 @@ static void bgmac_mac_speed(struct bgmac *bgmac)
848 case SPEED_1000: 848 case SPEED_1000:
849 set |= BGMAC_CMDCFG_ES_1000; 849 set |= BGMAC_CMDCFG_ES_1000;
850 break; 850 break;
851 case SPEED_2500:
852 set |= BGMAC_CMDCFG_ES_2500;
853 break;
851 default: 854 default:
852 bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed); 855 bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed);
853 } 856 }
@@ -860,12 +863,26 @@ static void bgmac_mac_speed(struct bgmac *bgmac)
860 863
861static void bgmac_miiconfig(struct bgmac *bgmac) 864static void bgmac_miiconfig(struct bgmac *bgmac)
862{ 865{
863 u8 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >> 866 struct bcma_device *core = bgmac->core;
864 BGMAC_DS_MM_SHIFT; 867 struct bcma_chipinfo *ci = &core->bus->chipinfo;
865 if (imode == 0 || imode == 1) { 868 u8 imode;
866 bgmac->mac_speed = SPEED_100; 869
870 if (ci->id == BCMA_CHIP_ID_BCM4707 ||
871 ci->id == BCMA_CHIP_ID_BCM53018) {
872 bcma_awrite32(core, BCMA_IOCTL,
873 bcma_aread32(core, BCMA_IOCTL) | 0x40 |
874 BGMAC_BCMA_IOCTL_SW_CLKEN);
875 bgmac->mac_speed = SPEED_2500;
867 bgmac->mac_duplex = DUPLEX_FULL; 876 bgmac->mac_duplex = DUPLEX_FULL;
868 bgmac_mac_speed(bgmac); 877 bgmac_mac_speed(bgmac);
878 } else {
879 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
880 BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
881 if (imode == 0 || imode == 1) {
882 bgmac->mac_speed = SPEED_100;
883 bgmac->mac_duplex = DUPLEX_FULL;
884 bgmac_mac_speed(bgmac);
885 }
869 } 886 }
870} 887}
871 888
@@ -875,7 +892,7 @@ static void bgmac_chip_reset(struct bgmac *bgmac)
875 struct bcma_device *core = bgmac->core; 892 struct bcma_device *core = bgmac->core;
876 struct bcma_bus *bus = core->bus; 893 struct bcma_bus *bus = core->bus;
877 struct bcma_chipinfo *ci = &bus->chipinfo; 894 struct bcma_chipinfo *ci = &bus->chipinfo;
878 u32 flags = 0; 895 u32 flags;
879 u32 iost; 896 u32 iost;
880 int i; 897 int i;
881 898
@@ -903,15 +920,21 @@ static void bgmac_chip_reset(struct bgmac *bgmac)
903 (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188)) 920 (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188))
904 iost &= ~BGMAC_BCMA_IOST_ATTACHED; 921 iost &= ~BGMAC_BCMA_IOST_ATTACHED;
905 922
906 if (iost & BGMAC_BCMA_IOST_ATTACHED) { 923 /* 3GMAC: for BCM4707, only do core reset at bgmac_probe() */
907 flags = BGMAC_BCMA_IOCTL_SW_CLKEN; 924 if (ci->id != BCMA_CHIP_ID_BCM4707) {
908 if (!bgmac->has_robosw) 925 flags = 0;
909 flags |= BGMAC_BCMA_IOCTL_SW_RESET; 926 if (iost & BGMAC_BCMA_IOST_ATTACHED) {
927 flags = BGMAC_BCMA_IOCTL_SW_CLKEN;
928 if (!bgmac->has_robosw)
929 flags |= BGMAC_BCMA_IOCTL_SW_RESET;
930 }
931 bcma_core_enable(core, flags);
910 } 932 }
911 933
912 bcma_core_enable(core, flags); 934 /* Request Misc PLL for corerev > 2 */
913 935 if (core->id.rev > 2 &&
914 if (core->id.rev > 2) { 936 ci->id != BCMA_CHIP_ID_BCM4707 &&
937 ci->id != BCMA_CHIP_ID_BCM53018) {
915 bgmac_set(bgmac, BCMA_CLKCTLST, 938 bgmac_set(bgmac, BCMA_CLKCTLST,
916 BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ); 939 BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
917 bgmac_wait_value(bgmac->core, BCMA_CLKCTLST, 940 bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
@@ -1049,12 +1072,16 @@ static void bgmac_enable(struct bgmac *bgmac)
1049 break; 1072 break;
1050 } 1073 }
1051 1074
1052 rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL); 1075 if (ci->id != BCMA_CHIP_ID_BCM4707 &&
1053 rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK; 1076 ci->id != BCMA_CHIP_ID_BCM53018) {
1054 bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) / 1000000; 1077 rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
1055 mdp = (bp_clk * 128 / 1000) - 3; 1078 rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
1056 rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT); 1079 bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) /
1057 bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl); 1080 1000000;
1081 mdp = (bp_clk * 128 / 1000) - 3;
1082 rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
1083 bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
1084 }
1058} 1085}
1059 1086
1060/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */ 1087/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
diff --git a/drivers/net/ethernet/broadcom/bgmac.h b/drivers/net/ethernet/broadcom/bgmac.h
index 2da12ed33a55..89fa5bc69c51 100644
--- a/drivers/net/ethernet/broadcom/bgmac.h
+++ b/drivers/net/ethernet/broadcom/bgmac.h
@@ -189,6 +189,7 @@
189#define BGMAC_CMDCFG_ES_10 0x00000000 189#define BGMAC_CMDCFG_ES_10 0x00000000
190#define BGMAC_CMDCFG_ES_100 0x00000004 190#define BGMAC_CMDCFG_ES_100 0x00000004
191#define BGMAC_CMDCFG_ES_1000 0x00000008 191#define BGMAC_CMDCFG_ES_1000 0x00000008
192#define BGMAC_CMDCFG_ES_2500 0x0000000C
192#define BGMAC_CMDCFG_PROM 0x00000010 /* Set to activate promiscuous mode */ 193#define BGMAC_CMDCFG_PROM 0x00000010 /* Set to activate promiscuous mode */
193#define BGMAC_CMDCFG_PAD_EN 0x00000020 194#define BGMAC_CMDCFG_PAD_EN 0x00000020
194#define BGMAC_CMDCFG_CF 0x00000040 195#define BGMAC_CMDCFG_CF 0x00000040