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authorDave Airlie <airlied@gmail.com>2012-09-21 09:19:50 -0400
committerDave Airlie <airlied@gmail.com>2012-09-21 10:17:15 -0400
commit6c06d608ec244d9b030f16ce9088b4456197e1cb (patch)
tree756c786e7be5fa60d3d1dfeb8bf246e4e945c92b
parent8e910d08a2fd61e3c0baf82042c6f0e0a9773df4 (diff)
drm/nouveau: add dmi quirk for gpio reset
This fixes the gpio reset problem so the Retina MBP works, but avoids breaking the Dell systems. Ben will work on a better solution for 3.7. Tested by me on retina MBP. Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nv50_gpio.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_gpio.c b/drivers/gpu/drm/nouveau/nv50_gpio.c
index f429e6a8ca7a..c399d510b27a 100644
--- a/drivers/gpu/drm/nouveau/nv50_gpio.c
+++ b/drivers/gpu/drm/nouveau/nv50_gpio.c
@@ -22,6 +22,7 @@
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24 24
25#include <linux/dmi.h>
25#include "drmP.h" 26#include "drmP.h"
26#include "nouveau_drv.h" 27#include "nouveau_drv.h"
27#include "nouveau_hw.h" 28#include "nouveau_hw.h"
@@ -110,11 +111,26 @@ nv50_gpio_isr(struct drm_device *dev)
110 nv_wr32(dev, 0xe074, intr1); 111 nv_wr32(dev, 0xe074, intr1);
111} 112}
112 113
114static struct dmi_system_id gpio_reset_ids[] = {
115 {
116 .ident = "Apple Macbook 10,1",
117 .matches = {
118 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
119 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro10,1"),
120 }
121 },
122 { }
123};
124
113int 125int
114nv50_gpio_init(struct drm_device *dev) 126nv50_gpio_init(struct drm_device *dev)
115{ 127{
116 struct drm_nouveau_private *dev_priv = dev->dev_private; 128 struct drm_nouveau_private *dev_priv = dev->dev_private;
117 129
130 /* initialise gpios and routing to vbios defaults */
131 if (dmi_check_system(gpio_reset_ids))
132 nouveau_gpio_reset(dev);
133
118 /* disable, and ack any pending gpio interrupts */ 134 /* disable, and ack any pending gpio interrupts */
119 nv_wr32(dev, 0xe050, 0x00000000); 135 nv_wr32(dev, 0xe050, 0x00000000);
120 nv_wr32(dev, 0xe054, 0xffffffff); 136 nv_wr32(dev, 0xe054, 0xffffffff);