diff options
author | Boris Ostrovsky <boris.ostrovsky@amd.com> | 2013-01-29 16:32:16 -0500 |
---|---|---|
committer | H. Peter Anvin <hpa@linux.intel.com> | 2013-01-31 16:35:32 -0500 |
commit | 6bf08a8dcd1ef13e542f08fc3b1ce6cf64ae63b6 (patch) | |
tree | 3de5ba1afe7196ad827249f8924b72e53685e4df | |
parent | 349eab6eb07794c59e37703ccbfeb5920721885c (diff) |
x86, AMD: Clean up init_amd()
Clean up multiple declarations of variable used for rd/wrmsr.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
Link: http://lkml.kernel.org/r/1359495136-23244-1-git-send-email-ostr@amd64.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
-rw-r--r-- | arch/x86/kernel/cpu/amd.c | 29 |
1 files changed, 12 insertions, 17 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 15239fffd6fe..dd4a5b685a00 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -518,10 +518,9 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) | |||
518 | static void __cpuinit init_amd(struct cpuinfo_x86 *c) | 518 | static void __cpuinit init_amd(struct cpuinfo_x86 *c) |
519 | { | 519 | { |
520 | u32 dummy; | 520 | u32 dummy; |
521 | |||
522 | #ifdef CONFIG_SMP | ||
523 | unsigned long long value; | 521 | unsigned long long value; |
524 | 522 | ||
523 | #ifdef CONFIG_SMP | ||
525 | /* | 524 | /* |
526 | * Disable TLB flush filter by setting HWCR.FFDIS on K8 | 525 | * Disable TLB flush filter by setting HWCR.FFDIS on K8 |
527 | * bit 6 of msr C001_0015 | 526 | * bit 6 of msr C001_0015 |
@@ -559,12 +558,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
559 | * (AMD Erratum #110, docId: 25759). | 558 | * (AMD Erratum #110, docId: 25759). |
560 | */ | 559 | */ |
561 | if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) { | 560 | if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) { |
562 | u64 val; | ||
563 | |||
564 | clear_cpu_cap(c, X86_FEATURE_LAHF_LM); | 561 | clear_cpu_cap(c, X86_FEATURE_LAHF_LM); |
565 | if (!rdmsrl_amd_safe(0xc001100d, &val)) { | 562 | if (!rdmsrl_amd_safe(0xc001100d, &value)) { |
566 | val &= ~(1ULL << 32); | 563 | value &= ~(1ULL << 32); |
567 | wrmsrl_amd_safe(0xc001100d, val); | 564 | wrmsrl_amd_safe(0xc001100d, value); |
568 | } | 565 | } |
569 | } | 566 | } |
570 | 567 | ||
@@ -617,13 +614,12 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
617 | if ((c->x86 == 0x15) && | 614 | if ((c->x86 == 0x15) && |
618 | (c->x86_model >= 0x10) && (c->x86_model <= 0x1f) && | 615 | (c->x86_model >= 0x10) && (c->x86_model <= 0x1f) && |
619 | !cpu_has(c, X86_FEATURE_TOPOEXT)) { | 616 | !cpu_has(c, X86_FEATURE_TOPOEXT)) { |
620 | u64 val; | ||
621 | 617 | ||
622 | if (!rdmsrl_safe(0xc0011005, &val)) { | 618 | if (!rdmsrl_safe(0xc0011005, &value)) { |
623 | val |= 1ULL << 54; | 619 | value |= 1ULL << 54; |
624 | wrmsrl_safe(0xc0011005, val); | 620 | wrmsrl_safe(0xc0011005, value); |
625 | rdmsrl(0xc0011005, val); | 621 | rdmsrl(0xc0011005, value); |
626 | if (val & (1ULL << 54)) { | 622 | if (value & (1ULL << 54)) { |
627 | set_cpu_cap(c, X86_FEATURE_TOPOEXT); | 623 | set_cpu_cap(c, X86_FEATURE_TOPOEXT); |
628 | printk(KERN_INFO FW_INFO "CPU: Re-enabling " | 624 | printk(KERN_INFO FW_INFO "CPU: Re-enabling " |
629 | "disabled Topology Extensions Support\n"); | 625 | "disabled Topology Extensions Support\n"); |
@@ -637,11 +633,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
637 | */ | 633 | */ |
638 | if ((c->x86 == 0x15) && | 634 | if ((c->x86 == 0x15) && |
639 | (c->x86_model >= 0x02) && (c->x86_model < 0x20)) { | 635 | (c->x86_model >= 0x02) && (c->x86_model < 0x20)) { |
640 | u64 val; | ||
641 | 636 | ||
642 | if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) { | 637 | if (!rdmsrl_safe(0xc0011021, &value) && !(value & 0x1E)) { |
643 | val |= 0x1E; | 638 | value |= 0x1E; |
644 | wrmsrl_safe(0xc0011021, val); | 639 | wrmsrl_safe(0xc0011021, value); |
645 | } | 640 | } |
646 | } | 641 | } |
647 | 642 | ||