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authorThierry Reding <treding@nvidia.com>2014-08-01 04:44:20 -0400
committerThierry Reding <treding@nvidia.com>2015-04-10 10:03:48 -0400
commit6bb18c532d08438f4ae4e282da6d12e86a86dcfb (patch)
tree4ccb9479d993955a14e1154c29d18084085b28a8
parent04794d982e830d4fdc39c1e1b8699fe53a7bd947 (diff)
clk: tegra: Various whitespace cleanups
Make usage of blank lines as separators more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--drivers/clk/tegra/clk-pll.c1
-rw-r--r--drivers/clk/tegra/clk-tegra114.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index bfef9abdf232..f9950dda102e 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -1223,6 +1223,7 @@ static long _pllre_calc_rate(struct tegra_clk_pll *pll,
1223 1223
1224 return output_rate; 1224 return output_rate;
1225} 1225}
1226
1226static int clk_pllre_set_rate(struct clk_hw *hw, unsigned long rate, 1227static int clk_pllre_set_rate(struct clk_hw *hw, unsigned long rate,
1227 unsigned long parent_rate) 1228 unsigned long parent_rate)
1228{ 1229{
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index d0766423a5d6..75d8af6213e7 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -1263,6 +1263,7 @@ static void tegra114_wait_cpu_in_reset(u32 cpu)
1263 cpu_relax(); 1263 cpu_relax();
1264 } while (!(reg & (1 << cpu))); /* check CPU been reset or not */ 1264 } while (!(reg & (1 << cpu))); /* check CPU been reset or not */
1265} 1265}
1266
1266static void tegra114_disable_cpu_clock(u32 cpu) 1267static void tegra114_disable_cpu_clock(u32 cpu)
1267{ 1268{
1268 /* flow controller would take care in the power sequence. */ 1269 /* flow controller would take care in the power sequence. */
@@ -1351,7 +1352,6 @@ static void __init tegra114_clock_apply_init_table(void)
1351 tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX); 1352 tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX);
1352} 1353}
1353 1354
1354
1355/** 1355/**
1356 * tegra114_car_barrier - wait for pending writes to the CAR to complete 1356 * tegra114_car_barrier - wait for pending writes to the CAR to complete
1357 * 1357 *