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authorTomi Valkeinen <tomi.valkeinen@ti.com>2015-04-20 05:09:31 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2015-04-20 05:09:31 -0400
commit6b75b54c841a18ef114704aa5cf2cdf43487b0ae (patch)
tree3d2f0e1dc68d96cfd7fc7b32863b155801098544
parent7374ccc0c322a6dc55f783a1a9c816c6f308d990 (diff)
parentaa977f62dff4fb41e89b473c9831c292c01d8bfc (diff)
Merge omapdss topic branch for fbdev 4.1
-rw-r--r--Documentation/devicetree/bindings/video/ti,omap-dss.txt4
-rw-r--r--drivers/gpu/drm/omapdrm/omap_connector.c2
-rw-r--r--drivers/video/fbdev/omap2/displays-new/connector-dvi.c2
-rw-r--r--drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c11
-rw-r--r--drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c2
-rw-r--r--drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c2
-rw-r--r--drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c2
-rw-r--r--drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c2
-rw-r--r--drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c2
-rw-r--r--drivers/video/fbdev/omap2/dss/core.c4
-rw-r--r--drivers/video/fbdev/omap2/dss/dispc.c147
-rw-r--r--drivers/video/fbdev/omap2/dss/display.c2
-rw-r--r--drivers/video/fbdev/omap2/dss/dsi.c2
-rw-r--r--drivers/video/fbdev/omap2/dss/dss.c3
-rw-r--r--drivers/video/fbdev/omap2/dss/dss_features.c2
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi5_core.c2
-rw-r--r--drivers/video/fbdev/omap2/dss/rfbi.c2
-rw-r--r--drivers/video/fbdev/omap2/omapfb/omapfb-main.c4
-rw-r--r--include/video/omapdss.h7
19 files changed, 172 insertions, 32 deletions
diff --git a/Documentation/devicetree/bindings/video/ti,omap-dss.txt b/Documentation/devicetree/bindings/video/ti,omap-dss.txt
index d5f1a3fe3109..e1ef29569338 100644
--- a/Documentation/devicetree/bindings/video/ti,omap-dss.txt
+++ b/Documentation/devicetree/bindings/video/ti,omap-dss.txt
@@ -25,8 +25,8 @@ Video Ports
25----------- 25-----------
26 26
27The DSS Core and the encoders have video port outputs. The structure of the 27The DSS Core and the encoders have video port outputs. The structure of the
28video ports is described in Documentation/devicetree/bindings/video/video- 28video ports is described in Documentation/devicetree/bindings/graph.txt,
29ports.txt, and the properties for the ports and endpoints for each encoder are 29and the properties for the ports and endpoints for each encoder are
30described in the SoC's DSS binding documentation. 30described in the SoC's DSS binding documentation.
31 31
32The video ports are used to describe the connections to external hardware, like 32The video ports are used to describe the connections to external hardware, like
diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c
index a94b11f7859d..2c2173bc3f00 100644
--- a/drivers/gpu/drm/omapdrm/omap_connector.c
+++ b/drivers/gpu/drm/omapdrm/omap_connector.c
@@ -102,7 +102,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
102 102
103 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; 103 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
104 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; 104 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
105 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; 105 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
106} 106}
107 107
108static enum drm_connector_status omap_connector_detect( 108static enum drm_connector_status omap_connector_detect(
diff --git a/drivers/video/fbdev/omap2/displays-new/connector-dvi.c b/drivers/video/fbdev/omap2/displays-new/connector-dvi.c
index 0cdc97413020..a8ce920fa797 100644
--- a/drivers/video/fbdev/omap2/displays-new/connector-dvi.c
+++ b/drivers/video/fbdev/omap2/displays-new/connector-dvi.c
@@ -37,7 +37,7 @@ static const struct omap_video_timings dvic_default_timings = {
37 .hsync_level = OMAPDSS_SIG_ACTIVE_HIGH, 37 .hsync_level = OMAPDSS_SIG_ACTIVE_HIGH,
38 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, 38 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
39 .de_level = OMAPDSS_SIG_ACTIVE_HIGH, 39 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
40 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, 40 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
41}; 41};
42 42
43struct panel_drv_data { 43struct panel_drv_data {
diff --git a/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c b/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c
index 92919a74e715..d9048b3df495 100644
--- a/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c
+++ b/drivers/video/fbdev/omap2/displays-new/encoder-tfp410.c
@@ -114,12 +114,21 @@ static void tfp410_disable(struct omap_dss_device *dssdev)
114 dssdev->state = OMAP_DSS_DISPLAY_DISABLED; 114 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
115} 115}
116 116
117static void tfp410_fix_timings(struct omap_video_timings *timings)
118{
119 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
120 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
121 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
122}
123
117static void tfp410_set_timings(struct omap_dss_device *dssdev, 124static void tfp410_set_timings(struct omap_dss_device *dssdev,
118 struct omap_video_timings *timings) 125 struct omap_video_timings *timings)
119{ 126{
120 struct panel_drv_data *ddata = to_panel_data(dssdev); 127 struct panel_drv_data *ddata = to_panel_data(dssdev);
121 struct omap_dss_device *in = ddata->in; 128 struct omap_dss_device *in = ddata->in;
122 129
130 tfp410_fix_timings(timings);
131
123 ddata->timings = *timings; 132 ddata->timings = *timings;
124 dssdev->panel.timings = *timings; 133 dssdev->panel.timings = *timings;
125 134
@@ -140,6 +149,8 @@ static int tfp410_check_timings(struct omap_dss_device *dssdev,
140 struct panel_drv_data *ddata = to_panel_data(dssdev); 149 struct panel_drv_data *ddata = to_panel_data(dssdev);
141 struct omap_dss_device *in = ddata->in; 150 struct omap_dss_device *in = ddata->in;
142 151
152 tfp410_fix_timings(timings);
153
143 return in->ops.dpi->check_timings(in, timings); 154 return in->ops.dpi->check_timings(in, timings);
144} 155}
145 156
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c b/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c
index 27d4fcfa1824..9974a37a11af 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-lgphilips-lb035q02.c
@@ -37,7 +37,7 @@ static struct omap_video_timings lb035q02_timings = {
37 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, 37 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
38 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, 38 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
39 .de_level = OMAPDSS_SIG_ACTIVE_HIGH, 39 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
40 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, 40 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
41}; 41};
42 42
43struct panel_drv_data { 43struct panel_drv_data {
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c b/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c
index 18b19b6e1ac2..eae263702964 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-sharp-ls037v7dw01.c
@@ -54,7 +54,7 @@ static const struct omap_video_timings sharp_ls_timings = {
54 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, 54 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
55 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, 55 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
56 .de_level = OMAPDSS_SIG_ACTIVE_HIGH, 56 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
57 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, 57 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
58}; 58};
59 59
60#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) 60#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c b/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
index 337ccc5c0f5e..90cbc4c3406c 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-sony-acx565akm.c
@@ -108,7 +108,7 @@ static const struct omap_video_timings acx565akm_panel_timings = {
108 108
109 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, 109 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
110 .de_level = OMAPDSS_SIG_ACTIVE_HIGH, 110 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
111 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, 111 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
112}; 112};
113 113
114#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) 114#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c
index fbba0b8ca871..9edc51133c59 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td028ttec1.c
@@ -58,7 +58,7 @@ static struct omap_video_timings td028ttec1_panel_timings = {
58 58
59 .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE, 59 .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
60 .de_level = OMAPDSS_SIG_ACTIVE_HIGH, 60 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
61 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, 61 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
62}; 62};
63 63
64#define JBT_COMMAND 0x000 64#define JBT_COMMAND 0x000
diff --git a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c
index 5aba76bca25a..79e4a029aab9 100644
--- a/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c
+++ b/drivers/video/fbdev/omap2/displays-new/panel-tpo-td043mtea1.c
@@ -91,7 +91,7 @@ static const struct omap_video_timings tpo_td043_timings = {
91 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, 91 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
92 .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE, 92 .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
93 .de_level = OMAPDSS_SIG_ACTIVE_HIGH, 93 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
94 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, 94 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
95}; 95};
96 96
97#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) 97#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
diff --git a/drivers/video/fbdev/omap2/dss/core.c b/drivers/video/fbdev/omap2/dss/core.c
index d5d92124e019..16751755d433 100644
--- a/drivers/video/fbdev/omap2/dss/core.c
+++ b/drivers/video/fbdev/omap2/dss/core.c
@@ -179,10 +179,14 @@ static int omap_dss_pm_notif(struct notifier_block *b, unsigned long v, void *d)
179 179
180 switch (v) { 180 switch (v) {
181 case PM_SUSPEND_PREPARE: 181 case PM_SUSPEND_PREPARE:
182 case PM_HIBERNATION_PREPARE:
183 case PM_RESTORE_PREPARE:
182 DSSDBG("suspending displays\n"); 184 DSSDBG("suspending displays\n");
183 return dss_suspend_all_devices(); 185 return dss_suspend_all_devices();
184 186
185 case PM_POST_SUSPEND: 187 case PM_POST_SUSPEND:
188 case PM_POST_HIBERNATION:
189 case PM_POST_RESTORE:
186 DSSDBG("resuming displays\n"); 190 DSSDBG("resuming displays\n");
187 return dss_resume_all_devices(); 191 return dss_resume_all_devices();
188 192
diff --git a/drivers/video/fbdev/omap2/dss/dispc.c b/drivers/video/fbdev/omap2/dss/dispc.c
index 31b743c70272..f4fc77d9d3bf 100644
--- a/drivers/video/fbdev/omap2/dss/dispc.c
+++ b/drivers/video/fbdev/omap2/dss/dispc.c
@@ -123,6 +123,9 @@ static struct {
123 123
124 struct regmap *syscon_pol; 124 struct regmap *syscon_pol;
125 u32 syscon_pol_offset; 125 u32 syscon_pol_offset;
126
127 /* DISPC_CONTROL & DISPC_CONFIG lock*/
128 spinlock_t control_lock;
126} dispc; 129} dispc;
127 130
128enum omap_color_component { 131enum omap_color_component {
@@ -261,7 +264,16 @@ static u32 mgr_fld_read(enum omap_channel channel, enum mgr_reg_fields regfld)
261static void mgr_fld_write(enum omap_channel channel, 264static void mgr_fld_write(enum omap_channel channel,
262 enum mgr_reg_fields regfld, int val) { 265 enum mgr_reg_fields regfld, int val) {
263 const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld]; 266 const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld];
267 const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG;
268 unsigned long flags;
269
270 if (need_lock)
271 spin_lock_irqsave(&dispc.control_lock, flags);
272
264 REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low); 273 REG_FLD_MOD(rfld.reg, val, rfld.high, rfld.low);
274
275 if (need_lock)
276 spin_unlock_irqrestore(&dispc.control_lock, flags);
265} 277}
266 278
267#define SR(reg) \ 279#define SR(reg) \
@@ -1126,6 +1138,7 @@ static void dispc_init_fifos(void)
1126 int fifo; 1138 int fifo;
1127 u8 start, end; 1139 u8 start, end;
1128 u32 unit; 1140 u32 unit;
1141 int i;
1129 1142
1130 unit = dss_feat_get_buffer_size_unit(); 1143 unit = dss_feat_get_buffer_size_unit();
1131 1144
@@ -1165,6 +1178,20 @@ static void dispc_init_fifos(void)
1165 dispc.fifo_assignment[OMAP_DSS_GFX] = OMAP_DSS_WB; 1178 dispc.fifo_assignment[OMAP_DSS_GFX] = OMAP_DSS_WB;
1166 dispc.fifo_assignment[OMAP_DSS_WB] = OMAP_DSS_GFX; 1179 dispc.fifo_assignment[OMAP_DSS_WB] = OMAP_DSS_GFX;
1167 } 1180 }
1181
1182 /*
1183 * Setup default fifo thresholds.
1184 */
1185 for (i = 0; i < dss_feat_get_num_ovls(); ++i) {
1186 u32 low, high;
1187 const bool use_fifomerge = false;
1188 const bool manual_update = false;
1189
1190 dispc_ovl_compute_fifo_thresholds(i, &low, &high,
1191 use_fifomerge, manual_update);
1192
1193 dispc_ovl_set_fifo_threshold(i, low, high);
1194 }
1168} 1195}
1169 1196
1170static u32 dispc_ovl_get_fifo_size(enum omap_plane plane) 1197static u32 dispc_ovl_get_fifo_size(enum omap_plane plane)
@@ -1278,6 +1305,63 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
1278} 1305}
1279EXPORT_SYMBOL(dispc_ovl_compute_fifo_thresholds); 1306EXPORT_SYMBOL(dispc_ovl_compute_fifo_thresholds);
1280 1307
1308static void dispc_ovl_set_mflag(enum omap_plane plane, bool enable)
1309{
1310 int bit;
1311
1312 if (plane == OMAP_DSS_GFX)
1313 bit = 14;
1314 else
1315 bit = 23;
1316
1317 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable, bit, bit);
1318}
1319
1320static void dispc_ovl_set_mflag_threshold(enum omap_plane plane,
1321 int low, int high)
1322{
1323 dispc_write_reg(DISPC_OVL_MFLAG_THRESHOLD(plane),
1324 FLD_VAL(high, 31, 16) | FLD_VAL(low, 15, 0));
1325}
1326
1327static void dispc_init_mflag(void)
1328{
1329 int i;
1330
1331 /*
1332 * HACK: NV12 color format and MFLAG seem to have problems working
1333 * together: using two displays, and having an NV12 overlay on one of
1334 * the displays will cause underflows/synclosts when MFLAG_CTRL=2.
1335 * Changing MFLAG thresholds and PRELOAD to certain values seem to
1336 * remove the errors, but there doesn't seem to be a clear logic on
1337 * which values work and which not.
1338 *
1339 * As a work-around, set force MFLAG to always on.
1340 */
1341 dispc_write_reg(DISPC_GLOBAL_MFLAG_ATTRIBUTE,
1342 (1 << 0) | /* MFLAG_CTRL = force always on */
1343 (0 << 2)); /* MFLAG_START = disable */
1344
1345 for (i = 0; i < dss_feat_get_num_ovls(); ++i) {
1346 u32 size = dispc_ovl_get_fifo_size(i);
1347 u32 unit = dss_feat_get_buffer_size_unit();
1348 u32 low, high;
1349
1350 dispc_ovl_set_mflag(i, true);
1351
1352 /*
1353 * Simulation team suggests below thesholds:
1354 * HT = fifosize * 5 / 8;
1355 * LT = fifosize * 4 / 8;
1356 */
1357
1358 low = size * 4 / 8 / unit;
1359 high = size * 5 / 8 / unit;
1360
1361 dispc_ovl_set_mflag_threshold(i, low, high);
1362 }
1363}
1364
1281static void dispc_ovl_set_fir(enum omap_plane plane, 1365static void dispc_ovl_set_fir(enum omap_plane plane,
1282 int hinc, int vinc, 1366 int hinc, int vinc,
1283 enum omap_color_component color_comp) 1367 enum omap_color_component color_comp)
@@ -2322,6 +2406,11 @@ static int dispc_ovl_calc_scaling(unsigned long pclk, unsigned long lclk,
2322 if (width == out_width && height == out_height) 2406 if (width == out_width && height == out_height)
2323 return 0; 2407 return 0;
2324 2408
2409 if (pclk == 0 || mgr_timings->pixelclock == 0) {
2410 DSSERR("cannot calculate scaling settings: pclk is zero\n");
2411 return -EINVAL;
2412 }
2413
2325 if ((caps & OMAP_DSS_OVL_CAP_SCALE) == 0) 2414 if ((caps & OMAP_DSS_OVL_CAP_SCALE) == 0)
2326 return -EINVAL; 2415 return -EINVAL;
2327 2416
@@ -2441,7 +2530,7 @@ static int dispc_ovl_setup_common(enum omap_plane plane,
2441 unsigned long pclk = dispc_plane_pclk_rate(plane); 2530 unsigned long pclk = dispc_plane_pclk_rate(plane);
2442 unsigned long lclk = dispc_plane_lclk_rate(plane); 2531 unsigned long lclk = dispc_plane_lclk_rate(plane);
2443 2532
2444 if (paddr == 0) 2533 if (paddr == 0 && rotation_type != OMAP_DSS_ROT_TILER)
2445 return -EINVAL; 2534 return -EINVAL;
2446 2535
2447 out_width = out_width == 0 ? width : out_width; 2536 out_width = out_width == 0 ? width : out_width;
@@ -2915,7 +3004,7 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
2915 3004
2916{ 3005{
2917 u32 timing_h, timing_v, l; 3006 u32 timing_h, timing_v, l;
2918 bool onoff, rf, ipc; 3007 bool onoff, rf, ipc, vs, hs, de;
2919 3008
2920 timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) | 3009 timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) |
2921 FLD_VAL(hfp-1, dispc.feat->fp_start, 8) | 3010 FLD_VAL(hfp-1, dispc.feat->fp_start, 8) |
@@ -2927,6 +3016,39 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
2927 dispc_write_reg(DISPC_TIMING_H(channel), timing_h); 3016 dispc_write_reg(DISPC_TIMING_H(channel), timing_h);
2928 dispc_write_reg(DISPC_TIMING_V(channel), timing_v); 3017 dispc_write_reg(DISPC_TIMING_V(channel), timing_v);
2929 3018
3019 switch (vsync_level) {
3020 case OMAPDSS_SIG_ACTIVE_LOW:
3021 vs = true;
3022 break;
3023 case OMAPDSS_SIG_ACTIVE_HIGH:
3024 vs = false;
3025 break;
3026 default:
3027 BUG();
3028 }
3029
3030 switch (hsync_level) {
3031 case OMAPDSS_SIG_ACTIVE_LOW:
3032 hs = true;
3033 break;
3034 case OMAPDSS_SIG_ACTIVE_HIGH:
3035 hs = false;
3036 break;
3037 default:
3038 BUG();
3039 }
3040
3041 switch (de_level) {
3042 case OMAPDSS_SIG_ACTIVE_LOW:
3043 de = true;
3044 break;
3045 case OMAPDSS_SIG_ACTIVE_HIGH:
3046 de = false;
3047 break;
3048 default:
3049 BUG();
3050 }
3051
2930 switch (data_pclk_edge) { 3052 switch (data_pclk_edge) {
2931 case OMAPDSS_DRIVE_SIG_RISING_EDGE: 3053 case OMAPDSS_DRIVE_SIG_RISING_EDGE:
2932 ipc = false; 3054 ipc = false;
@@ -2934,22 +3056,18 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
2934 case OMAPDSS_DRIVE_SIG_FALLING_EDGE: 3056 case OMAPDSS_DRIVE_SIG_FALLING_EDGE:
2935 ipc = true; 3057 ipc = true;
2936 break; 3058 break;
2937 case OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES:
2938 default: 3059 default:
2939 BUG(); 3060 BUG();
2940 } 3061 }
2941 3062
3063 /* always use the 'rf' setting */
3064 onoff = true;
3065
2942 switch (sync_pclk_edge) { 3066 switch (sync_pclk_edge) {
2943 case OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES:
2944 onoff = false;
2945 rf = false;
2946 break;
2947 case OMAPDSS_DRIVE_SIG_FALLING_EDGE: 3067 case OMAPDSS_DRIVE_SIG_FALLING_EDGE:
2948 onoff = true;
2949 rf = false; 3068 rf = false;
2950 break; 3069 break;
2951 case OMAPDSS_DRIVE_SIG_RISING_EDGE: 3070 case OMAPDSS_DRIVE_SIG_RISING_EDGE:
2952 onoff = true;
2953 rf = true; 3071 rf = true;
2954 break; 3072 break;
2955 default: 3073 default:
@@ -2958,10 +3076,10 @@ static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw,
2958 3076
2959 l = FLD_VAL(onoff, 17, 17) | 3077 l = FLD_VAL(onoff, 17, 17) |
2960 FLD_VAL(rf, 16, 16) | 3078 FLD_VAL(rf, 16, 16) |
2961 FLD_VAL(de_level, 15, 15) | 3079 FLD_VAL(de, 15, 15) |
2962 FLD_VAL(ipc, 14, 14) | 3080 FLD_VAL(ipc, 14, 14) |
2963 FLD_VAL(hsync_level, 13, 13) | 3081 FLD_VAL(hs, 13, 13) |
2964 FLD_VAL(vsync_level, 12, 12); 3082 FLD_VAL(vs, 12, 12);
2965 3083
2966 dispc_write_reg(DISPC_POL_FREQ(channel), l); 3084 dispc_write_reg(DISPC_POL_FREQ(channel), l);
2967 3085
@@ -3569,6 +3687,9 @@ static void _omap_dispc_initial_config(void)
3569 3687
3570 if (dispc.feat->mstandby_workaround) 3688 if (dispc.feat->mstandby_workaround)
3571 REG_FLD_MOD(DISPC_MSTANDBY_CTRL, 1, 0, 0); 3689 REG_FLD_MOD(DISPC_MSTANDBY_CTRL, 1, 0, 0);
3690
3691 if (dss_has_feature(FEAT_MFLAG))
3692 dispc_init_mflag();
3572} 3693}
3573 3694
3574static const struct dispc_features omap24xx_dispc_feats __initconst = { 3695static const struct dispc_features omap24xx_dispc_feats __initconst = {
@@ -3770,6 +3891,8 @@ static int __init omap_dispchw_probe(struct platform_device *pdev)
3770 3891
3771 dispc.pdev = pdev; 3892 dispc.pdev = pdev;
3772 3893
3894 spin_lock_init(&dispc.control_lock);
3895
3773 r = dispc_init_features(dispc.pdev); 3896 r = dispc_init_features(dispc.pdev);
3774 if (r) 3897 if (r)
3775 return r; 3898 return r;
diff --git a/drivers/video/fbdev/omap2/dss/display.c b/drivers/video/fbdev/omap2/dss/display.c
index 2412a0dd0c13..ef5b9027985d 100644
--- a/drivers/video/fbdev/omap2/dss/display.c
+++ b/drivers/video/fbdev/omap2/dss/display.c
@@ -295,7 +295,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
295 OMAPDSS_DRIVE_SIG_RISING_EDGE : 295 OMAPDSS_DRIVE_SIG_RISING_EDGE :
296 OMAPDSS_DRIVE_SIG_FALLING_EDGE; 296 OMAPDSS_DRIVE_SIG_FALLING_EDGE;
297 297
298 ovt->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; 298 ovt->sync_pclk_edge = ovt->data_pclk_edge;
299} 299}
300EXPORT_SYMBOL(videomode_to_omap_video_timings); 300EXPORT_SYMBOL(videomode_to_omap_video_timings);
301 301
diff --git a/drivers/video/fbdev/omap2/dss/dsi.c b/drivers/video/fbdev/omap2/dss/dsi.c
index 5081f6fb1737..28b0bc11669d 100644
--- a/drivers/video/fbdev/omap2/dss/dsi.c
+++ b/drivers/video/fbdev/omap2/dss/dsi.c
@@ -4137,7 +4137,7 @@ static int dsi_display_init_dispc(struct platform_device *dsidev,
4137 dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH; 4137 dsi->timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
4138 dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; 4138 dsi->timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
4139 dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH; 4139 dsi->timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
4140 dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; 4140 dsi->timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
4141 4141
4142 dss_mgr_set_timings(mgr, &dsi->timings); 4142 dss_mgr_set_timings(mgr, &dsi->timings);
4143 4143
diff --git a/drivers/video/fbdev/omap2/dss/dss.c b/drivers/video/fbdev/omap2/dss/dss.c
index a6d10d4279f3..7f978b6a34e8 100644
--- a/drivers/video/fbdev/omap2/dss/dss.c
+++ b/drivers/video/fbdev/omap2/dss/dss.c
@@ -38,6 +38,7 @@
38#include <linux/regmap.h> 38#include <linux/regmap.h>
39#include <linux/of.h> 39#include <linux/of.h>
40#include <linux/regulator/consumer.h> 40#include <linux/regulator/consumer.h>
41#include <linux/suspend.h>
41 42
42#include <video/omapdss.h> 43#include <video/omapdss.h>
43 44
@@ -1138,6 +1139,8 @@ static int __init omap_dsshw_probe(struct platform_device *pdev)
1138 1139
1139 dss_debugfs_create_file("dss", dss_dump_regs); 1140 dss_debugfs_create_file("dss", dss_dump_regs);
1140 1141
1142 pm_set_vt_switch(0);
1143
1141 return 0; 1144 return 0;
1142 1145
1143err_pll_init: 1146err_pll_init:
diff --git a/drivers/video/fbdev/omap2/dss/dss_features.c b/drivers/video/fbdev/omap2/dss/dss_features.c
index 376270b777f8..b0b6dfd657bf 100644
--- a/drivers/video/fbdev/omap2/dss/dss_features.c
+++ b/drivers/video/fbdev/omap2/dss/dss_features.c
@@ -440,7 +440,7 @@ static const struct dss_param_range omap3_dss_param_range[] = {
440 440
441static const struct dss_param_range am43xx_dss_param_range[] = { 441static const struct dss_param_range am43xx_dss_param_range[] = {
442 [FEAT_PARAM_DSS_FCK] = { 0, 200000000 }, 442 [FEAT_PARAM_DSS_FCK] = { 0, 200000000 },
443 [FEAT_PARAM_DSS_PCD] = { 2, 255 }, 443 [FEAT_PARAM_DSS_PCD] = { 1, 255 },
444 [FEAT_PARAM_DOWNSCALE] = { 1, 4 }, 444 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
445 [FEAT_PARAM_LINEWIDTH] = { 1, 1024 }, 445 [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
446}; 446};
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5_core.c b/drivers/video/fbdev/omap2/dss/hdmi5_core.c
index a3cfe3d708f7..bfc0c4c297d6 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5_core.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi5_core.c
@@ -55,7 +55,7 @@ static void hdmi_core_ddc_init(struct hdmi_core_data *core)
55 const unsigned ss_scl_low = 4700; /* ns */ 55 const unsigned ss_scl_low = 4700; /* ns */
56 const unsigned fs_scl_high = 600; /* ns */ 56 const unsigned fs_scl_high = 600; /* ns */
57 const unsigned fs_scl_low = 1300; /* ns */ 57 const unsigned fs_scl_low = 1300; /* ns */
58 const unsigned sda_hold = 300; /* ns */ 58 const unsigned sda_hold = 1000; /* ns */
59 const unsigned sfr_div = 10; 59 const unsigned sfr_div = 10;
60 unsigned long long sfr; 60 unsigned long long sfr;
61 unsigned v; 61 unsigned v;
diff --git a/drivers/video/fbdev/omap2/dss/rfbi.c b/drivers/video/fbdev/omap2/dss/rfbi.c
index 28e694b11ff9..065effca9236 100644
--- a/drivers/video/fbdev/omap2/dss/rfbi.c
+++ b/drivers/video/fbdev/omap2/dss/rfbi.c
@@ -869,7 +869,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
869 rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH; 869 rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
870 rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; 870 rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
871 rfbi.timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH; 871 rfbi.timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
872 rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; 872 rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
873 873
874 dss_mgr_set_timings(mgr, &rfbi.timings); 874 dss_mgr_set_timings(mgr, &rfbi.timings);
875} 875}
diff --git a/drivers/video/fbdev/omap2/omapfb/omapfb-main.c b/drivers/video/fbdev/omap2/omapfb/omapfb-main.c
index 22f07f88bc40..4f0cbb54d4db 100644
--- a/drivers/video/fbdev/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/fbdev/omap2/omapfb/omapfb-main.c
@@ -2073,7 +2073,7 @@ static int omapfb_mode_to_timings(const char *mode_str,
2073 } else { 2073 } else {
2074 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; 2074 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
2075 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; 2075 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
2076 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; 2076 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
2077 } 2077 }
2078 2078
2079 timings->pixelclock = PICOS2KHZ(var->pixclock) * 1000; 2079 timings->pixelclock = PICOS2KHZ(var->pixclock) * 1000;
@@ -2223,7 +2223,7 @@ static void fb_videomode_to_omap_timings(struct fb_videomode *m,
2223 } else { 2223 } else {
2224 t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; 2224 t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
2225 t->de_level = OMAPDSS_SIG_ACTIVE_HIGH; 2225 t->de_level = OMAPDSS_SIG_ACTIVE_HIGH;
2226 t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; 2226 t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
2227 } 2227 }
2228 2228
2229 t->x_res = m->xres; 2229 t->x_res = m->xres;
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 60de61fea8e3..45a230190720 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -129,14 +129,13 @@ enum omap_rfbi_te_mode {
129}; 129};
130 130
131enum omap_dss_signal_level { 131enum omap_dss_signal_level {
132 OMAPDSS_SIG_ACTIVE_HIGH = 0, 132 OMAPDSS_SIG_ACTIVE_LOW,
133 OMAPDSS_SIG_ACTIVE_LOW = 1, 133 OMAPDSS_SIG_ACTIVE_HIGH,
134}; 134};
135 135
136enum omap_dss_signal_edge { 136enum omap_dss_signal_edge {
137 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
138 OMAPDSS_DRIVE_SIG_RISING_EDGE,
139 OMAPDSS_DRIVE_SIG_FALLING_EDGE, 137 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
138 OMAPDSS_DRIVE_SIG_RISING_EDGE,
140}; 139};
141 140
142enum omap_dss_venc_type { 141enum omap_dss_venc_type {