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authorPaul Walmsley <paul@pwsan.com>2012-04-19 06:04:34 -0400
committerPaul Walmsley <paul@pwsan.com>2012-04-19 06:25:06 -0400
commit6a29755fd7b92dc58908826f8d570a20a07a6fce (patch)
tree95fe09a59217b082db9575bab222d531786eedee
parentcb48427ef7ee274528bf0132bb69a7ca378dc9d2 (diff)
ARM: OMAP2xxx: hwmod data: share common interface data
Several struct omap_hwmod_ocp_if records can be shared between OMAP2420 and OMAP2430. Move these shared records out of the chip-specific files into mach-omap2/omap_hwmod_2xxx_interconnect_data.c. This should save some memory and source lines, at the cost of readability. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com>
Diffstat
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c281
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c256
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c266
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.h39
4 files changed, 324 insertions, 518 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 75c57d35bcca..b01b66a85f2e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -212,85 +212,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
212 * interfaces 212 * interfaces
213 */ 213 */
214 214
215/* L3 -> L4_CORE interface */
216static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = {
217 .master = &omap2xxx_l3_main_hwmod,
218 .slave = &omap2xxx_l4_core_hwmod,
219 .user = OCP_USER_MPU | OCP_USER_SDMA,
220};
221
222/* MPU -> L3 interface */
223static struct omap_hwmod_ocp_if omap2420_mpu__l3_main = {
224 .master = &omap2xxx_mpu_hwmod,
225 .slave = &omap2xxx_l3_main_hwmod,
226 .user = OCP_USER_MPU,
227};
228
229/* DSS -> l3 */
230static struct omap_hwmod_ocp_if omap2420_dss__l3 = {
231 .master = &omap2xxx_dss_core_hwmod,
232 .slave = &omap2xxx_l3_main_hwmod,
233 .fw = {
234 .omap2 = {
235 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
236 .flags = OMAP_FIREWALL_L3,
237 }
238 },
239 .user = OCP_USER_MPU | OCP_USER_SDMA,
240};
241
242/* l4 core -> mcspi1 interface */
243static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = {
244 .master = &omap2xxx_l4_core_hwmod,
245 .slave = &omap2xxx_mcspi1_hwmod,
246 .clk = "mcspi1_ick",
247 .addr = omap2_mcspi1_addr_space,
248 .user = OCP_USER_MPU | OCP_USER_SDMA,
249};
250
251/* l4 core -> mcspi2 interface */
252static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = {
253 .master = &omap2xxx_l4_core_hwmod,
254 .slave = &omap2xxx_mcspi2_hwmod,
255 .clk = "mcspi2_ick",
256 .addr = omap2_mcspi2_addr_space,
257 .user = OCP_USER_MPU | OCP_USER_SDMA,
258};
259
260/* L4_CORE -> L4_WKUP interface */
261static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
262 .master = &omap2xxx_l4_core_hwmod,
263 .slave = &omap2xxx_l4_wkup_hwmod,
264 .user = OCP_USER_MPU | OCP_USER_SDMA,
265};
266
267/* L4 CORE -> UART1 interface */
268static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
269 .master = &omap2xxx_l4_core_hwmod,
270 .slave = &omap2xxx_uart1_hwmod,
271 .clk = "uart1_ick",
272 .addr = omap2xxx_uart1_addr_space,
273 .user = OCP_USER_MPU | OCP_USER_SDMA,
274};
275
276/* L4 CORE -> UART2 interface */
277static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
278 .master = &omap2xxx_l4_core_hwmod,
279 .slave = &omap2xxx_uart2_hwmod,
280 .clk = "uart2_ick",
281 .addr = omap2xxx_uart2_addr_space,
282 .user = OCP_USER_MPU | OCP_USER_SDMA,
283};
284
285/* L4 PER -> UART3 interface */
286static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
287 .master = &omap2xxx_l4_core_hwmod,
288 .slave = &omap2xxx_uart3_hwmod,
289 .clk = "uart3_ick",
290 .addr = omap2xxx_uart3_addr_space,
291 .user = OCP_USER_MPU | OCP_USER_SDMA,
292};
293
294/* L4 CORE -> I2C1 interface */ 215/* L4 CORE -> I2C1 interface */
295static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { 216static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
296 .master = &omap2xxx_l4_core_hwmod, 217 .master = &omap2xxx_l4_core_hwmod,
@@ -335,105 +256,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
335 .user = OCP_USER_MPU | OCP_USER_SDMA, 256 .user = OCP_USER_MPU | OCP_USER_SDMA,
336}; 257};
337 258
338/* l4_core -> timer2 */
339static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = {
340 .master = &omap2xxx_l4_core_hwmod,
341 .slave = &omap2xxx_timer2_hwmod,
342 .clk = "gpt2_ick",
343 .addr = omap2xxx_timer2_addrs,
344 .user = OCP_USER_MPU | OCP_USER_SDMA,
345};
346
347/* l4_core -> timer3 */
348static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = {
349 .master = &omap2xxx_l4_core_hwmod,
350 .slave = &omap2xxx_timer3_hwmod,
351 .clk = "gpt3_ick",
352 .addr = omap2xxx_timer3_addrs,
353 .user = OCP_USER_MPU | OCP_USER_SDMA,
354};
355
356/* l4_core -> timer4 */
357static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = {
358 .master = &omap2xxx_l4_core_hwmod,
359 .slave = &omap2xxx_timer4_hwmod,
360 .clk = "gpt4_ick",
361 .addr = omap2xxx_timer4_addrs,
362 .user = OCP_USER_MPU | OCP_USER_SDMA,
363};
364
365/* l4_core -> timer5 */
366static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = {
367 .master = &omap2xxx_l4_core_hwmod,
368 .slave = &omap2xxx_timer5_hwmod,
369 .clk = "gpt5_ick",
370 .addr = omap2xxx_timer5_addrs,
371 .user = OCP_USER_MPU | OCP_USER_SDMA,
372};
373
374/* l4_core -> timer6 */
375static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = {
376 .master = &omap2xxx_l4_core_hwmod,
377 .slave = &omap2xxx_timer6_hwmod,
378 .clk = "gpt6_ick",
379 .addr = omap2xxx_timer6_addrs,
380 .user = OCP_USER_MPU | OCP_USER_SDMA,
381};
382
383/* l4_core -> timer7 */
384static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = {
385 .master = &omap2xxx_l4_core_hwmod,
386 .slave = &omap2xxx_timer7_hwmod,
387 .clk = "gpt7_ick",
388 .addr = omap2xxx_timer7_addrs,
389 .user = OCP_USER_MPU | OCP_USER_SDMA,
390};
391
392/* l4_core -> timer8 */
393static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = {
394 .master = &omap2xxx_l4_core_hwmod,
395 .slave = &omap2xxx_timer8_hwmod,
396 .clk = "gpt8_ick",
397 .addr = omap2xxx_timer8_addrs,
398 .user = OCP_USER_MPU | OCP_USER_SDMA,
399};
400
401/* l4_core -> timer9 */
402static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = {
403 .master = &omap2xxx_l4_core_hwmod,
404 .slave = &omap2xxx_timer9_hwmod,
405 .clk = "gpt9_ick",
406 .addr = omap2xxx_timer9_addrs,
407 .user = OCP_USER_MPU | OCP_USER_SDMA,
408};
409
410/* l4_core -> timer10 */
411static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = {
412 .master = &omap2xxx_l4_core_hwmod,
413 .slave = &omap2xxx_timer10_hwmod,
414 .clk = "gpt10_ick",
415 .addr = omap2_timer10_addrs,
416 .user = OCP_USER_MPU | OCP_USER_SDMA,
417};
418
419/* l4_core -> timer11 */
420static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = {
421 .master = &omap2xxx_l4_core_hwmod,
422 .slave = &omap2xxx_timer11_hwmod,
423 .clk = "gpt11_ick",
424 .addr = omap2_timer11_addrs,
425 .user = OCP_USER_MPU | OCP_USER_SDMA,
426};
427
428/* l4_core -> timer12 */
429static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = {
430 .master = &omap2xxx_l4_core_hwmod,
431 .slave = &omap2xxx_timer12_hwmod,
432 .clk = "gpt12_ick",
433 .addr = omap2xxx_timer12_addrs,
434 .user = OCP_USER_MPU | OCP_USER_SDMA,
435};
436
437/* l4_wkup -> wd_timer2 */ 259/* l4_wkup -> wd_timer2 */
438static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { 260static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = {
439 { 261 {
@@ -452,67 +274,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
452 .user = OCP_USER_MPU | OCP_USER_SDMA, 274 .user = OCP_USER_MPU | OCP_USER_SDMA,
453}; 275};
454 276
455/* l4_core -> dss */
456static struct omap_hwmod_ocp_if omap2420_l4_core__dss = {
457 .master = &omap2xxx_l4_core_hwmod,
458 .slave = &omap2xxx_dss_core_hwmod,
459 .clk = "dss_ick",
460 .addr = omap2_dss_addrs,
461 .fw = {
462 .omap2 = {
463 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
464 .flags = OMAP_FIREWALL_L4,
465 }
466 },
467 .user = OCP_USER_MPU | OCP_USER_SDMA,
468};
469
470/* l4_core -> dss_dispc */
471static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = {
472 .master = &omap2xxx_l4_core_hwmod,
473 .slave = &omap2xxx_dss_dispc_hwmod,
474 .clk = "dss_ick",
475 .addr = omap2_dss_dispc_addrs,
476 .fw = {
477 .omap2 = {
478 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
479 .flags = OMAP_FIREWALL_L4,
480 }
481 },
482 .user = OCP_USER_MPU | OCP_USER_SDMA,
483};
484
485/* l4_core -> dss_rfbi */
486static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = {
487 .master = &omap2xxx_l4_core_hwmod,
488 .slave = &omap2xxx_dss_rfbi_hwmod,
489 .clk = "dss_ick",
490 .addr = omap2_dss_rfbi_addrs,
491 .fw = {
492 .omap2 = {
493 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
494 .flags = OMAP_FIREWALL_L4,
495 }
496 },
497 .user = OCP_USER_MPU | OCP_USER_SDMA,
498};
499
500/* l4_core -> dss_venc */
501static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
502 .master = &omap2xxx_l4_core_hwmod,
503 .slave = &omap2xxx_dss_venc_hwmod,
504 .clk = "dss_ick",
505 .addr = omap2_dss_venc_addrs,
506 .fw = {
507 .omap2 = {
508 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
509 .flags = OMAP_FIREWALL_L4,
510 }
511 },
512 .flags = OCPIF_SWSUP_IDLE,
513 .user = OCP_USER_MPU | OCP_USER_SDMA,
514};
515
516/* l4_wkup -> gpio1 */ 277/* l4_wkup -> gpio1 */
517static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { 278static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = {
518 { 279 {
@@ -629,12 +390,12 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = {
629}; 390};
630 391
631static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { 392static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
632 &omap2420_l3_main__l4_core, 393 &omap2xxx_l3_main__l4_core,
633 &omap2420_mpu__l3_main, 394 &omap2xxx_mpu__l3_main,
634 &omap2420_dss__l3, 395 &omap2xxx_dss__l3,
635 &omap2420_l4_core__mcspi1, 396 &omap2xxx_l4_core__mcspi1,
636 &omap2420_l4_core__mcspi2, 397 &omap2xxx_l4_core__mcspi2,
637 &omap2420_l4_core__l4_wkup, 398 &omap2xxx_l4_core__l4_wkup,
638 &omap2_l4_core__uart1, 399 &omap2_l4_core__uart1,
639 &omap2_l4_core__uart2, 400 &omap2_l4_core__uart2,
640 &omap2_l4_core__uart3, 401 &omap2_l4_core__uart3,
@@ -642,22 +403,22 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
642 &omap2420_l4_core__i2c2, 403 &omap2420_l4_core__i2c2,
643 &omap2420_l3__iva, 404 &omap2420_l3__iva,
644 &omap2420_l4_wkup__timer1, 405 &omap2420_l4_wkup__timer1,
645 &omap2420_l4_core__timer2, 406 &omap2xxx_l4_core__timer2,
646 &omap2420_l4_core__timer3, 407 &omap2xxx_l4_core__timer3,
647 &omap2420_l4_core__timer4, 408 &omap2xxx_l4_core__timer4,
648 &omap2420_l4_core__timer5, 409 &omap2xxx_l4_core__timer5,
649 &omap2420_l4_core__timer6, 410 &omap2xxx_l4_core__timer6,
650 &omap2420_l4_core__timer7, 411 &omap2xxx_l4_core__timer7,
651 &omap2420_l4_core__timer8, 412 &omap2xxx_l4_core__timer8,
652 &omap2420_l4_core__timer9, 413 &omap2xxx_l4_core__timer9,
653 &omap2420_l4_core__timer10, 414 &omap2xxx_l4_core__timer10,
654 &omap2420_l4_core__timer11, 415 &omap2xxx_l4_core__timer11,
655 &omap2420_l4_core__timer12, 416 &omap2xxx_l4_core__timer12,
656 &omap2420_l4_wkup__wd_timer2, 417 &omap2420_l4_wkup__wd_timer2,
657 &omap2420_l4_core__dss, 418 &omap2xxx_l4_core__dss,
658 &omap2420_l4_core__dss_dispc, 419 &omap2xxx_l4_core__dss_dispc,
659 &omap2420_l4_core__dss_rfbi, 420 &omap2xxx_l4_core__dss_rfbi,
660 &omap2420_l4_core__dss_venc, 421 &omap2xxx_l4_core__dss_venc,
661 &omap2420_l4_wkup__gpio1, 422 &omap2420_l4_wkup__gpio1,
662 &omap2420_l4_wkup__gpio2, 423 &omap2420_l4_wkup__gpio2,
663 &omap2420_l4_wkup__gpio3, 424 &omap2420_l4_wkup__gpio3,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 8b04938d3edb..23ca551b70bb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -524,32 +524,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
524 */ 524 */
525 525
526/* L3 -> L4_CORE interface */ 526/* L3 -> L4_CORE interface */
527static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
528 .master = &omap2xxx_l3_main_hwmod,
529 .slave = &omap2xxx_l4_core_hwmod,
530 .user = OCP_USER_MPU | OCP_USER_SDMA,
531};
532
533/* MPU -> L3 interface */
534static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
535 .master = &omap2xxx_mpu_hwmod,
536 .slave = &omap2xxx_l3_main_hwmod,
537 .user = OCP_USER_MPU,
538};
539
540/* DSS -> l3 */
541static struct omap_hwmod_ocp_if omap2430_dss__l3 = {
542 .master = &omap2xxx_dss_core_hwmod,
543 .slave = &omap2xxx_l3_main_hwmod,
544 .fw = {
545 .omap2 = {
546 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
547 .flags = OMAP_FIREWALL_L3,
548 }
549 },
550 .user = OCP_USER_MPU | OCP_USER_SDMA,
551};
552
553/* l3_core -> usbhsotg interface */ 527/* l3_core -> usbhsotg interface */
554static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { 528static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
555 .master = &omap2430_usbhsotg_hwmod, 529 .master = &omap2430_usbhsotg_hwmod,
@@ -576,40 +550,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = {
576 .user = OCP_USER_MPU | OCP_USER_SDMA, 550 .user = OCP_USER_MPU | OCP_USER_SDMA,
577}; 551};
578 552
579/* L4_CORE -> L4_WKUP interface */
580static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
581 .master = &omap2xxx_l4_core_hwmod,
582 .slave = &omap2xxx_l4_wkup_hwmod,
583 .user = OCP_USER_MPU | OCP_USER_SDMA,
584};
585
586/* L4 CORE -> UART1 interface */
587static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
588 .master = &omap2xxx_l4_core_hwmod,
589 .slave = &omap2xxx_uart1_hwmod,
590 .clk = "uart1_ick",
591 .addr = omap2xxx_uart1_addr_space,
592 .user = OCP_USER_MPU | OCP_USER_SDMA,
593};
594
595/* L4 CORE -> UART2 interface */
596static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
597 .master = &omap2xxx_l4_core_hwmod,
598 .slave = &omap2xxx_uart2_hwmod,
599 .clk = "uart2_ick",
600 .addr = omap2xxx_uart2_addr_space,
601 .user = OCP_USER_MPU | OCP_USER_SDMA,
602};
603
604/* L4 PER -> UART3 interface */
605static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
606 .master = &omap2xxx_l4_core_hwmod,
607 .slave = &omap2xxx_uart3_hwmod,
608 .clk = "uart3_ick",
609 .addr = omap2xxx_uart3_addr_space,
610 .user = OCP_USER_MPU | OCP_USER_SDMA,
611};
612
613static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = { 553static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {
614 { 554 {
615 .pa_start = OMAP243X_HS_BASE, 555 .pa_start = OMAP243X_HS_BASE,
@@ -646,24 +586,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = {
646 .user = OCP_USER_MPU | OCP_USER_SDMA, 586 .user = OCP_USER_MPU | OCP_USER_SDMA,
647}; 587};
648 588
649/* l4 core -> mcspi1 interface */
650static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = {
651 .master = &omap2xxx_l4_core_hwmod,
652 .slave = &omap2xxx_mcspi1_hwmod,
653 .clk = "mcspi1_ick",
654 .addr = omap2_mcspi1_addr_space,
655 .user = OCP_USER_MPU | OCP_USER_SDMA,
656};
657
658/* l4 core -> mcspi2 interface */
659static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = {
660 .master = &omap2xxx_l4_core_hwmod,
661 .slave = &omap2xxx_mcspi2_hwmod,
662 .clk = "mcspi2_ick",
663 .addr = omap2_mcspi2_addr_space,
664 .user = OCP_USER_MPU | OCP_USER_SDMA,
665};
666
667/* l4 core -> mcspi3 interface */ 589/* l4 core -> mcspi3 interface */
668static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 590static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = {
669 .master = &omap2xxx_l4_core_hwmod, 591 .master = &omap2xxx_l4_core_hwmod,
@@ -699,105 +621,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
699 .user = OCP_USER_MPU | OCP_USER_SDMA, 621 .user = OCP_USER_MPU | OCP_USER_SDMA,
700}; 622};
701 623
702/* l4_core -> timer2 */
703static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = {
704 .master = &omap2xxx_l4_core_hwmod,
705 .slave = &omap2xxx_timer2_hwmod,
706 .clk = "gpt2_ick",
707 .addr = omap2xxx_timer2_addrs,
708 .user = OCP_USER_MPU | OCP_USER_SDMA,
709};
710
711/* l4_core -> timer3 */
712static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = {
713 .master = &omap2xxx_l4_core_hwmod,
714 .slave = &omap2xxx_timer3_hwmod,
715 .clk = "gpt3_ick",
716 .addr = omap2xxx_timer3_addrs,
717 .user = OCP_USER_MPU | OCP_USER_SDMA,
718};
719
720/* l4_core -> timer4 */
721static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = {
722 .master = &omap2xxx_l4_core_hwmod,
723 .slave = &omap2xxx_timer4_hwmod,
724 .clk = "gpt4_ick",
725 .addr = omap2xxx_timer4_addrs,
726 .user = OCP_USER_MPU | OCP_USER_SDMA,
727};
728
729/* l4_core -> timer5 */
730static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = {
731 .master = &omap2xxx_l4_core_hwmod,
732 .slave = &omap2xxx_timer5_hwmod,
733 .clk = "gpt5_ick",
734 .addr = omap2xxx_timer5_addrs,
735 .user = OCP_USER_MPU | OCP_USER_SDMA,
736};
737
738/* l4_core -> timer6 */
739static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = {
740 .master = &omap2xxx_l4_core_hwmod,
741 .slave = &omap2xxx_timer6_hwmod,
742 .clk = "gpt6_ick",
743 .addr = omap2xxx_timer6_addrs,
744 .user = OCP_USER_MPU | OCP_USER_SDMA,
745};
746
747/* l4_core -> timer7 */
748static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = {
749 .master = &omap2xxx_l4_core_hwmod,
750 .slave = &omap2xxx_timer7_hwmod,
751 .clk = "gpt7_ick",
752 .addr = omap2xxx_timer7_addrs,
753 .user = OCP_USER_MPU | OCP_USER_SDMA,
754};
755
756/* l4_core -> timer8 */
757static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = {
758 .master = &omap2xxx_l4_core_hwmod,
759 .slave = &omap2xxx_timer8_hwmod,
760 .clk = "gpt8_ick",
761 .addr = omap2xxx_timer8_addrs,
762 .user = OCP_USER_MPU | OCP_USER_SDMA,
763};
764
765/* l4_core -> timer9 */
766static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = {
767 .master = &omap2xxx_l4_core_hwmod,
768 .slave = &omap2xxx_timer9_hwmod,
769 .clk = "gpt9_ick",
770 .addr = omap2xxx_timer9_addrs,
771 .user = OCP_USER_MPU | OCP_USER_SDMA,
772};
773
774/* l4_core -> timer10 */
775static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = {
776 .master = &omap2xxx_l4_core_hwmod,
777 .slave = &omap2xxx_timer10_hwmod,
778 .clk = "gpt10_ick",
779 .addr = omap2_timer10_addrs,
780 .user = OCP_USER_MPU | OCP_USER_SDMA,
781};
782
783/* l4_core -> timer11 */
784static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = {
785 .master = &omap2xxx_l4_core_hwmod,
786 .slave = &omap2xxx_timer11_hwmod,
787 .clk = "gpt11_ick",
788 .addr = omap2_timer11_addrs,
789 .user = OCP_USER_MPU | OCP_USER_SDMA,
790};
791
792/* l4_core -> timer12 */
793static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = {
794 .master = &omap2xxx_l4_core_hwmod,
795 .slave = &omap2xxx_timer12_hwmod,
796 .clk = "gpt12_ick",
797 .addr = omap2xxx_timer12_addrs,
798 .user = OCP_USER_MPU | OCP_USER_SDMA,
799};
800
801/* l4_wkup -> wd_timer2 */ 624/* l4_wkup -> wd_timer2 */
802static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { 625static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = {
803 { 626 {
@@ -816,43 +639,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
816 .user = OCP_USER_MPU | OCP_USER_SDMA, 639 .user = OCP_USER_MPU | OCP_USER_SDMA,
817}; 640};
818 641
819/* l4_core -> dss */
820static struct omap_hwmod_ocp_if omap2430_l4_core__dss = {
821 .master = &omap2xxx_l4_core_hwmod,
822 .slave = &omap2xxx_dss_core_hwmod,
823 .clk = "dss_ick",
824 .addr = omap2_dss_addrs,
825 .user = OCP_USER_MPU | OCP_USER_SDMA,
826};
827
828/* l4_core -> dss_dispc */
829static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
830 .master = &omap2xxx_l4_core_hwmod,
831 .slave = &omap2xxx_dss_dispc_hwmod,
832 .clk = "dss_ick",
833 .addr = omap2_dss_dispc_addrs,
834 .user = OCP_USER_MPU | OCP_USER_SDMA,
835};
836
837/* l4_core -> dss_rfbi */
838static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
839 .master = &omap2xxx_l4_core_hwmod,
840 .slave = &omap2xxx_dss_rfbi_hwmod,
841 .clk = "dss_ick",
842 .addr = omap2_dss_rfbi_addrs,
843 .user = OCP_USER_MPU | OCP_USER_SDMA,
844};
845
846/* l4_core -> dss_venc */
847static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
848 .master = &omap2xxx_l4_core_hwmod,
849 .slave = &omap2xxx_dss_venc_hwmod,
850 .clk = "dss_ick",
851 .addr = omap2_dss_venc_addrs,
852 .flags = OCPIF_SWSUP_IDLE,
853 .user = OCP_USER_MPU | OCP_USER_SDMA,
854};
855
856/* l4_wkup -> gpio1 */ 642/* l4_wkup -> gpio1 */
857static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { 643static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = {
858 { 644 {
@@ -1044,40 +830,40 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
1044}; 830};
1045 831
1046static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { 832static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
1047 &omap2430_l3_main__l4_core, 833 &omap2xxx_l3_main__l4_core,
1048 &omap2430_mpu__l3_main, 834 &omap2xxx_mpu__l3_main,
1049 &omap2430_dss__l3, 835 &omap2xxx_dss__l3,
1050 &omap2430_usbhsotg__l3, 836 &omap2430_usbhsotg__l3,
1051 &omap2430_l4_core__i2c1, 837 &omap2430_l4_core__i2c1,
1052 &omap2430_l4_core__i2c2, 838 &omap2430_l4_core__i2c2,
1053 &omap2430_l4_core__l4_wkup, 839 &omap2xxx_l4_core__l4_wkup,
1054 &omap2_l4_core__uart1, 840 &omap2_l4_core__uart1,
1055 &omap2_l4_core__uart2, 841 &omap2_l4_core__uart2,
1056 &omap2_l4_core__uart3, 842 &omap2_l4_core__uart3,
1057 &omap2430_l4_core__usbhsotg, 843 &omap2430_l4_core__usbhsotg,
1058 &omap2430_l4_core__mmc1, 844 &omap2430_l4_core__mmc1,
1059 &omap2430_l4_core__mmc2, 845 &omap2430_l4_core__mmc2,
1060 &omap2430_l4_core__mcspi1, 846 &omap2xxx_l4_core__mcspi1,
1061 &omap2430_l4_core__mcspi2, 847 &omap2xxx_l4_core__mcspi2,
1062 &omap2430_l4_core__mcspi3, 848 &omap2430_l4_core__mcspi3,
1063 &omap2430_l3__iva, 849 &omap2430_l3__iva,
1064 &omap2430_l4_wkup__timer1, 850 &omap2430_l4_wkup__timer1,
1065 &omap2430_l4_core__timer2, 851 &omap2xxx_l4_core__timer2,
1066 &omap2430_l4_core__timer3, 852 &omap2xxx_l4_core__timer3,
1067 &omap2430_l4_core__timer4, 853 &omap2xxx_l4_core__timer4,
1068 &omap2430_l4_core__timer5, 854 &omap2xxx_l4_core__timer5,
1069 &omap2430_l4_core__timer6, 855 &omap2xxx_l4_core__timer6,
1070 &omap2430_l4_core__timer7, 856 &omap2xxx_l4_core__timer7,
1071 &omap2430_l4_core__timer8, 857 &omap2xxx_l4_core__timer8,
1072 &omap2430_l4_core__timer9, 858 &omap2xxx_l4_core__timer9,
1073 &omap2430_l4_core__timer10, 859 &omap2xxx_l4_core__timer10,
1074 &omap2430_l4_core__timer11, 860 &omap2xxx_l4_core__timer11,
1075 &omap2430_l4_core__timer12, 861 &omap2xxx_l4_core__timer12,
1076 &omap2430_l4_wkup__wd_timer2, 862 &omap2430_l4_wkup__wd_timer2,
1077 &omap2430_l4_core__dss, 863 &omap2xxx_l4_core__dss,
1078 &omap2430_l4_core__dss_dispc, 864 &omap2xxx_l4_core__dss_dispc,
1079 &omap2430_l4_core__dss_rfbi, 865 &omap2xxx_l4_core__dss_rfbi,
1080 &omap2430_l4_core__dss_venc, 866 &omap2xxx_l4_core__dss_venc,
1081 &omap2430_l4_wkup__gpio1, 867 &omap2430_l4_wkup__gpio1,
1082 &omap2430_l4_wkup__gpio2, 868 &omap2430_l4_wkup__gpio2,
1083 &omap2430_l4_wkup__gpio3, 869 &omap2430_l4_wkup__gpio3,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
index 4f3547c2a49e..5178e40e84f9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -15,10 +15,12 @@
15 15
16#include <plat/omap_hwmod.h> 16#include <plat/omap_hwmod.h>
17#include <plat/serial.h> 17#include <plat/serial.h>
18#include <plat/l3_2xxx.h>
19#include <plat/l4_2xxx.h>
18 20
19#include "omap_hwmod_common_data.h" 21#include "omap_hwmod_common_data.h"
20 22
21struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = { 23static struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
22 { 24 {
23 .pa_start = OMAP2_UART1_BASE, 25 .pa_start = OMAP2_UART1_BASE,
24 .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, 26 .pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
@@ -27,7 +29,7 @@ struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = {
27 { } 29 { }
28}; 30};
29 31
30struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = { 32static struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
31 { 33 {
32 .pa_start = OMAP2_UART2_BASE, 34 .pa_start = OMAP2_UART2_BASE,
33 .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, 35 .pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
@@ -36,7 +38,7 @@ struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = {
36 { } 38 { }
37}; 39};
38 40
39struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = { 41static struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
40 { 42 {
41 .pa_start = OMAP2_UART3_BASE, 43 .pa_start = OMAP2_UART3_BASE,
42 .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, 44 .pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
@@ -45,7 +47,7 @@ struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = {
45 { } 47 { }
46}; 48};
47 49
48struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = { 50static struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
49 { 51 {
50 .pa_start = 0x4802a000, 52 .pa_start = 0x4802a000,
51 .pa_end = 0x4802a000 + SZ_1K - 1, 53 .pa_end = 0x4802a000 + SZ_1K - 1,
@@ -54,7 +56,7 @@ struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = {
54 { } 56 { }
55}; 57};
56 58
57struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = { 59static struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
58 { 60 {
59 .pa_start = 0x48078000, 61 .pa_start = 0x48078000,
60 .pa_end = 0x48078000 + SZ_1K - 1, 62 .pa_end = 0x48078000 + SZ_1K - 1,
@@ -63,7 +65,7 @@ struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = {
63 { } 65 { }
64}; 66};
65 67
66struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = { 68static struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
67 { 69 {
68 .pa_start = 0x4807a000, 70 .pa_start = 0x4807a000,
69 .pa_end = 0x4807a000 + SZ_1K - 1, 71 .pa_end = 0x4807a000 + SZ_1K - 1,
@@ -72,7 +74,7 @@ struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = {
72 { } 74 { }
73}; 75};
74 76
75struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = { 77static struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
76 { 78 {
77 .pa_start = 0x4807c000, 79 .pa_start = 0x4807c000,
78 .pa_end = 0x4807c000 + SZ_1K - 1, 80 .pa_end = 0x4807c000 + SZ_1K - 1,
@@ -81,7 +83,7 @@ struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = {
81 { } 83 { }
82}; 84};
83 85
84struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = { 86static struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
85 { 87 {
86 .pa_start = 0x4807e000, 88 .pa_start = 0x4807e000,
87 .pa_end = 0x4807e000 + SZ_1K - 1, 89 .pa_end = 0x4807e000 + SZ_1K - 1,
@@ -90,7 +92,7 @@ struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = {
90 { } 92 { }
91}; 93};
92 94
93struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = { 95static struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
94 { 96 {
95 .pa_start = 0x48080000, 97 .pa_start = 0x48080000,
96 .pa_end = 0x48080000 + SZ_1K - 1, 98 .pa_end = 0x48080000 + SZ_1K - 1,
@@ -99,7 +101,7 @@ struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = {
99 { } 101 { }
100}; 102};
101 103
102struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = { 104static struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
103 { 105 {
104 .pa_start = 0x48082000, 106 .pa_start = 0x48082000,
105 .pa_end = 0x48082000 + SZ_1K - 1, 107 .pa_end = 0x48082000 + SZ_1K - 1,
@@ -108,7 +110,7 @@ struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = {
108 { } 110 { }
109}; 111};
110 112
111struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = { 113static struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = {
112 { 114 {
113 .pa_start = 0x48084000, 115 .pa_start = 0x48084000,
114 .pa_end = 0x48084000 + SZ_1K - 1, 116 .pa_end = 0x48084000 + SZ_1K - 1,
@@ -127,4 +129,246 @@ struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = {
127 { } 129 { }
128}; 130};
129 131
132/*
133 * Common interconnect data
134 */
135
136/* L3 -> L4_CORE interface */
137struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
138 .master = &omap2xxx_l3_main_hwmod,
139 .slave = &omap2xxx_l4_core_hwmod,
140 .user = OCP_USER_MPU | OCP_USER_SDMA,
141};
142
143/* MPU -> L3 interface */
144struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
145 .master = &omap2xxx_mpu_hwmod,
146 .slave = &omap2xxx_l3_main_hwmod,
147 .user = OCP_USER_MPU,
148};
149
150/* DSS -> l3 */
151struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
152 .master = &omap2xxx_dss_core_hwmod,
153 .slave = &omap2xxx_l3_main_hwmod,
154 .fw = {
155 .omap2 = {
156 .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
157 .flags = OMAP_FIREWALL_L3,
158 }
159 },
160 .user = OCP_USER_MPU | OCP_USER_SDMA,
161};
162
163/* L4_CORE -> L4_WKUP interface */
164struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
165 .master = &omap2xxx_l4_core_hwmod,
166 .slave = &omap2xxx_l4_wkup_hwmod,
167 .user = OCP_USER_MPU | OCP_USER_SDMA,
168};
169
170/* L4 CORE -> UART1 interface */
171struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
172 .master = &omap2xxx_l4_core_hwmod,
173 .slave = &omap2xxx_uart1_hwmod,
174 .clk = "uart1_ick",
175 .addr = omap2xxx_uart1_addr_space,
176 .user = OCP_USER_MPU | OCP_USER_SDMA,
177};
178
179/* L4 CORE -> UART2 interface */
180struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
181 .master = &omap2xxx_l4_core_hwmod,
182 .slave = &omap2xxx_uart2_hwmod,
183 .clk = "uart2_ick",
184 .addr = omap2xxx_uart2_addr_space,
185 .user = OCP_USER_MPU | OCP_USER_SDMA,
186};
187
188/* L4 PER -> UART3 interface */
189struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
190 .master = &omap2xxx_l4_core_hwmod,
191 .slave = &omap2xxx_uart3_hwmod,
192 .clk = "uart3_ick",
193 .addr = omap2xxx_uart3_addr_space,
194 .user = OCP_USER_MPU | OCP_USER_SDMA,
195};
196
197/* l4 core -> mcspi1 interface */
198struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
199 .master = &omap2xxx_l4_core_hwmod,
200 .slave = &omap2xxx_mcspi1_hwmod,
201 .clk = "mcspi1_ick",
202 .addr = omap2_mcspi1_addr_space,
203 .user = OCP_USER_MPU | OCP_USER_SDMA,
204};
205
206/* l4 core -> mcspi2 interface */
207struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
208 .master = &omap2xxx_l4_core_hwmod,
209 .slave = &omap2xxx_mcspi2_hwmod,
210 .clk = "mcspi2_ick",
211 .addr = omap2_mcspi2_addr_space,
212 .user = OCP_USER_MPU | OCP_USER_SDMA,
213};
214
215/* l4_core -> timer2 */
216struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {
217 .master = &omap2xxx_l4_core_hwmod,
218 .slave = &omap2xxx_timer2_hwmod,
219 .clk = "gpt2_ick",
220 .addr = omap2xxx_timer2_addrs,
221 .user = OCP_USER_MPU | OCP_USER_SDMA,
222};
223
224/* l4_core -> timer3 */
225struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
226 .master = &omap2xxx_l4_core_hwmod,
227 .slave = &omap2xxx_timer3_hwmod,
228 .clk = "gpt3_ick",
229 .addr = omap2xxx_timer3_addrs,
230 .user = OCP_USER_MPU | OCP_USER_SDMA,
231};
232
233/* l4_core -> timer4 */
234struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {
235 .master = &omap2xxx_l4_core_hwmod,
236 .slave = &omap2xxx_timer4_hwmod,
237 .clk = "gpt4_ick",
238 .addr = omap2xxx_timer4_addrs,
239 .user = OCP_USER_MPU | OCP_USER_SDMA,
240};
241
242/* l4_core -> timer5 */
243struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {
244 .master = &omap2xxx_l4_core_hwmod,
245 .slave = &omap2xxx_timer5_hwmod,
246 .clk = "gpt5_ick",
247 .addr = omap2xxx_timer5_addrs,
248 .user = OCP_USER_MPU | OCP_USER_SDMA,
249};
250
251/* l4_core -> timer6 */
252struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {
253 .master = &omap2xxx_l4_core_hwmod,
254 .slave = &omap2xxx_timer6_hwmod,
255 .clk = "gpt6_ick",
256 .addr = omap2xxx_timer6_addrs,
257 .user = OCP_USER_MPU | OCP_USER_SDMA,
258};
259
260/* l4_core -> timer7 */
261struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {
262 .master = &omap2xxx_l4_core_hwmod,
263 .slave = &omap2xxx_timer7_hwmod,
264 .clk = "gpt7_ick",
265 .addr = omap2xxx_timer7_addrs,
266 .user = OCP_USER_MPU | OCP_USER_SDMA,
267};
268
269/* l4_core -> timer8 */
270struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {
271 .master = &omap2xxx_l4_core_hwmod,
272 .slave = &omap2xxx_timer8_hwmod,
273 .clk = "gpt8_ick",
274 .addr = omap2xxx_timer8_addrs,
275 .user = OCP_USER_MPU | OCP_USER_SDMA,
276};
277
278/* l4_core -> timer9 */
279struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {
280 .master = &omap2xxx_l4_core_hwmod,
281 .slave = &omap2xxx_timer9_hwmod,
282 .clk = "gpt9_ick",
283 .addr = omap2xxx_timer9_addrs,
284 .user = OCP_USER_MPU | OCP_USER_SDMA,
285};
286
287/* l4_core -> timer10 */
288struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {
289 .master = &omap2xxx_l4_core_hwmod,
290 .slave = &omap2xxx_timer10_hwmod,
291 .clk = "gpt10_ick",
292 .addr = omap2_timer10_addrs,
293 .user = OCP_USER_MPU | OCP_USER_SDMA,
294};
295
296/* l4_core -> timer11 */
297struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {
298 .master = &omap2xxx_l4_core_hwmod,
299 .slave = &omap2xxx_timer11_hwmod,
300 .clk = "gpt11_ick",
301 .addr = omap2_timer11_addrs,
302 .user = OCP_USER_MPU | OCP_USER_SDMA,
303};
304
305/* l4_core -> timer12 */
306struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {
307 .master = &omap2xxx_l4_core_hwmod,
308 .slave = &omap2xxx_timer12_hwmod,
309 .clk = "gpt12_ick",
310 .addr = omap2xxx_timer12_addrs,
311 .user = OCP_USER_MPU | OCP_USER_SDMA,
312};
313
314/* l4_core -> dss */
315struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {
316 .master = &omap2xxx_l4_core_hwmod,
317 .slave = &omap2xxx_dss_core_hwmod,
318 .clk = "dss_ick",
319 .addr = omap2_dss_addrs,
320 .fw = {
321 .omap2 = {
322 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
323 .flags = OMAP_FIREWALL_L4,
324 }
325 },
326 .user = OCP_USER_MPU | OCP_USER_SDMA,
327};
328
329/* l4_core -> dss_dispc */
330struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {
331 .master = &omap2xxx_l4_core_hwmod,
332 .slave = &omap2xxx_dss_dispc_hwmod,
333 .clk = "dss_ick",
334 .addr = omap2_dss_dispc_addrs,
335 .fw = {
336 .omap2 = {
337 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
338 .flags = OMAP_FIREWALL_L4,
339 }
340 },
341 .user = OCP_USER_MPU | OCP_USER_SDMA,
342};
343
344/* l4_core -> dss_rfbi */
345struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {
346 .master = &omap2xxx_l4_core_hwmod,
347 .slave = &omap2xxx_dss_rfbi_hwmod,
348 .clk = "dss_ick",
349 .addr = omap2_dss_rfbi_addrs,
350 .fw = {
351 .omap2 = {
352 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
353 .flags = OMAP_FIREWALL_L4,
354 }
355 },
356 .user = OCP_USER_MPU | OCP_USER_SDMA,
357};
358
359/* l4_core -> dss_venc */
360struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
361 .master = &omap2xxx_l4_core_hwmod,
362 .slave = &omap2xxx_dss_venc_hwmod,
363 .clk = "dss_ick",
364 .addr = omap2_dss_venc_addrs,
365 .fw = {
366 .omap2 = {
367 .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
368 .flags = OMAP_FIREWALL_L4,
369 }
370 },
371 .flags = OCPIF_SWSUP_IDLE,
372 .user = OCP_USER_MPU | OCP_USER_SDMA,
373};
130 374
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 65757f3a7f0c..7aa9156d50ab 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -19,18 +19,6 @@
19#include "display.h" 19#include "display.h"
20 20
21/* Common address space across OMAP2xxx */ 21/* Common address space across OMAP2xxx */
22extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
23extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
24extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[];
25extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[];
26extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[];
27extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[];
28extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[];
29extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[];
30extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[];
31extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[];
32extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[];
33extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
34extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[]; 22extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[];
35 23
36/* Common address space across OMAP2xxx/3xxx */ 24/* Common address space across OMAP2xxx/3xxx */
@@ -87,6 +75,32 @@ extern struct omap_hwmod omap2xxx_gpio4_hwmod;
87extern struct omap_hwmod omap2xxx_mcspi1_hwmod; 75extern struct omap_hwmod omap2xxx_mcspi1_hwmod;
88extern struct omap_hwmod omap2xxx_mcspi2_hwmod; 76extern struct omap_hwmod omap2xxx_mcspi2_hwmod;
89 77
78/* Common interface data across OMAP2xxx */
79extern struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core;
80extern struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main;
81extern struct omap_hwmod_ocp_if omap2xxx_dss__l3;
82extern struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup;
83extern struct omap_hwmod_ocp_if omap2_l4_core__uart1;
84extern struct omap_hwmod_ocp_if omap2_l4_core__uart2;
85extern struct omap_hwmod_ocp_if omap2_l4_core__uart3;
86extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1;
87extern struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2;
88extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2;
89extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3;
90extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4;
91extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5;
92extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6;
93extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7;
94extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8;
95extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9;
96extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10;
97extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11;
98extern struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12;
99extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss;
100extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc;
101extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi;
102extern struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc;
103
90/* Common IP block data */ 104/* Common IP block data */
91extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[]; 105extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[];
92extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[]; 106extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[];
@@ -126,6 +140,7 @@ extern struct omap_hwmod_irq_info omap2_gpio4_irqs[];
126extern struct omap_hwmod_irq_info omap2_dma_system_irqs[]; 140extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];
127extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[]; 141extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];
128extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[]; 142extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];
143extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[];
129 144
130/* OMAP hwmod classes - forward declarations */ 145/* OMAP hwmod classes - forward declarations */
131extern struct omap_hwmod_class l3_hwmod_class; 146extern struct omap_hwmod_class l3_hwmod_class;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 01:28:30 -0400