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authorCaesar Wang <caesar.wang@rock-chips.com>2014-11-23 23:58:58 -0500
committerEduardo Valentin <edubezval@gmail.com>2014-11-24 13:25:18 -0500
commit6962ad52a5971dc2c91b3afe7b8124c4a197bef0 (patch)
tree349c15aab8bd8b5263ce0230cbf9231da3624d27
parent2845f6ec81d74344a93693d9b7807ae9c3dae9ed (diff)
dt-bindings: document Rockchip thermal
This add the necessary binding documentation for the thermal found on Rockchip SoCs Signed-off-by: zhaoyifeng <zyf@rock-chips.com> Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
-rw-r--r--Documentation/devicetree/bindings/thermal/rockchip-thermal.txt68
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1* Temperature Sensor ADC (TSADC) on rockchip SoCs
2
3Required properties:
4- compatible : "rockchip,rk3288-tsadc"
5- reg : physical base address of the controller and length of memory mapped
6 region.
7- interrupts : The interrupt number to the cpu. The interrupt specifier format
8 depends on the interrupt controller.
9- clocks : Must contain an entry for each entry in clock-names.
10- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
11 the peripheral clock.
12- resets : Must contain an entry for each entry in reset-names.
13 See ../reset/reset.txt for details.
14- reset-names : Must include the name "tsadc-apb".
15- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
16- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
17- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
18- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
19 1:HIGH.
20
21Exiample:
22tsadc: tsadc@ff280000 {
23 compatible = "rockchip,rk3288-tsadc";
24 reg = <0xff280000 0x100>;
25 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
26 clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
27 clock-names = "tsadc", "apb_pclk";
28 resets = <&cru SRST_TSADC>;
29 reset-names = "tsadc-apb";
30 pinctrl-names = "default";
31 pinctrl-0 = <&otp_out>;
32 #thermal-sensor-cells = <1>;
33 rockchip,hw-tshut-temp = <95000>;
34 rockchip,hw-tshut-mode = <0>;
35 rockchip,hw-tshut-polarity = <0>;
36};
37
38Example: referring to thermal sensors:
39thermal-zones {
40 cpu_thermal: cpu_thermal {
41 polling-delay-passive = <1000>; /* milliseconds */
42 polling-delay = <5000>; /* milliseconds */
43
44 /* sensor ID */
45 thermal-sensors = <&tsadc 1>;
46
47 trips {
48 cpu_alert0: cpu_alert {
49 temperature = <70000>; /* millicelsius */
50 hysteresis = <2000>; /* millicelsius */
51 type = "passive";
52 };
53 cpu_crit: cpu_crit {
54 temperature = <90000>; /* millicelsius */
55 hysteresis = <2000>; /* millicelsius */
56 type = "critical";
57 };
58 };
59
60 cooling-maps {
61 map0 {
62 trip = <&cpu_alert0>;
63 cooling-device =
64 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
65 };
66 };
67 };
68};