powerpc: Remove CONFIG_POWER4_ONLY

Remove CONFIG_POWER4_ONLY, the option is badly named and only does two
things:

- It wraps the MMU segment table code. With feature fixups there is
  little downside to compiling this in.

- It uses the newer mtocrf instruction in various assembly functions.
  Instead of making this a compile option just do it at runtime via
  a feature fixup.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

10 files changed, 19 insertions, 36 deletions

diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig
index 1196c34163b7..07b7f2af2dca 100644
--- a/arch/powerpc/configs/g5_defconfig
+++ b/arch/powerpc/configs/g5_defconfig
@@ -1,5 +1,4 @@
 CONFIG_PPC64=y
-CONFIG_POWER4_ONLY=y
 CONFIG_ALTIVEC=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=4
diff --git a/arch/powerpc/configs/maple_defconfig b/arch/powerpc/configs/maple_defconfig
index 2244d370f24d..02ac96b679b8 100644
--- a/arch/powerpc/configs/maple_defconfig
+++ b/arch/powerpc/configs/maple_defconfig
@@ -1,5 +1,4 @@
 CONFIG_PPC64=y
-CONFIG_POWER4_ONLY=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=4
 CONFIG_EXPERIMENTAL=y
diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig
index f4deb0b78cf0..840a2c2d0430 100644
--- a/arch/powerpc/configs/pasemi_defconfig
+++ b/arch/powerpc/configs/pasemi_defconfig
@@ -1,5 +1,4 @@
 CONFIG_PPC64=y
-CONFIG_POWER4_ONLY=y
 CONFIG_ALTIVEC=y
 # CONFIG_VIRT_CPU_ACCOUNTING is not set
 CONFIG_SMP=y
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h
index decad950f11a..5d7fbe1950f9 100644
--- a/arch/powerpc/include/asm/asm-compat.h
+++ b/arch/powerpc/include/asm/asm-compat.h
@@ -29,18 +29,9 @@
 #define PPC_LLARX(t, a, b, eh)  PPC_LDARX(t, a, b, eh)
 #define PPC_STLCX       stringify_in_c(stdcx.)
 #define PPC_CNTLZL      stringify_in_c(cntlzd)
+#define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), (RS))
 #define PPC_LR_STKOFF   16
 #define PPC_MIN_STKFRM  112
-
-/* Move to CR, single-entry optimized version. Only available
- * on POWER4 and later.
- */
-#ifdef CONFIG_POWER4_ONLY
-#define PPC_MTOCRF      stringify_in_c(mtocrf)
-#else
-#define PPC_MTOCRF      stringify_in_c(mtcrf)
-#endif
-
 #else /* 32-bit */
 
 /* operations for longs and pointers */
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 50f73aa2ba21..15444204a3a1 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -369,7 +369,15 @@ BEGIN_FTR_SECTION			\
 END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #endif
 
-        
+#ifdef CONFIG_PPC64
+#define MTOCRF(FXM, RS)                 \
+        BEGIN_FTR_SECTION_NESTED(848);  \
+        mtcrf   (FXM), (RS);            \
+        FTR_SECTION_ELSE_NESTED(848);   \
+        mtocrf (FXM), (RS);             \
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848)
+#endif
+
 /*
  * This instruction is not implemented on the PPC 603 or 601; however, on
  * the 403GCX and 405GP tlbia IS defined and tlbie is not.
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index cb705fdbb458..e0537693d660 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -94,12 +94,10 @@ machine_check_pSeries_1:
 data_access_pSeries:
         HMT_MEDIUM
         SET_SCRATCH0(r13)
-#ifndef CONFIG_POWER4_ONLY
 BEGIN_FTR_SECTION
         b       data_access_check_stab
 data_access_not_stab:
 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
-#endif
         EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
                                  KVMTEST, 0x300)
 
@@ -301,7 +299,6 @@ machine_check_fwnmi:
                                  EXC_STD, KVMTEST, 0x200)
         KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
 
-#ifndef CONFIG_POWER4_ONLY
         /* moved from 0x300 */
 data_access_check_stab:
         GET_PACA(r13)
@@ -328,7 +325,6 @@ do_stab_bolted_pSeries:
         GET_SCRATCH0(r10)
         std     r10,PACA_EXSLB+EX_R13(r13)
         EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
-#endif /* CONFIG_POWER4_ONLY */
 
         KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
         KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 773d38f90aaa..d73a59014900 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -30,7 +30,7 @@ _GLOBAL(__copy_tofrom_user_base)
         dcbt    0,r4
         beq     .Lcopy_page_4K
         andi.   r6,r6,7
-        PPC_MTOCRF      0x01,r5
+        PPC_MTOCRF(0x01,r5)
         blt     cr1,.Lshort_copy
 /* Below we want to nop out the bne if we're on a CPU that has the
  * CPU_FTR_UNALIGNED_LD_STD bit set and the CPU_FTR_CP_USE_DCBTZ bit
@@ -186,7 +186,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         blr
 
 .Ldst_unaligned:
-        PPC_MTOCRF      0x01,r6         /* put #bytes to 8B bdry into cr7 */
+        PPC_MTOCRF(0x01,r6)             /* put #bytes to 8B bdry into cr7 */
         subf    r5,r6,r5
         li      r7,0
         cmpldi  cr1,r5,16
@@ -201,7 +201,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
 2:      bf      cr7*4+1,3f
 37:     lwzx    r0,r7,r4
 83:     stwx    r0,r7,r3
-3:      PPC_MTOCRF      0x01,r5
+3:      PPC_MTOCRF(0x01,r5)
         add     r4,r6,r4
         add     r3,r6,r3
         b       .Ldst_aligned
diff --git a/arch/powerpc/lib/mem_64.S b/arch/powerpc/lib/mem_64.S
index 11ce045e21fd..f4fcb0bc6563 100644
--- a/arch/powerpc/lib/mem_64.S
+++ b/arch/powerpc/lib/mem_64.S
@@ -19,7 +19,7 @@ _GLOBAL(memset)
         rlwimi  r4,r4,16,0,15
         cmplw   cr1,r5,r0               /* do we get that far? */
         rldimi  r4,r4,32,0
-        PPC_MTOCRF      1,r0
+        PPC_MTOCRF(1,r0)
         mr      r6,r3
         blt     cr1,8f
         beq+    3f                      /* if already 8-byte aligned */
@@ -49,7 +49,7 @@ _GLOBAL(memset)
         bdnz    4b
 5:      srwi.   r0,r5,3
         clrlwi  r5,r5,29
-        PPC_MTOCRF      1,r0
+        PPC_MTOCRF(1,r0)
         beq     8f
         bf      29,6f
         std     r4,0(r6)
@@ -65,7 +65,7 @@ _GLOBAL(memset)
         std     r4,0(r6)
         addi    r6,r6,8
 8:      cmpwi   r5,0
-        PPC_MTOCRF      1,r5
+        PPC_MTOCRF(1,r5)
         beqlr+
         bf      29,9f
         stw     r4,0(r6)
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S
index e178922b2c21..82fea3963e15 100644
--- a/arch/powerpc/lib/memcpy_64.S
+++ b/arch/powerpc/lib/memcpy_64.S
@@ -12,7 +12,7 @@
         .align  7
 _GLOBAL(memcpy)
         std     r3,48(r1)       /* save destination pointer for return value */
-        PPC_MTOCRF      0x01,r5
+        PPC_MTOCRF(0x01,r5)
         cmpldi  cr1,r5,16
         neg     r6,r3           # LS 3 bits = # bytes to 8-byte dest bdry
         andi.   r6,r6,7
@@ -154,7 +154,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
         blr
 
 .Ldst_unaligned:
-        PPC_MTOCRF      0x01,r6         # put #bytes to 8B bdry into cr7
+        PPC_MTOCRF(0x01,r6)             # put #bytes to 8B bdry into cr7
         subf    r5,r6,r5
         li      r7,0
         cmpldi  cr1,r5,16
@@ -169,7 +169,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
 2:      bf      cr7*4+1,3f
         lwzx    r0,r7,r4
         stwx    r0,r7,r3
-3:      PPC_MTOCRF      0x01,r5
+3:      PPC_MTOCRF(0x01,r5)
         add     r4,r6,r4
         add     r3,r6,r3
         b       .Ldst_aligned
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 425db18580a2..52e70f9b7a8f 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -86,15 +86,6 @@ config PPC_BOOK3E
         def_bool y
         depends on PPC_BOOK3E_64
 
-config POWER4_ONLY
-        bool "Optimize for POWER4"
-        depends on PPC64 && PPC_BOOK3S
-        default n
-        ---help---
-          Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
-          The resulting binary will not work on POWER3 or RS64 processors
-          when compiled with binutils 2.15 or later.
-
 config 6xx
         def_bool y
         depends on PPC32 && PPC_BOOK3S