Merge branch 'next/cleanup' into next/pm2

By Tony Lindgren (36) and others
via Tony Lindgren (22) and others
* next/cleanup: (303 commits)
  ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan
  ARM: OMAP3: cm-t3517: use GPTIMER for system clock
  ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
  ARM: SAMSUNG: use devm_ functions for ADC driver
  ARM: EXYNOS: no duplicate mask/unmask in eint0_15
  ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
  ARM: EXYNOS: Remove i2c0 resource information and setting of device names
  ARM: Kirkwood: checkpatch cleanups
  ARM: Kirkwood: Fix sparse warnings.
  ARM: Kirkwood: Remove unused includes
  ARM: kirkwood: cleanup lsxl board includes
  ARM: integrator: use BUG_ON where possible
  ARM: integrator: push down SC dependencies
  ARM: integrator: delete static UART1 mapping
  ARM: integrator: delete SC mapping on the CP
  ARM: integrator: remove static CP syscon mapping
  ARM: integrator: remove static AP syscon mapping
  ARM: integrator: hook the CP into the SoC bus
  ARM: integrator: hook the AP into the SoC bus
  ARM: OMAP2+: Fix compiler warning for 32k timer
  ...

764 files changed, 13552 insertions, 11515 deletions

diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards
index fc81a7d6b0f1..db5858e32d3f 100644
--- a/Documentation/devicetree/bindings/arm/arm-boards
+++ b/Documentation/devicetree/bindings/arm/arm-boards
@@ -9,6 +9,10 @@ Required properties (in root node):
 
 FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
 
+In the root node the Integrator/CP must have a /cpcon node pointing
+to the CP control registers, and the Integrator/AP must have a
+/syscon node pointing to the Integrator/AP system controller.
+
 
 ARM Versatile Application and Platform Baseboards
 -------------------------------------------------
diff --git a/Documentation/devicetree/bindings/arm/omap/counter.txt b/Documentation/devicetree/bindings/arm/omap/counter.txt
new file mode 100644
index 000000000000..5bd8aa091315
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/counter.txt
@@ -0,0 +1,15 @@
+OMAP Counter-32K bindings
+
+Required properties:
+- compatible:   Must be "ti,omap-counter32k" for OMAP controllers
+- reg:          Contains timer register address range (base address and length)
+- ti,hwmods:    Name of the hwmod associated to the counter, which is typically
+                "counter_32k"
+
+Example:
+
+counter32k: counter@4a304000 {
+        compatible = "ti,omap-counter32k";
+        reg = <0x4a304000 0x20>;
+        ti,hwmods = "counter_32k";
+};
diff --git a/Documentation/devicetree/bindings/arm/omap/timer.txt b/Documentation/devicetree/bindings/arm/omap/timer.txt
new file mode 100644
index 000000000000..8732d4d41f8b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/timer.txt
@@ -0,0 +1,31 @@
+OMAP Timer bindings
+
+Required properties:
+- compatible:           Must be "ti,omap2-timer" for OMAP2+ controllers.
+- reg:                  Contains timer register address range (base address and
+                        length).
+- interrupts:           Contains the interrupt information for the timer. The
+                        format is being dependent on which interrupt controller
+                        the OMAP device uses.
+- ti,hwmods:            Name of the hwmod associated to the timer, "timer<X>",
+                        where <X> is the instance number of the timer from the
+                        HW spec.
+
+Optional properties:
+- ti,timer-alwon:       Indicates the timer is in an alway-on power domain.
+- ti,timer-dsp:         Indicates the timer can interrupt the on-chip DSP in
+                        addition to the ARM CPU.
+- ti,timer-pwm:         Indicates the timer can generate a PWM output.
+- ti,timer-secure:      Indicates the timer is reserved on a secure OMAP device
+                        and therefore cannot be used by the kernel.
+
+Example:
+
+timer12: timer@48304000 {
+        compatible = "ti,omap2-timer";
+        reg = <0x48304000 0x400>;
+        interrupts = <95>;
+        ti,hwmods = "timer12"
+        ti,timer-alwon;
+        ti,timer-secure;
+};
diff --git a/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt b/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt
index d2fe064a828b..63dd8051521c 100644
--- a/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt
+++ b/Documentation/devicetree/bindings/bus/omap-ocp2scp.txt
@@ -2,9 +2,27 @@
 
 properties:
 - compatible : Should be "ti,omap-ocp2scp"
+- reg : Address and length of the register set for the device
 - #address-cells, #size-cells : Must be present if the device has sub-nodes
 - ranges : the child address space are mapped 1:1 onto the parent address space
 - ti,hwmods : must be "ocp2scp_usb_phy"
 
 Sub-nodes:
 All the devices connected to ocp2scp are described using sub-node to ocp2scp
+
+ocp2scp@4a0ad000 {
+        compatible = "ti,omap-ocp2scp";
+        reg = <0x4a0ad000 0x1f>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+        ti,hwmods = "ocp2scp_usb_phy";
+
+        subnode1 {
+        ...
+        };
+
+        subnode2 {
+        ...
+        };
+};
diff --git a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
index f3cf43b66f7e..3614242e7732 100644
--- a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt
@@ -12,13 +12,13 @@ Optional properties:
 Examples:
 
 i2c@83fc4000 { /* I2C2 on i.MX51 */
-        compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+        compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
         reg = <0x83fc4000 0x4000>;
         interrupts = <63>;
 };
 
 i2c@70038000 { /* HS-I2C on i.MX51 */
-        compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+        compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
         reg = <0x70038000 0x4000>;
         interrupts = <64>;
         clock-frequency = <400000>;
diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
index 2f5322b119eb..446859fcdca4 100644
--- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
+++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
@@ -55,5 +55,7 @@ st-micro,24c256		i2c serial eeprom  (24cxx)
 stm,m41t00              Serial Access TIMEKEEPER
 stm,m41t62              Serial real-time clock (RTC) with alarm
 stm,m41t80              M41T80 - SERIAL ACCESS RTC WITH ALARMS
+taos,tsl2550            Ambient Light Sensor with SMBUS/Two Wire Serial Interface
 ti,tsc2003              I2C Touch-Screen Controller
 ti,tmp102               Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
+ti,tmp275               Digital Temperature Sensor
diff --git a/Documentation/devicetree/bindings/usb/am33xx-usb.txt b/Documentation/devicetree/bindings/usb/am33xx-usb.txt
index ca8fa56e9f03..707c1a2dae06 100644
--- a/Documentation/devicetree/bindings/usb/am33xx-usb.txt
+++ b/Documentation/devicetree/bindings/usb/am33xx-usb.txt
@@ -1,5 +1,7 @@
 AM33XX MUSB GLUE
  - compatible : Should be "ti,musb-am33xx"
+ - reg : offset and length of register sets, first usbss, then for musb instances
+ - interrupts : usbss, musb instance interrupts in order
  - ti,hwmods : must be "usb_otg_hs"
  - multipoint : Should be "1" indicating the musb controller supports
    multipoint. This is a MUSB configuration-specific setting.
@@ -12,3 +14,22 @@ AM33XX MUSB GLUE
    represents PERIPHERAL.
  - power : Should be "250". This signifies the controller can supply upto
    500mA when operating in host mode.
+
+Example:
+
+usb@47400000  {
+        compatible = "ti,musb-am33xx";
+        reg = <0x47400000 0x1000        /* usbss */
+               0x47401000 0x800         /* musb instance 0 */
+               0x47401800 0x800>;       /* musb instance 1 */
+        interrupts = <17                /* usbss */
+                      18                /* musb instance 0 */
+                      19>;              /* musb instance 1 */
+        multipoint = <1>;
+        num-eps = <16>;
+        ram-bits = <12>;
+        port0-mode = <3>;
+        port1-mode = <3>;
+        power = <250>;
+        ti,hwmods = "usb_otg_hs";
+};
diff --git a/MAINTAINERS b/MAINTAINERS
index 9386a63ea8f6..140ebd063f1b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -797,7 +797,6 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
 T:      git git://git.pengutronix.de/git/imx/linux-2.6.git
 F:      arch/arm/mach-imx/
-F:      arch/arm/plat-mxc/
 F:      arch/arm/configs/imx*_defconfig
 
 ARM/FREESCALE IMX6
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ade7e924bef5..d45ca1bf1de0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE
           Support for systems based on the DC21285 companion chip
           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 
-config ARCH_MXC
-        bool "Freescale MXC/iMX-based"
-        select ARCH_REQUIRE_GPIOLIB
-        select CLKDEV_LOOKUP
-        select CLKSRC_MMIO
-        select GENERIC_CLOCKEVENTS
-        select GENERIC_IRQ_CHIP
-        select MULTI_IRQ_HANDLER
-        select SPARSE_IRQ
-        select USE_OF
-        help
-          Support for Freescale MXC/iMX-based family of processors
-
 config ARCH_MXS
         bool "Freescale MXS-based"
         select ARCH_REQUIRE_GPIOLIB
@@ -937,7 +924,6 @@ config ARCH_OMAP
         select CLKSRC_MMIO
         select GENERIC_CLOCKEVENTS
         select HAVE_CLK
-        select NEED_MACH_GPIO_H
         help
           Support for TI's OMAP platform (OMAP1/2/3/4).
 
@@ -959,7 +945,6 @@ config ARCH_ZYNQ
         bool "Xilinx Zynq ARM Cortex A9 Platform"
         select ARM_AMBA
         select ARM_GIC
-        select CLKDEV_LOOKUP
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select ICST
@@ -1058,7 +1043,7 @@ source "arch/arm/mach-msm/Kconfig"
 
 source "arch/arm/mach-mv78xx0/Kconfig"
 
-source "arch/arm/plat-mxc/Kconfig"
+source "arch/arm/mach-imx/Kconfig"
 
 source "arch/arm/mach-mxs/Kconfig"
 
@@ -1168,7 +1153,7 @@ config ARM_NR_BANKS
 config IWMMXT
         bool "Enable iWMMXt support"
         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
-        default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
+        default y if PXA27x || PXA3xx || ARCH_MMP
         help
           Enable support for iWMMXt context switching at run time if
           running on a CPU that supports it.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index b0f3857b3a4c..5566520686a5 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -412,6 +412,14 @@ endchoice
 config DEBUG_LL_INCLUDE
         string
         default "debug/icedcc.S" if DEBUG_ICEDCC
+        default "debug/imx.S" if DEBUG_IMX1_UART || \
+                                 DEBUG_IMX25_UART || \
+                                 DEBUG_IMX21_IMX27_UART || \
+                                 DEBUG_IMX31_IMX35_UART || \
+                                 DEBUG_IMX51_UART || \
+                                 DEBUG_IMX50_IMX53_UART ||\
+                                 DEBUG_IMX6Q_UART2 || \
+                                 DEBUG_IMX6Q_UART4
         default "debug/highbank.S" if DEBUG_HIGHBANK_UART
         default "debug/mvebu.S" if DEBUG_MVEBU_UART
         default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 5f914fca911b..97252d86a701 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -196,10 +196,8 @@ machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
-plat-$(CONFIG_ARCH_MXC)         += mxc
 plat-$(CONFIG_ARCH_OMAP)        += omap
 plat-$(CONFIG_ARCH_S3C64XX)     += samsung
-plat-$(CONFIG_ARCH_ZYNQ)        += versatile
 plat-$(CONFIG_PLAT_IOP)         += iop
 plat-$(CONFIG_PLAT_NOMADIK)     += nomadik
 plat-$(CONFIG_PLAT_ORION)       += orion
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index a517153a13ea..537208f22e56 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -54,10 +54,6 @@ ifeq ($(CONFIG_ARCH_SA1100),y)
 OBJS            += head-sa1100.o
 endif
 
-ifeq ($(CONFIG_ARCH_VT8500),y)
-OBJS            += head-vt8500.o
-endif
-
 ifeq ($(CONFIG_CPU_XSCALE),y)
 OBJS            += head-xscale.o
 endif
diff --git a/arch/arm/boot/compressed/head-vt8500.S b/arch/arm/boot/compressed/head-vt8500.S
deleted file mode 100644
index 1dc1e21a3be3..000000000000
--- a/arch/arm/boot/compressed/head-vt8500.S
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-vt8500.S
- *
- * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
- *
- * VIA VT8500 specific tweaks. This is merged into head.S by the linker.
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
-                .section        ".start", "ax"
-
-__VT8500_start:
-        @ Compare the SCC ID register against a list of known values
-        ldr     r1, .SCCID
-        ldr     r3, [r1]
-
-        @ VT8500 override
-        ldr     r4, .VT8500SCC
-        cmp     r3, r4
-        ldreq   r7, .ID_BV07
-        beq     .Lendvt8500
-
-        @ WM8505 override
-        ldr     r4, .WM8505SCC
-        cmp     r3, r4
-        ldreq   r7, .ID_8505
-        beq     .Lendvt8500
-
-        @ Otherwise, leave the bootloader's machine id untouched
-
-.SCCID:
-        .word   0xd8120000
-.VT8500SCC:
-        .word   0x34000102
-.WM8505SCC:
-        .word   0x34260103
-
-.ID_BV07:
-        .word   MACH_TYPE_BV07
-.ID_8505:
-        .word   MACH_TYPE_WM8505_7IN_NETBOOK
-
-.Lendvt8500:
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f37cf9fa5fa0..2458b69e2be6 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -63,15 +63,17 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
         imx28-m28evk.dtb \
         imx28-tx28.dtb
 dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
+        omap3-beagle.dtb \
         omap3-beagle-xm.dtb \
         omap3-evm.dtb \
         omap3-tobi.dtb \
         omap4-panda.dtb \
-        omap4-pandaES.dtb \
-        omap4-var_som.dtb \
+        omap4-panda-es.dtb \
+        omap4-var-som.dtb \
         omap4-sdp.dtb \
         omap5-evm.dtb \
         am335x-evm.dtb \
+        am335x-evmsk.dtb \
         am335x-bone.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
 dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index c634f87e230e..2c338889df1b 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -13,11 +13,31 @@
         model = "TI AM335x BeagleBone";
         compatible = "ti,am335x-bone", "ti,am33xx";
 
+        cpus {
+                cpu@0 {
+                        cpu0-supply = <&dcdc2_reg>;
+                };
+        };
+
         memory {
                 device_type = "memory";
                 reg = <0x80000000 0x10000000>; /* 256 MB */
         };
 
+        am33xx_pinmux: pinmux@44e10800 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&user_leds_s0>;
+
+                user_leds_s0: user_leds_s0 {
+                        pinctrl-single,pins = <
+                                0x54 0x7        /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
+                                0x58 0x17       /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */
+                                0x5c 0x7        /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */
+                                0x60 0x17       /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
+                        >;
+                };
+        };
+
         ocp {
                 uart1: serial@44e09000 {
                         status = "okay";
@@ -33,6 +53,36 @@
 
                 };
         };
+
+        leds {
+                compatible = "gpio-leds";
+
+                led@2 {
+                        label = "beaglebone:green:heartbeat";
+                        gpios = <&gpio2 21 0>;
+                        linux,default-trigger = "heartbeat";
+                        default-state = "off";
+                };
+
+                led@3 {
+                        label = "beaglebone:green:mmc0";
+                        gpios = <&gpio2 22 0>;
+                        linux,default-trigger = "mmc0";
+                        default-state = "off";
+                };
+
+                led@4 {
+                        label = "beaglebone:green:usr2";
+                        gpios = <&gpio2 23 0>;
+                        default-state = "off";
+                };
+
+                led@5 {
+                        label = "beaglebone:green:usr3";
+                        gpios = <&gpio2 24 0>;
+                        default-state = "off";
+                };
+        };
 };
 
 /include/ "tps65217.dtsi"
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 185d6325a458..9f65f17ebdf8 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -13,11 +13,39 @@
         model = "TI AM335x EVM";
         compatible = "ti,am335x-evm", "ti,am33xx";
 
+        cpus {
+                cpu@0 {
+                        cpu0-supply = <&vdd1_reg>;
+                };
+        };
+
         memory {
                 device_type = "memory";
                 reg = <0x80000000 0x10000000>; /* 256 MB */
         };
 
+        am33xx_pinmux: pinmux@44e10800 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>;
+
+                matrix_keypad_s0: matrix_keypad_s0 {
+                        pinctrl-single,pins = <
+                                0x54 0x7        /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
+                                0x58 0x7        /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */
+                                0x64 0x27       /* gpmc_a9.gpio1_25, INPUT | MODE7 */
+                                0x68 0x27       /* gpmc_a10.gpio1_26, INPUT | MODE7 */
+                                0x6c 0x27       /* gpmc_a11.gpio1_27, INPUT | MODE7 */
+                        >;
+                };
+
+                volume_keys_s0: volume_keys_s0 {
+                        pinctrl-single,pins = <
+                                0x150 0x27      /* spi0_sclk.gpio0_2, INPUT | MODE7 */
+                                0x154 0x27      /* spi0_d0.gpio0_3, INPUT | MODE7 */
+                        >;
+                };
+        };
+
         ocp {
                 uart1: serial@44e09000 {
                         status = "okay";
@@ -31,6 +59,49 @@
                                 reg = <0x2d>;
                         };
                 };
+
+                i2c2: i2c@4802a000 {
+                        status = "okay";
+                        clock-frequency = <100000>;
+
+                        lis331dlh: lis331dlh@18 {
+                                compatible = "st,lis331dlh", "st,lis3lv02d";
+                                reg = <0x18>;
+                                Vdd-supply = <&lis3_reg>;
+                                Vdd_IO-supply = <&lis3_reg>;
+
+                                st,click-single-x;
+                                st,click-single-y;
+                                st,click-single-z;
+                                st,click-thresh-x = <10>;
+                                st,click-thresh-y = <10>;
+                                st,click-thresh-z = <10>;
+                                st,irq1-click;
+                                st,irq2-click;
+                                st,wakeup-x-lo;
+                                st,wakeup-x-hi;
+                                st,wakeup-y-lo;
+                                st,wakeup-y-hi;
+                                st,wakeup-z-lo;
+                                st,wakeup-z-hi;
+                                st,min-limit-x = <120>;
+                                st,min-limit-y = <120>;
+                                st,min-limit-z = <140>;
+                                st,max-limit-x = <550>;
+                                st,max-limit-y = <550>;
+                                st,max-limit-z = <750>;
+                        };
+
+                        tsl2550: tsl2550@39 {
+                                compatible = "taos,tsl2550";
+                                reg = <0x39>;
+                        };
+
+                        tmp275: tmp275@48 {
+                                compatible = "ti,tmp275";
+                                reg = <0x48>;
+                        };
+                };
         };
 
         vbat: fixedregulator@0 {
@@ -40,6 +111,53 @@
                 regulator-max-microvolt = <5000000>;
                 regulator-boot-on;
         };
+
+        lis3_reg: fixedregulator@1 {
+                compatible = "regulator-fixed";
+                regulator-name = "lis3_reg";
+                regulator-boot-on;
+        };
+
+        matrix_keypad: matrix_keypad@0 {
+                compatible = "gpio-matrix-keypad";
+                debounce-delay-ms = <5>;
+                col-scan-delay-us = <2>;
+
+                row-gpios = <&gpio2 25 0        /* Bank1, pin25 */
+                             &gpio2 26 0        /* Bank1, pin26 */
+                             &gpio2 27 0>;      /* Bank1, pin27 */
+
+                col-gpios = <&gpio2 21 0        /* Bank1, pin21 */
+                             &gpio2 22 0>;      /* Bank1, pin22 */
+
+                linux,keymap = <0x0000008b      /* MENU */
+                                0x0100009e      /* BACK */
+                                0x02000069      /* LEFT */
+                                0x0001006a      /* RIGHT */
+                                0x0101001c      /* ENTER */
+                                0x0201006c>;    /* DOWN */
+        };
+
+        gpio_keys: volume_keys@0 {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                autorepeat;
+
+                switch@9 {
+                        label = "volume-up";
+                        linux,code = <115>;
+                        gpios = <&gpio1 2 1>;
+                        gpio-key,wakeup;
+                };
+
+                switch@10 {
+                        label = "volume-down";
+                        linux,code = <114>;
+                        gpios = <&gpio1 3 1>;
+                        gpio-key,wakeup;
+                };
+        };
 };
 
 /include/ "tps65910.dtsi"
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
new file mode 100644
index 000000000000..f5a6162a4ff2
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -0,0 +1,250 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * AM335x Starter Kit
+ * http://www.ti.com/tool/tmdssk3358
+ */
+
+/dts-v1/;
+
+/include/ "am33xx.dtsi"
+
+/ {
+        model = "TI AM335x EVM-SK";
+        compatible = "ti,am335x-evmsk", "ti,am33xx";
+
+        cpus {
+                cpu@0 {
+                        cpu0-supply = <&vdd1_reg>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x10000000>; /* 256 MB */
+        };
+
+        am33xx_pinmux: pinmux@44e10800 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>;
+
+                user_leds_s0: user_leds_s0 {
+                        pinctrl-single,pins = <
+                                0x10 0x7        /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */
+                                0x14 0x7        /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */
+                                0x18 0x7        /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */
+                                0x1c 0x7        /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */
+                        >;
+                };
+
+                gpio_keys_s0: gpio_keys_s0 {
+                        pinctrl-single,pins = <
+                                0x94 0x27       /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */
+                                0x90 0x27       /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */
+                                0x70 0x27       /* gpmc_wait0.gpio0_30, INPUT | MODE7 */
+                                0x9c 0x27       /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */
+                        >;
+                };
+        };
+
+        ocp {
+                uart1: serial@44e09000 {
+                        status = "okay";
+                };
+
+                i2c1: i2c@44e0b000 {
+                        status = "okay";
+                        clock-frequency = <400000>;
+
+                        tps: tps@2d {
+                                reg = <0x2d>;
+                        };
+
+                        lis331dlh: lis331dlh@18 {
+                                compatible = "st,lis331dlh", "st,lis3lv02d";
+                                reg = <0x18>;
+                                Vdd-supply = <&lis3_reg>;
+                                Vdd_IO-supply = <&lis3_reg>;
+
+                                st,click-single-x;
+                                st,click-single-y;
+                                st,click-single-z;
+                                st,click-thresh-x = <10>;
+                                st,click-thresh-y = <10>;
+                                st,click-thresh-z = <10>;
+                                st,irq1-click;
+                                st,irq2-click;
+                                st,wakeup-x-lo;
+                                st,wakeup-x-hi;
+                                st,wakeup-y-lo;
+                                st,wakeup-y-hi;
+                                st,wakeup-z-lo;
+                                st,wakeup-z-hi;
+                                st,min-limit-x = <120>;
+                                st,min-limit-y = <120>;
+                                st,min-limit-z = <140>;
+                                st,max-limit-x = <550>;
+                                st,max-limit-y = <550>;
+                                st,max-limit-z = <750>;
+                        };
+                };
+        };
+
+        vbat: fixedregulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "vbat";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                regulator-boot-on;
+        };
+
+        lis3_reg: fixedregulator@1 {
+                compatible = "regulator-fixed";
+                regulator-name = "lis3_reg";
+                regulator-boot-on;
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                led@1 {
+                        label = "evmsk:green:usr0";
+                        gpios = <&gpio2 4 0>;
+                        default-state = "off";
+                };
+
+                led@2 {
+                        label = "evmsk:green:usr1";
+                        gpios = <&gpio2 5 0>;
+                        default-state = "off";
+                };
+
+                led@3 {
+                        label = "evmsk:green:mmc0";
+                        gpios = <&gpio2 6 0>;
+                        linux,default-trigger = "mmc0";
+                        default-state = "off";
+                };
+
+                led@4 {
+                        label = "evmsk:green:heartbeat";
+                        gpios = <&gpio2 7 0>;
+                        linux,default-trigger = "heartbeat";
+                        default-state = "off";
+                };
+        };
+
+        gpio_buttons: gpio_buttons@0 {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                switch@1 {
+                        label = "button0";
+                        linux,code = <0x100>;
+                        gpios = <&gpio3 3 0>;
+                };
+
+                switch@2 {
+                        label = "button1";
+                        linux,code = <0x101>;
+                        gpios = <&gpio3 2 0>;
+                };
+
+                switch@3 {
+                        label = "button2";
+                        linux,code = <0x102>;
+                        gpios = <&gpio1 30 0>;
+                        gpio-key,wakeup;
+                };
+
+                switch@4 {
+                        label = "button3";
+                        linux,code = <0x103>;
+                        gpios = <&gpio3 5 0>;
+                };
+        };
+};
+
+/include/ "tps65910.dtsi"
+
+&tps {
+        vcc1-supply = <&vbat>;
+        vcc2-supply = <&vbat>;
+        vcc3-supply = <&vbat>;
+        vcc4-supply = <&vbat>;
+        vcc5-supply = <&vbat>;
+        vcc6-supply = <&vbat>;
+        vcc7-supply = <&vbat>;
+        vccio-supply = <&vbat>;
+
+        regulators {
+                vrtc_reg: regulator@0 {
+                        regulator-always-on;
+                };
+
+                vio_reg: regulator@1 {
+                        regulator-always-on;
+                };
+
+                vdd1_reg: regulator@2 {
+                        /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+                        regulator-name = "vdd_mpu";
+                        regulator-min-microvolt = <912500>;
+                        regulator-max-microvolt = <1312500>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                vdd2_reg: regulator@3 {
+                        /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+                        regulator-name = "vdd_core";
+                        regulator-min-microvolt = <912500>;
+                        regulator-max-microvolt = <1150000>;
+                        regulator-boot-on;
+                        regulator-always-on;
+                };
+
+                vdd3_reg: regulator@4 {
+                        regulator-always-on;
+                };
+
+                vdig1_reg: regulator@5 {
+                        regulator-always-on;
+                };
+
+                vdig2_reg: regulator@6 {
+                        regulator-always-on;
+                };
+
+                vpll_reg: regulator@7 {
+                        regulator-always-on;
+                };
+
+                vdac_reg: regulator@8 {
+                        regulator-always-on;
+                };
+
+                vaux1_reg: regulator@9 {
+                        regulator-always-on;
+                };
+
+                vaux2_reg: regulator@10 {
+                        regulator-always-on;
+                };
+
+                vaux33_reg: regulator@11 {
+                        regulator-always-on;
+                };
+
+                vmmc_reg: regulator@12 {
+                        regulator-always-on;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bb31bff01998..20a3f29a6bfe 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -12,6 +12,7 @@
 
 / {
         compatible = "ti,am33xx";
+        interrupt-parent = <&intc>;
 
         aliases {
                 serial0 = &uart1;
@@ -25,6 +26,21 @@
         cpus {
                 cpu@0 {
                         compatible = "arm,cortex-a8";
+
+                        /*
+                         * To consider voltage drop between PMIC and SoC,
+                         * tolerance value is reduced to 2% from 4% and
+                         * voltage value is increased as a precaution.
+                         */
+                        operating-points = <
+                                /* kHz    uV */
+                                720000  1285000
+                                600000  1225000
+                                500000  1125000
+                                275000  1125000
+                        >;
+                        voltage-tolerance = <2>; /* 2 percentage */
+                        clock-latency = <300000>; /* From omap-cpufreq driver */
                 };
         };
 
@@ -40,6 +56,15 @@
                 };
         };
 
+        am33xx_pinmux: pinmux@44e10800 {
+                compatible = "pinctrl-single";
+                reg = <0x44e10800 0x0238>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-single,register-width = <32>;
+                pinctrl-single,function-mask = <0x7f>;
+        };
+
         /*
          * XXX: Use a flat representation of the AM33XX interconnect.
          * The real AM33XX interconnect network is quite complex.Since
@@ -70,7 +95,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x44e07000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <96>;
                 };
 
@@ -82,7 +106,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x4804c000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <98>;
                 };
 
@@ -94,7 +117,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x481ac000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <32>;
                 };
 
@@ -106,7 +128,6 @@
                         interrupt-controller;
                         #interrupt-cells = <1>;
                         reg = <0x481ae000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <62>;
                 };
 
@@ -115,7 +136,6 @@
                         ti,hwmods = "uart1";
                         clock-frequency = <48000000>;
                         reg = <0x44e09000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <72>;
                         status = "disabled";
                 };
@@ -125,7 +145,6 @@
                         ti,hwmods = "uart2";
                         clock-frequency = <48000000>;
                         reg = <0x48022000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <73>;
                         status = "disabled";
                 };
@@ -135,7 +154,6 @@
                         ti,hwmods = "uart3";
                         clock-frequency = <48000000>;
                         reg = <0x48024000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <74>;
                         status = "disabled";
                 };
@@ -145,7 +163,6 @@
                         ti,hwmods = "uart4";
                         clock-frequency = <48000000>;
                         reg = <0x481a6000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <44>;
                         status = "disabled";
                 };
@@ -155,7 +172,6 @@
                         ti,hwmods = "uart5";
                         clock-frequency = <48000000>;
                         reg = <0x481a8000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <45>;
                         status = "disabled";
                 };
@@ -165,7 +181,6 @@
                         ti,hwmods = "uart6";
                         clock-frequency = <48000000>;
                         reg = <0x481aa000 0x2000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <46>;
                         status = "disabled";
                 };
@@ -176,7 +191,6 @@
                         #size-cells = <0>;
                         ti,hwmods = "i2c1";
                         reg = <0x44e0b000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <70>;
                         status = "disabled";
                 };
@@ -187,7 +201,6 @@
                         #size-cells = <0>;
                         ti,hwmods = "i2c2";
                         reg = <0x4802a000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <71>;
                         status = "disabled";
                 };
@@ -198,7 +211,6 @@
                         #size-cells = <0>;
                         ti,hwmods = "i2c3";
                         reg = <0x4819c000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <30>;
                         status = "disabled";
                 };
@@ -207,8 +219,124 @@
                         compatible = "ti,omap3-wdt";
                         ti,hwmods = "wd_timer2";
                         reg = <0x44e35000 0x1000>;
-                        interrupt-parent = <&intc>;
                         interrupts = <91>;
                 };
+
+                dcan0: d_can@481cc000 {
+                        compatible = "bosch,d_can";
+                        ti,hwmods = "d_can0";
+                        reg = <0x481cc000 0x2000>;
+                        interrupts = <52>;
+                        status = "disabled";
+                };
+
+                dcan1: d_can@481d0000 {
+                        compatible = "bosch,d_can";
+                        ti,hwmods = "d_can1";
+                        reg = <0x481d0000 0x2000>;
+                        interrupts = <55>;
+                        status = "disabled";
+                };
+
+                timer1: timer@44e31000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x44e31000 0x400>;
+                        interrupts = <67>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@48040000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48040000 0x400>;
+                        interrupts = <68>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48042000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48042000 0x400>;
+                        interrupts = <69>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@48044000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48044000 0x400>;
+                        interrupts = <92>;
+                        ti,hwmods = "timer4";
+                        ti,timer-pwm;
+                };
+
+                timer5: timer@48046000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48046000 0x400>;
+                        interrupts = <93>;
+                        ti,hwmods = "timer5";
+                        ti,timer-pwm;
+                };
+
+                timer6: timer@48048000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48048000 0x400>;
+                        interrupts = <94>;
+                        ti,hwmods = "timer6";
+                        ti,timer-pwm;
+                };
+
+                timer7: timer@4804a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4804a000 0x400>;
+                        interrupts = <95>;
+                        ti,hwmods = "timer7";
+                        ti,timer-pwm;
+                };
+
+                rtc@44e3e000 {
+                        compatible = "ti,da830-rtc";
+                        reg = <0x44e3e000 0x1000>;
+                        interrupts = <75
+                                      76>;
+                        ti,hwmods = "rtc";
+                };
+
+                spi0: spi@48030000 {
+                        compatible = "ti,omap4-mcspi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x48030000 0x400>;
+                        interrupt = <65>;
+                        ti,spi-num-cs = <2>;
+                        ti,hwmods = "spi0";
+                        status = "disabled";
+                };
+
+                spi1: spi@481a0000 {
+                        compatible = "ti,omap4-mcspi";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x481a0000 0x400>;
+                        interrupt = <125>;
+                        ti,spi-num-cs = <2>;
+                        ti,hwmods = "spi1";
+                        status = "disabled";
+                };
+
+                usb@47400000 {
+                        compatible = "ti,musb-am33xx";
+                        reg = <0x47400000 0x1000        /* usbss */
+                               0x47401000 0x800         /* musb instance 0 */
+                               0x47401800 0x800>;       /* musb instance 1 */
+                        interrupts = <17                /* usbss */
+                                      18                /* musb instance 0 */
+                                      19>;              /* musb instance 1 */
+                        multipoint = <1>;
+                        num-eps = <16>;
+                        ram-bits = <12>;
+                        port0-mode = <3>;
+                        port1-mode = <3>;
+                        power = <250>;
+                        ti,hwmods = "usb_otg_hs";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 3e54f1498841..67d672792b0d 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -113,7 +113,7 @@
                         i2c1: i2c@10012000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
                                 reg = <0x10012000 0x1000>;
                                 interrupts = <12>;
                                 status = "disabled";
@@ -205,7 +205,7 @@
                         i2c2: i2c@1001d000 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
                                 reg = <0x1001d000 0x1000>;
                                 interrupts = <1>;
                                 status = "disabled";
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 75d069fcf897..54aea74769a1 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -377,7 +377,7 @@
                         i2c@83fc4000 { /* I2C2 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
                                 reg = <0x83fc4000 0x4000>;
                                 interrupts = <63>;
                                 status = "disabled";
@@ -386,7 +386,7 @@
                         i2c@83fc8000 { /* I2C1 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
                                 reg = <0x83fc8000 0x4000>;
                                 interrupts = <62>;
                                 status = "disabled";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 76ebb1ad2675..caf09ff73f10 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -432,7 +432,7 @@
                         i2c@53fec000 { /* I2C3 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
                                 reg = <0x53fec000 0x4000>;
                                 interrupts = <64>;
                                 status = "disabled";
@@ -488,7 +488,7 @@
                         i2c@63fc4000 { /* I2C2 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
                                 reg = <0x63fc4000 0x4000>;
                                 interrupts = <63>;
                                 status = "disabled";
@@ -497,7 +497,7 @@
                         i2c@63fc8000 { /* I2C1 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
                                 reg = <0x63fc8000 0x4000>;
                                 interrupts = <62>;
                                 status = "disabled";
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index f3990b04fecf..f604a44a5c66 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -882,7 +882,7 @@
                         i2c@021a0000 { /* I2C1 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                 reg = <0x021a0000 0x4000>;
                                 interrupts = <0 36 0x04>;
                                 clocks = <&clks 125>;
@@ -892,7 +892,7 @@
                         i2c@021a4000 { /* I2C2 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                 reg = <0x021a4000 0x4000>;
                                 interrupts = <0 37 0x04>;
                                 clocks = <&clks 126>;
@@ -902,7 +902,7 @@
                         i2c@021a8000 { /* I2C3 */
                                 #address-cells = <1>;
                                 #size-cells = <0>;
-                                compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
+                                compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
                                 reg = <0x021a8000 0x4000>;
                                 interrupts = <0 38 0x04>;
                                 clocks = <&clks 127>;
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index 61767757b50a..c9c3fa344647 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -18,6 +18,11 @@
                 bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
         };
 
+        syscon {
+                /* AP system controller registers */
+                reg = <0x11000000 0x100>;
+        };
+
         timer0: timer@13000000 {
                 compatible = "arm,integrator-timer";
         };
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index 2dd5e4e48481..8b119399025a 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -18,6 +18,11 @@
                 bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
         };
 
+        cpcon {
+                /* CP controller registers */
+                reg = <0xcb000000 0x100>;
+        };
+
         timer0: timer@13000000 {
                 compatible = "arm,sp804", "arm,primecell";
         };
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 581cb081cb0f..761c4b69b25b 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -12,6 +12,7 @@
 
 / {
         compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
+        interrupt-parent = <&intc>;
 
         aliases {
                 serial0 = &uart1;
@@ -65,5 +66,90 @@
                         ti,hwmods = "uart3";
                         clock-frequency = <48000000>;
                 };
+
+                timer2: timer@4802a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4802a000 0x400>;
+                        interrupts = <38>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48078000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48078000 0x400>;
+                        interrupts = <39>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@4807a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4807a000 0x400>;
+                        interrupts = <40>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@4807c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4807c000 0x400>;
+                        interrupts = <41>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4807e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4807e000 0x400>;
+                        interrupts = <42>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                };
+
+                timer7: timer@48080000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48080000 0x400>;
+                        interrupts = <43>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@48082000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48082000 0x400>;
+                        interrupts = <44>;
+                        ti,hwmods = "timer8";
+                        ti,timer-dsp;
+                };
+
+                timer9: timer@48084000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48084000 0x400>;
+                        interrupts = <45>;
+                        ti,hwmods = "timer9";
+                        ti,timer-pwm;
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x400>;
+                        interrupts = <46>;
+                        ti,hwmods = "timer10";
+                        ti,timer-pwm;
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x400>;
+                        interrupts = <47>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
+
+                timer12: timer@4808a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4808a000 0x400>;
+                        interrupts = <48>;
+                        ti,hwmods = "timer12";
+                        ti,timer-pwm;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index bfd76b4a0ddc..af6560908905 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -14,6 +14,12 @@
         compatible = "ti,omap2420", "ti,omap2";
 
         ocp {
+                counter32k: counter@48004000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x48004000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap2420_pmx: pinmux@48000030 {
                         compatible = "ti,omap2420-padconf", "pinctrl-single";
                         reg = <0x48000030 0x0113>;
@@ -30,7 +36,6 @@
                         interrupts = <59>, /* TX interrupt */
                                      <60>; /* RX interrupt */
                         interrupt-names = "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,hwmods = "mcbsp1";
                 };
 
@@ -41,8 +46,15 @@
                         interrupts = <62>, /* TX interrupt */
                                      <63>; /* RX interrupt */
                         interrupt-names = "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,hwmods = "mcbsp2";
                 };
+
+                timer1: timer@48028000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48028000 0x400>;
+                        interrupts = <37>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 4565d9750f4d..c3924457c9b6 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -14,6 +14,12 @@
         compatible = "ti,omap2430", "ti,omap2";
 
         ocp {
+                counter32k: counter@49020000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x49020000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap2430_pmx: pinmux@49002030 {
                         compatible = "ti,omap2430-padconf", "pinctrl-single";
                         reg = <0x49002030 0x0154>;
@@ -32,7 +38,6 @@
                                      <60>, /* RX interrupt */
                                      <61>; /* RX overflow interrupt */
                         interrupt-names = "common", "tx", "rx", "rx_overflow";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -45,7 +50,6 @@
                                      <62>, /* TX interrupt */
                                      <63>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp2";
                 };
@@ -58,7 +62,6 @@
                                      <89>, /* TX interrupt */
                                      <90>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3";
                 };
@@ -71,7 +74,6 @@
                                      <54>, /* TX interrupt */
                                      <55>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp4";
                 };
@@ -84,9 +86,16 @@
                                      <81>, /* TX interrupt */
                                      <82>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp5";
                 };
+
+                timer1: timer@49018000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49018000 0x400>;
+                        interrupts = <37>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index c38cf76df81f..3705a81c1fc2 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -55,12 +55,6 @@
                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
                 interrupt-parent = <&intc>;
 
-                vsim: regulator-vsim {
-                        compatible = "ti,twl4030-vsim";
-                        regulator-min-microvolt = <1800000>;
-                        regulator-max-microvolt = <3000000>;
-                };
-
                 twl_audio: audio {
                         compatible = "ti,twl4030-audio";
                         codec {
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
new file mode 100644
index 000000000000..f624dc85d441
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+/include/ "omap3.dtsi"
+
+/ {
+        model = "TI OMAP3 BeagleBoard";
+        compatible = "ti,omap3-beagle", "ti,omap3";
+
+        memory {
+                device_type = "memory";
+                reg = <0x80000000 0x10000000>; /* 256 MB */
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                pmu_stat {
+                        label = "beagleboard::pmu_stat";
+                        gpios = <&twl_gpio 19 0>; /* LEDB */
+                };
+
+                heartbeat {
+                        label = "beagleboard::usr0";
+                        gpios = <&gpio5 22 0>; /* 150 -> D6 LED */
+                        linux,default-trigger = "heartbeat";
+                };
+
+                mmc {
+                        label = "beagleboard::usr1";
+                        gpios = <&gpio5 21 0>; /* 149 -> D7 LED */
+                        linux,default-trigger = "mmc0";
+                };
+        };
+
+};
+
+&i2c1 {
+        clock-frequency = <2600000>;
+
+        twl: twl@48 {
+                reg = <0x48>;
+                interrupts = <7>; /* SYS_NIRQ cascaded to intc */
+                interrupt-parent = <&intc>;
+        };
+};
+
+/include/ "twl4030.dtsi"
+
+&mmc1 {
+        vmmc-supply = <&vmmc1>;
+        vmmc_aux-supply = <&vsim>;
+        bus-width = <8>;
+};
+
+&mmc2 {
+        status = "disabled";
+};
+
+&mmc3 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 696e929d0304..1acc26148ffc 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -12,6 +12,7 @@
 
 / {
         compatible = "ti,omap3430", "ti,omap3";
+        interrupt-parent = <&intc>;
 
         aliases {
                 serial0 = &uart1;
@@ -60,6 +61,12 @@
                 ranges;
                 ti,hwmods = "l3_main";
 
+                counter32k: counter@48320000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x48320000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 intc: interrupt-controller@48200000 {
                         compatible = "ti,omap2-intc";
                         interrupt-controller;
@@ -240,7 +247,6 @@
                                      <59>, /* TX interrupt */
                                      <60>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -255,7 +261,6 @@
                                      <63>, /* RX interrupt */
                                      <4>;  /* Sidetone */
                         interrupt-names = "common", "tx", "rx", "sidetone";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <1280>;
                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
                 };
@@ -270,7 +275,6 @@
                                      <90>, /* RX interrupt */
                                      <5>;  /* Sidetone */
                         interrupt-names = "common", "tx", "rx", "sidetone";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
                 };
@@ -283,7 +287,6 @@
                                      <54>, /* TX interrupt */
                                      <55>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp4";
                 };
@@ -296,9 +299,103 @@
                                      <81>, /* TX interrupt */
                                      <82>; /* RX interrupt */
                         interrupt-names = "common", "tx", "rx";
-                        interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp5";
                 };
+
+                timer1: timer@48318000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48318000 0x400>;
+                        interrupts = <37>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@49032000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49032000 0x400>;
+                        interrupts = <38>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@49034000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49034000 0x400>;
+                        interrupts = <39>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@49036000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49036000 0x400>;
+                        interrupts = <40>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@49038000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49038000 0x400>;
+                        interrupts = <41>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4903a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4903a000 0x400>;
+                        interrupts = <42>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                };
+
+                timer7: timer@4903c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4903c000 0x400>;
+                        interrupts = <43>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@4903e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4903e000 0x400>;
+                        interrupts = <44>;
+                        ti,hwmods = "timer8";
+                        ti,timer-pwm;
+                        ti,timer-dsp;
+                };
+
+                timer9: timer@49040000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x49040000 0x400>;
+                        interrupts = <45>;
+                        ti,hwmods = "timer9";
+                        ti,timer-pwm;
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x400>;
+                        interrupts = <46>;
+                        ti,hwmods = "timer10";
+                        ti,timer-pwm;
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x400>;
+                        interrupts = <47>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
+
+                timer12: timer@48304000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48304000 0x400>;
+                        interrupts = <95>;
+                        ti,hwmods = "timer12";
+                        ti,timer-alwon;
+                        ti,timer-secure;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts
new file mode 100644
index 000000000000..75466d2abfb5
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-panda-a4.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/include/ "omap4-panda.dts"
+
+/* Pandaboard Rev A4+ have external pullups on SCL & SDA */
+&dss_hdmi_pins {
+        pinctrl-single,pins = <
+                0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                0x5c 0x100      /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
+                0x5e 0x100      /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
+                >;
+};
diff --git a/arch/arm/boot/dts/omap4-pandaES.dts b/arch/arm/boot/dts/omap4-panda-es.dts
index d4ba43a48d9b..73bc1a67e444 100644
--- a/arch/arm/boot/dts/omap4-pandaES.dts
+++ b/arch/arm/boot/dts/omap4-panda-es.dts
@@ -22,3 +22,12 @@
                 "AFML", "Line In",
                 "AFMR", "Line In";
 };
+
+/* PandaboardES has external pullups on SCL & SDA */
+&dss_hdmi_pins {
+        pinctrl-single,pins = <
+                0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                0x5c 0x100      /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
+                0x5e 0x100      /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
+                >;
+};
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index e8f927cbb376..4122efe31cfd 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -65,6 +65,8 @@
                         &twl6040_pins
                         &mcpdm_pins
                         &mcbsp1_pins
+                        &dss_hdmi_pins
+                        &tpd12s015_pins
         >;
 
         twl6040_pins: pinmux_twl6040_pins {
@@ -92,6 +94,22 @@
                         0xc4 0x100      /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
                 >;
         };
+
+        dss_hdmi_pins: pinmux_dss_hdmi_pins {
+                pinctrl-single,pins = <
+                        0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                        0x5c 0x118      /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
+                        0x5e 0x118      /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
+                >;
+        };
+
+        tpd12s015_pins: pinmux_tpd12s015_pins {
+                pinctrl-single,pins = <
+                        0x22 0x3        /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
+                        0x48 0x3        /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
+                        0x58 0x10b      /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
+                >;
+        };
 };
 
 &i2c1 {
@@ -184,3 +202,7 @@
 &dmic {
         status = "disabled";
 };
+
+&twl_usb_comparator {
+        usb-supply = <&vusb>;
+};
diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts
new file mode 100644
index 000000000000..b4a40ffbce31
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/include/ "omap4-sdp.dts"
+
+/* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
+&dss_hdmi_pins {
+        pinctrl-single,pins = <
+                0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                0x5c 0x100      /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
+                0x5e 0x100      /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
+                >;
+};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 5b7e04fbff50..43e5258a9372 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -124,6 +124,8 @@
                         &dmic_pins
                         &mcbsp1_pins
                         &mcbsp2_pins
+                        &dss_hdmi_pins
+                        &tpd12s015_pins
         >;
 
         uart2_pins: pinmux_uart2_pins {
@@ -194,6 +196,22 @@
                         0xbc 0x100      /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */
                 >;
         };
+
+        dss_hdmi_pins: pinmux_dss_hdmi_pins {
+                pinctrl-single,pins = <
+                        0x5a 0x118      /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
+                        0x5c 0x118      /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
+                        0x5e 0x118      /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
+                >;
+        };
+
+        tpd12s015_pins: pinmux_tpd12s015_pins {
+                pinctrl-single,pins = <
+                        0x22 0x3        /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
+                        0x48 0x3        /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
+                        0x58 0x10b      /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
+                >;
+        };
 };
 
 &i2c1 {
@@ -406,3 +424,7 @@
 &mcbsp3 {
         status = "disabled";
 };
+
+&twl_usb_comparator {
+        usb-supply = <&vusb>;
+};
diff --git a/arch/arm/boot/dts/omap4-var_som.dts b/arch/arm/boot/dts/omap4-var-som.dts
index 6601e6af6092..6601e6af6092 100644
--- a/arch/arm/boot/dts/omap4-var_som.dts
+++ b/arch/arm/boot/dts/omap4-var-som.dts
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 3883f94fdbd0..739bb79e410e 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -95,6 +95,12 @@
                 ranges;
                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 
+                counter32k: counter@4a304000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x4a304000 0x20>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap4_pmx_core: pinmux@4a100040 {
                         compatible = "ti,omap4-padconf", "pinctrl-single";
                         reg = <0x4a100040 0x0196>;
@@ -340,7 +346,6 @@
                               <0x49032000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 112 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "mcpdm";
                 };
 
@@ -350,7 +355,6 @@
                               <0x4902e000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 114 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "dmic";
                 };
 
@@ -361,7 +365,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 17 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -373,7 +376,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 22 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp2";
                 };
@@ -385,7 +387,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 23 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3";
                 };
@@ -396,7 +397,6 @@
                         reg-names = "mpu";
                         interrupts = <0 16 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp4";
                 };
@@ -431,12 +431,103 @@
                         hw-caps-temp-alert;
                 };
 
-                ocp2scp {
+                ocp2scp@4a0ad000 {
                         compatible = "ti,omap-ocp2scp";
+                        reg = <0x4a0ad000 0x1f>;
                         #address-cells = <1>;
                         #size-cells = <1>;
                         ranges;
                         ti,hwmods = "ocp2scp_usb_phy";
                 };
+
+                timer1: timer@4a318000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4a318000 0x80>;
+                        interrupts = <0 37 0x4>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@48032000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48032000 0x80>;
+                        interrupts = <0 38 0x4>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48034000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48034000 0x80>;
+                        interrupts = <0 39 0x4>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@48036000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48036000 0x80>;
+                        interrupts = <0 40 0x4>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@40138000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x40138000 0x80>,
+                              <0x49038000 0x80>;
+                        interrupts = <0 41 0x4>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4013a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013a000 0x80>,
+                              <0x4903a000 0x80>;
+                        interrupts = <0 42 0x4>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                };
+
+                timer7: timer@4013c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013c000 0x80>,
+                              <0x4903c000 0x80>;
+                        interrupts = <0 43 0x4>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@4013e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013e000 0x80>,
+                              <0x4903e000 0x80>;
+                        interrupts = <0 44 0x4>;
+                        ti,hwmods = "timer8";
+                        ti,timer-pwm;
+                        ti,timer-dsp;
+                };
+
+                timer9: timer@4803e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4803e000 0x80>;
+                        interrupts = <0 45 0x4>;
+                        ti,hwmods = "timer9";
+                        ti,timer-pwm;
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x80>;
+                        interrupts = <0 46 0x4>;
+                        ti,hwmods = "timer10";
+                        ti,timer-pwm;
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x80>;
+                        interrupts = <0 47 0x4>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts
index c663eba73168..8722c15bbba2 100644
--- a/arch/arm/boot/dts/omap5-evm.dts
+++ b/arch/arm/boot/dts/omap5-evm.dts
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 /include/ "omap5.dtsi"
+/include/ "samsung_k3pe0e000b.dtsi"
 
 / {
         model = "TI OMAP5 EVM board";
@@ -15,7 +16,7 @@
 
         memory {
                 device_type = "memory";
-                reg = <0x80000000 0x40000000>; /* 1 GB */
+                reg = <0x80000000 0x80000000>; /* 2 GB */
         };
 
         vmmcsd_fixed: fixedregulator-mmcsd {
@@ -140,3 +141,13 @@
 &mcbsp3 {
         status = "disabled";
 };
+
+&emif1 {
+        cs1-used;
+        device-handle = <&samsung_K3PE0E000B>;
+};
+
+&emif2 {
+        cs1-used;
+        device-handle = <&samsung_K3PE0E000B>;
+};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 42c78beb4fdc..790bb2a4b343 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -77,6 +77,12 @@
                 ranges;
                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 
+                counter32k: counter@4ae04000 {
+                        compatible = "ti,omap-counter32k";
+                        reg = <0x4ae04000 0x40>;
+                        ti,hwmods = "counter_32k";
+                };
+
                 omap5_pmx_core: pinmux@4a002840 {
                         compatible = "ti,omap4-padconf", "pinctrl-single";
                         reg = <0x4a002840 0x01b6>;
@@ -104,6 +110,8 @@
 
                 gpio1: gpio@4ae10000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x4ae10000 0x200>;
+                        interrupts = <0 29 0x4>;
                         ti,hwmods = "gpio1";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -113,6 +121,8 @@
 
                 gpio2: gpio@48055000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48055000 0x200>;
+                        interrupts = <0 30 0x4>;
                         ti,hwmods = "gpio2";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -122,6 +132,8 @@
 
                 gpio3: gpio@48057000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48057000 0x200>;
+                        interrupts = <0 31 0x4>;
                         ti,hwmods = "gpio3";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -131,6 +143,8 @@
 
                 gpio4: gpio@48059000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48059000 0x200>;
+                        interrupts = <0 32 0x4>;
                         ti,hwmods = "gpio4";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -140,6 +154,8 @@
 
                 gpio5: gpio@4805b000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x4805b000 0x200>;
+                        interrupts = <0 33 0x4>;
                         ti,hwmods = "gpio5";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -149,6 +165,8 @@
 
                 gpio6: gpio@4805d000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x4805d000 0x200>;
+                        interrupts = <0 34 0x4>;
                         ti,hwmods = "gpio6";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -158,6 +176,8 @@
 
                 gpio7: gpio@48051000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48051000 0x200>;
+                        interrupts = <0 35 0x4>;
                         ti,hwmods = "gpio7";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -167,6 +187,8 @@
 
                 gpio8: gpio@48053000 {
                         compatible = "ti,omap4-gpio";
+                        reg = <0x48053000 0x200>;
+                        interrupts = <0 121 0x4>;
                         ti,hwmods = "gpio8";
                         gpio-controller;
                         #gpio-cells = <2>;
@@ -176,6 +198,8 @@
 
                 i2c1: i2c@48070000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x48070000 0x100>;
+                        interrupts = <0 56 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c1";
@@ -183,6 +207,8 @@
 
                 i2c2: i2c@48072000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x48072000 0x100>;
+                        interrupts = <0 57 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c2";
@@ -190,20 +216,26 @@
 
                 i2c3: i2c@48060000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x48060000 0x100>;
+                        interrupts = <0 61 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c3";
                 };
 
-                i2c4: i2c@4807A000 {
+                i2c4: i2c@4807a000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x4807a000 0x100>;
+                        interrupts = <0 62 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c4";
                 };
 
-                i2c5: i2c@4807C000 {
+                i2c5: i2c@4807c000 {
                         compatible = "ti,omap4-i2c";
+                        reg = <0x4807c000 0x100>;
+                        interrupts = <0 60 0x4>;
                         #address-cells = <1>;
                         #size-cells = <0>;
                         ti,hwmods = "i2c5";
@@ -211,42 +243,56 @@
 
                 uart1: serial@4806a000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x4806a000 0x100>;
+                        interrupts = <0 72 0x4>;
                         ti,hwmods = "uart1";
                         clock-frequency = <48000000>;
                 };
 
                 uart2: serial@4806c000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x4806c000 0x100>;
+                        interrupts = <0 73 0x4>;
                         ti,hwmods = "uart2";
                         clock-frequency = <48000000>;
                 };
 
                 uart3: serial@48020000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x48020000 0x100>;
+                        interrupts = <0 74 0x4>;
                         ti,hwmods = "uart3";
                         clock-frequency = <48000000>;
                 };
 
                 uart4: serial@4806e000 {
                         compatible = "ti,omap4-uart";
+                        reg = <0x4806e000 0x100>;
+                        interrupts = <0 70 0x4>;
                         ti,hwmods = "uart4";
                         clock-frequency = <48000000>;
                 };
 
                 uart5: serial@48066000 {
-                        compatible = "ti,omap5-uart";
+                        compatible = "ti,omap4-uart";
+                        reg = <0x48066000 0x100>;
+                        interrupts = <0 105 0x4>;
                         ti,hwmods = "uart5";
                         clock-frequency = <48000000>;
                 };
 
                 uart6: serial@48068000 {
-                        compatible = "ti,omap6-uart";
+                        compatible = "ti,omap4-uart";
+                        reg = <0x48068000 0x100>;
+                        interrupts = <0 106 0x4>;
                         ti,hwmods = "uart6";
                         clock-frequency = <48000000>;
                 };
 
                 mmc1: mmc@4809c000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x4809c000 0x400>;
+                        interrupts = <0 83 0x4>;
                         ti,hwmods = "mmc1";
                         ti,dual-volt;
                         ti,needs-special-reset;
@@ -254,24 +300,32 @@
 
                 mmc2: mmc@480b4000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480b4000 0x400>;
+                        interrupts = <0 86 0x4>;
                         ti,hwmods = "mmc2";
                         ti,needs-special-reset;
                 };
 
                 mmc3: mmc@480ad000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480ad000 0x400>;
+                        interrupts = <0 94 0x4>;
                         ti,hwmods = "mmc3";
                         ti,needs-special-reset;
                 };
 
                 mmc4: mmc@480d1000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480d1000 0x400>;
+                        interrupts = <0 96 0x4>;
                         ti,hwmods = "mmc4";
                         ti,needs-special-reset;
                 };
 
                 mmc5: mmc@480d5000 {
                         compatible = "ti,omap4-hsmmc";
+                        reg = <0x480d5000 0x400>;
+                        interrupts = <0 59 0x4>;
                         ti,hwmods = "mmc5";
                         ti,needs-special-reset;
                 };
@@ -287,7 +341,6 @@
                               <0x49032000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 112 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "mcpdm";
                 };
 
@@ -297,7 +350,6 @@
                               <0x4902e000 0x7f>; /* L3 Interconnect */
                         reg-names = "mpu", "dma";
                         interrupts = <0 114 0x4>;
-                        interrupt-parent = <&gic>;
                         ti,hwmods = "dmic";
                 };
 
@@ -308,7 +360,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 17 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp1";
                 };
@@ -320,7 +371,6 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 22 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp2";
                 };
@@ -332,9 +382,119 @@
                         reg-names = "mpu", "dma";
                         interrupts = <0 23 0x4>;
                         interrupt-names = "common";
-                        interrupt-parent = <&gic>;
                         ti,buffer-size = <128>;
                         ti,hwmods = "mcbsp3";
                 };
+
+                timer1: timer@4ae18000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4ae18000 0x80>;
+                        interrupts = <0 37 0x4>;
+                        ti,hwmods = "timer1";
+                        ti,timer-alwon;
+                };
+
+                timer2: timer@48032000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48032000 0x80>;
+                        interrupts = <0 38 0x4>;
+                        ti,hwmods = "timer2";
+                };
+
+                timer3: timer@48034000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48034000 0x80>;
+                        interrupts = <0 39 0x4>;
+                        ti,hwmods = "timer3";
+                };
+
+                timer4: timer@48036000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48036000 0x80>;
+                        interrupts = <0 40 0x4>;
+                        ti,hwmods = "timer4";
+                };
+
+                timer5: timer@40138000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x40138000 0x80>,
+                              <0x49038000 0x80>;
+                        interrupts = <0 41 0x4>;
+                        ti,hwmods = "timer5";
+                        ti,timer-dsp;
+                };
+
+                timer6: timer@4013a000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013a000 0x80>,
+                              <0x4903a000 0x80>;
+                        interrupts = <0 42 0x4>;
+                        ti,hwmods = "timer6";
+                        ti,timer-dsp;
+                        ti,timer-pwm;
+                };
+
+                timer7: timer@4013c000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013c000 0x80>,
+                              <0x4903c000 0x80>;
+                        interrupts = <0 43 0x4>;
+                        ti,hwmods = "timer7";
+                        ti,timer-dsp;
+                };
+
+                timer8: timer@4013e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4013e000 0x80>,
+                              <0x4903e000 0x80>;
+                        interrupts = <0 44 0x4>;
+                        ti,hwmods = "timer8";
+                        ti,timer-dsp;
+                        ti,timer-pwm;
+                };
+
+                timer9: timer@4803e000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x4803e000 0x80>;
+                        interrupts = <0 45 0x4>;
+                        ti,hwmods = "timer9";
+                };
+
+                timer10: timer@48086000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48086000 0x80>;
+                        interrupts = <0 46 0x4>;
+                        ti,hwmods = "timer10";
+                };
+
+                timer11: timer@48088000 {
+                        compatible = "ti,omap2-timer";
+                        reg = <0x48088000 0x80>;
+                        interrupts = <0 47 0x4>;
+                        ti,hwmods = "timer11";
+                        ti,timer-pwm;
+                };
+
+                emif1: emif@0x4c000000 {
+                        compatible      = "ti,emif-4d5";
+                        ti,hwmods       = "emif1";
+                        phy-type        = <2>; /* DDR PHY type: Intelli PHY */
+                        reg = <0x4c000000 0x400>;
+                        interrupts = <0 110 0x4>;
+                        hw-caps-read-idle-ctrl;
+                        hw-caps-ll-interface;
+                        hw-caps-temp-alert;
+                };
+
+                emif2: emif@0x4d000000 {
+                        compatible      = "ti,emif-4d5";
+                        ti,hwmods       = "emif2";
+                        phy-type        = <2>; /* DDR PHY type: Intelli PHY */
+                        reg = <0x4d000000 0x400>;
+                        interrupts = <0 111 0x4>;
+                        hw-caps-read-idle-ctrl;
+                        hw-caps-ll-interface;
+                        hw-caps-temp-alert;
+                };
         };
 };
diff --git a/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi
new file mode 100644
index 000000000000..9657a5cbc3ad
--- /dev/null
+++ b/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi
@@ -0,0 +1,67 @@
+/*
+ * Timings and Geometry for Samsung K3PE0E000B memory part
+ */
+
+/ {
+        samsung_K3PE0E000B: lpddr2 {
+                compatible      = "Samsung,K3PE0E000B","jedec,lpddr2-s4";
+                density         = <4096>;
+                io-width        = <32>;
+
+                tRPab-min-tck   = <3>;
+                tRCD-min-tck    = <3>;
+                tWR-min-tck     = <3>;
+                tRASmin-min-tck = <3>;
+                tRRD-min-tck    = <2>;
+                tWTR-min-tck    = <2>;
+                tXP-min-tck     = <2>;
+                tRTP-min-tck    = <2>;
+                tCKE-min-tck    = <3>;
+                tCKESR-min-tck  = <3>;
+                tFAW-min-tck    = <8>;
+
+                timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 {
+                        compatible      = "jedec,lpddr2-timings";
+                        min-freq        = <10000000>;
+                        max-freq        = <533333333>;
+                        tRPab           = <21000>;
+                        tRCD            = <18000>;
+                        tWR             = <15000>;
+                        tRAS-min        = <42000>;
+                        tRRD            = <10000>;
+                        tWTR            = <7500>;
+                        tXP             = <7500>;
+                        tRTP            = <7500>;
+                        tCKESR          = <15000>;
+                        tDQSCK-max      = <5500>;
+                        tFAW            = <50000>;
+                        tZQCS           = <90000>;
+                        tZQCL           = <360000>;
+                        tZQinit         = <1000000>;
+                        tRAS-max-ns     = <70000>;
+                        tDQSCK-max-derated = <6000>;
+                };
+
+                timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 {
+                        compatible      = "jedec,lpddr2-timings";
+                        min-freq        = <10000000>;
+                        max-freq        = <266666666>;
+                        tRPab           = <21000>;
+                        tRCD            = <18000>;
+                        tWR             = <15000>;
+                        tRAS-min        = <42000>;
+                        tRRD            = <10000>;
+                        tWTR            = <7500>;
+                        tXP             = <7500>;
+                        tRTP            = <7500>;
+                        tCKESR          = <15000>;
+                        tDQSCK-max      = <5500>;
+                        tFAW            = <50000>;
+                        tZQCS           = <90000>;
+                        tZQCL           = <360000>;
+                        tZQinit         = <1000000>;
+                        tRAS-max-ns     = <70000>;
+                        tDQSCK-max-derated = <6000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index c3ef1ad26b6a..74b8a47adf91 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -297,131 +297,98 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo0";
+                                ldo0 {
                                         regulator-name = "vdd_ldo0,vddio_pex_clk";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out,vdd_cell";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index ddf287f52d49..6a93d1404c76 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -291,37 +291,26 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "+1.2vs_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "+1.0vs_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "+3.7vs_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
@@ -330,53 +319,41 @@
 
                                 /* LDO0 is not connected to anything */
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "+1.1vs_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "+1.2vs_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "+3.3vs_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "+2.85vs_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         /*
                                          * Research indicates this should be
                                          * 1.8v; other boards that use this
@@ -390,34 +367,26 @@
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "+3.3vs_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "+3.3vs_rtc";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index f0ba901676ac..33ae81358d8e 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -395,37 +395,26 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sm0,vdd_core";
                                         regulator-min-microvolt = <1300000>;
                                         regulator-max-microvolt = <1300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1125000>;
                                         regulator-max-microvolt = <1125000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
@@ -434,86 +423,66 @@
 
                                 /* LDO0 is not connected to anything */
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out,vdd_cell";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index f18cec9f6a77..5b3d8b157b33 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -271,97 +271,72 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sys_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sys_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sys_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo0";
+                                ldo0 {
                                         regulator-name = "vdd_ldo0,vddio_pex_clk";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac";
                                         /*
                                          * According to the Tegra 2 Automotive
@@ -373,25 +348,19 @@
                                         regulator-max-microvolt = <2850000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
                                         /*
                                          * According to the Tegra 2 Automotive
@@ -404,9 +373,7 @@
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 3e5952fcfbc5..86854f1abd58 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -311,37 +311,26 @@
                         vinldo9-supply = <&sm2_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                sys_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "sys";
+                                sys_reg: sys {
                                         regulator-name = "vdd_sys";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sm0";
+                                sm0 {
                                         regulator-name = "vdd_sm0,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sm1";
+                                sm1 {
                                         regulator-name = "vdd_sm1,vdd_cpu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                sm2_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sm2";
+                                sm2_reg: sm2 {
                                         regulator-name = "vdd_sm2,vin_ldo*";
                                         regulator-min-microvolt = <3700000>;
                                         regulator-max-microvolt = <3700000>;
@@ -350,86 +339,66 @@
 
                                 /* LDO0 is not connected to anything */
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "vdd_ldo1,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "vdd_ldo2,vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "vdd_ldo3,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "vdd_ldo5,vcore_mmc";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "vdd_ldo6,avdd_vdac";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
                                         regulator-min-microvolt = <2850000>;
                                         regulator-max-microvolt = <2850000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo_rtc";
+                                ldo_rtc {
                                         regulator-name = "vdd_rtc_out,vdd_cell";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index c636d002d6d8..94a71c91beb5 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -295,243 +295,182 @@
                         in20-supply = <&mbatt_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                mbatt_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "mbatt";
+                                mbatt_reg: mbatt {
                                         regulator-name = "vbat_pmu";
                                         regulator-always-on;
                                 };
 
-                                regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "sd1";
+                                sd1 {
                                         regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "sd2";
+                                sd2 {
                                         regulator-name = "nvvdd_sv2,vdd_core";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                nvvdd_sv3_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "sd3";
+                                nvvdd_sv3_reg: sd3 {
                                         regulator-name = "nvvdd_sv3";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo1";
+                                ldo1 {
                                         regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo2";
+                                ldo2 {
                                         regulator-name = "nvvdd_ldo2,avdd_pll*";
                                         regulator-min-microvolt = <1100000>;
                                         regulator-max-microvolt = <1100000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@6 {
-                                        reg = <6>;
-                                        regulator-compatible = "ldo3";
+                                ldo3 {
                                         regulator-name = "nvvdd_ldo3,vcom_1v8b";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo4";
+                                ldo4 {
                                         regulator-name = "nvvdd_ldo4,avdd_usb*";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo5";
+                                ldo5 {
                                         regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo6";
+                                ldo6 {
                                         regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo7";
+                                ldo7 {
                                         regulator-name = "nvvdd_ldo7,avddio_audio";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo8";
+                                ldo8 {
                                         regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
                                         regulator-min-microvolt = <3000000>;
                                         regulator-max-microvolt = <3000000>;
                                 };
 
-                                regulator@12 {
-                                        reg = <12>;
-                                        regulator-compatible = "ldo9";
+                                ldo9 {
                                         regulator-name = "nvvdd_ldo9,avdd_cam*";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@13 {
-                                        reg = <13>;
-                                        regulator-compatible = "ldo10";
+                                ldo10 {
                                         regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
                                         regulator-min-microvolt = <3000000>;
                                         regulator-max-microvolt = <3000000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@14 {
-                                        reg = <14>;
-                                        regulator-compatible = "ldo11";
+                                ldo11 {
                                         regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@15 {
-                                        reg = <15>;
-                                        regulator-compatible = "ldo12";
+                                ldo12 {
                                         regulator-name = "nvvdd_ldo12,vddio_sdio";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@16 {
-                                        reg = <16>;
-                                        regulator-compatible = "ldo13";
+                                ldo13 {
                                         regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@17 {
-                                        reg = <17>;
-                                        regulator-compatible = "ldo14";
+                                ldo14 {
                                         regulator-name = "nvvdd_ldo14,avdd_vdac";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@18 {
-                                        reg = <18>;
-                                        regulator-compatible = "ldo15";
+                                ldo15 {
                                         regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                 };
 
-                                regulator@19 {
-                                        reg = <19>;
-                                        regulator-compatible = "ldo16";
+                                ldo16 {
                                         regulator-name = "nvvdd_ldo16,vdd_dbrtr";
                                         regulator-min-microvolt = <1300000>;
                                         regulator-max-microvolt = <1300000>;
                                 };
 
-                                regulator@20 {
-                                        reg = <20>;
-                                        regulator-compatible = "ldo17";
+                                ldo17 {
                                         regulator-name = "nvvdd_ldo17,vddio_mipi";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                regulator@21 {
-                                        reg = <21>;
-                                        regulator-compatible = "ldo18";
+                                ldo18 {
                                         regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                 };
 
-                                regulator@22 {
-                                        reg = <22>;
-                                        regulator-compatible = "ldo19";
+                                ldo19 {
                                         regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
                                         regulator-min-microvolt = <2800000>;
                                         regulator-max-microvolt = <2800000>;
                                 };
 
-                                regulator@23 {
-                                        reg = <23>;
-                                        regulator-compatible = "ldo20";
+                                ldo20 {
                                         regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@24 {
-                                        reg = <24>;
-                                        regulator-compatible = "out5v";
+                                out5v {
                                         regulator-name = "usb0_vbus_reg";
                                 };
 
-                                regulator@25 {
-                                        reg = <25>;
-                                        regulator-compatible = "out33v";
+                                out33v {
                                         regulator-name = "pmu_out3v3";
                                 };
 
-                                regulator@26 {
-                                        reg = <26>;
-                                        regulator-compatible = "bbat";
+                                bbat {
                                         regulator-name = "pmu_bbat";
                                         regulator-min-microvolt = <2400000>;
                                         regulator-max-microvolt = <2400000>;
                                         regulator-always-on;
                                 };
 
-                                regulator@27 {
-                                        reg = <27>;
-                                        regulator-compatible = "sdby";
+                                sdby {
                                         regulator-name = "vdd_aon";
                                         regulator-always-on;
                                 };
 
-                                regulator@28 {
-                                        reg = <28>;
-                                        regulator-compatible = "vrtc";
+                                vrtc {
                                         regulator-name = "vrtc,pmu_vccadc";
                                         regulator-always-on;
                                 };
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index d10c9c5a3606..b1271a894327 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -171,56 +171,41 @@
                         vccio-supply = <&vdd_ac_bat_reg>;
 
                         regulators {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-
-                                vdd1_reg: regulator@0 {
-                                        reg = <0>;
-                                        regulator-compatible = "vdd1";
+                                vdd1_reg: vdd1 {
                                         regulator-name = "vddio_ddr_1v2";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                vdd2_reg: regulator@1 {
-                                        reg = <1>;
-                                        regulator-compatible = "vdd2";
+                                vdd2_reg: vdd2 {
                                         regulator-name = "vdd_1v5_gen";
                                         regulator-min-microvolt = <1500000>;
                                         regulator-max-microvolt = <1500000>;
                                         regulator-always-on;
                                 };
 
-                                vddctrl_reg: regulator@2 {
-                                        reg = <2>;
-                                        regulator-compatible = "vddctrl";
+                                vddctrl_reg: vddctrl {
                                         regulator-name = "vdd_cpu,vdd_sys";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
                                         regulator-always-on;
                                 };
 
-                                vio_reg: regulator@3 {
-                                        reg = <3>;
-                                        regulator-compatible = "vio";
+                                vio_reg: vio {
                                         regulator-name = "vdd_1v8_gen";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
                                         regulator-always-on;
                                 };
 
-                                ldo1_reg: regulator@4 {
-                                        reg = <4>;
-                                        regulator-compatible = "ldo1";
+                                ldo1_reg: ldo1 {
                                         regulator-name = "vdd_pexa,vdd_pexb";
                                         regulator-min-microvolt = <1050000>;
                                         regulator-max-microvolt = <1050000>;
                                 };
 
-                                ldo2_reg: regulator@5 {
-                                        reg = <5>;
-                                        regulator-compatible = "ldo2";
+                                ldo2_reg: ldo2 {
                                         regulator-name = "vdd_sata,avdd_plle";
                                         regulator-min-microvolt = <1050000>;
                                         regulator-max-microvolt = <1050000>;
@@ -228,44 +213,34 @@
 
                                 /* LDO3 is not connected to anything */
 
-                                ldo4_reg: regulator@7 {
-                                        reg = <7>;
-                                        regulator-compatible = "ldo4";
+                                ldo4_reg: ldo4 {
                                         regulator-name = "vdd_rtc";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                ldo5_reg: regulator@8 {
-                                        reg = <8>;
-                                        regulator-compatible = "ldo5";
+                                ldo5_reg: ldo5 {
                                         regulator-name = "vddio_sdmmc,avdd_vdac";
                                         regulator-min-microvolt = <3300000>;
                                         regulator-max-microvolt = <3300000>;
                                         regulator-always-on;
                                 };
 
-                                ldo6_reg: regulator@9 {
-                                        reg = <9>;
-                                        regulator-compatible = "ldo6";
+                                ldo6_reg: ldo6 {
                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                 };
 
-                                ldo7_reg: regulator@10 {
-                                        reg = <10>;
-                                        regulator-compatible = "ldo7";
+                                ldo7_reg: ldo7 {
                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                 };
 
-                                ldo8_reg: regulator@11 {
-                                        reg = <11>;
-                                        regulator-compatible = "ldo8";
+                                ldo8_reg: ldo8 {
                                         regulator-name = "vdd_ddr_hs";
                                         regulator-min-microvolt = <1000000>;
                                         regulator-max-microvolt = <1000000>;
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index ff000172c93c..63411b036932 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -37,6 +37,24 @@
                 regulator-max-microvolt = <3150000>;
         };
 
+        vusb1v5: regulator-vusb1v5 {
+                compatible = "ti,twl4030-vusb1v5";
+        };
+
+        vusb1v8: regulator-vusb1v8 {
+                compatible = "ti,twl4030-vusb1v8";
+        };
+
+        vusb3v1: regulator-vusb3v1 {
+                compatible = "ti,twl4030-vusb3v1";
+        };
+
+        vsim: regulator-vsim {
+                compatible = "ti,twl4030-vsim";
+                regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <3000000>;
+        };
+
         twl_gpio: gpio {
                 compatible = "ti,twl4030-gpio";
                 gpio-controller;
@@ -44,4 +62,13 @@
                 interrupt-controller;
                 #interrupt-cells = <1>;
         };
+
+        twl4030-usb {
+                compatible = "ti,twl4030-usb";
+                interrupts = <10>, <4>;
+                usb1v5-supply = <&vusb1v5>;
+                usb1v8-supply = <&vusb1v8>;
+                usb3v1-supply = <&vusb3v1>;
+                usb_mode = <1>;
+        };
 };
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 123e2c40218a..9996cfc5ee80 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -86,4 +86,9 @@
         clk32kg: regulator-clk32kg {
                 compatible = "ti,twl6030-clk32kg";
         };
+
+        twl_usb_comparator: usb-comparator {
+                compatible = "ti,twl6030-usb";
+                interrupts = <4>, <10>;
+        };
 };
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts
index 37ca192fb193..574bc044f572 100644
--- a/arch/arm/boot/dts/zynq-ep107.dts
+++ b/arch/arm/boot/dts/zynq-ep107.dts
@@ -36,16 +36,27 @@
                 ranges;
 
                 intc: interrupt-controller@f8f01000 {
+                        compatible = "arm,cortex-a9-gic";
+                        #interrupt-cells = <3>;
+                        #address-cells = <1>;
                         interrupt-controller;
-                        compatible = "arm,gic";
-                        reg = <0xF8F01000 0x1000>;
-                        #interrupt-cells = <2>;
+                        reg = <0xF8F01000 0x1000>,
+                              <0xF8F00100 0x100>;
+                };
+
+                L2: cache-controller {
+                        compatible = "arm,pl310-cache";
+                        reg = <0xF8F02000 0x1000>;
+                        arm,data-latency = <2 3 2>;
+                        arm,tag-latency = <2 3 2>;
+                        cache-unified;
+                        cache-level = <2>;
                 };
 
                 uart0: uart@e0000000 {
                         compatible = "xlnx,xuartps";
                         reg = <0xE0000000 0x1000>;
-                        interrupts = <59 0>;
+                        interrupts = <0 27 4>;
                         clock = <50000000>;
                 };
         };
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index 78ed575feb1a..f71302c3ac33 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_MXC=y
-CONFIG_ARCH_IMX_V4_V5=y
+CONFIG_ARCH_MULTI_V4T=y
+CONFIG_ARCH_MULTI_V5=y
+# CONFIG_ARCH_MULTI_V7 is not set
 CONFIG_ARCH_MX1ADS=y
 CONFIG_MACH_SCB9328=y
 CONFIG_MACH_APF9328=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 394ded624e37..44f117aab52c 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_MXC=y
+CONFIG_ARCH_MULTI_V6=y
+CONFIG_ARCH_MULTI_V7=y
 CONFIG_MACH_MX31LILLY=y
 CONFIG_MACH_MX31LITE=y
 CONFIG_MACH_PCM037=y
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 23004847bb05..8ea02ac3ec1a 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -211,13 +211,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
 extern void __init init_dma_coherent_pool_size(unsigned long size);
 
 /*
- * This can be called during boot to increase the size of the consistent
- * DMA region above it's default value of 2MB. It must be called before the
- * memory allocator is initialised, i.e. before any core_initcall.
- */
-static inline void init_consistent_dma_size(unsigned long size) { }
-
-/*
  * For SA-1111, IXP425, and ADI systems  the dma-mapping functions are "magic"
  * and utilize bounce buffers as needed to work around limited DMA windows.
  *
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/include/debug/imx.S
index 761e45f9456f..0b65d792f664 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/imx.S
@@ -10,27 +10,38 @@
  * published by the Free Software Foundation.
  *
  */
-#include <mach/hardware.h>
-
 #ifdef CONFIG_DEBUG_IMX1_UART
-#define UART_PADDR      MX1_UART1_BASE_ADDR
+#define UART_PADDR      0x00206000
 #elif defined (CONFIG_DEBUG_IMX25_UART)
-#define UART_PADDR      MX25_UART1_BASE_ADDR
+#define UART_PADDR      0x43f90000
 #elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
-#define UART_PADDR      MX2x_UART1_BASE_ADDR
+#define UART_PADDR      0x1000a000
 #elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
-#define UART_PADDR      MX3x_UART1_BASE_ADDR
+#define UART_PADDR      0x43f90000
 #elif defined (CONFIG_DEBUG_IMX51_UART)
-#define UART_PADDR      MX51_UART1_BASE_ADDR
+#define UART_PADDR      0x73fbc000
 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
-#define UART_PADDR      MX53_UART1_BASE_ADDR
+#define UART_PADDR      0x53fbc000
 #elif defined (CONFIG_DEBUG_IMX6Q_UART2)
-#define UART_PADDR      MX6Q_UART2_BASE_ADDR
+#define UART_PADDR      0x021e8000
 #elif defined (CONFIG_DEBUG_IMX6Q_UART4)
-#define UART_PADDR      MX6Q_UART4_BASE_ADDR
+#define UART_PADDR      0x021f0000
 #endif
 
-#define UART_VADDR      IMX_IO_ADDRESS(UART_PADDR)
+/*
+ * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to
+ * stay sync with that.  It's hard to maintain, and should be fixed
+ * globally for multi-platform build to use a fixed virtual address
+ * for low-level debug uart port across platforms.
+ */
+#define IMX_IO_P2V(x)   (                                               \
+                        (((x) & 0x80000000) >> 7) |                     \
+                        (0xf4000000 +                                   \
+                        (((x) & 0x50000000) >> 6) +                     \
+                        (((x) & 0x0b000000) >> 4) +                     \
+                        (((x) & 0x000fffff))))
+
+#define UART_VADDR      IMX_IO_P2V(UART_PADDR)
 
                 .macro  addruart, rp, rv, tmp
                 ldr     \rp, =UART_PADDR        @ physical
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 84af1b506d92..b7ae124c16e5 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -343,7 +343,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
 static void __init at91sam9g45_map_io(void)
 {
         at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
-        init_consistent_dma_size(SZ_4M);
 }
 
 static void __init at91sam9g45_ioremap_registers(void)
diff --git a/arch/arm/mach-at91/include/mach/atmel-mci.h b/arch/arm/mach-at91/include/mach/atmel-mci.h
index cd580a12e904..3069e4135573 100644
--- a/arch/arm/mach-at91/include/mach/atmel-mci.h
+++ b/arch/arm/mach-at91/include/mach/atmel-mci.h
@@ -14,11 +14,4 @@ struct mci_dma_data {
 #define slave_data_ptr(s)       (&(s)->sdata)
 #define find_slave_dev(s)       ((s)->sdata.dma_dev)
 
-#define setup_dma_addr(s, t, r) do {            \
-        if (s) {                                \
-                (s)->sdata.tx_reg = (t);        \
-                (s)->sdata.rx_reg = (r);        \
-        }                                       \
-} while (0)
-
 #endif /* __MACH_ATMEL_MCI_H */
diff --git a/arch/arm/mach-bcm2835/Makefile.boot b/arch/arm/mach-bcm2835/Makefile.boot
index 2d30e17f5b69..b3271754e9fd 100644
--- a/arch/arm/mach-bcm2835/Makefile.boot
+++ b/arch/arm/mach-bcm2835/Makefile.boot
@@ -1,3 +1 @@
-   zreladdr-y := 0x00008000
-params_phys-y := 0x00000100
-initrd_phys-y := 0x00800000
+zreladdr-y := 0x00008000
diff --git a/arch/arm/mach-bcm2835/bcm2835.c b/arch/arm/mach-bcm2835/bcm2835.c
index f6fea4933571..53e3842c9330 100644
--- a/arch/arm/mach-bcm2835/bcm2835.c
+++ b/arch/arm/mach-bcm2835/bcm2835.c
@@ -30,12 +30,12 @@ static struct map_desc io_map __initdata = {
         .type = MT_DEVICE
 };
 
-void __init bcm2835_map_io(void)
+static void __init bcm2835_map_io(void)
 {
         iotable_init(&io_map, 1);
 }
 
-void __init bcm2835_init(void)
+static void __init bcm2835_init(void)
 {
         int ret;
 
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 1dbf85beed1b..9211e8800c79 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -194,7 +194,7 @@ static int evm_led_setup(struct i2c_client *client, int gpio,
         while (ngpio--) {
                 leds->gpio = gpio++;
                 leds++;
-        };
+        }
 
         evm_led_dev = platform_device_alloc("leds-gpio", 0);
         platform_device_add_data(evm_led_dev, &evm_led_data,
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 64b0f65a8639..a794f6d9d444 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -87,8 +87,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
                 iotable_init(davinci_soc_info.io_desc,
                                 davinci_soc_info.io_desc_num);
 
-        init_consistent_dma_size(14 << 20);
-
         /*
          * Normally devicemaps_init() would flush caches and tlb after
          * mdesc->map_io(), but we must also do it here because of the CPU
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index f77b95336e2b..34509ffba221 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -42,14 +42,8 @@ static struct musb_hdrc_config musb_config = {
 };
 
 static struct musb_hdrc_platform_data usb_data = {
-#if defined(CONFIG_USB_MUSB_OTG)
         /* OTG requires a Mini-AB connector */
         .mode           = MUSB_OTG,
-#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
-        .mode           = MUSB_PERIPHERAL,
-#elif defined(CONFIG_USB_MUSB_HOST)
-        .mode           = MUSB_HOST,
-#endif
         .clock          = "usb",
         .config         = &musb_config,
 };
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 6a45c9a9abe9..fa8a13405c94 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -613,11 +613,6 @@ static struct clk exynos4_init_clocks_off[] = {
                 .ctrlbit        = (1 << 18),
         }, {
                 .name           = "iis",
-                .devname        = "samsung-i2s.0",
-                .enable         = exynos4_clk_ip_peril_ctrl,
-                .ctrlbit        = (1 << 19),
-        }, {
-                .name           = "iis",
                 .devname        = "samsung-i2s.1",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 20),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index c44ca1ee1b8d..4478757b9301 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -292,7 +292,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = {
         .nr_sources     = ARRAY_SIZE(exynos5_clk_src_mpll_list),
 };
 
-struct clksrc_clk exynos5_clk_mout_mpll = {
+static struct clksrc_clk exynos5_clk_mout_mpll = {
         .clk = {
                 .name           = "mout_mpll",
         },
@@ -467,12 +467,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = {
 
 /* Core list of CMU_TOP side */
 
-struct clk *exynos5_clkset_aclk_top_list[] = {
+static struct clk *exynos5_clkset_aclk_top_list[] = {
         [0] = &exynos5_clk_mout_mpll_user.clk,
         [1] = &exynos5_clk_mout_bpll_user.clk,
 };
 
-struct clksrc_sources exynos5_clkset_aclk = {
+static struct clksrc_sources exynos5_clkset_aclk = {
         .sources        = exynos5_clkset_aclk_top_list,
         .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_top_list),
 };
@@ -486,12 +486,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = {
         .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
 };
 
-struct clk *exynos5_clkset_aclk_333_166_list[] = {
+static struct clk *exynos5_clkset_aclk_333_166_list[] = {
         [0] = &exynos5_clk_mout_cpll.clk,
         [1] = &exynos5_clk_mout_mpll_user.clk,
 };
 
-struct clksrc_sources exynos5_clkset_aclk_333_166 = {
+static struct clksrc_sources exynos5_clkset_aclk_333_166 = {
         .sources        = exynos5_clkset_aclk_333_166_list,
         .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),
 };
@@ -966,7 +966,7 @@ static struct clk exynos5_clk_fimd1 = {
         .ctrlbit        = (1 << 0),
 };
 
-struct clk *exynos5_clkset_group_list[] = {
+static struct clk *exynos5_clkset_group_list[] = {
         [0] = &clk_ext_xtal_mux,
         [1] = NULL,
         [2] = &exynos5_clk_sclk_hdmi24m,
@@ -979,7 +979,7 @@ struct clk *exynos5_clkset_group_list[] = {
         [9] = &exynos5_clk_mout_cpll.clk,
 };
 
-struct clksrc_sources exynos5_clkset_group = {
+static struct clksrc_sources exynos5_clkset_group = {
         .sources        = exynos5_clkset_group_list,
         .nr_sources     = ARRAY_SIZE(exynos5_clkset_group_list),
 };
@@ -1195,7 +1195,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
         .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
 };
 
-struct clksrc_clk exynos5_clk_sclk_fimd1 = {
+static struct clksrc_clk exynos5_clk_sclk_fimd1 = {
         .clk    = {
                 .name           = "sclk_fimd",
                 .devname        = "exynos5-fb.1",
@@ -1476,7 +1476,7 @@ static void exynos5_clock_resume(void)
 #define exynos5_clock_resume NULL
 #endif
 
-struct syscore_ops exynos5_clock_syscore_ops = {
+static struct syscore_ops exynos5_clock_syscore_ops = {
         .suspend        = exynos5_clock_suspend,
         .resume         = exynos5_clock_resume,
 };
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 1947be8e5f5b..0dbee7fef9bd 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -63,7 +63,7 @@ static void exynos4_map_io(void);
 static void exynos5_map_io(void);
 static void exynos4_init_clocks(int xtal);
 static void exynos5_init_clocks(int xtal);
-static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 static int exynos_init(void);
 
 static struct cpu_table cpu_ids[] __initdata = {
@@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4210,
         }, {
@@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4212,
         }, {
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos_init_uarts,
+                .init_uarts     = exynos4_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4412,
         }, {
@@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS5_SOC_MASK,
                 .map_io         = exynos5_map_io,
                 .init_clocks    = exynos5_init_clocks,
-                .init_uarts     = exynos_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos5250,
         },
@@ -257,25 +256,10 @@ static struct map_desc exynos5_iodesc[] __initdata = {
                 .length         = SZ_64K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_COMBINER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
                 .virtual        = (unsigned long)S3C_VA_UART,
                 .pfn            = __phys_to_pfn(EXYNOS5_PA_UART),
                 .length         = SZ_512K,
                 .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_CPU),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_DIST),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
         },
 };
 
@@ -354,23 +338,6 @@ static void __init exynos4_map_io(void)
 static void __init exynos5_map_io(void)
 {
         iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
-
-        s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
-        s3c_device_i2c0.resource[0].end   = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
-        s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
-        s3c_device_i2c0.resource[1].end   = EXYNOS5_IRQ_IIC;
-
-        s3c_sdhci_setname(0, "exynos4-sdhci");
-        s3c_sdhci_setname(1, "exynos4-sdhci");
-        s3c_sdhci_setname(2, "exynos4-sdhci");
-        s3c_sdhci_setname(3, "exynos4-sdhci");
-
-        /* The I2C bus controllers are directly compatible with s3c2440 */
-        s3c_i2c0_setname("s3c2440-i2c");
-        s3c_i2c1_setname("s3c2440-i2c");
-        s3c_i2c2_setname("s3c2440-i2c");
-
-        s3c64xx_spi_setname("exynos4210-spi");
 }
 
 static void __init exynos4_init_clocks(int xtal)
@@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base,
 }
 
 #ifdef CONFIG_OF
-int __init combiner_of_init(struct device_node *np, struct device_node *parent)
+static int __init combiner_of_init(struct device_node *np,
+                                   struct device_node *parent)
 {
         void __iomem *combiner_base;
 
@@ -727,7 +695,7 @@ static int __init exynos_init(void)
 
 /* uart registration process */
 
-static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
         struct s3c2410_uartcfg *tcfg = cfg;
         u32 ucnt;
@@ -735,10 +703,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
         for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
                 tcfg->has_fracval = 1;
 
-        if (soc_is_exynos5250())
-                s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);
-        else
-                s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
+        s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
 }
 
 static void __iomem *exynos_eint_base;
@@ -970,14 +935,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
         struct irq_chip *chip = irq_get_chip(irq);
 
         chained_irq_enter(chip, desc);
-        chip->irq_mask(&desc->irq_data);
-
-        if (chip->irq_ack)
-                chip->irq_ack(&desc->irq_data);
-
         generic_handle_irq(*irq_data);
-
-        chip->irq_unmask(&desc->irq_data);
         chained_irq_exit(chip, desc);
 }
 
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index ae321c7cb15f..a1cb42c39590 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -14,9 +14,9 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
+#include <linux/platform_data/asoc-s3c.h>
 
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/asoc-s3c.h>
 
 #include <mach/map.h>
 #include <mach/dma.h>
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c
index 14ed7951a2c6..4244d02dafbd 100644
--- a/arch/arm/mach-exynos/dev-ohci.c
+++ b/arch/arm/mach-exynos/dev-ohci.c
@@ -12,10 +12,10 @@
 
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/usb-exynos.h>
 
 #include <mach/irqs.h>
 #include <mach/map.h>
-#include <linux/platform_data/usb-exynos.h>
 
 #include <plat/devs.h>
 #include <plat/usb-phy.h>
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
index 2e85c022fd16..7c42f4b7c8be 100644
--- a/arch/arm/mach-exynos/dev-uart.c
+++ b/arch/arm/mach-exynos/dev-uart.c
@@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
                 .nr_resources   = ARRAY_SIZE(exynos4_uart3_resource),
         },
 };
-
-EXYNOS_UART_RESOURCE(5, 0)
-EXYNOS_UART_RESOURCE(5, 1)
-EXYNOS_UART_RESOURCE(5, 2)
-EXYNOS_UART_RESOURCE(5, 3)
-
-struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
-        [0] = {
-                .resources      = exynos5_uart0_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
-        },
-        [1] = {
-                .resources      = exynos5_uart1_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
-        },
-        [2] = {
-                .resources      = exynos5_uart2_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart2_resource),
-        },
-        [3] = {
-                .resources      = exynos5_uart3_resource,
-                .nr_resources   = ARRAY_SIZE(exynos5_uart3_resource),
-        },
-};
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 35bced6f9092..6da31152de3a 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -259,11 +259,6 @@
 #define EXYNOS5_IRQ_IEM_IEC             IRQ_SPI(48)
 #define EXYNOS5_IRQ_IEM_APC             IRQ_SPI(49)
 #define EXYNOS5_IRQ_GPIO_C2C            IRQ_SPI(50)
-#define EXYNOS5_IRQ_UART0               IRQ_SPI(51)
-#define EXYNOS5_IRQ_UART1               IRQ_SPI(52)
-#define EXYNOS5_IRQ_UART2               IRQ_SPI(53)
-#define EXYNOS5_IRQ_UART3               IRQ_SPI(54)
-#define EXYNOS5_IRQ_UART4               IRQ_SPI(55)
 #define EXYNOS5_IRQ_IIC                 IRQ_SPI(56)
 #define EXYNOS5_IRQ_IIC1                IRQ_SPI(57)
 #define EXYNOS5_IRQ_IIC2                IRQ_SPI(58)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index ed4da4544cd2..872840b2ff45 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -280,7 +280,6 @@
 #define EXYNOS5_PA_UART1                0x12C10000
 #define EXYNOS5_PA_UART2                0x12C20000
 #define EXYNOS5_PA_UART3                0x12C30000
-#define EXYNOS5_SZ_UART                 SZ_256
 
 #define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index d4e392b811a3..70b2795f5283 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -230,8 +230,6 @@
 
 /* For EXYNOS5 */
 
-#define EXYNOS5_USB_CFG                                         S5P_PMUREG(0x0230)
-
 #define EXYNOS5_AUTO_WDTRESET_DISABLE                           S5P_PMUREG(0x0408)
 #define EXYNOS5_MASK_WDTRESET_REQUEST                           S5P_PMUREG(0x040C)
 
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index c05d7aa84031..69359a0c8a1c 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -25,7 +25,10 @@
 #include <linux/mmc/host.h>
 #include <linux/fb.h>
 #include <linux/pwm_backlight.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mipi-csis.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
 #include <drm/exynos_drm.h>
 
 #include <video/platform_lcd.h>
@@ -45,14 +48,11 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/mfc.h>
 #include <plat/fimc-core.h>
 #include <plat/camport.h>
-#include <linux/platform_data/mipi-csis.h>
 
 #include <mach/map.h>
 
@@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
                                 MMC_CAP_ERASE),
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
 
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 9adf491674ea..485ce6c477f9 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -23,7 +23,10 @@
 #include <linux/mfd/max8997.h>
 #include <linux/lcd.h>
 #include <linux/rfkill-gpio.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
+#include <linux/platform_data/usb-exynos.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -36,8 +39,6 @@
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
@@ -45,7 +46,6 @@
 #include <plat/mfc.h>
 #include <plat/hdmi.h>
 
-#include <linux/platform_data/usb-exynos.h>
 #include <mach/map.h>
 
 #include <drm/exynos_drm.h>
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 730f1ac65928..ddb92631252d 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -21,6 +21,7 @@
 #include <linux/pwm_backlight.h>
 #include <linux/regulator/machine.h>
 #include <linux/serial_core.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
 
 #include <asm/mach/arch.h>
@@ -34,7 +35,6 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/keypad.h>
 #include <plat/mfc.h>
 #include <plat/regs-serial.h>
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index ee4fb1a9cb72..8dd6a1e8030d 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -20,7 +20,10 @@
 #include <linux/input.h>
 #include <linux/pwm.h>
 #include <linux/pwm_backlight.h>
+#include <linux/platform_data/i2c-s3c2410.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/platform_data/usb-ehci-s5p.h>
+#include <linux/platform_data/usb-exynos.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
@@ -35,16 +38,13 @@
 #include <plat/fb.h>
 #include <plat/keypad.h>
 #include <plat/sdhci.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/gpio-cfg.h>
 #include <plat/backlight.h>
 #include <plat/mfc.h>
-#include <linux/platform_data/usb-ehci-s5p.h>
 #include <plat/clock.h>
 #include <plat/hdmi.h>
 
 #include <mach/map.h>
-#include <linux/platform_data/usb-exynos.h>
 
 #include <drm/exynos_drm.h>
 #include "common.h"
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index ebc9dd339a38..2d6bc83d5c99 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -23,6 +23,8 @@
 #include <linux/i2c-gpio.h>
 #include <linux/i2c/mcs.h>
 #include <linux/i2c/atmel_mxt_ts.h>
+#include <linux/platform_data/i2c-s3c2410.h>
+#include <linux/platform_data/mipi-csis.h>
 #include <linux/platform_data/s3c-hsotg.h>
 #include <drm/exynos_drm.h>
 
@@ -35,7 +37,6 @@
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
-#include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/gpio-cfg.h>
 #include <plat/fb.h>
 #include <plat/mfc.h>
@@ -43,7 +44,6 @@
 #include <plat/fimc-core.h>
 #include <plat/s5p-time.h>
 #include <plat/camport.h>
-#include <linux/platform_data/mipi-csis.h>
 
 #include <mach/map.h>
 
@@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
         .max_width              = 8,
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
 
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c
index 5c10ad05df74..134377352966 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/mach-imx/3ds_debugboard.c
@@ -21,7 +21,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
 
-#include <mach/hardware.h>
+#include "hardware.h"
 
 /* LAN9217 ethernet base address */
 #define LAN9217_BASE_ADDR(n)    (n + 0x0)
diff --git a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h b/arch/arm/mach-imx/3ds_debugboard.h
index 9fd6cb3f8fad..9fd6cb3f8fad 100644
--- a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h
+++ b/arch/arm/mach-imx/3ds_debugboard.h
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 8d276584650e..f1bf610e2900 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,3 +1,70 @@
+config ARCH_MXC
+        bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
+        select ARCH_REQUIRE_GPIOLIB
+        select ARM_PATCH_PHYS_VIRT
+        select AUTO_ZRELADDR if !ZBOOT_ROM
+        select CLKDEV_LOOKUP
+        select CLKSRC_MMIO
+        select GENERIC_CLOCKEVENTS
+        select GENERIC_IRQ_CHIP
+        select MULTI_IRQ_HANDLER
+        select SPARSE_IRQ
+        select USE_OF
+        help
+          Support for Freescale MXC/iMX-based family of processors
+
+menu "Freescale i.MX support"
+        depends on ARCH_MXC
+
+config MXC_IRQ_PRIOR
+        bool "Use IRQ priority"
+        help
+          Select this if you want to use prioritized IRQ handling.
+          This feature prevents higher priority ISR to be interrupted
+          by lower priority IRQ even IRQF_DISABLED flag is not set.
+          This may be useful in embedded applications, where are strong
+          requirements for timing.
+          Say N here, unless you have a specialized requirement.
+
+config MXC_TZIC
+        bool
+
+config MXC_AVIC
+        bool
+
+config MXC_DEBUG_BOARD
+        bool "Enable MXC debug board(for 3-stack)"
+        help
+          The debug board is an integral part of the MXC 3-stack(PDK)
+          platforms, it can be attached or removed from the peripheral
+          board. On debug board, several debug devices(ethernet, UART,
+          buttons, LEDs and JTAG) are implemented. Between the MCU and
+          these devices, a CPLD is added as a bridge which performs
+          data/address de-multiplexing and decode, signal level shift,
+          interrupt control and various board functions.
+
+config HAVE_EPIT
+        bool
+
+config MXC_USE_EPIT
+        bool "Use EPIT instead of GPT"
+        depends on HAVE_EPIT
+        help
+          Use EPIT as the system timer on systems that have it. Normally you
+          don't have a reason to do so as the EPIT has the same features and
+          uses the same clocks as the GPT. Anyway, on some systems the GPT
+          may be in use for other purposes.
+
+config MXC_ULPI
+        bool
+
+config ARCH_HAS_RNGA
+        bool
+
+config IRAM_ALLOC
+        bool
+        select GENERIC_ALLOCATOR
+
 config HAVE_IMX_GPC
         bool
 
@@ -5,6 +72,12 @@ config HAVE_IMX_MMDC
         bool
 
 config HAVE_IMX_SRC
+        def_bool y if SMP
+
+config IMX_HAVE_IOMUX_V1
+        bool
+
+config ARCH_MXC_IOMUX_V3
         bool
 
 config ARCH_MX1
@@ -104,7 +177,7 @@ config	SOC_IMX51
         select PINCTRL_IMX51
         select SOC_IMX5
 
-if ARCH_IMX_V4_V5
+if ARCH_MULTI_V4T
 
 comment "MX1 platforms:"
 config MACH_MXLADS
@@ -133,6 +206,10 @@ config MACH_APF9328
         help
           Say Yes here if you are using the Armadeus APF9328 development board
 
+endif
+
+if ARCH_MULTI_V5
+
 comment "MX21 platforms:"
 
 config MACH_MX21ADS
@@ -384,7 +461,7 @@ config MACH_IMX27_DT
 
 endif
 
-if ARCH_IMX_V6_V7
+if ARCH_MULTI_V6
 
 comment "MX31 platforms:"
 
@@ -649,6 +726,10 @@ config MACH_VPR200
           Include support for VPR200 platform. This includes specific
           configurations for the board and its peripherals.
 
+endif
+
+if ARCH_MULTI_V7
+
 comment "i.MX5 platforms:"
 
 config MACH_MX50_RDP
@@ -756,7 +837,6 @@ config SOC_IMX6Q
         select HAVE_CAN_FLEXCAN if CAN
         select HAVE_IMX_GPC
         select HAVE_IMX_MMDC
-        select HAVE_IMX_SRC
         select HAVE_SMP
         select MFD_SYSCON
         select PINCTRL
@@ -766,3 +846,7 @@ config SOC_IMX6Q
           This enables support for Freescale i.MX6 Quad processor.
 
 endif
+
+source "arch/arm/mach-imx/devices/Kconfig"
+
+endmenu
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 895754aeb4f3..fe47b71469c9 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,3 +1,5 @@
+obj-y := time.o cpu.o system.o irq-common.o
+
 obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o
 obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o
 
@@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i
 obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
                             clk-pfd.o clk-busy.o clk.o
 
+obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
+obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
+
+obj-$(CONFIG_MXC_TZIC) += tzic.o
+obj-$(CONFIG_MXC_AVIC) += avic.o
+
+obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
+obj-$(CONFIG_MXC_ULPI) += ulpi.o
+obj-$(CONFIG_MXC_USE_EPIT) += epit.o
+obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
+obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
+obj-$(CONFIG_CPU_IDLE) += cpuidle.o
+
+ifdef CONFIG_SND_IMX_SOC
+obj-y += ssi-fiq.o
+obj-y += ssi-fiq-ksym.o
+endif
+
 # Support for CMOS sensor interface
 obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
 
@@ -89,3 +109,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
 
 obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
 obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
+
+obj-y += devices/
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/mach-imx/avic.c
index cbd55c36def3..0eff23ed92b9 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/mach-imx/avic.c
@@ -22,12 +22,11 @@
 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/of.h>
-#include <mach/common.h>
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
 
+#include "common.h"
+#include "hardware.h"
 #include "irq-common.h"
 
 #define AVIC_INTCNTL            0x00    /* int control reg */
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h b/arch/arm/mach-imx/board-mx31lilly.h
index 0df71bfefbb1..0df71bfefbb1 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h
+++ b/arch/arm/mach-imx/board-mx31lilly.h
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/mach-imx/board-mx31lite.h
index c1ad0ae807cc..c1ad0ae807cc 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h
+++ b/arch/arm/mach-imx/board-mx31lite.h
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/mach-imx/board-mx31moboard.h
index de14543891cf..de14543891cf 100644
--- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h
+++ b/arch/arm/mach-imx/board-mx31moboard.h
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm038.h b/arch/arm/mach-imx/board-pcm038.h
index 6f371e35753d..6f371e35753d 100644
--- a/arch/arm/plat-mxc/include/mach/board-pcm038.h
+++ b/arch/arm/mach-imx/board-pcm038.h
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 516ddee1948e..15f9d223cf0b 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -22,9 +22,9 @@
 #include <linux/clkdev.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 /* CCM register addresses */
 #define IO_ADDR_CCM(off)        (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
@@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref)
                         pr_err("imx1 clk %d: register failed with %ld\n",
                                 i, PTR_ERR(clk[i]));
 
-        clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma");
+        clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma");
+        clk_register_clkdev(clk[hclk], "ipg", "imx1-dma");
         clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");
         clk_register_clkdev(clk[mma_gate], "mma", NULL);
         clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");
@@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");
         clk_register_clkdev(clk[per1], "per", "imx1-uart.2");
         clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");
-        clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0");
+        clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0");
         clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");
         clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");
         clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");
         clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");
         clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");
-        clk_register_clkdev(clk[per2], "per", "imx-fb.0");
-        clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0");
+        clk_register_clkdev(clk[per2], "per", "imx1-fb.0");
+        clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0");
+        clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0");
         clk_register_clkdev(clk[hclk], "mshc", NULL);
         clk_register_clkdev(clk[per3], "ssi", NULL);
-        clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
+        clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0");
         clk_register_clkdev(clk[clko], "clko", NULL);
 
         mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index cf65148bc519..d7ed66091a2a 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -25,9 +25,9 @@
 #include <linux/module.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 #define IO_ADDR_CCM(off)        (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
 
@@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
         clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1");
         clk_register_clkdev(clk[per2], "per", "imx21-cspi.2");
         clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2");
-        clk_register_clkdev(clk[per3], "per", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0");
+        clk_register_clkdev(clk[per3], "per", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0");
         clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0");
         clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0");
-        clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0");
-        clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma");
-        clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma");
+        clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0");
+        clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma");
+        clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma");
         clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0");
+        clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0");
         clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad");
         clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
         clk_register_clkdev(clk[brom_gate], "brom", NULL);
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index 01e2f843bf2e..bc885801cd68 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -24,10 +24,10 @@
 #include <linux/clkdev.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
+#include "mx25.h"
 
 #define CRM_BASE        MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
 
@@ -197,7 +197,7 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
-        clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
         /* i.mx25 has the i.mx35 type cspi */
         clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
         clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
@@ -212,15 +212,15 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");
         clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
         clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
-        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1");
-        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1");
+        clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");
         clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");
         clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");
-        clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0");
         clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
         clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
@@ -230,9 +230,9 @@ int __init mx25_clocks_init(void)
         clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");
         clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");
         clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");
-        clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0");
-        clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0");
-        clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0");
+        clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0");
+        clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0");
+        clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0");
         clk_register_clkdev(clk[dummy], "audmux", NULL);
         clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");
         clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 366e5d59d886..585ab256c58f 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -6,9 +6,9 @@
 #include <linux/clk-provider.h>
 #include <linux/of.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 #define IO_ADDR_CCM(off)        (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
 
@@ -211,19 +211,19 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");
         clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");
         clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0");
-        clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0");
-        clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0");
-        clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1");
-        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1");
-        clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2");
-        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2");
+        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0");
+        clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0");
+        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1");
+        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
+        clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
+        clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
         clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
         clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
         clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
-        clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
-        clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
-        clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
+        clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
+        clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
+        clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
         clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
@@ -238,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
         clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
-        clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0");
         clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
         clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
-        clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma");
-        clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma");
+        clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma");
+        clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma");
         clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");
         clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0");
         clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
+        clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1");
         clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
         clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
-        clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
-        clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
+        clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0");
+        clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
         clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
         clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
         clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
         clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
         clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
         clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
-        clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc");
+        clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
         clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
         clk_register_clkdev(clk[cpu_div], "cpu", NULL);
         clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 1253af2d9971..8be64e0a4ace 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -22,12 +22,11 @@
 #include <linux/err.h>
 #include <linux/of.h>
 
-#include <mach/hardware.h>
-#include <mach/mx31.h>
-#include <mach/common.h>
-
 #include "clk.h"
+#include "common.h"
 #include "crmregs-imx3.h"
+#include "hardware.h"
+#include "mx31.h"
 
 static const char *mcu_main_sel[] = { "spll", "mpll", };
 static const char *per_sel[] = { "per_div", "ipg", };
@@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");
         clk_register_clkdev(clk[pwm_gate], "pwm", NULL);
         clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc");
+        clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc");
         clk_register_clkdev(clk[epit1_gate], "epit", NULL);
         clk_register_clkdev(clk[epit2_gate], "epit", NULL);
-        clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0");
         clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
         clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
         clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
@@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref)
         clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");
         clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");
         clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");
-        clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
-        clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
+        clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
-        clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
-        clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
+        clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0");
+        clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1");
         clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
         clk_register_clkdev(clk[firi_gate], "firi", NULL);
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 177259b523cd..66f3d65ea275 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -14,11 +14,10 @@
 #include <linux/of.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-
 #include "crmregs-imx3.h"
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 struct arm_ahb_div {
         unsigned char arm, ahb, sel;
@@ -226,9 +225,9 @@ int __init mx35_clocks_init()
         clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
         clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
         clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
-        clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
-        clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
+        clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
         clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
         clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
@@ -256,7 +255,7 @@ int __init mx35_clocks_init()
         clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
         clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");
+        clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
         clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
 
         clk_prepare_enable(clk[spba_gate]);
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index a0bf84803eac..abb71f6b4d60 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -14,11 +14,10 @@
 #include <linux/of.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-
 #include "crm-regs-imx5.h"
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 /* Low-power Audio Playback Mode clock */
 static const char *lp_apm_sel[] = { "osc", };
@@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2");
         clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");
         clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");
-        clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
-        clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
+        clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
+        clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
         clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0");
         clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0");
         clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0");
@@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
         clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
         clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
         clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
-        clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
+        clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
         clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
         clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
         clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
@@ -345,7 +344,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 
         mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
 
-        clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);
         clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");
         clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
@@ -440,7 +439,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
         mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
 
         clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
-        clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
+        clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
         clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
         clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu");
         clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu");
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 3ec242f3341e..e5a82bb95b52 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -19,8 +19,9 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
-#include <mach/common.h>
+
 #include "clk.h"
+#include "common.h"
 
 #define CCGR0                           0x68
 #define CCGR1                           0x6c
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
index 02be73178912..abff350ba24c 100644
--- a/arch/arm/mach-imx/clk-pllv1.c
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -4,10 +4,10 @@
 #include <linux/slab.h>
 #include <linux/kernel.h>
 #include <linux/err.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 
 #include "clk.h"
+#include "common.h"
+#include "hardware.h"
 
 /**
  * pll v1
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/mach-imx/common.h
index ead901814c0d..ef8db6b34841 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -79,6 +79,7 @@ extern void mxc_arch_reset_init(void __iomem *);
 extern int mx53_revision(void);
 extern int mx53_display_revision(void);
 extern void imx_set_aips(void __iomem *);
+extern int mxc_device_init(void);
 
 enum mxc_cpu_pwr_mode {
         WAIT_CLOCKED,           /* wfi only */
diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c
index 6914bcbf84e4..96ec64b5ff7d 100644
--- a/arch/arm/mach-imx/cpu-imx25.c
+++ b/arch/arm/mach-imx/cpu-imx25.c
@@ -11,8 +11,9 @@
  */
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
+
+#include "iim.h"
+#include "hardware.h"
 
 static int mx25_cpu_rev = -1;
 
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c
index ff38e1505f67..fe8d36f7e30e 100644
--- a/arch/arm/mach-imx/cpu-imx27.c
+++ b/arch/arm/mach-imx/cpu-imx27.c
@@ -24,7 +24,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 
-#include <mach/hardware.h>
+#include "hardware.h"
 
 static int mx27_cpu_rev = -1;
 static int mx27_cpu_partnumber;
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c
index 3f2345f0cdaf..fde1860a2521 100644
--- a/arch/arm/mach-imx/cpu-imx31.c
+++ b/arch/arm/mach-imx/cpu-imx31.c
@@ -11,9 +11,10 @@
 
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
+#include "iim.h"
 
 static int mx31_cpu_rev = -1;
 
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
index 846e46eb8cbf..ec3aaa098c17 100644
--- a/arch/arm/mach-imx/cpu-imx35.c
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -10,8 +10,9 @@
  */
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/iim.h>
+
+#include "hardware.h"
+#include "iim.h"
 
 static int mx35_cpu_rev = -1;
 
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index 8eb15a2fcaf9..d88760014ff9 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -15,9 +15,10 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <mach/hardware.h>
 #include <linux/io.h>
 
+#include "hardware.h"
+
 static int mx5_cpu_rev = -1;
 
 #define IIM_SREV 0x24
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/mach-imx/cpu.c
index 220dd6f93126..03fcbd082593 100644
--- a/arch/arm/plat-mxc/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -1,7 +1,8 @@
 
 #include <linux/module.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
 
 unsigned int __mxc_cpu_type;
 EXPORT_SYMBOL(__mxc_cpu_type);
diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c
index 7b92cd6da6d3..b9ef692b61a2 100644
--- a/arch/arm/mach-imx/cpu_op-mx51.c
+++ b/arch/arm/mach-imx/cpu_op-mx51.c
@@ -13,9 +13,10 @@
 
 #include <linux/bug.h>
 #include <linux/types.h>
-#include <mach/hardware.h>
 #include <linux/kernel.h>
 
+#include "hardware.h"
+
 static struct cpu_op mx51_cpu_op[] = {
         {
         .cpu_rate = 160000000,},
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index b5b6f8083130..36e8b3994470 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -22,7 +22,8 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/slab.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
 
 #define CLK32_FREQ      32768
 #define NANOSECOND      (1000 * 1000 * 1000)
diff --git a/arch/arm/plat-mxc/cpuidle.c b/arch/arm/mach-imx/cpuidle.c
index d4cb511a44a8..d4cb511a44a8 100644
--- a/arch/arm/plat-mxc/cpuidle.c
+++ b/arch/arm/mach-imx/cpuidle.c
diff --git a/arch/arm/plat-mxc/include/mach/cpuidle.h b/arch/arm/mach-imx/cpuidle.h
index bc932d1af372..bc932d1af372 100644
--- a/arch/arm/plat-mxc/include/mach/cpuidle.h
+++ b/arch/arm/mach-imx/cpuidle.h
diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h
index 3aad1e70de96..f9b5afc6bcd1 100644
--- a/arch/arm/mach-imx/devices-imx1.h
+++ b/arch/arm/mach-imx/devices-imx1.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx1.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_imx_fb_data imx1_imx_fb_data;
 #define imx1_add_imx_fb(pdata) \
diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h
index 93ece55f75df..bd9393280159 100644
--- a/arch/arm/mach-imx/devices-imx21.h
+++ b/arch/arm/mach-imx/devices-imx21.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx21.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data;
 #define imx21_add_imx21_hcd(pdata)      \
diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h
index f8e03dd1f116..0d2922bc575c 100644
--- a/arch/arm/mach-imx/devices-imx25.h
+++ b/arch/arm/mach-imx/devices-imx25.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx25.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx25_fec_data;
 #define imx25_add_fec(pdata)    \
diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h
index 04822932cdd1..8a1ad7972d4c 100644
--- a/arch/arm/mach-imx/devices-imx27.h
+++ b/arch/arm/mach-imx/devices-imx27.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx27.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx27_fec_data;
 #define imx27_add_fec(pdata)    \
diff --git a/arch/arm/mach-imx/devices-imx31.h b/arch/arm/mach-imx/devices-imx31.h
index 8b2ceb45bb83..e8d1611bbc8e 100644
--- a/arch/arm/mach-imx/devices-imx31.h
+++ b/arch/arm/mach-imx/devices-imx31.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx31.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data;
 #define imx31_add_fsl_usb2_udc(pdata)   \
diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h
index c3e9f206ac2b..e2675f1b141c 100644
--- a/arch/arm/mach-imx/devices-imx35.h
+++ b/arch/arm/mach-imx/devices-imx35.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx35.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx35_fec_data;
 #define imx35_add_fec(pdata)    \
diff --git a/arch/arm/mach-imx/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h
index 7216667eaafc..2c290391f298 100644
--- a/arch/arm/mach-imx/devices-imx50.h
+++ b/arch/arm/mach-imx/devices-imx50.h
@@ -18,8 +18,7 @@
  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
-#include <mach/mx50.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[];
 #define imx50_add_imx_uart(id, pdata)   \
diff --git a/arch/arm/mach-imx/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h
index 9f1718725195..deee5baee88c 100644
--- a/arch/arm/mach-imx/devices-imx51.h
+++ b/arch/arm/mach-imx/devices-imx51.h
@@ -6,8 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/mx51.h>
-#include <mach/devices-common.h>
+#include "devices/devices-common.h"
 
 extern const struct imx_fec_data imx51_fec_data;
 #define imx51_add_fec(pdata)    \
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
index a35d9841f494..a35d9841f494 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/mach-imx/devices/Makefile
index 76f3195475d0..2abe2a5144d0 100644
--- a/arch/arm/plat-mxc/devices/Makefile
+++ b/arch/arm/mach-imx/devices/Makefile
@@ -1,3 +1,5 @@
+obj-y := devices.o
+
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
 obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h
index eaf79d220c9a..e4b790b9e2aa 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/mach-imx/devices/devices-common.h
@@ -108,6 +108,7 @@ struct platform_device *__init imx_add_imxdi_rtc(
 
 #include <linux/platform_data/video-imxfb.h>
 struct imx_imx_fb_data {
+        const char *devid;
         resource_size_t iobase;
         resource_size_t iosize;
         resource_size_t irq;
@@ -118,6 +119,7 @@ struct platform_device *__init imx_add_imx_fb(
 
 #include <linux/platform_data/i2c-imx.h>
 struct imx_imx_i2c_data {
+        const char *devid;
         int id;
         resource_size_t iobase;
         resource_size_t iosize;
@@ -219,6 +221,7 @@ struct platform_device *__init imx_add_mx1_camera(
 
 #include <linux/platform_data/camera-mx2.h>
 struct imx_mx2_camera_data {
+        const char *devid;
         resource_size_t iobasecsi;
         resource_size_t iosizecsi;
         resource_size_t irqcsi;
@@ -244,6 +247,7 @@ struct platform_device *__init imx_add_mxc_ehci(
 
 #include <linux/platform_data/mmc-mxcmmc.h>
 struct imx_mxc_mmc_data {
+        const char *devid;
         int id;
         resource_size_t iobase;
         resource_size_t iosize;
@@ -256,6 +260,7 @@ struct platform_device *__init imx_add_mxc_mmc(
 
 #include <linux/platform_data/mtd-mxc_nand.h>
 struct imx_mxc_nand_data {
+        const char *devid;
         /*
          * id is traditionally 0, but -1 is more appropriate.  We use -1 for new
          * machines but don't change existing devices as the nand device usually
@@ -290,6 +295,7 @@ struct platform_device *__init imx_add_mxc_pwm(
 
 /* mxc_rtc */
 struct imx_mxc_rtc_data {
+        const char *devid;
         resource_size_t iobase;
         resource_size_t irq;
 };
@@ -326,7 +332,8 @@ struct platform_device *__init imx_add_spi_imx(
                 const struct imx_spi_imx_data *data,
                 const struct spi_imx_master *pdata);
 
-struct platform_device *imx_add_imx_dma(void);
+struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
+                                        int irq, int irq_err);
 struct platform_device *imx_add_imx_sdma(char *name,
         resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
 
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/mach-imx/devices/devices.c
index 4d55a7a26e98..1b37482407f9 100644
--- a/arch/arm/plat-mxc/devices.c
+++ b/arch/arm/mach-imx/devices/devices.c
@@ -21,7 +21,6 @@
 #include <linux/init.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
-#include <mach/common.h>
 
 struct device mxc_aips_bus = {
         .init_name      = "mxc_aips",
@@ -33,7 +32,7 @@ struct device mxc_ahb_bus = {
         .parent         = &platform_bus,
 };
 
-static int __init mxc_device_init(void)
+int __init mxc_device_init(void)
 {
         int ret;
 
@@ -46,4 +45,3 @@ static int __init mxc_device_init(void)
 done:
         return ret;
 }
-core_initcall(mxc_device_init);
diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/mach-imx/devices/platform-ahci-imx.c
index ade4a1c4e2a3..3d87dd9c284a 100644
--- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c
+++ b/arch/arm/mach-imx/devices/platform-ahci-imx.c
@@ -24,8 +24,9 @@
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_ahci_imx_data_entry_single(soc, _devid)             \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/mach-imx/devices/platform-fec.c
index 0bae44e890db..2cb188ad9a0a 100644
--- a/arch/arm/plat-mxc/devices/platform-fec.c
+++ b/arch/arm/mach-imx/devices/platform-fec.c
@@ -8,8 +8,9 @@
  */
 #include <linux/dma-mapping.h>
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_fec_data_entry_single(soc, _devid)                          \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/mach-imx/devices/platform-flexcan.c
index 4e8497af2eb1..1078bf0a94ef 100644
--- a/arch/arm/plat-mxc/devices/platform-flexcan.c
+++ b/arch/arm/mach-imx/devices/platform-flexcan.c
@@ -5,8 +5,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size)           \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
index 848038f301fd..37e44398197b 100644
--- a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c
+++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_fsl_usb2_udc_data_entry_single(soc)                         \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/mach-imx/devices/platform-gpio-mxc.c
index a7919a241032..26483fa94b75 100644
--- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c
+++ b/arch/arm/mach-imx/devices/platform-gpio-mxc.c
@@ -6,7 +6,7 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/devices-common.h>
+#include "devices-common.h"
 
 struct platform_device *__init mxc_register_gpio(char *name, int id,
         resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
diff --git a/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/arch/arm/mach-imx/devices/platform-gpio_keys.c
index 1c53a532ea0e..486282539c76 100644
--- a/arch/arm/plat-mxc/devices/platform-gpio_keys.c
+++ b/arch/arm/mach-imx/devices/platform-gpio_keys.c
@@ -16,8 +16,9 @@
  * Boston, MA  02110-1301, USA.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 struct platform_device *__init imx_add_gpio_keys(
                 const struct gpio_keys_platform_data *pdata)
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/mach-imx/devices/platform-imx-dma.c
index 7fa7e9c92468..ccdb5dc4ddbd 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-dma.c
+++ b/arch/arm/mach-imx/devices/platform-imx-dma.c
@@ -6,12 +6,29 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/devices-common.h>
+#include "devices-common.h"
 
-struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
+struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
+        resource_size_t iobase, int irq, int irq_err)
 {
+        struct resource res[] = {
+                {
+                        .start = iobase,
+                        .end = iobase + SZ_4K - 1,
+                        .flags = IORESOURCE_MEM,
+                }, {
+                        .start = irq,
+                        .end = irq,
+                        .flags = IORESOURCE_IRQ,
+                }, {
+                        .start = irq_err,
+                        .end = irq_err,
+                        .flags = IORESOURCE_IRQ,
+                },
+        };
+
         return platform_device_register_resndata(&mxc_ahb_bus,
-                        "imx-dma", -1, NULL, 0, NULL, 0);
+                        name, -1, res, ARRAY_SIZE(res), NULL, 0);
 }
 
 struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/mach-imx/devices/platform-imx-fb.c
index 2b0b5e0aa998..10b0ed39f07f 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-fb.c
+++ b/arch/arm/mach-imx/devices/platform-imx-fb.c
@@ -7,11 +7,13 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 
-#define imx_imx_fb_data_entry_single(soc, _size)                        \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_imx_fb_data_entry_single(soc, _devid, _size)                \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobase = soc ## _LCDC_BASE_ADDR,                       \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_LCDC,                                \
@@ -19,22 +21,22 @@
 
 #ifdef CONFIG_SOC_IMX1
 const struct imx_imx_fb_data imx1_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX1, SZ_4K);
+        imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX1 */
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX21, SZ_4K);
+        imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX21 */
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_imx_fb_data imx25_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX25, SZ_16K);
+        imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K);
 #endif /* ifdef CONFIG_SOC_IMX25 */
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
-        imx_imx_fb_data_entry_single(MX27, SZ_4K);
+        imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX27 */
 
 struct platform_device *__init imx_add_imx_fb(
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/mach-imx/devices/platform-imx-i2c.c
index 19ad580c0be3..8e30e5703cd2 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c
+++ b/arch/arm/mach-imx/devices/platform-imx-i2c.c
@@ -6,34 +6,35 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
-#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size)           \
+#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)   \
         {                                                               \
+                .devid = _devid,                                        \
                 .id = _id,                                              \
                 .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR,           \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_I2C ## _hwid,                        \
         }
 
-#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size)                  \
-        [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size)
+#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size)          \
+        [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
 
 #ifdef CONFIG_SOC_IMX1
 const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst =
-        imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K);
+        imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX1 */
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
-        imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K);
+        imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX21 */
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
 #define imx25_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K)
+        imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K)
         imx25_imx_i2c_data_entry(0, 1),
         imx25_imx_i2c_data_entry(1, 2),
         imx25_imx_i2c_data_entry(2, 3),
@@ -43,7 +44,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX27
 const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
 #define imx27_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
         imx27_imx_i2c_data_entry(0, 1),
         imx27_imx_i2c_data_entry(1, 2),
 };
@@ -52,7 +53,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX31
 const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
 #define imx31_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
         imx31_imx_i2c_data_entry(0, 1),
         imx31_imx_i2c_data_entry(1, 2),
         imx31_imx_i2c_data_entry(2, 3),
@@ -62,7 +63,7 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX35
 const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
 #define imx35_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
         imx35_imx_i2c_data_entry(0, 1),
         imx35_imx_i2c_data_entry(1, 2),
         imx35_imx_i2c_data_entry(2, 3),
@@ -72,7 +73,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX50
 const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
 #define imx50_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K)
         imx50_imx_i2c_data_entry(0, 1),
         imx50_imx_i2c_data_entry(1, 2),
         imx50_imx_i2c_data_entry(2, 3),
@@ -82,10 +83,11 @@ const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX51
 const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
 #define imx51_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K)
         imx51_imx_i2c_data_entry(0, 1),
         imx51_imx_i2c_data_entry(1, 2),
         {
+                .devid = "imx21-i2c",
                 .id = 2,
                 .iobase = MX51_HSI2C_DMA_BASE_ADDR,
                 .iosize = SZ_16K,
@@ -97,7 +99,7 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX53
 const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = {
 #define imx53_imx_i2c_data_entry(_id, _hwid)                            \
-        imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K)
+        imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K)
         imx53_imx_i2c_data_entry(0, 1),
         imx53_imx_i2c_data_entry(1, 2),
         imx53_imx_i2c_data_entry(2, 3),
@@ -120,7 +122,7 @@ struct platform_device *__init imx_add_imx_i2c(
                 },
         };
 
-        return imx_add_platform_device("imx-i2c", data->id,
+        return imx_add_platform_device(data->devid, data->id,
                         res, ARRAY_SIZE(res),
                         pdata, sizeof(*pdata));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/mach-imx/devices/platform-imx-keypad.c
index 479c3e9f771f..8f22a4c98a4c 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c
+++ b/arch/arm/mach-imx/devices/platform-imx-keypad.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_keypad_data_entry_single(soc, _size)                    \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/mach-imx/devices/platform-imx-ssi.c
index 21c6f30e1017..bfcb8f3dfa8d 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c
+++ b/arch/arm/mach-imx/devices/platform-imx-ssi.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size)                  \
         [_id] = {                                                       \
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/mach-imx/devices/platform-imx-uart.c
index d390f00bd294..67bf866a2cb6 100644
--- a/arch/arm/plat-mxc/devices/platform-imx-uart.c
+++ b/arch/arm/mach-imx/devices/platform-imx-uart.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size)            \
         [_id] = {                                                       \
diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/mach-imx/devices/platform-imx2-wdt.c
index 5e07ef2bf1c4..ec75d6413686 100644
--- a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c
+++ b/arch/arm/mach-imx/devices/platform-imx2-wdt.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size)          \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/arch/arm/mach-imx/devices/platform-imx21-hcd.c
index 5770a42f33bf..30c81616a9a1 100644
--- a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c
+++ b/arch/arm/mach-imx/devices/platform-imx21-hcd.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx21_hcd_data_entry_single(soc)                            \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imx27-coda.c b/arch/arm/mach-imx/devices/platform-imx27-coda.c
index 8b12aacdf396..25bebc29e546 100644
--- a/arch/arm/plat-mxc/devices/platform-imx27-coda.c
+++ b/arch/arm/mach-imx/devices/platform-imx27-coda.c
@@ -7,8 +7,8 @@
  * Free Software Foundation.
  */
 
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_imx27_coda_data imx27_coda_data __initconst = {
diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/mach-imx/devices/platform-imx_udc.c
index 6fd675dfce14..5ced7e4e2c71 100644
--- a/arch/arm/plat-mxc/devices/platform-imx_udc.c
+++ b/arch/arm/mach-imx/devices/platform-imx_udc.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imx_udc_data_entry_single(soc, _size)                       \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c
index 805336fdc252..5bb490d556ea 100644
--- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c
+++ b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_imxdi_rtc_data_entry_single(soc)                            \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c
index d1e33cc6f12e..fc4dd7cedc11 100644
--- a/arch/arm/plat-mxc/devices/platform-ipu-core.c
+++ b/arch/arm/mach-imx/devices/platform-ipu-core.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_ipu_core_entry_single(soc)                                  \
 {                                                                       \
diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/mach-imx/devices/platform-mx1-camera.c
index edcc581a30a9..2c6788131080 100644
--- a/arch/arm/plat-mxc/devices/platform-mx1-camera.c
+++ b/arch/arm/mach-imx/devices/platform-mx1-camera.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mx1_camera_data_entry_single(soc, _size)                    \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/mach-imx/devices/platform-mx2-camera.c
index 11eace953a09..f4910160346b 100644
--- a/arch/arm/plat-mxc/devices/platform-mx2-camera.c
+++ b/arch/arm/mach-imx/devices/platform-mx2-camera.c
@@ -6,17 +6,19 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
-#define imx_mx2_camera_data_entry_single(soc)                           \
+#define imx_mx2_camera_data_entry_single(soc, _devid)                   \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobasecsi = soc ## _CSI_BASE_ADDR,                     \
                 .iosizecsi = SZ_4K,                                     \
                 .irqcsi = soc ## _INT_CSI,                              \
         }
-#define imx_mx2_camera_data_entry_single_emma(soc)                      \
+#define imx_mx2_camera_data_entry_single_emma(soc, _devid)              \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobasecsi = soc ## _CSI_BASE_ADDR,                     \
                 .iosizecsi = SZ_32,                                     \
                 .irqcsi = soc ## _INT_CSI,                              \
@@ -27,12 +29,12 @@
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst =
-        imx_mx2_camera_data_entry_single(MX25);
+        imx_mx2_camera_data_entry_single(MX25, "imx25-camera");
 #endif /* ifdef CONFIG_SOC_IMX25 */
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
-        imx_mx2_camera_data_entry_single_emma(MX27);
+        imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
 #endif /* ifdef CONFIG_SOC_IMX27 */
 
 struct platform_device *__init imx_add_mx2_camera(
@@ -58,7 +60,7 @@ struct platform_device *__init imx_add_mx2_camera(
                         .flags = IORESOURCE_IRQ,
                 },
         };
-        return imx_add_platform_device_dmamask("mx2-camera", 0,
+        return imx_add_platform_device_dmamask(data->devid, 0,
                         res, data->iobaseemmaprp ? 4 : 2,
                         pdata, sizeof(*pdata), DMA_BIT_MASK(32));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/mach-imx/devices/platform-mxc-ehci.c
index 35851d889aca..5d4bbbfde641 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c
+++ b/arch/arm/mach-imx/devices/platform-mxc-ehci.c
@@ -7,8 +7,9 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mxc_ehci_data_entry_single(soc, _id, hs)                    \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/mach-imx/devices/platform-mxc-mmc.c
index e7b920b58675..b8203c760c8f 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
+++ b/arch/arm/mach-imx/devices/platform-mxc-mmc.c
@@ -7,24 +7,26 @@
  * Free Software Foundation.
  */
 #include <linux/dma-mapping.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 
-#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)           \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)   \
         {                                                               \
+                .devid = _devid,                                        \
                 .id = _id,                                              \
                 .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR,          \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_SDHC ## _hwid,                       \
                 .dmareq = soc ## _DMA_REQ_SDHC ## _hwid,                \
         }
-#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size)                  \
-        [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)
+#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size)          \
+        [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
 #define imx21_mxc_mmc_data_entry(_id, _hwid)                            \
-        imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K)
+        imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
         imx21_mxc_mmc_data_entry(0, 1),
         imx21_mxc_mmc_data_entry(1, 2),
 };
@@ -33,7 +35,7 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX27
 const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
 #define imx27_mxc_mmc_data_entry(_id, _hwid)                            \
-        imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K)
+        imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
         imx27_mxc_mmc_data_entry(0, 1),
         imx27_mxc_mmc_data_entry(1, 2),
 };
@@ -42,7 +44,7 @@ const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
 #ifdef CONFIG_SOC_IMX31
 const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
 #define imx31_mxc_mmc_data_entry(_id, _hwid)                            \
-        imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K)
+        imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K)
         imx31_mxc_mmc_data_entry(0, 1),
         imx31_mxc_mmc_data_entry(1, 2),
 };
@@ -67,7 +69,7 @@ struct platform_device *__init imx_add_mxc_mmc(
                         .flags = IORESOURCE_DMA,
                 },
         };
-        return imx_add_platform_device_dmamask("mxc-mmc", data->id,
+        return imx_add_platform_device_dmamask(data->devid, data->id,
                         res, ARRAY_SIZE(res),
                         pdata, sizeof(*pdata), DMA_BIT_MASK(32));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/mach-imx/devices/platform-mxc_nand.c
index 95b75cc70515..7af1c53e42b5 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_nand.c
@@ -7,18 +7,21 @@
  * Free Software Foundation.
  */
 #include <asm/sizes.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 
-#define imx_mxc_nand_data_entry_single(soc, _size)                      \
+#include "../hardware.h"
+#include "devices-common.h"
+
+#define imx_mxc_nand_data_entry_single(soc, _devid, _size)              \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobase = soc ## _NFC_BASE_ADDR,                        \
                 .iosize = _size,                                        \
                 .irq = soc ## _INT_NFC                                  \
         }
 
-#define imx_mxc_nandv3_data_entry_single(soc, _size)                    \
+#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size)            \
         {                                                               \
+                .devid = _devid,                                        \
                 .id = -1,                                               \
                 .iobase = soc ## _NFC_BASE_ADDR,                        \
                 .iosize = _size,                                        \
@@ -28,32 +31,32 @@
 
 #ifdef CONFIG_SOC_IMX21
 const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX21, SZ_4K);
+        imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX21 */
 
 #ifdef CONFIG_SOC_IMX25
 const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX25, SZ_8K);
+        imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K);
 #endif /* ifdef CONFIG_SOC_IMX25 */
 
 #ifdef CONFIG_SOC_IMX27
 const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX27, SZ_4K);
+        imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
 #endif /* ifdef CONFIG_SOC_IMX27 */
 
 #ifdef CONFIG_SOC_IMX31
 const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX31, SZ_4K);
+        imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
 #endif
 
 #ifdef CONFIG_SOC_IMX35
 const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
-        imx_mxc_nand_data_entry_single(MX35, SZ_8K);
+        imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
 #endif
 
 #ifdef CONFIG_SOC_IMX51
 const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst =
-        imx_mxc_nandv3_data_entry_single(MX51, SZ_16K);
+        imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K);
 #endif
 
 struct platform_device *__init imx_add_mxc_nand(
@@ -76,7 +79,7 @@ struct platform_device *__init imx_add_mxc_nand(
                         .flags = IORESOURCE_MEM,
                 },
         };
-        return imx_add_platform_device("mxc_nand", data->id,
+        return imx_add_platform_device(data->devid, data->id,
                         res, ARRAY_SIZE(res) - !data->axibase,
                         pdata, sizeof(*pdata));
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/mach-imx/devices/platform-mxc_pwm.c
index b0c4ae298111..dcd289777687 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_pwm.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size)           \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/arch/arm/mach-imx/devices/platform-mxc_rnga.c
index b4b7612b6e17..c58404badb59 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_rnga.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 struct imx_mxc_rnga_data {
         resource_size_t iobase;
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c b/arch/arm/mach-imx/devices/platform-mxc_rtc.c
index a5c9ad5721c2..c7fffaadf847 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_rtc.c
@@ -6,23 +6,24 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
-#define imx_mxc_rtc_data_entry_single(soc)                              \
+#define imx_mxc_rtc_data_entry_single(soc, _devid)                      \
         {                                                               \
+                .devid = _devid,                                        \
                 .iobase = soc ## _RTC_BASE_ADDR,                        \
                 .irq = soc ## _INT_RTC,                                 \
         }
 
 #ifdef CONFIG_SOC_IMX31
 const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst =
-        imx_mxc_rtc_data_entry_single(MX31);
+        imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc");
 #endif /* ifdef CONFIG_SOC_IMX31 */
 
 #ifdef CONFIG_SOC_IMX35
 const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst =
-        imx_mxc_rtc_data_entry_single(MX35);
+        imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc");
 #endif /* ifdef CONFIG_SOC_IMX35 */
 
 struct platform_device *__init imx_add_mxc_rtc(
@@ -40,6 +41,6 @@ struct platform_device *__init imx_add_mxc_rtc(
                 },
         };
 
-        return imx_add_platform_device("mxc_rtc", -1,
+        return imx_add_platform_device(data->devid, -1,
                         res, ARRAY_SIZE(res), NULL, 0);
 }
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/mach-imx/devices/platform-mxc_w1.c
index 96fa5ea91fe8..88c18b720d63 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_w1.c
+++ b/arch/arm/mach-imx/devices/platform-mxc_w1.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mxc_w1_data_entry_single(soc)                               \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-pata_imx.c b/arch/arm/mach-imx/devices/platform-pata_imx.c
index 70e2f2a44714..e4ec11c8ce55 100644
--- a/arch/arm/plat-mxc/devices/platform-pata_imx.c
+++ b/arch/arm/mach-imx/devices/platform-pata_imx.c
@@ -3,8 +3,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_pata_imx_data_entry_single(soc, _size)                      \
         {                                                               \
diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
index 3793e475cd95..e66a4e316311 100644
--- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
+++ b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c
@@ -6,10 +6,11 @@
  * Free Software Foundation.
  */
 
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
 #include <linux/platform_data/mmc-esdhc-imx.h>
 
+#include "../hardware.h"
+#include "devices-common.h"
+
 #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \
         {                                                               \
                 .devid = _devid,                                        \
diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/mach-imx/devices/platform-spi_imx.c
index 9c50c14c8f92..8880bcb11e05 100644
--- a/arch/arm/plat-mxc/devices/platform-spi_imx.c
+++ b/arch/arm/mach-imx/devices/platform-spi_imx.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \
         {                                                               \
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 576af7446952..134c190e3003 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX25_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx27.c b/arch/arm/mach-imx/ehci-imx27.c
index cd6e1f81508d..448d9115539d 100644
--- a/arch/arm/mach-imx/ehci-imx27.c
+++ b/arch/arm/mach-imx/ehci-imx27.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX27_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx31.c b/arch/arm/mach-imx/ehci-imx31.c
index 9a880c78af34..05de4e1e39d7 100644
--- a/arch/arm/mach-imx/ehci-imx31.c
+++ b/arch/arm/mach-imx/ehci-imx31.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX31_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 293397852e4e..554e7cccff53 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define USBCTRL_OTGBASE_OFFSET  0x600
 
 #define MX35_OTG_SIC_SHIFT      29
diff --git a/arch/arm/mach-imx/ehci-imx5.c b/arch/arm/mach-imx/ehci-imx5.c
index cf8d00e5cce1..e49710b10c68 100644
--- a/arch/arm/mach-imx/ehci-imx5.c
+++ b/arch/arm/mach-imx/ehci-imx5.c
@@ -15,10 +15,10 @@
 
 #include <linux/platform_device.h>
 #include <linux/io.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
+#include "hardware.h"
+
 #define MXC_OTG_OFFSET                  0
 #define MXC_H1_OFFSET                   0x200
 #define MXC_H2_OFFSET                   0x400
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/mach-imx/epit.c
index 88726f4dbbfa..04a5961beeac 100644
--- a/arch/arm/plat-mxc/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -51,10 +51,10 @@
 #include <linux/clockchips.h>
 #include <linux/clk.h>
 #include <linux/err.h>
-
-#include <mach/hardware.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
 
 static struct clock_event_device clockevent_epit;
 static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
diff --git a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h
index a21d3313f994..a21d3313f994 100644
--- a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
+++ b/arch/arm/mach-imx/eukrea-baseboards.h
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index 98aef571b9f8..b4c70028d359 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -29,11 +29,10 @@
 
 #include <asm/mach/arch.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/hardware.h>
-
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int eukrea_mbimx27_pins[] __initconst = {
         /* UART2 */
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index 0b84666792f0..e2b70f4c1a2c 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -26,14 +26,14 @@
 #include <linux/spi/spi.h>
 #include <video/platform_lcd.h>
 
-#include <mach/hardware.h>
-#include <mach/iomux-mx25.h>
-#include <mach/common.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/mx25.h>
 
+#include "common.h"
 #include "devices-imx25.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
 
 static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
         /* LCD */
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index c6532a007d46..5a2d5ef12dd5 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -36,11 +36,10 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 static const struct fb_videomode fb_modedb[] = {
         {
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
index 8b0de30d7a3f..9be6c1e69d68 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
@@ -36,11 +36,10 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx51.h>
-
+#include "common.h"
 #include "devices-imx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = {
         /* LED */
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/mach-imx/hardware.h
index ebf10654bb42..3ce7fa3bd43f 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/mach-imx/hardware.h
@@ -105,20 +105,20 @@
 
 #define IMX_IO_ADDRESS(x)       IOMEM(IMX_IO_P2V(x))
 
-#include <mach/mxc.h>
+#include "mxc.h"
 
-#include <mach/mx6q.h>
-#include <mach/mx50.h>
-#include <mach/mx51.h>
-#include <mach/mx53.h>
-#include <mach/mx3x.h>
-#include <mach/mx31.h>
-#include <mach/mx35.h>
-#include <mach/mx2x.h>
-#include <mach/mx21.h>
-#include <mach/mx27.h>
-#include <mach/mx1.h>
-#include <mach/mx25.h>
+#include "mx6q.h"
+#include "mx50.h"
+#include "mx51.h"
+#include "mx53.h"
+#include "mx3x.h"
+#include "mx31.h"
+#include "mx35.h"
+#include "mx2x.h"
+#include "mx21.h"
+#include "mx27.h"
+#include "mx1.h"
+#include "mx25.h"
 
 #define imx_map_entry(soc, name, _type) {                               \
         .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR),      \
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index b07b778dc9a8..3dec962b0770 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -13,7 +13,8 @@
 #include <linux/errno.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
-#include <mach/common.h>
+
+#include "common.h"
 
 static inline void cpu_enter_lowpower(void)
 {
diff --git a/arch/arm/plat-mxc/include/mach/iim.h b/arch/arm/mach-imx/iim.h
index 315bffadafda..315bffadafda 100644
--- a/arch/arm/plat-mxc/include/mach/iim.h
+++ b/arch/arm/mach-imx/iim.h
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
index e80d5235dac0..ebfae96543c4 100644
--- a/arch/arm/mach-imx/imx27-dt.c
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -14,21 +14,22 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx27.h>
+
+#include "common.h"
+#include "mx27.h"
 
 static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL),
         OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL),
         OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL),
         OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
         OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL),
         OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),
         OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
         OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "imx27-nand.0", NULL),
         { /* sentinel */ }
 };
 
diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c
index a68ba207b2b7..af476de2570e 100644
--- a/arch/arm/mach-imx/imx31-dt.c
+++ b/arch/arm/mach-imx/imx31-dt.c
@@ -14,8 +14,9 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx31.h>
+
+#include "common.h"
+#include "mx31.h"
 
 static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR,
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index f233b4bb2342..50742990a136 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -15,8 +15,9 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx51.h>
+
+#include "common.h"
+#include "mx51.h"
 
 /*
  * Lookup table for attaching a specific name and platform_data pointer to
@@ -36,8 +37,8 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
         OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
         OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
         OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
         OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
         { /* sentinel */ }
diff --git a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
deleted file mode 100644
index df5f522da6b3..000000000000
--- a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef __MACH_DMA_MX1_MX2_H__
-#define __MACH_DMA_MX1_MX2_H__
-/*
- * Don't use this header in new code, it will go away when all users are
- * converted to mach/dma-v1.h
- */
-
-#include <mach/dma-v1.h>
-
-#endif /* ifndef __MACH_DMA_MX1_MX2_H__ */
diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c
index 82bd4403b450..cabefbc5e7c1 100644
--- a/arch/arm/mach-imx/iomux-imx31.c
+++ b/arch/arm/mach-imx/iomux-imx31.c
@@ -22,8 +22,9 @@
 #include <linux/spinlock.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
+
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /*
  * IOMUX register (base) addresses
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/mach-imx/iomux-mx1.h
index 6b1507cf378e..95f4681d85d7 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h
+++ b/arch/arm/mach-imx/iomux-mx1.h
@@ -18,7 +18,7 @@
 #ifndef __MACH_IOMUX_MX1_H__
 #define __MACH_IOMUX_MX1_H__
 
-#include <mach/iomux-v1.h>
+#include "iomux-v1.h"
 
 #define PA0_AIN_SPI2_CLK        (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
 #define PA0_AF_ETMTRACESYNC     (GPIO_PORTA | GPIO_AF | 0)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/mach-imx/iomux-mx21.h
index 1495dfda7834..a70cffceb085 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h
+++ b/arch/arm/mach-imx/iomux-mx21.h
@@ -18,8 +18,8 @@
 #ifndef __MACH_IOMUX_MX21_H__
 #define __MACH_IOMUX_MX21_H__
 
-#include <mach/iomux-mx2x.h>
-#include <mach/iomux-v1.h>
+#include "iomux-mx2x.h"
+#include "iomux-v1.h"
 
 /* Primary GPIO pin functions */
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/mach-imx/iomux-mx25.h
index c61ec0fc10d4..be51e838375c 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/mach-imx/iomux-mx25.h
@@ -19,7 +19,7 @@
 #ifndef __MACH_IOMUX_MX25_H__
 #define __MACH_IOMUX_MX25_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 
 /*
  * IOMUX/PAD Bit field definitions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/mach-imx/iomux-mx27.h
index d9f9a6e32d80..218e99e89e86 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h
+++ b/arch/arm/mach-imx/iomux-mx27.h
@@ -19,8 +19,8 @@
 #ifndef __MACH_IOMUX_MX27_H__
 #define __MACH_IOMUX_MX27_H__
 
-#include <mach/iomux-mx2x.h>
-#include <mach/iomux-v1.h>
+#include "iomux-mx2x.h"
+#include "iomux-v1.h"
 
 /* Primary GPIO pin functions */
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/mach-imx/iomux-mx2x.h
index 7a9b20abda09..7a9b20abda09 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h
+++ b/arch/arm/mach-imx/iomux-mx2x.h
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
index f79f78a1c0ed..f79f78a1c0ed 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/mach-imx/iomux-mx3.h
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/mach-imx/iomux-mx35.h
index 3117c18bbbd9..90bfa6b5be6a 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h
+++ b/arch/arm/mach-imx/iomux-mx35.h
@@ -19,7 +19,7 @@
 #ifndef __MACH_IOMUX_MX35_H__
 #define __MACH_IOMUX_MX35_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 
 /*
  * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/mach-imx/iomux-mx50.h
index 98e7fd0b9083..00f56e0e8009 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h
+++ b/arch/arm/mach-imx/iomux-mx50.h
@@ -19,7 +19,7 @@
 #ifndef __MACH_IOMUX_MX50_H__
 #define __MACH_IOMUX_MX50_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 
 #define MX50_ELCDIF_PAD_CTRL    (PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/mach-imx/iomux-mx51.h
index 2623e7a2e190..75bbcc4aa2d2 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h
+++ b/arch/arm/mach-imx/iomux-mx51.h
@@ -13,7 +13,7 @@
 #ifndef __MACH_IOMUX_MX51_H__
 #define __MACH_IOMUX_MX51_H__
 
-#include <mach/iomux-v3.h>
+#include "iomux-v3.h"
 #define __NA_   0x000
 
 
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c
index 1f73963bc13e..2b156d1d9e21 100644
--- a/arch/arm/plat-mxc/iomux-v1.c
+++ b/arch/arm/mach-imx/iomux-v1.c
@@ -28,9 +28,10 @@
 #include <linux/string.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "hardware.h"
+#include "iomux-v1.h"
 
 static void __iomem *imx_iomuxv1_baseaddr;
 static unsigned imx_iomuxv1_numports;
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/mach-imx/iomux-v1.h
index 02651a40fe23..02651a40fe23 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v1.h
+++ b/arch/arm/mach-imx/iomux-v1.h
diff --git a/arch/arm/plat-mxc/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
index 99a9cdb9d6be..9dae74bf47fc 100644
--- a/arch/arm/plat-mxc/iomux-v3.c
+++ b/arch/arm/mach-imx/iomux-v3.c
@@ -25,9 +25,10 @@
 #include <linux/string.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v3.h>
+
+#include "hardware.h"
+#include "iomux-v3.h"
 
 static void __iomem *base;
 
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/mach-imx/iomux-v3.h
index 2fa3b5430102..2fa3b5430102 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/mach-imx/iomux-v3.h
diff --git a/arch/arm/plat-mxc/include/mach/iram.h b/arch/arm/mach-imx/iram.h
index 022690c33702..022690c33702 100644
--- a/arch/arm/plat-mxc/include/mach/iram.h
+++ b/arch/arm/mach-imx/iram.h
diff --git a/arch/arm/plat-mxc/iram_alloc.c b/arch/arm/mach-imx/iram_alloc.c
index 074c3869626a..6c80424f678e 100644
--- a/arch/arm/plat-mxc/iram_alloc.c
+++ b/arch/arm/mach-imx/iram_alloc.c
@@ -22,7 +22,8 @@
 #include <linux/module.h>
 #include <linux/spinlock.h>
 #include <linux/genalloc.h>
-#include <mach/iram.h>
+
+#include "iram.h"
 
 static unsigned long iram_phys_base;
 static void __iomem *iram_virt_base;
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/mach-imx/irq-common.c
index b6e11458e5ae..b6e11458e5ae 100644
--- a/arch/arm/plat-mxc/irq-common.c
+++ b/arch/arm/mach-imx/irq-common.c
diff --git a/arch/arm/plat-mxc/irq-common.h b/arch/arm/mach-imx/irq-common.h
index 6ccb3a14c693..5b2dabba330f 100644
--- a/arch/arm/plat-mxc/irq-common.h
+++ b/arch/arm/mach-imx/irq-common.h
@@ -19,6 +19,9 @@
 #ifndef __PLAT_MXC_IRQ_COMMON_H__
 #define __PLAT_MXC_IRQ_COMMON_H__
 
+/* all normal IRQs can be FIQs */
+#define FIQ_START       0
+
 struct mxc_extra_irq
 {
         int (*set_priority)(unsigned char irq, unsigned char prio);
diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c
index c40a34c00489..5f1510363ee7 100644
--- a/arch/arm/mach-imx/lluart.c
+++ b/arch/arm/mach-imx/lluart.c
@@ -14,7 +14,8 @@
 #include <asm/page.h>
 #include <asm/sizes.h>
 #include <asm/mach/map.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
 
 static struct map_desc imx_lluart_desc = {
 #ifdef CONFIG_DEBUG_IMX6Q_UART2
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 7b99a79722b6..5c9bd2c66e6d 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -25,11 +25,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
 #include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
 
 static const int apf9328_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 5985ed1b8c98..59bd6b06a6b5 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -41,19 +41,18 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx31.h"
 #include "crmregs-imx3.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static int armadillo5x0_pins[] = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 9a9897749dd6..3a39d5aec07a 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -19,15 +19,14 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 
-#include <mach/iomux-mx3.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-
 #include <asm/mach/time.h>
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 2bb9e18d9ee1..12a370646b45 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -34,13 +34,12 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx27.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 static const int eukrea_cpuimx27_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index d49b0ec6bdec..5a31bf8c8f4c 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -37,12 +37,11 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
+#include "common.h"
 #include "devices-imx35.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index b87cc49ab1e8..b727de029c8f 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -26,18 +26,17 @@
 #include <linux/spi/spi.h>
 #include <linux/can/platform/mcp251x.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
+#include "common.h"
 #include "devices-imx51.h"
 #include "cpu_op-mx51.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 #define USBH1_RST               IMX_GPIO_NR(2, 28)
 #define ETH_RST                 IMX_GPIO_NR(2, 31)
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index 017bbb70ea41..75027a5ad8b7 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -27,18 +27,18 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 
-#include <mach/eukrea-baseboards.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
-#include <mach/iomux-mx25.h>
 
+#include "common.h"
 #include "devices-imx25.h"
+#include "eukrea-baseboards.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
 
 static const struct imxuart_platform_data uart_pdata __initconst = {
         .flags = IMXUART_HAVE_RTSCTS,
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 141756f00ae5..b74422679126 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -40,11 +40,11 @@
 #include <asm/mach/time.h>
 #include <asm/system_info.h>
 #include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 #define TVP5150_RSTN (GPIO_PORTC + 18)
 #define TVP5150_PWDN (GPIO_PORTC + 19)
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 7381387a8905..53a860112938 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -17,11 +17,11 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
 
+#include "hardware.h"
+#include "common.h"
 #include "devices-imx27.h"
+#include "iomux-mx27.h"
 
 static const int mx27ipcam_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 1f45b9189229..fc8dce931378 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -20,11 +20,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int mx27lite_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c
index 29711e95579f..e71e62610eba 100644
--- a/arch/arm/mach-imx/mach-imx53.c
+++ b/arch/arm/mach-imx/mach-imx53.c
@@ -19,8 +19,9 @@
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
-#include <mach/mx53.h>
+
+#include "common.h"
+#include "mx53.h"
 
 /*
  * Lookup table for attaching a specific name and platform_data pointer to
@@ -42,9 +43,9 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
         OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
         OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
         OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
-        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
-        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
+        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx21-i2c.0", NULL),
+        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx21-i2c.1", NULL),
+        OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx21-i2c.2", NULL),
         OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
         OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
         { /* sentinel */ }
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 47c91f7185d2..978b6dd00de4 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -33,10 +33,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/system_misc.h>
-#include <mach/common.h>
-#include <mach/cpuidle.h>
-#include <mach/hardware.h>
 
+#include "common.h"
+#include "cpuidle.h"
+#include "hardware.h"
 
 void imx6q_restart(char mode, const char *cmd)
 {
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 0330078ff788..2e536ea53444 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -36,11 +36,10 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 #define KZM_ARM11_IO_ADDRESS(x) (IOMEM(                                 \
         IMX_IO_P2V_MODULE(x, MX31_CS4) ?:                               \
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index 667f359a2e8b..06b483783e68 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -23,11 +23,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
 #include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
 
 static const int mx1ads_pins[] __initconst = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index ed22e3fe6ec8..6adb3136bb08 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -18,15 +18,15 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-mx21.h>
 
+#include "common.h"
 #include "devices-imx21.h"
+#include "hardware.h"
+#include "iomux-mx21.h"
 
 /*
  * Memory-mapped I/O on MX21ADS base board
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index ce247fd1269a..b1b03aa55bb8 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -31,17 +31,17 @@
 #include <linux/platform_device.h>
 #include <linux/usb/otg.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/mx25.h>
-#include <mach/iomux-mx25.h>
 
+#include "common.h"
 #include "devices-imx25.h"
+#include "hardware.h"
+#include "iomux-mx25.h"
+#include "mx25.h"
 
 #define MX25PDK_CAN_PWDN        IMX_GPIO_NR(4, 6)
 
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index 05996f39005c..d0e547fa925f 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -36,13 +36,13 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-#include <mach/3ds_debugboard.h>
 
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 #define SD1_EN_GPIO             IMX_GPIO_NR(2, 25)
 #define OTG_PHY_RESET_GPIO      IMX_GPIO_NR(2, 23)
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 7dc59bac0e55..3d036f57f0e6 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -21,15 +21,15 @@
 #include <linux/mtd/physmap.h>
 #include <linux/i2c.h>
 #include <linux/irq.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-mx27.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 /*
  * Base address of PBC controller, CS4
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 8915f937b7d5..bc301befdd06 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -30,19 +30,19 @@
 
 #include <media/soc_camera.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/3ds_debugboard.h>
-#include <mach/ulpi.h>
 
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static int mx31_3ds_pins[] = {
         /* UART1 */
@@ -393,7 +393,7 @@ static struct regulator_init_data gpo_init = {
 };
 
 static struct regulator_consumer_supply vmmc2_consumers[] = {
-        REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"),
+        REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
 };
 
 static struct regulator_init_data vmmc2_init = {
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index e774b07f48d3..8b56f8883f32 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -28,8 +28,6 @@
 #include <asm/mach/time.h>
 #include <asm/memory.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
 
 #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
 #include <linux/mfd/wm8350/audio.h>
@@ -37,7 +35,10 @@
 #include <linux/mfd/wm8350/pmic.h>
 #endif
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /* Base address of PBC controller */
 #define PBC_BASE_ADDRESS        MX31_CS4_BASE_ADDR_VIRT
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 34b9bf075daf..08b9965c8b36 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -42,13 +42,12 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lilly.h>
-#include <mach/ulpi.h>
-
+#include "board-mx31lilly.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 /*
  * This file contains module-specific initialization routines for LILLY-1131.
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index ef57cff5abfb..bdcd92e59518 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -39,13 +39,12 @@
 #include <asm/page.h>
 #include <asm/setup.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/board-mx31lite.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
+#include "board-mx31lite.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 /*
  * This file contains the module-specific initialization routines.
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 459e754ef8c9..2517cfa9f26b 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -42,14 +42,14 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
-#include <mach/board-mx31moboard.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
 #include <linux/platform_data/asoc-imx-ssi.h>
 
+#include "board-mx31moboard.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int moboard_pins[] = {
         /* UART0 */
@@ -175,11 +175,11 @@ static const struct spi_imx_master moboard_spi1_pdata __initconst = {
 
 static struct regulator_consumer_supply sdhc_consumers[] = {
         {
-                .dev_name = "mxc-mmc.0",
+                .dev_name = "imx31-mmc.0",
                 .supply = "sdhc0_vcc",
         },
         {
-                .dev_name = "mxc-mmc.1",
+                .dev_name = "imx31-mmc.1",
                 .supply = "sdhc1_vcc",
         },
 };
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 504983c68aa8..5277da45d60c 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -43,15 +43,15 @@
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-#include <mach/3ds_debugboard.h>
 #include <video/platform_lcd.h>
 
 #include <media/soc_camera.h>
 
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 #define GPIO_MC9S08DZ60_GPS_ENABLE 0
 #define GPIO_MC9S08DZ60_HDD_ENABLE 4
diff --git a/arch/arm/mach-imx/mach-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c
index 42b66e8d9615..0c1f88a80bdc 100644
--- a/arch/arm/mach-imx/mach-mx50_rdp.c
+++ b/arch/arm/mach-imx/mach-mx50_rdp.c
@@ -24,17 +24,16 @@
 #include <linux/delay.h>
 #include <linux/io.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx50.h>
-
 #include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
+#include "common.h"
 #include "devices-imx50.h"
+#include "hardware.h"
+#include "iomux-mx50.h"
 
 #define FEC_EN          IMX_GPIO_NR(6, 23)
 #define FEC_RESET_B     IMX_GPIO_NR(4, 12)
diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c
index 9ee84a4af639..abc25bd1107b 100644
--- a/arch/arm/mach-imx/mach-mx51_3ds.c
+++ b/arch/arm/mach-imx/mach-mx51_3ds.c
@@ -19,12 +19,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx51.h>
-#include <mach/3ds_debugboard.h>
-
+#include "3ds_debugboard.h"
+#include "common.h"
 #include "devices-imx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 #define MX51_3DS_ECSPI2_CS      (GPIO_PORTC + 28)
 
diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c
index 7b31cbde8775..d9a84ca2199a 100644
--- a/arch/arm/mach-imx/mach-mx51_babbage.c
+++ b/arch/arm/mach-imx/mach-mx51_babbage.c
@@ -20,17 +20,16 @@
 #include <linux/spi/flash.h>
 #include <linux/spi/spi.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx51.h>
-
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
+#include "common.h"
 #include "devices-imx51.h"
 #include "cpu_op-mx51.h"
+#include "hardware.h"
+#include "iomux-mx51.h"
 
 #define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
 #define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 0bf6d30aa32d..f4a8c7e108e1 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -21,17 +21,17 @@
 #include <linux/mtd/physmap.h>
 #include <linux/i2c.h>
 #include <linux/irq.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 #include <linux/gpio.h>
-#include <mach/iomux-mx27.h>
 #include <linux/i2c/pca953x.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int mxt_td60_pins[] __initconst = {
         /* UART0 */
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index de8516b7d69f..eee369fa94a2 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -32,13 +32,13 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
 #include <asm/mach/time.h>
-#include <mach/ulpi.h>
 
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
 #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index e3c45130fb3c..547fef133f65 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -42,13 +42,13 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 #include "pcm037.h"
+#include "ulpi.h"
 
 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
 
diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c
index 11ffa81ad17d..8fd8255068ee 100644
--- a/arch/arm/mach-imx/mach-pcm037_eet.c
+++ b/arch/arm/mach-imx/mach-pcm037_eet.c
@@ -11,13 +11,12 @@
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-
 #include <asm/mach-types.h>
 
 #include "pcm037.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "iomux-mx3.h"
 
 static unsigned int pcm037_eet_pins[] = {
         /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 95f49d936fd3..4aa0d0798605 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -33,13 +33,12 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/board-pcm038.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx27.h>
-#include <mach/ulpi.h>
-
+#include "board-pcm038.h"
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
+#include "ulpi.h"
 
 static const int pcm038_pins[] __initconst = {
         /* UART1 */
@@ -212,7 +211,7 @@ static const struct spi_imx_master pcm038_spi0_data __initconst = {
 
 static struct regulator_consumer_supply sdhc1_consumers[] = {
         {
-                .dev_name = "mxc-mmc.1",
+                .dev_name = "imx21-mmc.1",
                 .supply = "sdhc_vcc",
         },
 };
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index e4bd4387e344..92445440221e 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -33,12 +33,11 @@
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
+#include "ulpi.h"
 
 static const struct fb_videomode fb_modedb[] = {
         {
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index fb25fbd31226..96d9a91f8a3b 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -21,17 +21,17 @@
 #include <linux/mtd/nand.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
 #include <asm/page.h>
 #include <asm/setup.h>
-#include <mach/iomux-mx3.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /* FPGA defines */
 #define QONG_FPGA_VERSION(major, minor, rev)    \
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index 67ff38e9a3ca..fc970409dbaf 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -20,11 +20,10 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx1.h>
-
+#include "common.h"
 #include "devices-imx1.h"
+#include "hardware.h"
+#include "iomux-mx1.h"
 
 /*
  * This scb9328 has a 32MiB flash
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 39eb7960e2a4..3aecf91e4289 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -28,15 +28,14 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx35.h>
-
 #include <linux/i2c.h>
 #include <linux/i2c/at24.h>
 #include <linux/mfd/mc13xxx.h>
 
+#include "common.h"
 #include "devices-imx35.h"
+#include "hardware.h"
+#include "iomux-mx35.h"
 
 #define GPIO_LCDPWR     IMX_GPIO_NR(1, 2)
 #define GPIO_PMIC_INT   IMX_GPIO_NR(2, 0)
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 6d60d51868bc..7a146671e65a 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -22,9 +22,10 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-v1.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
 
 static struct map_desc imx_io_desc[] __initdata = {
         imx_map_entry(MX1, IO, MT_DEVICE),
@@ -58,5 +59,7 @@ void __init imx1_soc_init(void)
                                                 MX1_GPIO_INT_PORTC, 0);
         mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256,
                                                 MX1_GPIO_INT_PORTD, 0);
+        imx_add_imx_dma("imx1-dma", MX1_DMA_BASE_ADDR,
+                        MX1_DMA_INT, MX1_DMA_ERR);
         pinctrl_provide_dummies();
 }
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c
index d056dad0940d..d8ccd3a8ec53 100644
--- a/arch/arm/mach-imx/mm-imx21.c
+++ b/arch/arm/mach-imx/mm-imx21.c
@@ -21,12 +21,13 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/pinctrl/machine.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
 
 /* MX21 memory map definition */
 static struct map_desc imx21_io_desc[] __initdata = {
@@ -81,6 +82,8 @@ static const struct resource imx21_audmux_res[] __initconst = {
 
 void __init imx21_soc_init(void)
 {
+        mxc_device_init();
+
         mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
         mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
         mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
@@ -89,7 +92,8 @@ void __init imx21_soc_init(void)
         mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
 
         pinctrl_provide_dummies();
-        imx_add_imx_dma();
+        imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR,
+                        MX21_INT_DMACH0, 0); /* No ERR irq */
         platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
                                         ARRAY_SIZE(imx21_audmux_res));
 }
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c
index f3f5c6542ab4..9357707bb7af 100644
--- a/arch/arm/mach-imx/mm-imx25.c
+++ b/arch/arm/mach-imx/mm-imx25.c
@@ -24,11 +24,11 @@
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/hardware.h>
-#include <mach/mx25.h>
-#include <mach/iomux-v3.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
+#include "mx25.h"
 
 /*
  * This table defines static virtual address mappings for I/O regions.
@@ -89,6 +89,8 @@ static const struct resource imx25_audmux_res[] __initconst = {
 
 void __init imx25_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx25 has the i.mx35 type gpio */
         mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0);
         mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0);
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
index e7e24afc45ed..4f1be65a7b5f 100644
--- a/arch/arm/mach-imx/mm-imx27.c
+++ b/arch/arm/mach-imx/mm-imx27.c
@@ -21,12 +21,13 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/pinctrl/machine.h>
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
 #include <asm/pgtable.h>
 #include <asm/mach/map.h>
-#include <mach/iomux-v1.h>
+
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v1.h"
 
 /* MX27 memory map definition */
 static struct map_desc imx27_io_desc[] __initdata = {
@@ -81,6 +82,8 @@ static const struct resource imx27_audmux_res[] __initconst = {
 
 void __init imx27_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx27 has the i.mx21 type gpio */
         mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
         mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
@@ -90,7 +93,8 @@ void __init imx27_soc_init(void)
         mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
 
         pinctrl_provide_dummies();
-        imx_add_imx_dma();
+        imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR,
+                        MX27_INT_DMACH0, 0); /* No ERR irq */
         /* imx27 has the imx21 type audmux */
         platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
                                         ARRAY_SIZE(imx27_audmux_res));
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index b5deb0554552..cefa047c4053 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -26,12 +26,11 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/map.h>
 
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-v3.h>
-
+#include "common.h"
 #include "crmregs-imx3.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
 
 void __iomem *mx3_ccm_base;
 
@@ -175,6 +174,8 @@ void __init imx31_soc_init(void)
 
         imx3_init_l2x0();
 
+        mxc_device_init();
+
         mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0);
         mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
         mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
@@ -271,6 +272,8 @@ void __init imx35_soc_init(void)
 
         imx3_init_l2x0();
 
+        mxc_device_init();
+
         mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0);
         mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0);
         mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0);
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index acb0aadb4255..f92caf1b30ba 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -18,10 +18,10 @@
 
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/devices-common.h>
-#include <mach/iomux-v3.h>
+#include "common.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
+#include "iomux-v3.h"
 
 /*
  * Define the MX50 memory map.
@@ -138,6 +138,8 @@ static const struct resource imx51_audmux_res[] __initconst = {
 
 void __init imx50_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx50 has the i.mx35 type gpio */
         mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH);
         mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH);
@@ -153,6 +155,8 @@ void __init imx50_soc_init(void)
 
 void __init imx51_soc_init(void)
 {
+        mxc_device_init();
+
         /* i.mx51 has the i.mx35 type gpio */
         mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
         mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/mach-imx/mx1.h
index 45bd31cc34d6..45bd31cc34d6 100644
--- a/arch/arm/plat-mxc/include/mach/mx1.h
+++ b/arch/arm/mach-imx/mx1.h
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/mach-imx/mx21.h
index 468738aa997f..468738aa997f 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/mach-imx/mx21.h
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/mach-imx/mx25.h
index ec466400a200..ec466400a200 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/mach-imx/mx25.h
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/mach-imx/mx27.h
index e074616d54ca..e074616d54ca 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/mach-imx/mx27.h
diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/mach-imx/mx2x.h
index 11642f5b224c..11642f5b224c 100644
--- a/arch/arm/plat-mxc/include/mach/mx2x.h
+++ b/arch/arm/mach-imx/mx2x.h
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/mach-imx/mx31.h
index ee9b1f9215df..ee9b1f9215df 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/mach-imx/mx31.h
diff --git a/arch/arm/mach-imx/mx31lilly-db.c b/arch/arm/mach-imx/mx31lilly-db.c
index 29e890f92055..d4361b80c5fb 100644
--- a/arch/arm/mach-imx/mx31lilly-db.c
+++ b/arch/arm/mach-imx/mx31lilly-db.c
@@ -30,12 +30,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lilly.h>
-
+#include "board-mx31lilly.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /*
  * This file contains board-specific initialization routines for the
diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c
index 83d17d9e0bc8..5a160b7e4fce 100644
--- a/arch/arm/mach-imx/mx31lite-db.c
+++ b/arch/arm/mach-imx/mx31lite-db.c
@@ -31,12 +31,11 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31lite.h>
-
+#include "board-mx31lite.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
 
 /*
  * This file contains board-specific initialization routines for the
diff --git a/arch/arm/mach-imx/mx31moboard-devboard.c b/arch/arm/mach-imx/mx31moboard-devboard.c
index cc285e507286..52d5b1574721 100644
--- a/arch/arm/mach-imx/mx31moboard-devboard.c
+++ b/arch/arm/mach-imx/mx31moboard-devboard.c
@@ -22,12 +22,11 @@
 
 #include <linux/usb/otg.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx3.h>
-#include <mach/hardware.h>
-#include <mach/ulpi.h>
-
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int devboard_pins[] = {
         /* UART1 */
diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c b/arch/arm/mach-imx/mx31moboard-marxbot.c
index 135c90e3a45f..a4f43e90f3c1 100644
--- a/arch/arm/mach-imx/mx31moboard-marxbot.c
+++ b/arch/arm/mach-imx/mx31moboard-marxbot.c
@@ -24,14 +24,13 @@
 
 #include <linux/usb/otg.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/ulpi.h>
-
 #include <media/soc_camera.h>
 
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int marxbot_pins[] = {
         /* SDHC2 */
diff --git a/arch/arm/mach-imx/mx31moboard-smartbot.c b/arch/arm/mach-imx/mx31moboard-smartbot.c
index fabb801e7994..04ae45dbfaa7 100644
--- a/arch/arm/mach-imx/mx31moboard-smartbot.c
+++ b/arch/arm/mach-imx/mx31moboard-smartbot.c
@@ -23,15 +23,14 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/iomux-mx3.h>
-#include <mach/board-mx31moboard.h>
-#include <mach/ulpi.h>
-
 #include <media/soc_camera.h>
 
+#include "board-mx31moboard.h"
+#include "common.h"
 #include "devices-imx31.h"
+#include "hardware.h"
+#include "iomux-mx3.h"
+#include "ulpi.h"
 
 static unsigned int smartbot_pins[] = {
         /* UART1 */
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/mach-imx/mx35.h
index 2af5d3a699c7..2af5d3a699c7 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/mach-imx/mx35.h
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/mach-imx/mx3x.h
index 96fb4fbc8ad7..96fb4fbc8ad7 100644
--- a/arch/arm/plat-mxc/include/mach/mx3x.h
+++ b/arch/arm/mach-imx/mx3x.h
diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/mach-imx/mx50.h
index 09ac19c1570c..09ac19c1570c 100644
--- a/arch/arm/plat-mxc/include/mach/mx50.h
+++ b/arch/arm/mach-imx/mx50.h
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/mach-imx/mx51.h
index af844f76261a..af844f76261a 100644
--- a/arch/arm/plat-mxc/include/mach/mx51.h
+++ b/arch/arm/mach-imx/mx51.h
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/mach-imx/mx53.h
index f829d1c22501..f829d1c22501 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/mach-imx/mx53.h
diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/mach-imx/mx6q.h
index f7e7dbac8f4b..f7e7dbac8f4b 100644
--- a/arch/arm/plat-mxc/include/mach/mx6q.h
+++ b/arch/arm/mach-imx/mx6q.h
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/mach-imx/mxc.h
index d78298366a91..d78298366a91 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c
index 9917e2ff51da..51c608234089 100644
--- a/arch/arm/mach-imx/pcm970-baseboard.c
+++ b/arch/arm/mach-imx/pcm970-baseboard.c
@@ -23,11 +23,10 @@
 
 #include <asm/mach/arch.h>
 
-#include <mach/common.h>
-#include <mach/iomux-mx27.h>
-#include <mach/hardware.h>
-
+#include "common.h"
 #include "devices-imx27.h"
+#include "hardware.h"
+#include "iomux-mx27.h"
 
 static const int pcm970_pins[] __initconst = {
         /* SDHC */
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index 2ac43e1a2dfd..3777b805b76b 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -16,8 +16,9 @@
 #include <asm/smp_scu.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach/map.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "hardware.h"
 
 static void __iomem *scu_base;
 
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c
index 6fcffa7db978..56d02d064fbf 100644
--- a/arch/arm/mach-imx/pm-imx27.c
+++ b/arch/arm/mach-imx/pm-imx27.c
@@ -10,7 +10,8 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/io.h>
-#include <mach/hardware.h>
+
+#include "hardware.h"
 
 static int mx27_suspend_enter(suspend_state_t state)
 {
diff --git a/arch/arm/mach-imx/pm-imx3.c b/arch/arm/mach-imx/pm-imx3.c
index 822103bdb709..6a07006ff0f4 100644
--- a/arch/arm/mach-imx/pm-imx3.c
+++ b/arch/arm/mach-imx/pm-imx3.c
@@ -9,10 +9,11 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 #include <linux/io.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+
+#include "common.h"
 #include "crmregs-imx3.h"
+#include "devices/devices-common.h"
+#include "hardware.h"
 
 /*
  * Set cpu low power mode before WFI instruction. This function is called
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
index 19621ed1ffa5..2e063c2deb9e 100644
--- a/arch/arm/mach-imx/pm-imx5.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -16,10 +16,11 @@
 #include <asm/cacheflush.h>
 #include <asm/system_misc.h>
 #include <asm/tlbflush.h>
-#include <mach/common.h>
-#include <mach/cpuidle.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "cpuidle.h"
 #include "crm-regs-imx5.h"
+#include "hardware.h"
 
 /*
  * The WAIT_UNCLOCKED_POWER_OFF state only requires <= 500ns to exit.
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index f7b0c2b1b905..a17543da602d 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -18,8 +18,9 @@
 #include <asm/proc-fns.h>
 #include <asm/suspend.h>
 #include <asm/hardware/cache-l2x0.h>
-#include <mach/common.h>
-#include <mach/hardware.h>
+
+#include "common.h"
+#include "hardware.h"
 
 extern unsigned long phys_l2x0_saved_regs;
 
diff --git a/arch/arm/plat-mxc/ssi-fiq-ksym.c b/arch/arm/mach-imx/ssi-fiq-ksym.c
index 792090f9a032..792090f9a032 100644
--- a/arch/arm/plat-mxc/ssi-fiq-ksym.c
+++ b/arch/arm/mach-imx/ssi-fiq-ksym.c
diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/mach-imx/ssi-fiq.S
index a8b93c5f29b5..a8b93c5f29b5 100644
--- a/arch/arm/plat-mxc/ssi-fiq.S
+++ b/arch/arm/mach-imx/ssi-fiq.S
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/mach-imx/system.c
index 3da78cfc5a94..695e0d73bf85 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -22,12 +22,13 @@
 #include <linux/err.h>
 #include <linux/delay.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
 #include <asm/system_misc.h>
 #include <asm/proc-fns.h>
 #include <asm/mach-types.h>
 
+#include "common.h"
+#include "hardware.h"
+
 static void __iomem *wdog_base;
 
 /*
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/mach-imx/time.c
index a17abcf98325..f017302f6d09 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -27,10 +27,11 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 
-#include <mach/hardware.h>
 #include <asm/sched_clock.h>
 #include <asm/mach/time.h>
-#include <mach/common.h>
+
+#include "common.h"
+#include "hardware.h"
 
 /*
  * There are 2 versions of the timer hardware on Freescale MXC hardware.
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/mach-imx/tzic.c
index 3ed1adbc09f8..9721161f208f 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/mach-imx/tzic.c
@@ -21,10 +21,8 @@
 #include <asm/mach/irq.h>
 #include <asm/exception.h>
 
-#include <mach/hardware.h>
-#include <mach/common.h>
-#include <mach/irqs.h>
-
+#include "common.h"
+#include "hardware.h"
 #include "irq-common.h"
 
 /*
diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/mach-imx/ulpi.c
index d2963427184f..0f051957d10c 100644
--- a/arch/arm/plat-mxc/ulpi.c
+++ b/arch/arm/mach-imx/ulpi.c
@@ -24,7 +24,7 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 
-#include <mach/ulpi.h>
+#include "ulpi.h"
 
 /* ULPIVIEW register bits */
 #define ULPIVW_WU               (1 << 31)       /* Wakeup */
diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/mach-imx/ulpi.h
index 42bdaca6d7d9..42bdaca6d7d9 100644
--- a/arch/arm/plat-mxc/include/mach/ulpi.h
+++ b/arch/arm/mach-imx/ulpi.h
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index 350e26636a06..abeff25532ab 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -8,6 +8,7 @@ config ARCH_INTEGRATOR_AP
         select MIGHT_HAVE_PCI
         select SERIAL_AMBA_PL010
         select SERIAL_AMBA_PL010_CONSOLE
+        select SOC_BUS
         help
           Include support for the ARM(R) Integrator/AP and
           Integrator/PP2 platforms.
@@ -19,6 +20,7 @@ config ARCH_INTEGRATOR_CP
         select PLAT_VERSATILE_CLCD
         select SERIAL_AMBA_PL011
         select SERIAL_AMBA_PL011_CONSOLE
+        select SOC_BUS
         help
           Include support for the ARM(R) Integrator CP platform.
 
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index c3ff21b5ea24..79197d8b34aa 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,6 +1,12 @@
 #include <linux/amba/serial.h>
-extern struct amba_pl010_data integrator_uart_data;
+#ifdef CONFIG_ARCH_INTEGRATOR_AP
+extern struct amba_pl010_data ap_uart_data;
+#else
+/* Not used without Integrator/AP support anyway */
+struct amba_pl010_data ap_uart_data {};
+#endif
 void integrator_init_early(void);
 int integrator_init(bool is_cp);
 void integrator_reserve(void);
 void integrator_restart(char, const char *);
+void integrator_init_sysfs(struct device *parent, u32 id);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index ea22a17246d7..39c060f75e47 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -18,10 +18,10 @@
 #include <linux/memblock.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
-#include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
 #include <linux/io.h>
+#include <linux/stat.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -46,10 +46,10 @@ static AMBA_APB_DEVICE(rtc, "rtc", 0,
         INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
 
 static AMBA_APB_DEVICE(uart0, "uart0", 0,
-        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
+        INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, NULL);
 
 static AMBA_APB_DEVICE(uart1, "uart1", 0,
-        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
+        INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, NULL);
 
 static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL);
 static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL);
@@ -77,6 +77,8 @@ int __init integrator_init(bool is_cp)
                 uart1_device.periphid   = 0x00041010;
                 kmi0_device.periphid    = 0x00041050;
                 kmi1_device.periphid    = 0x00041050;
+                uart0_device.dev.platform_data = &ap_uart_data;
+                uart1_device.dev.platform_data = &ap_uart_data;
         }
 
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
@@ -89,49 +91,6 @@ int __init integrator_init(bool is_cp)
 
 #endif
 
-/*
- * On the Integrator platform, the port RTS and DTR are provided by
- * bits in the following SC_CTRLS register bits:
- *        RTS  DTR
- *  UART0  7    6
- *  UART1  5    4
- */
-#define SC_CTRLC        __io_address(INTEGRATOR_SC_CTRLC)
-#define SC_CTRLS        __io_address(INTEGRATOR_SC_CTRLS)
-
-static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
-{
-        unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
-        u32 phybase = dev->res.start;
-
-        if (phybase == INTEGRATOR_UART0_BASE) {
-                /* UART0 */
-                rts_mask = 1 << 4;
-                dtr_mask = 1 << 5;
-        } else {
-                /* UART1 */
-                rts_mask = 1 << 6;
-                dtr_mask = 1 << 7;
-        }
-
-        if (mctrl & TIOCM_RTS)
-                ctrlc |= rts_mask;
-        else
-                ctrls |= rts_mask;
-
-        if (mctrl & TIOCM_DTR)
-                ctrlc |= dtr_mask;
-        else
-                ctrls |= dtr_mask;
-
-        __raw_writel(ctrls, SC_CTRLS);
-        __raw_writel(ctrlc, SC_CTRLC);
-}
-
-struct amba_pl010_data integrator_uart_data = {
-        .set_mctrl = integrator_uart_set_mctrl,
-};
-
 static DEFINE_RAW_SPINLOCK(cm_lock);
 
 /**
@@ -169,3 +128,93 @@ void integrator_restart(char mode, const char *cmd)
 {
         cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
 }
+
+static u32 integrator_id;
+
+static ssize_t intcp_get_manf(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        return sprintf(buf, "%02x\n", integrator_id >> 24);
+}
+
+static struct device_attribute intcp_manf_attr =
+        __ATTR(manufacturer,  S_IRUGO, intcp_get_manf,  NULL);
+
+static ssize_t intcp_get_arch(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        const char *arch;
+
+        switch ((integrator_id >> 16) & 0xff) {
+        case 0x00:
+                arch = "ASB little-endian";
+                break;
+        case 0x01:
+                arch = "AHB little-endian";
+                break;
+        case 0x03:
+                arch = "AHB-Lite system bus, bi-endian";
+                break;
+        case 0x04:
+                arch = "AHB";
+                break;
+        default:
+                arch = "Unknown";
+                break;
+        }
+
+        return sprintf(buf, "%s\n", arch);
+}
+
+static struct device_attribute intcp_arch_attr =
+        __ATTR(architecture,  S_IRUGO, intcp_get_arch,  NULL);
+
+static ssize_t intcp_get_fpga(struct device *dev,
+                              struct device_attribute *attr,
+                              char *buf)
+{
+        const char *fpga;
+
+        switch ((integrator_id >> 12) & 0xf) {
+        case 0x01:
+                fpga = "XC4062";
+                break;
+        case 0x02:
+                fpga = "XC4085";
+                break;
+        case 0x04:
+                fpga = "EPM7256AE (Altera PLD)";
+                break;
+        default:
+                fpga = "Unknown";
+                break;
+        }
+
+        return sprintf(buf, "%s\n", fpga);
+}
+
+static struct device_attribute intcp_fpga_attr =
+        __ATTR(fpga,  S_IRUGO, intcp_get_fpga,  NULL);
+
+static ssize_t intcp_get_build(struct device *dev,
+                               struct device_attribute *attr,
+                               char *buf)
+{
+        return sprintf(buf, "%02x\n", (integrator_id >> 4) & 0xFF);
+}
+
+static struct device_attribute intcp_build_attr =
+        __ATTR(build,  S_IRUGO, intcp_get_build,  NULL);
+
+
+
+void integrator_init_sysfs(struct device *parent, u32 id)
+{
+        integrator_id = id;
+        device_create_file(parent, &intcp_manf_attr);
+        device_create_file(parent, &intcp_arch_attr);
+        device_create_file(parent, &intcp_fpga_attr);
+        device_create_file(parent, &intcp_build_attr);
+}
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index efeac5d0bc9e..be5859efe10e 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -190,7 +190,6 @@
 #define INTEGRATOR_SC_CTRLC_OFFSET      0x0C
 #define INTEGRATOR_SC_DEC_OFFSET        0x10
 #define INTEGRATOR_SC_ARB_OFFSET        0x14
-#define INTEGRATOR_SC_PCIENABLE_OFFSET  0x18
 #define INTEGRATOR_SC_LOCK_OFFSET       0x1C
 
 #define INTEGRATOR_SC_BASE              0x11000000
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index e6617c134faf..a0a7cbbb7a70 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -37,6 +37,9 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/stat.h>
+#include <linux/sys_soc.h>
+#include <linux/termios.h>
 #include <video/vga.h>
 
 #include <mach/hardware.h>
@@ -60,7 +63,10 @@
 
 #include "common.h"
 
-/* 
+/* Base address to the AP system controller */
+void __iomem *ap_syscon_base;
+
+/*
  * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
  * is the (PA >> 12).
  *
@@ -68,7 +74,6 @@
  * just for now).
  */
 #define VA_IC_BASE      __io_address(INTEGRATOR_IC_BASE)
-#define VA_SC_BASE      __io_address(INTEGRATOR_SC_BASE)
 #define VA_EBI_BASE     __io_address(INTEGRATOR_EBI_BASE)
 #define VA_CMIC_BASE    __io_address(INTEGRATOR_HDR_IC)
 
@@ -97,11 +102,6 @@ static struct map_desc ap_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
                 .length         = SZ_4K,
@@ -122,11 +122,6 @@ static struct map_desc ap_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_UART1_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_UART1_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_DBG_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_DBG_BASE),
                 .length         = SZ_4K,
@@ -201,8 +196,6 @@ device_initcall(irq_syscore_init);
 /*
  * Flash handling.
  */
-#define SC_CTRLC (VA_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET)
-#define SC_CTRLS (VA_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET)
 #define EBI_CSR1 (VA_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
 #define EBI_LOCK (VA_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)
 
@@ -210,7 +203,8 @@ static int ap_flash_init(struct platform_device *dev)
 {
         u32 tmp;
 
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
+        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
+               ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 
         tmp = readl(EBI_CSR1) | INTEGRATOR_EBI_WRITE_ENABLE;
         writel(tmp, EBI_CSR1);
@@ -227,7 +221,8 @@ static void ap_flash_exit(struct platform_device *dev)
 {
         u32 tmp;
 
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, SC_CTRLC);
+        writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP,
+               ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 
         tmp = readl(EBI_CSR1) & ~INTEGRATOR_EBI_WRITE_ENABLE;
         writel(tmp, EBI_CSR1);
@@ -241,9 +236,12 @@ static void ap_flash_exit(struct platform_device *dev)
 
 static void ap_flash_set_vpp(struct platform_device *pdev, int on)
 {
-        void __iomem *reg = on ? SC_CTRLS : SC_CTRLC;
-
-        writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg);
+        if (on)
+                writel(INTEGRATOR_SC_CTRL_nFLVPPEN,
+                       ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
+        else
+                writel(INTEGRATOR_SC_CTRL_nFLVPPEN,
+                       ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
 }
 
 static struct physmap_flash_data ap_flash_data = {
@@ -254,6 +252,45 @@ static struct physmap_flash_data ap_flash_data = {
 };
 
 /*
+ * For the PL010 found in the Integrator/AP some of the UART control is
+ * implemented in the system controller and accessed using a callback
+ * from the driver.
+ */
+static void integrator_uart_set_mctrl(struct amba_device *dev,
+                                void __iomem *base, unsigned int mctrl)
+{
+        unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
+        u32 phybase = dev->res.start;
+
+        if (phybase == INTEGRATOR_UART0_BASE) {
+                /* UART0 */
+                rts_mask = 1 << 4;
+                dtr_mask = 1 << 5;
+        } else {
+                /* UART1 */
+                rts_mask = 1 << 6;
+                dtr_mask = 1 << 7;
+        }
+
+        if (mctrl & TIOCM_RTS)
+                ctrlc |= rts_mask;
+        else
+                ctrls |= rts_mask;
+
+        if (mctrl & TIOCM_DTR)
+                ctrlc |= dtr_mask;
+        else
+                ctrls |= dtr_mask;
+
+        __raw_writel(ctrls, ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET);
+        __raw_writel(ctrlc, ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET);
+}
+
+struct amba_pl010_data ap_uart_data = {
+        .set_mctrl = integrator_uart_set_mctrl,
+};
+
+/*
  * Where is the timer (VA)?
  */
 #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
@@ -450,9 +487,9 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
                 "rtc", NULL),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
-                "uart0", &integrator_uart_data),
+                "uart0", &ap_uart_data),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
-                "uart1", &integrator_uart_data),
+                "uart1", &ap_uart_data),
         OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
                 "kmi0", NULL),
         OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
@@ -465,12 +502,60 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
 static void __init ap_init_of(void)
 {
         unsigned long sc_dec;
+        struct device_node *root;
+        struct device_node *syscon;
+        struct device *parent;
+        struct soc_device *soc_dev;
+        struct soc_device_attribute *soc_dev_attr;
+        u32 ap_sc_id;
+        int err;
         int i;
 
-        of_platform_populate(NULL, of_default_bus_match_table,
-                        ap_auxdata_lookup, NULL);
+        /* Here we create an SoC device for the root node */
+        root = of_find_node_by_path("/");
+        if (!root)
+                return;
+        syscon = of_find_node_by_path("/syscon");
+        if (!syscon)
+                return;
+
+        ap_syscon_base = of_iomap(syscon, 0);
+        if (!ap_syscon_base)
+                return;
 
-        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        ap_sc_id = readl(ap_syscon_base);
+
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return;
+
+        err = of_property_read_string(root, "compatible",
+                                      &soc_dev_attr->soc_id);
+        if (err)
+                return;
+        err = of_property_read_string(root, "model", &soc_dev_attr->machine);
+        if (err)
+                return;
+        soc_dev_attr->family = "Integrator";
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
+                                           'A' + (ap_sc_id & 0x0f));
+
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR_OR_NULL(soc_dev)) {
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr);
+                return;
+        }
+
+        parent = soc_device_to_device(soc_dev);
+
+        if (!IS_ERR_OR_NULL(parent))
+                integrator_init_sysfs(parent, ap_sc_id);
+
+        of_platform_populate(root, of_default_bus_match_table,
+                        ap_auxdata_lookup, parent);
+
+        sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
         for (i = 0; i < 4; i++) {
                 struct lm_device *lmdev;
 
@@ -514,6 +599,27 @@ MACHINE_END
 #ifdef CONFIG_ATAGS
 
 /*
+ * For the ATAG boot some static mappings are needed. This will
+ * go away with the ATAG support down the road.
+ */
+
+static struct map_desc ap_io_desc_atag[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
+                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
+        },
+};
+
+static void __init ap_map_io_atag(void)
+{
+        iotable_init(ap_io_desc_atag, ARRAY_SIZE(ap_io_desc_atag));
+        ap_syscon_base = __io_address(INTEGRATOR_SC_BASE);
+        ap_map_io();
+}
+
+/*
  * This is where non-devicetree initialization code is collected and stashed
  * for eventual deletion.
  */
@@ -581,7 +687,7 @@ static void __init ap_init(void)
 
         platform_device_register(&cfi_flash_device);
 
-        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
         for (i = 0; i < 4; i++) {
                 struct lm_device *lmdev;
 
@@ -608,7 +714,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
-        .map_io         = ap_map_io,
+        .map_io         = ap_map_io_atag,
         .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
         .init_early     = ap_init_early,
         .init_irq       = ap_init_irq,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5b08e8e4cc83..29df06b35d0d 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -26,6 +26,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/of_platform.h>
+#include <linux/sys_soc.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -51,11 +52,13 @@
 
 #include "common.h"
 
+/* Base address to the CP controller */
+static void __iomem *intcp_con_base;
+
 #define INTCP_PA_FLASH_BASE             0x24000000
 
 #define INTCP_PA_CLCD_BASE              0xc0000000
 
-#define INTCP_VA_CTRL_BASE              __io_address(INTEGRATOR_CP_CTL_BASE)
 #define INTCP_FLASHPROG                 0x04
 #define CINTEGRATOR_FLASHPROG_FLVPPEN   (1 << 0)
 #define CINTEGRATOR_FLASHPROG_FLWREN    (1 << 1)
@@ -82,11 +85,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_SC_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_SC_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_EBI_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_EBI_BASE),
                 .length         = SZ_4K,
@@ -107,11 +105,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
         }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_UART1_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_UART1_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
-        }, {
                 .virtual        = IO_ADDRESS(INTEGRATOR_DBG_BASE),
                 .pfn            = __phys_to_pfn(INTEGRATOR_DBG_BASE),
                 .length         = SZ_4K,
@@ -126,11 +119,6 @@ static struct map_desc intcp_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE
-        }, {
-                .virtual        = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
-                .pfn            = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE
         }
 };
 
@@ -146,9 +134,9 @@ static int intcp_flash_init(struct platform_device *dev)
 {
         u32 val;
 
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
         val |= CINTEGRATOR_FLASHPROG_FLWREN;
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 
         return 0;
 }
@@ -157,21 +145,21 @@ static void intcp_flash_exit(struct platform_device *dev)
 {
         u32 val;
 
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
         val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN);
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 }
 
 static void intcp_flash_set_vpp(struct platform_device *pdev, int on)
 {
         u32 val;
 
-        val = readl(INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        val = readl(intcp_con_base + INTCP_FLASHPROG);
         if (on)
                 val |= CINTEGRATOR_FLASHPROG_FLVPPEN;
         else
                 val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN;
-        writel(val, INTCP_VA_CTRL_BASE + INTCP_FLASHPROG);
+        writel(val, intcp_con_base + INTCP_FLASHPROG);
 }
 
 static struct physmap_flash_data intcp_flash_data = {
@@ -190,7 +178,7 @@ static struct physmap_flash_data intcp_flash_data = {
 static unsigned int mmc_status(struct device *dev)
 {
         unsigned int status = readl(__io_address(0xca000000 + 4));
-        writel(8, __io_address(INTEGRATOR_CP_CTL_BASE + 8));
+        writel(8, intcp_con_base + 8);
 
         return status & 8;
 }
@@ -318,9 +306,9 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
                 "rtc", NULL),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
-                "uart0", &integrator_uart_data),
+                "uart0", NULL),
         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
-                "uart1", &integrator_uart_data),
+                "uart1", NULL),
         OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
                 "kmi0", NULL),
         OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
@@ -338,8 +326,57 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
 
 static void __init intcp_init_of(void)
 {
-        of_platform_populate(NULL, of_default_bus_match_table,
-                        intcp_auxdata_lookup, NULL);
+        struct device_node *root;
+        struct device_node *cpcon;
+        struct device *parent;
+        struct soc_device *soc_dev;
+        struct soc_device_attribute *soc_dev_attr;
+        u32 intcp_sc_id;
+        int err;
+
+        /* Here we create an SoC device for the root node */
+        root = of_find_node_by_path("/");
+        if (!root)
+                return;
+        cpcon = of_find_node_by_path("/cpcon");
+        if (!cpcon)
+                return;
+
+        intcp_con_base = of_iomap(cpcon, 0);
+        if (!intcp_con_base)
+                return;
+
+        intcp_sc_id = readl(intcp_con_base);
+
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return;
+
+        err = of_property_read_string(root, "compatible",
+                                      &soc_dev_attr->soc_id);
+        if (err)
+                return;
+        err = of_property_read_string(root, "model", &soc_dev_attr->machine);
+        if (err)
+                return;
+        soc_dev_attr->family = "Integrator";
+        soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
+                                           'A' + (intcp_sc_id & 0x0f));
+
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR_OR_NULL(soc_dev)) {
+                kfree(soc_dev_attr->revision);
+                kfree(soc_dev_attr);
+                return;
+        }
+
+        parent = soc_device_to_device(soc_dev);
+
+        if (!IS_ERR_OR_NULL(parent))
+                integrator_init_sysfs(parent, intcp_sc_id);
+
+        of_platform_populate(root, of_default_bus_match_table,
+                        intcp_auxdata_lookup, parent);
 }
 
 static const char * intcp_dt_board_compat[] = {
@@ -365,6 +402,28 @@ MACHINE_END
 #ifdef CONFIG_ATAGS
 
 /*
+ * For the ATAG boot some static mappings are needed. This will
+ * go away with the ATAG support down the road.
+ */
+
+static struct map_desc intcp_io_desc_atag[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(INTEGRATOR_CP_CTL_BASE),
+                .pfn            = __phys_to_pfn(INTEGRATOR_CP_CTL_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE
+        },
+};
+
+static void __init intcp_map_io_atag(void)
+{
+        iotable_init(intcp_io_desc_atag, ARRAY_SIZE(intcp_io_desc_atag));
+        intcp_con_base = __io_address(INTEGRATOR_CP_CTL_BASE);
+        intcp_map_io();
+}
+
+
+/*
  * This is where non-devicetree initialization code is collected and stashed
  * for eventual deletion.
  */
@@ -503,7 +562,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
-        .map_io         = intcp_map_io,
+        .map_io         = intcp_map_io_atag,
         .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
         .init_early     = intcp_init_early,
         .init_irq       = intcp_init_irq,
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index bbeca59df66b..be50e795536d 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -191,12 +191,9 @@ static void __iomem *v3_open_config_window(struct pci_bus *bus,
         /*
          * Trap out illegal values
          */
-        if (offset > 255)
-                BUG();
-        if (busnr > 255)
-                BUG();
-        if (devfn > 255)
-                BUG();
+        BUG_ON(offset > 255);
+        BUG_ON(busnr > 255);
+        BUG_ON(devfn > 255);
 
         if (busnr == 0) {
                 int slot = PCI_SLOT(devfn);
@@ -388,9 +385,10 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
  * means I can't get additional information on the reason for the pm2fb
  * problems.  I suppose I'll just have to mind-meld with the machine. ;)
  */
-#define SC_PCI     __io_address(INTEGRATOR_SC_PCIENABLE)
-#define SC_LBFADDR __io_address(INTEGRATOR_SC_BASE + 0x20)
-#define SC_LBFCODE __io_address(INTEGRATOR_SC_BASE + 0x24)
+static void __iomem *ap_syscon_base;
+#define INTEGRATOR_SC_PCIENABLE_OFFSET  0x18
+#define INTEGRATOR_SC_LBFADDR_OFFSET    0x20
+#define INTEGRATOR_SC_LBFCODE_OFFSET    0x24
 
 static int
 v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
@@ -401,13 +399,13 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         char buf[128];
 
         sprintf(buf, "V3 fault: addr 0x%08lx, FSR 0x%03x, PC 0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n",
-                addr, fsr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255,
+                addr, fsr, pc, instr, __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET), __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255,
                 v3_readb(V3_LB_ISTAT));
         printk(KERN_DEBUG "%s", buf);
 #endif
 
         v3_writeb(V3_LB_ISTAT, 0);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
 
         /*
          * If the instruction being executed was a read,
@@ -449,15 +447,15 @@ static irqreturn_t v3_irq(int dummy, void *devid)
 
         sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x "
                 "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr,
-                __raw_readl(SC_LBFADDR),
-                __raw_readl(SC_LBFCODE) & 255,
+                __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFADDR_OFFSET),
+                __raw_readl(ap_syscon_base + INTEGRATOR_SC_LBFCODE_OFFSET) & 255,
                 v3_readb(V3_LB_ISTAT));
         printascii(buf);
 #endif
 
         v3_writew(V3_PCI_STAT, 0xf000);
         v3_writeb(V3_LB_ISTAT, 0);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
 
 #ifdef CONFIG_DEBUG_LL
         /*
@@ -480,6 +478,10 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
         if (nr == 0) {
                 sys->mem_offset = PHYS_PCI_MEM_BASE;
                 ret = pci_v3_setup_resources(sys);
+                /* Remap the Integrator system controller */
+                ap_syscon_base = ioremap(INTEGRATOR_SC_BASE, 0x100);
+                if (!ap_syscon_base)
+                        return -EINVAL;
         }
 
         return ret;
@@ -568,7 +570,7 @@ void __init pci_v3_preinit(void)
         v3_writeb(V3_LB_ISTAT, 0);
         v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10));
         v3_writeb(V3_LB_IMASK, 0x28);
-        __raw_writel(3, SC_PCI);
+        __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET);
 
         /*
          * Grab the PCI error interrupt.
diff --git a/arch/arm/mach-kirkwood/board-dockstar.c b/arch/arm/mach-kirkwood/board-dockstar.c
index f2fbb023e679..6912882b0aa9 100644
--- a/arch/arm/mach-kirkwood/board-dockstar.c
+++ b/arch/arm/mach-kirkwood/board-dockstar.c
@@ -16,21 +16,8 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
 #include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/kirkwood.h>
-#include <mach/bridge-regs.h>
-#include <linux/platform_data/mmc-mvsdio.h>
 #include "common.h"
 #include "mpp.h"
 
diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c
index 20af53a56c0e..8a8ebe09e512 100644
--- a/arch/arm/mach-kirkwood/board-dreamplug.c
+++ b/arch/arm/mach-kirkwood/board-dreamplug.c
@@ -13,23 +13,8 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
 #include <linux/gpio.h>
-#include <linux/mtd/physmap.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/kirkwood.h>
-#include <mach/bridge-regs.h>
 #include <linux/platform_data/mmc-mvsdio.h>
 #include "common.h"
 #include "mpp.h"
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index d94872fed8c0..e75fbdb533de 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -26,7 +26,7 @@ static struct of_device_id kirkwood_dt_match_table[] __initdata = {
         { }
 };
 
-struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = {
+static struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
         OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
                        NULL),
@@ -98,7 +98,7 @@ static void __init kirkwood_dt_init(void)
                              kirkwood_auxdata_lookup, NULL);
 }
 
-static const char *kirkwood_dt_board_compat[] = {
+static const char * const kirkwood_dt_board_compat[] = {
         "globalscale,dreamplug",
         "dlink,dns-320",
         "dlink,dns-325",
diff --git a/arch/arm/mach-kirkwood/board-goflexnet.c b/arch/arm/mach-kirkwood/board-goflexnet.c
index 001ca8c96980..5dcd0d62aa42 100644
--- a/arch/arm/mach-kirkwood/board-goflexnet.c
+++ b/arch/arm/mach-kirkwood/board-goflexnet.c
@@ -18,21 +18,8 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
 #include <linux/gpio.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <mach/kirkwood.h>
-#include <mach/bridge-regs.h>
-#include <linux/platform_data/mmc-mvsdio.h>
 #include "common.h"
 #include "mpp.h"
 
diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c
index cfc47f80e734..6d3a56421142 100644
--- a/arch/arm/mach-kirkwood/board-ib62x0.c
+++ b/arch/arm/mach-kirkwood/board-ib62x0.c
@@ -13,15 +13,9 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
 #include <linux/input.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
 #include "common.h"
 #include "mpp.h"
 
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
index d084b1e2943a..24f5aa7f698b 100644
--- a/arch/arm/mach-kirkwood/board-iconnect.c
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -10,16 +10,8 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
 #include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
-#include <linux/of_platform.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
 #include "common.h"
 #include "mpp.h"
 
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
index 158fb97d0397..e4ed62c28f54 100644
--- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
+++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c
@@ -10,10 +10,8 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/ethtool.h>
-#include <mach/kirkwood.h>
 #include "common.h"
 #include "mpp.h"
 
diff --git a/arch/arm/mach-kirkwood/board-lsxl.c b/arch/arm/mach-kirkwood/board-lsxl.c
index 83d8975592f8..64e5cc6b6d5f 100644
--- a/arch/arm/mach-kirkwood/board-lsxl.c
+++ b/arch/arm/mach-kirkwood/board-lsxl.c
@@ -14,17 +14,9 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/gpio.h>
 #include <linux/gpio-fan.h>
-#include <linux/input.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
 #include "common.h"
 #include "mpp.h"
 
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c
index 1750e68506c1..f3bfedae3a20 100644
--- a/arch/arm/mach-kirkwood/board-ts219.c
+++ b/arch/arm/mach-kirkwood/board-ts219.c
@@ -19,9 +19,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/mv643xx_eth.h>
-#include <linux/ata_platform.h>
-#include <linux/gpio_keys.h>
-#include <linux/input.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/kirkwood.h>
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 2c6c218fb79e..f0fc25bd3ffe 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -18,10 +18,10 @@
 #include <linux/clk-provider.h>
 #include <linux/spinlock.h>
 #include <linux/mv643xx_i2c.h>
+#include <linux/timex.h>
+#include <linux/kexec.h>
 #include <net/dsa.h>
 #include <asm/page.h>
-#include <asm/timex.h>
-#include <asm/kexec.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <mach/kirkwood.h>
@@ -425,7 +425,7 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 /*****************************************************************************
  * SPI
  ****************************************************************************/
-void __init kirkwood_spi_init()
+void __init kirkwood_spi_init(void)
 {
         orion_spi_init(SPI_PHYS_BASE);
 }
@@ -646,8 +646,7 @@ void __init kirkwood_l2_init(void)
 
 void __init kirkwood_init(void)
 {
-        printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
-                kirkwood_id(), kirkwood_tclk);
+        pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
 
         /*
          * Disable propagation of mbus errors to the CPU local bus,
@@ -671,7 +670,7 @@ void __init kirkwood_init(void)
         kirkwood_xor1_init();
         kirkwood_crypto_init();
 
-#ifdef CONFIG_KEXEC 
+#ifdef CONFIG_KEXEC
         kexec_reinit = kirkwood_enable_pcie;
 #endif
 }
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index bcffd7ca1ca2..6088e9227889 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -47,7 +47,8 @@ void kirkwood_i2c_init(void);
 void kirkwood_uart0_init(void);
 void kirkwood_uart1_init(void);
 void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
-void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));
+void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
+                            int (*dev_ready)(struct mtd_info *));
 void kirkwood_audio_init(void);
 void kirkwood_restart(char, const char *);
 void kirkwood_clk_init(void);
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
index 0f1710941878..f7304670f2f8 100644
--- a/arch/arm/mach-kirkwood/cpuidle.c
+++ b/arch/arm/mach-kirkwood/cpuidle.c
@@ -64,7 +64,7 @@ static int kirkwood_init_cpuidle(void)
 
         cpuidle_register_driver(&kirkwood_idle_driver);
         if (cpuidle_register_device(device)) {
-                printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
+                pr_err("kirkwood_init_cpuidle: Failed registering\n");
                 return -EIO;
         }
         return 0;
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
index 23dcb19cc2a7..791a98fafa29 100644
--- a/arch/arm/mach-kirkwood/dockstar-setup.c
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -93,7 +93,7 @@ static void __init dockstar_init(void)
 
         if (gpio_request(29, "USB Power Enable") != 0 ||
             gpio_direction_output(29, 1) != 0)
-                printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n");
+                pr_err("can't set up GPIO 29 (USB Power Enable)\n");
         kirkwood_ehci_init();
 
         kirkwood_ge00_init(&dockstar_ge00_data);
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index 884703535a0a..2a97a2e4163c 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -14,6 +14,7 @@
 #include <mach/bridge-regs.h>
 #include <plat/orion-gpio.h>
 #include <plat/irq.h>
+#include "common.h"
 
 static int __initdata gpio0_irqs[4] = {
         IRQ_KIRKWOOD_GPIO_LOW_0_7,
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c
index 285edab776e9..489495976fcd 100644
--- a/arch/arm/mach-kirkwood/lacie_v2-common.c
+++ b/arch/arm/mach-kirkwood/lacie_v2-common.c
@@ -19,6 +19,7 @@
 #include <mach/irqs.h>
 #include <plat/time.h>
 #include "common.h"
+#include "lacie_v2-common.h"
 
 /*****************************************************************************
  * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005)
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 0c6ad63f10c7..827cde42414f 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -30,8 +30,8 @@ static unsigned int __init kirkwood_variant(void)
         if (dev == MV88F6180_DEV_ID)
                 return MPP_F6180_MASK;
 
-        printk(KERN_ERR "MPP setup: unknown kirkwood variant "
-                        "(dev %#x rev %#x)\n", dev, rev);
+        pr_err("MPP setup: unknown kirkwood variant (dev %#x rev %#x)\n",
+               dev, rev);
         return 0;
 }
 
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 88b0788bacae..728e86d33f0c 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -79,7 +79,7 @@ static struct platform_device netspace_v2_gpio_buttons = {
         .name           = "gpio-keys",
         .id             = -1,
         .dev            = {
-                .platform_data  = &netspace_v2_button_data,
+                .platform_data  = &netspace_v2_button_data,
         },
 };
 
@@ -211,7 +211,7 @@ static unsigned int netspace_v2_mpp_config[] __initdata = {
         MPP29_GPIO,             /* Blue led (slow register) */
         MPP30_GPIO,             /* Blue led (command register) */
         MPP31_GPIO,             /* Board power off */
-        MPP32_GPIO,             /* Power button (0 = Released, 1 = Pushed) */
+        MPP32_GPIO,             /* Power button (0 = Released, 1 = Pushed) */
         MPP33_GPO,              /* Fan speed (bit 2) */
         0
 };
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index 134ef50d58fc..7e81e9b586bf 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -121,14 +121,12 @@ static int __init uart1_mpp_config(void)
         kirkwood_mpp_conf(openrd_uart1_mpp_config);
 
         if (gpio_request(34, "SD_UART1_SEL")) {
-                printk(KERN_ERR "GPIO request failed for SD/UART1 selection"
-                                ", gpio: 34\n");
+                pr_err("GPIO request 34 failed for SD/UART1 selection\n");
                 return -EIO;
         }
 
         if (gpio_request(28, "RS232_RS485_SEL")) {
-                printk(KERN_ERR "GPIO request failed for RS232/RS485 selection"
-                                ", gpio# 28\n");
+                pr_err("GPIO request 28 failed for RS232/RS485 selection\n");
                 gpio_free(34);
                 return -EIO;
         }
@@ -185,15 +183,13 @@ static void __init openrd_init(void)
 
         if (uart1 <= 0) {
                 if (uart1 < 0)
-                        printk(KERN_ERR "Invalid kernel parameter to select "
-                                "UART1. Defaulting to SD. ERROR CODE: %d\n",
-                                uart1);
+                        pr_err("Invalid kernel parameter to select UART1. Defaulting to SD. ERROR CODE: %d\n",
+                               uart1);
 
                 /* Select SD
                  * Pin # 34: 0 => UART1, 1 => SD */
                 if (gpio_request(34, "SD_UART1_SEL")) {
-                        printk(KERN_ERR "GPIO request failed for SD/UART1 "
-                                        "selection, gpio: 34\n");
+                        pr_err("GPIO request 34 failed for SD/UART1 selection\n");
                 } else {
 
                         gpio_direction_output(34, 1);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ec544918b12c..1e9f90ee0f5c 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -26,7 +26,7 @@ static void kirkwood_enable_pcie_clk(const char *port)
 
         clk = clk_get_sys("pcie", port);
         if (IS_ERR(clk)) {
-                printk(KERN_ERR "PCIE clock %s missing\n", port);
+                pr_err("PCIE clock %s missing\n", port);
                 return;
         }
         clk_prepare_enable(clk);
@@ -168,7 +168,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
                 return 0;
 
         index = pcie_port_map[nr];
-        printk(KERN_INFO "PCI: bus%d uses PCIe port %d\n", sys->busnr, index);
+        pr_info("PCI: bus%d uses PCIe port %d\n", sys->busnr, index);
 
         pp = kzalloc(sizeof(*pp), GFP_KERNEL);
         if (!pp)
@@ -186,7 +186,8 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
         case 1:
                 kirkwood_enable_pcie_clk("1");
                 pcie1_ioresources_init(pp);
-                pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE1_IO_PHYS_BASE);
+                pci_ioremap_io(SZ_64K * sys->busnr,
+                               KIRKWOOD_PCIE1_IO_PHYS_BASE);
                 break;
         default:
                 panic("PCIe setup: invalid controller %d", index);
@@ -224,22 +225,6 @@ static void __devinit rc_pci_fixup(struct pci_dev *dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
 
-static struct pci_bus __init *
-kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)
-{
-        struct pci_bus *bus;
-
-        if (nr < num_pcie_ports) {
-                bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
-                                        &sys->resources);
-        } else {
-                bus = NULL;
-                BUG();
-        }
-
-        return bus;
-}
-
 static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot,
         u8 pin)
 {
@@ -251,19 +236,19 @@ static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot,
 
 static struct hw_pci kirkwood_pci __initdata = {
         .setup          = kirkwood_pcie_setup,
-        .scan           = kirkwood_pcie_scan_bus,
         .map_irq        = kirkwood_pcie_map_irq,
+        .ops            = &pcie_ops,
 };
 
 static void __init add_pcie_port(int index, void __iomem *base)
 {
-        printk(KERN_INFO "Kirkwood PCIe port %d: ", index);
+        pr_info("Kirkwood PCIe port %d: ", index);
 
         if (orion_pcie_link_up(base)) {
-                printk(KERN_INFO "link up\n");
+                pr_info("link up\n");
                 pcie_port_map[num_pcie_ports++] = index;
         } else
-                printk(KERN_INFO "link down, ignoring\n");
+                pr_info("link down, ignoring\n");
 }
 
 void __init kirkwood_pcie_init(unsigned int portmask)
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 28d0abaf4bd9..8a175948b28d 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -117,7 +117,7 @@ static void __init sheevaplug_init(void)
 
         if (gpio_request(29, "USB Power Enable") != 0 ||
             gpio_direction_output(29, 1) != 0)
-                printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n");
+                pr_err("can't set up GPIO 29 (USB Power Enable)\n");
         kirkwood_ehci_init();
 
         kirkwood_ge00_init(&sheevaplug_ge00_data);
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c
index bad738e44044..f2daf711e72e 100644
--- a/arch/arm/mach-kirkwood/t5325-setup.c
+++ b/arch/arm/mach-kirkwood/t5325-setup.c
@@ -29,7 +29,7 @@
 #include "common.h"
 #include "mpp.h"
 
-struct mtd_partition hp_t5325_partitions[] = {
+static struct mtd_partition hp_t5325_partitions[] = {
         {
                 .name           = "u-boot env",
                 .size           = SZ_64K,
@@ -59,14 +59,14 @@ struct mtd_partition hp_t5325_partitions[] = {
         },
 };
 
-const struct flash_platform_data hp_t5325_flash = {
+static const struct flash_platform_data hp_t5325_flash = {
         .type           = "mx25l8005",
         .name           = "spi_flash",
         .parts          = hp_t5325_partitions,
         .nr_parts       = ARRAY_SIZE(hp_t5325_partitions),
 };
 
-struct spi_board_info __initdata hp_t5325_spi_slave_info[] = {
+static struct spi_board_info __initdata hp_t5325_spi_slave_info[] = {
         {
                 .modalias       = "m25p80",
                 .platform_data  = &hp_t5325_flash,
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index 367a9400f532..e4c61279ea86 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -170,8 +170,7 @@ static int __init ts41x_pci_init(void)
                 else
                         kirkwood_pcie_init(KW_PCIE0);
         }
-
-   return 0;
+        return 0;
 }
 subsys_initcall(ts41x_pci_init);
 
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c
index 8943ede29b44..cec87cef76ca 100644
--- a/arch/arm/mach-kirkwood/tsx1x-common.c
+++ b/arch/arm/mach-kirkwood/tsx1x-common.c
@@ -7,6 +7,7 @@
 #include <linux/serial_reg.h>
 #include <mach/kirkwood.h>
 #include "common.h"
+#include "tsx1x-common.h"
 
 /*
  * QNAP TS-x1x Boards flash
@@ -29,7 +30,7 @@
  *
  ***************************************************************************/
 
-struct mtd_partition qnap_tsx1x_partitions[] = {
+static struct mtd_partition qnap_tsx1x_partitions[] = {
         {
                 .name           = "U-Boot",
                 .size           = 0x00080000,
@@ -58,14 +59,14 @@ struct mtd_partition qnap_tsx1x_partitions[] = {
         },
 };
 
-const struct flash_platform_data qnap_tsx1x_flash = {
+static const struct flash_platform_data qnap_tsx1x_flash = {
         .type           = "m25p128",
         .name           = "spi_flash",
         .parts          = qnap_tsx1x_partitions,
         .nr_parts       = ARRAY_SIZE(qnap_tsx1x_partitions),
 };
 
-struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = {
+static struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = {
         {
                 .modalias       = "m25p80",
                 .platform_data  = &qnap_tsx1x_flash,
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index cd169c386161..f0e69cbc5baa 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,8 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram-init.o sram.o time.o irq.o mux.o flash.o \
+         serial.o devices.o dma.o
 obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
 
 ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index e255164ff087..a8fce3ccc707 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -625,7 +625,6 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
         .atag_offset    = 0x100,
         .map_io         = ams_delta_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = ams_delta_init,
         .init_late      = ams_delta_init_late,
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 4b6de70c47a6..e067f221f0f9 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -27,16 +27,16 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <mach/mux.h>
 #include <mach/flash.h>
-#include <plat/fpga.h>
 #include <linux/platform_data/keypad-omap.h>
 
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 /* fsample is pretty close to p2-sample */
 
@@ -123,9 +123,9 @@ static struct resource smc91x_resources[] = {
 
 static void __init fsample_init_smc91x(void)
 {
-        fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
+        __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
         mdelay(50);
-        fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
+        __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
                    H2P2_DBG_FPGA_LAN_RESET);
         mdelay(50);
 }
@@ -362,7 +362,6 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
         .atag_offset    = 0x100,
         .map_io         = omap_fsample_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_fsample_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 4ec579fdd366..608e7d2a2778 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -81,7 +81,6 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
         .atag_offset    = 0x100,
         .map_io         = omap16xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_generic_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index e1362ce48497..7119ef28e0ad 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -13,12 +13,11 @@
  */
 #include <linux/gpio.h>
 #include <linux/platform_device.h>
-
+#include <linux/platform_data/gpio-omap.h>
 #include <linux/i2c/tps65010.h>
 
-#include <plat/mmc.h>
-
 #include "board-h2.h"
+#include "mmc.h"
 
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 376f7f29ef77..9134b646f01b 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -39,8 +39,8 @@
 #include <asm/mach/map.h>
 
 #include <mach/mux.h>
-#include <plat/dma.h>
-#include <plat/tc.h>
+#include <plat-omap/dma-omap.h>
+#include <mach/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
 #include <mach/flash.h>
@@ -50,6 +50,7 @@
 
 #include "common.h"
 #include "board-h2.h"
+#include "dma.h"
 
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
 #define OMAP1610_ETHR_START             0x04000300
@@ -458,7 +459,6 @@ MACHINE_START(OMAP_H2, "TI-H2")
         .atag_offset    = 0x100,
         .map_io         = omap16xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = h2_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index c74daace8cd6..17d77914d769 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -16,9 +16,8 @@
 
 #include <linux/i2c/tps65010.h>
 
-#include <plat/mmc.h>
-
 #include "board-h3.h"
+#include "mmc.h"
 
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index ededdb7ef28c..bf213d1d8075 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -41,9 +41,9 @@
 #include <asm/mach/map.h>
 
 #include <mach/mux.h>
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <linux/platform_data/keypad-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/flash.h>
 
 #include <mach/hardware.h>
@@ -452,7 +452,6 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
         .atag_offset    = 0x100,
         .map_io         = omap16xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = h3_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 87ab2086ef96..356f816c84a6 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -43,7 +43,7 @@
 #include <asm/mach/arch.h>
 
 #include <mach/omap7xx.h>
-#include <plat/mmc.h>
+#include "mmc.h"
 
 #include <mach/irqs.h>
 #include <mach/usb.h>
@@ -600,7 +600,6 @@ MACHINE_START(HERALD, "HTC Herald")
         .atag_offset    = 0x100,
         .map_io         = htcherald_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = htcherald_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index db5f7d2976e7..f8033fab0f82 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -33,16 +33,15 @@
 
 #include <mach/mux.h>
 #include <mach/flash.h>
-#include <plat/fpga.h>
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <linux/platform_data/keypad-omap.h>
-#include <plat/mmc.h>
 
 #include <mach/hardware.h>
 #include <mach/usb.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "mmc.h"
 
 /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
 #define INNOVATOR1610_ETHR_START        0x04000300
@@ -215,7 +214,7 @@ static struct platform_device *innovator1510_devices[] __initdata = {
 
 static int innovator_get_pendown_state(void)
 {
-        return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
+        return !(__raw_readb(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
 }
 
 static const struct ads7846_platform_data innovator1510_ts_info = {
@@ -279,7 +278,7 @@ static struct platform_device *innovator1610_devices[] __initdata = {
 static void __init innovator_init_smc91x(void)
 {
         if (cpu_is_omap1510()) {
-                fpga_write(fpga_read(OMAP1510_FPGA_RST) & ~1,
+                __raw_writeb(__raw_readb(OMAP1510_FPGA_RST) & ~1,
                            OMAP1510_FPGA_RST);
                 udelay(750);
         } else {
@@ -335,10 +334,10 @@ static int mmc_set_power(struct device *dev, int slot, int power_on,
                                 int vdd)
 {
         if (power_on)
-                fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
+                __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) | (1 << 3),
                                 OMAP1510_FPGA_POWER);
         else
-                fpga_write(fpga_read(OMAP1510_FPGA_POWER) & ~(1 << 3),
+                __raw_writeb(__raw_readb(OMAP1510_FPGA_POWER) & ~(1 << 3),
                                 OMAP1510_FPGA_POWER);
 
         return 0;
@@ -390,14 +389,14 @@ static void __init innovator_init(void)
                 omap_cfg_reg(UART3_TX);
                 omap_cfg_reg(UART3_RX);
 
-                reg = fpga_read(OMAP1510_FPGA_POWER);
+                reg = __raw_readb(OMAP1510_FPGA_POWER);
                 reg |= OMAP1510_FPGA_PCR_COM1_EN;
-                fpga_write(reg, OMAP1510_FPGA_POWER);
+                __raw_writeb(reg, OMAP1510_FPGA_POWER);
                 udelay(10);
 
-                reg = fpga_read(OMAP1510_FPGA_POWER);
+                reg = __raw_readb(OMAP1510_FPGA_POWER);
                 reg |= OMAP1510_FPGA_PCR_COM2_EN;
-                fpga_write(reg, OMAP1510_FPGA_POWER);
+                __raw_writeb(reg, OMAP1510_FPGA_POWER);
                 udelay(10);
 
                 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
@@ -437,6 +436,7 @@ static void __init innovator_init(void)
  */
 static void __init innovator_map_io(void)
 {
+#ifdef CONFIG_ARCH_OMAP15XX
         omap15xx_map_io();
 
         iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc));
@@ -444,9 +444,10 @@ static void __init innovator_map_io(void)
 
         /* Dump the Innovator FPGA rev early - useful info for support. */
         pr_debug("Innovator FPGA Rev %d.%d Board Rev %d\n",
-                        fpga_read(OMAP1510_FPGA_REV_HIGH),
-                        fpga_read(OMAP1510_FPGA_REV_LOW),
-                        fpga_read(OMAP1510_FPGA_BOARD_REV));
+                        __raw_readb(OMAP1510_FPGA_REV_HIGH),
+                        __raw_readb(OMAP1510_FPGA_REV_LOW),
+                        __raw_readb(OMAP1510_FPGA_BOARD_REV));
+#endif
 }
 
 MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
@@ -454,7 +455,6 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
         .atag_offset    = 0x100,
         .map_io         = innovator_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = innovator_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 7d5c06d6a52a..3e8ead67e459 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -29,13 +29,13 @@
 #include <asm/mach/map.h>
 
 #include <mach/mux.h>
-#include <plat/mmc.h>
-#include <plat/clock.h>
 
 #include <mach/hardware.h>
 #include <mach/usb.h>
 
 #include "common.h"
+#include "clock.h"
+#include "mmc.h"
 
 #define ADS7846_PENDOWN_GPIO    15
 
@@ -251,7 +251,6 @@ MACHINE_START(NOKIA770, "Nokia 770")
         .atag_offset    = 0x100,
         .map_io         = omap16xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_nokia770_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 5973945a8741..872ea47cd28a 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -48,7 +48,7 @@
 
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/tc.h>
+#include <mach/tc.h>
 
 #include <mach/hardware.h>
 #include <mach/usb.h>
@@ -606,7 +606,6 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
         .atag_offset    = 0x100,
         .map_io         = omap16xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = osk_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 1c578d58923a..584b6fab894b 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -36,8 +36,8 @@
 
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/tc.h>
-#include <plat/dma.h>
+#include <mach/tc.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
 
@@ -45,6 +45,7 @@
 #include <mach/usb.h>
 
 #include "common.h"
+#include "dma.h"
 
 #define PALMTE_USBDETECT_GPIO   0
 #define PALMTE_USB_OR_DC_GPIO   1
@@ -264,7 +265,6 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
         .atag_offset    = 0x100,
         .map_io         = omap15xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmte_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 97158095083c..fbc986bfe69e 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -28,16 +28,16 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 #include <linux/platform_data/omap1_bl.h>
+#include <linux/platform_data/leds-omap.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat/led.h>
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
-#include <plat/tc.h>
+#include <plat-omap/dma-omap.h>
+#include <mach/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
 
@@ -45,6 +45,7 @@
 #include <mach/usb.h>
 
 #include "common.h"
+#include "dma.h"
 
 #define PALMTT_USBDETECT_GPIO   0
 #define PALMTT_CABLE_GPIO       1
@@ -310,7 +311,6 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
         .atag_offset    = 0x100,
         .map_io         = omap15xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmtt_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index e311032e7eeb..60d917a93763 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -38,8 +38,8 @@
 
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
-#include <plat/tc.h>
+#include <plat-omap/dma-omap.h>
+#include <mach/tc.h>
 #include <mach/irda.h>
 #include <linux/platform_data/keypad-omap.h>
 
@@ -47,6 +47,7 @@
 #include <mach/usb.h>
 
 #include "common.h"
+#include "dma.h"
 
 #define PALMZ71_USBDETECT_GPIO  0
 #define PALMZ71_PENIRQ_GPIO     6
@@ -326,7 +327,6 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
         .atag_offset    = 0x100,
         .map_io         = omap15xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmz71_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 198b05417bfc..9a7e483ed6fd 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -28,15 +28,15 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <mach/mux.h>
-#include <plat/fpga.h>
 #include <mach/flash.h>
 
 #include <mach/hardware.h>
 
 #include "iomap.h"
 #include "common.h"
+#include "fpga.h"
 
 static const unsigned int p2_keymap[] = {
         KEY(0, 0, KEY_UP),
@@ -231,9 +231,9 @@ static struct omap_lcd_config perseus2_lcd_config __initdata = {
 
 static void __init perseus2_init_smc91x(void)
 {
-        fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
+        __raw_writeb(1, H2P2_DBG_FPGA_LAN_RESET);
         mdelay(50);
-        fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
+        __raw_writeb(__raw_readb(H2P2_DBG_FPGA_LAN_RESET) & ~1,
                    H2P2_DBG_FPGA_LAN_RESET);
         mdelay(50);
 }
@@ -324,7 +324,6 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
         .atag_offset    = 0x100,
         .map_io         = omap_perseus2_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_perseus2_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-sx1-mmc.c b/arch/arm/mach-omap1/board-sx1-mmc.c
index 5932d56e17bf..4fcf19c78a08 100644
--- a/arch/arm/mach-omap1/board-sx1-mmc.c
+++ b/arch/arm/mach-omap1/board-sx1-mmc.c
@@ -16,9 +16,10 @@
 #include <linux/platform_device.h>
 
 #include <mach/hardware.h>
-#include <plat/mmc.h>
 #include <mach/board-sx1.h>
 
+#include "mmc.h"
+
 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
 
 static int mmc_set_power(struct device *dev, int slot, int power_on,
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 13bf2cc56814..1ebc7e08d6e5 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -36,15 +36,16 @@
 
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/irda.h>
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <mach/board-sx1.h>
 
 #include <mach/hardware.h>
 #include <mach/usb.h>
 
 #include "common.h"
+#include "dma.h"
 
 /* Write to I2C device */
 int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
@@ -403,7 +404,6 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
         .atag_offset    = 0x100,
         .map_io         = omap15xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_sx1_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index ad75e3411d46..abf705f49b19 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -34,7 +34,7 @@
 #include <mach/board-voiceblue.h>
 #include <mach/flash.h>
 #include <mach/mux.h>
-#include <plat/tc.h>
+#include <mach/tc.h>
 
 #include <mach/hardware.h>
 #include <mach/usb.h>
@@ -286,7 +286,6 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
         .atag_offset    = 0x100,
         .map_io         = omap15xx_map_io,
         .init_early     = omap1_init_early,
-        .reserve        = omap_reserve,
         .init_irq       = omap1_init_irq,
         .init_machine   = voiceblue_init,
         .init_late      = omap1_init_late,
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 638f4070fc70..4f5fd4a084c0 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -12,6 +12,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/kernel.h>
+#include <linux/export.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
@@ -21,21 +22,21 @@
 
 #include <asm/mach-types.h>
 
-#include <plat/cpu.h>
-#include <plat/usb.h>
-#include <plat/clock.h>
-#include <plat/sram.h>
-#include <plat/clkdev_omap.h>
-
 #include <mach/hardware.h>
 
+#include "soc.h"
 #include "iomap.h"
 #include "clock.h"
 #include "opp.h"
+#include "sram.h"
 
 __u32 arm_idlect1_mask;
 struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
 
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+static DEFINE_SPINLOCK(clockfw_lock);
+
 /*
  * Omap1 specific clock functions
  */
@@ -607,3 +608,497 @@ void omap1_clk_disable_unused(struct clk *clk)
 }
 
 #endif
+
+
+int clk_enable(struct clk *clk)
+{
+        unsigned long flags;
+        int ret;
+
+        if (clk == NULL || IS_ERR(clk))
+                return -EINVAL;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = omap1_clk_enable(clk);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+        unsigned long flags;
+
+        if (clk == NULL || IS_ERR(clk))
+                return;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        if (clk->usecount == 0) {
+                pr_err("Trying disable clock %s with 0 usecount\n",
+                       clk->name);
+                WARN_ON(1);
+                goto out;
+        }
+
+        omap1_clk_disable(clk);
+
+out:
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        unsigned long flags;
+        unsigned long ret;
+
+        if (clk == NULL || IS_ERR(clk))
+                return 0;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = clk->rate;
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+/*
+ * Optional clock functions defined in include/linux/clk.h
+ */
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long flags;
+        long ret;
+
+        if (clk == NULL || IS_ERR(clk))
+                return 0;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = omap1_clk_round_rate(clk, rate);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_round_rate);
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long flags;
+        int ret = -EINVAL;
+
+        if (clk == NULL || IS_ERR(clk))
+                return ret;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = omap1_clk_set_rate(clk, rate);
+        if (ret == 0)
+                propagate_rate(clk);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_set_rate);
+
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        WARN_ONCE(1, "clk_set_parent() not implemented for OMAP1\n");
+
+        return -EINVAL;
+}
+EXPORT_SYMBOL(clk_set_parent);
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+        return clk->parent;
+}
+EXPORT_SYMBOL(clk_get_parent);
+
+/*
+ * OMAP specific clock functions shared between omap1 and omap2
+ */
+
+int __initdata mpurate;
+
+/*
+ * By default we use the rate set by the bootloader.
+ * You can override this with mpurate= cmdline option.
+ */
+static int __init omap_clk_setup(char *str)
+{
+        get_option(&str, &mpurate);
+
+        if (!mpurate)
+                return 1;
+
+        if (mpurate < 1000)
+                mpurate *= 1000000;
+
+        return 1;
+}
+__setup("mpurate=", omap_clk_setup);
+
+/* Used for clocks that always have same value as the parent clock */
+unsigned long followparent_recalc(struct clk *clk)
+{
+        return clk->parent->rate;
+}
+
+/*
+ * Used for clocks that have the same value as the parent clock,
+ * divided by some factor
+ */
+unsigned long omap_fixed_divisor_recalc(struct clk *clk)
+{
+        WARN_ON(!clk->fixed_div);
+
+        return clk->parent->rate / clk->fixed_div;
+}
+
+void clk_reparent(struct clk *child, struct clk *parent)
+{
+        list_del_init(&child->sibling);
+        if (parent)
+                list_add(&child->sibling, &parent->children);
+        child->parent = parent;
+
+        /* now do the debugfs renaming to reattach the child
+           to the proper parent */
+}
+
+/* Propagate rate to children */
+void propagate_rate(struct clk *tclk)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &tclk->children, sibling) {
+                if (clkp->recalc)
+                        clkp->rate = clkp->recalc(clkp);
+                propagate_rate(clkp);
+        }
+}
+
+static LIST_HEAD(root_clks);
+
+/**
+ * recalculate_root_clocks - recalculate and propagate all root clocks
+ *
+ * Recalculates all root clocks (clocks with no parent), which if the
+ * clock's .recalc is set correctly, should also propagate their rates.
+ * Called at init.
+ */
+void recalculate_root_clocks(void)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &root_clks, sibling) {
+                if (clkp->recalc)
+                        clkp->rate = clkp->recalc(clkp);
+                propagate_rate(clkp);
+        }
+}
+
+/**
+ * clk_preinit - initialize any fields in the struct clk before clk init
+ * @clk: struct clk * to initialize
+ *
+ * Initialize any struct clk fields needed before normal clk initialization
+ * can run.  No return value.
+ */
+void clk_preinit(struct clk *clk)
+{
+        INIT_LIST_HEAD(&clk->children);
+}
+
+int clk_register(struct clk *clk)
+{
+        if (clk == NULL || IS_ERR(clk))
+                return -EINVAL;
+
+        /*
+         * trap out already registered clocks
+         */
+        if (clk->node.next || clk->node.prev)
+                return 0;
+
+        mutex_lock(&clocks_mutex);
+        if (clk->parent)
+                list_add(&clk->sibling, &clk->parent->children);
+        else
+                list_add(&clk->sibling, &root_clks);
+
+        list_add(&clk->node, &clocks);
+        if (clk->init)
+                clk->init(clk);
+        mutex_unlock(&clocks_mutex);
+
+        return 0;
+}
+EXPORT_SYMBOL(clk_register);
+
+void clk_unregister(struct clk *clk)
+{
+        if (clk == NULL || IS_ERR(clk))
+                return;
+
+        mutex_lock(&clocks_mutex);
+        list_del(&clk->sibling);
+        list_del(&clk->node);
+        mutex_unlock(&clocks_mutex);
+}
+EXPORT_SYMBOL(clk_unregister);
+
+void clk_enable_init_clocks(void)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &clocks, node)
+                if (clkp->flags & ENABLE_ON_INIT)
+                        clk_enable(clkp);
+}
+
+/**
+ * omap_clk_get_by_name - locate OMAP struct clk by its name
+ * @name: name of the struct clk to locate
+ *
+ * Locate an OMAP struct clk by its name.  Assumes that struct clk
+ * names are unique.  Returns NULL if not found or a pointer to the
+ * struct clk if found.
+ */
+struct clk *omap_clk_get_by_name(const char *name)
+{
+        struct clk *c;
+        struct clk *ret = NULL;
+
+        mutex_lock(&clocks_mutex);
+
+        list_for_each_entry(c, &clocks, node) {
+                if (!strcmp(c->name, name)) {
+                        ret = c;
+                        break;
+                }
+        }
+
+        mutex_unlock(&clocks_mutex);
+
+        return ret;
+}
+
+int omap_clk_enable_autoidle_all(void)
+{
+        struct clk *c;
+        unsigned long flags;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+
+        list_for_each_entry(c, &clocks, node)
+                if (c->ops->allow_idle)
+                        c->ops->allow_idle(c);
+
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return 0;
+}
+
+int omap_clk_disable_autoidle_all(void)
+{
+        struct clk *c;
+        unsigned long flags;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+
+        list_for_each_entry(c, &clocks, node)
+                if (c->ops->deny_idle)
+                        c->ops->deny_idle(c);
+
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return 0;
+}
+
+/*
+ * Low level helpers
+ */
+static int clkll_enable_null(struct clk *clk)
+{
+        return 0;
+}
+
+static void clkll_disable_null(struct clk *clk)
+{
+}
+
+const struct clkops clkops_null = {
+        .enable         = clkll_enable_null,
+        .disable        = clkll_disable_null,
+};
+
+/*
+ * Dummy clock
+ *
+ * Used for clock aliases that are needed on some OMAPs, but not others
+ */
+struct clk dummy_ck = {
+        .name   = "dummy",
+        .ops    = &clkops_null,
+};
+
+/*
+ *
+ */
+
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+/*
+ * Disable any unused clocks left on by the bootloader
+ */
+static int __init clk_disable_unused(void)
+{
+        struct clk *ck;
+        unsigned long flags;
+
+        pr_info("clock: disabling unused clocks to save power\n");
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        list_for_each_entry(ck, &clocks, node) {
+                if (ck->ops == &clkops_null)
+                        continue;
+
+                if (ck->usecount > 0 || !ck->enable_reg)
+                        continue;
+
+                omap1_clk_disable_unused(ck);
+        }
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return 0;
+}
+late_initcall(clk_disable_unused);
+late_initcall(omap_clk_enable_autoidle_all);
+#endif
+
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+/*
+ *      debugfs support to trace clock tree hierarchy and attributes
+ */
+
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+
+static struct dentry *clk_debugfs_root;
+
+static int clk_dbg_show_summary(struct seq_file *s, void *unused)
+{
+        struct clk *c;
+        struct clk *pa;
+
+        mutex_lock(&clocks_mutex);
+        seq_printf(s, "%-30s %-30s %-10s %s\n",
+                   "clock-name", "parent-name", "rate", "use-count");
+
+        list_for_each_entry(c, &clocks, node) {
+                pa = c->parent;
+                seq_printf(s, "%-30s %-30s %-10lu %d\n",
+                           c->name, pa ? pa->name : "none", c->rate,
+                           c->usecount);
+        }
+        mutex_unlock(&clocks_mutex);
+
+        return 0;
+}
+
+static int clk_dbg_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, clk_dbg_show_summary, inode->i_private);
+}
+
+static const struct file_operations debug_clock_fops = {
+        .open           = clk_dbg_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int clk_debugfs_register_one(struct clk *c)
+{
+        int err;
+        struct dentry *d;
+        struct clk *pa = c->parent;
+
+        d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
+        if (!d)
+                return -ENOMEM;
+        c->dent = d;
+
+        d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        return 0;
+
+err_out:
+        debugfs_remove_recursive(c->dent);
+        return err;
+}
+
+static int clk_debugfs_register(struct clk *c)
+{
+        int err;
+        struct clk *pa = c->parent;
+
+        if (pa && !pa->dent) {
+                err = clk_debugfs_register(pa);
+                if (err)
+                        return err;
+        }
+
+        if (!c->dent) {
+                err = clk_debugfs_register_one(c);
+                if (err)
+                        return err;
+        }
+        return 0;
+}
+
+static int __init clk_debugfs_init(void)
+{
+        struct clk *c;
+        struct dentry *d;
+        int err;
+
+        d = debugfs_create_dir("clock", NULL);
+        if (!d)
+                return -ENOMEM;
+        clk_debugfs_root = d;
+
+        list_for_each_entry(c, &clocks, node) {
+                err = clk_debugfs_register(c);
+                if (err)
+                        goto err_out;
+        }
+
+        d = debugfs_create_file("summary", S_IRUGO,
+                d, NULL, &debug_clock_fops);
+        if (!d)
+                return -ENOMEM;
+
+        return 0;
+err_out:
+        debugfs_remove_recursive(clk_debugfs_root);
+        return err;
+}
+late_initcall(clk_debugfs_init);
+
+#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index 3d04f4f67676..1e4918a3a5ee 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -14,8 +14,184 @@
 #define __ARCH_ARM_MACH_OMAP1_CLOCK_H
 
 #include <linux/clk.h>
+#include <linux/list.h>
 
-#include <plat/clock.h>
+#include <linux/clkdev.h>
+
+struct module;
+struct clk;
+
+struct omap_clk {
+        u16                             cpu;
+        struct clk_lookup               lk;
+};
+
+#define CLK(dev, con, ck, cp)           \
+        {                               \
+                 .cpu = cp,             \
+                .lk = {                 \
+                        .dev_id = dev,  \
+                        .con_id = con,  \
+                        .clk = ck,      \
+                },                      \
+        }
+
+/* Platform flags for the clkdev-OMAP integration code */
+#define CK_310          (1 << 0)
+#define CK_7XX          (1 << 1)        /* 7xx, 850 */
+#define CK_1510         (1 << 2)
+#define CK_16XX         (1 << 3)        /* 16xx, 17xx, 5912 */
+#define CK_1710         (1 << 4)        /* 1710 extra for rate selection */
+
+
+/* Temporary, needed during the common clock framework conversion */
+#define __clk_get_name(clk)     (clk->name)
+#define __clk_get_parent(clk)   (clk->parent)
+#define __clk_get_rate(clk)     (clk->rate)
+
+/**
+ * struct clkops - some clock function pointers
+ * @enable: fn ptr that enables the current clock in hardware
+ * @disable: fn ptr that enables the current clock in hardware
+ * @find_idlest: function returning the IDLEST register for the clock's IP blk
+ * @find_companion: function returning the "companion" clk reg for the clock
+ * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
+ * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
+ *
+ * A "companion" clk is an accompanying clock to the one being queried
+ * that must be enabled for the IP module connected to the clock to
+ * become accessible by the hardware.  Neither @find_idlest nor
+ * @find_companion should be needed; that information is IP
+ * block-specific; the hwmod code has been created to handle this, but
+ * until hwmod data is ready and drivers have been converted to use PM
+ * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
+ * @find_companion must, unfortunately, remain.
+ */
+struct clkops {
+        int                     (*enable)(struct clk *);
+        void                    (*disable)(struct clk *);
+        void                    (*find_idlest)(struct clk *, void __iomem **,
+                                               u8 *, u8 *);
+        void                    (*find_companion)(struct clk *, void __iomem **,
+                                                  u8 *);
+        void                    (*allow_idle)(struct clk *);
+        void                    (*deny_idle)(struct clk *);
+};
+
+/*
+ * struct clk.flags possibilities
+ *
+ * XXX document the rest of the clock flags here
+ *
+ * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
+ *     bits share the same register.  This flag allows the
+ *     omap4_dpllmx*() code to determine which GATE_CTRL bit field
+ *     should be used.  This is a temporary solution - a better approach
+ *     would be to associate clock type-specific data with the clock,
+ *     similar to the struct dpll_data approach.
+ */
+#define ENABLE_REG_32BIT        (1 << 0)        /* Use 32-bit access */
+#define CLOCK_IDLE_CONTROL      (1 << 1)
+#define CLOCK_NO_IDLE_PARENT    (1 << 2)
+#define ENABLE_ON_INIT          (1 << 3)        /* Enable upon framework init */
+#define INVERT_ENABLE           (1 << 4)        /* 0 enables, 1 disables */
+#define CLOCK_CLKOUTX2          (1 << 5)
+
+/**
+ * struct clk - OMAP struct clk
+ * @node: list_head connecting this clock into the full clock list
+ * @ops: struct clkops * for this clock
+ * @name: the name of the clock in the hardware (used in hwmod data and debug)
+ * @parent: pointer to this clock's parent struct clk
+ * @children: list_head connecting to the child clks' @sibling list_heads
+ * @sibling: list_head connecting this clk to its parent clk's @children
+ * @rate: current clock rate
+ * @enable_reg: register to write to enable the clock (see @enable_bit)
+ * @recalc: fn ptr that returns the clock's current rate
+ * @set_rate: fn ptr that can change the clock's current rate
+ * @round_rate: fn ptr that can round the clock's current rate
+ * @init: fn ptr to do clock-specific initialization
+ * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
+ * @usecount: number of users that have requested this clock to be enabled
+ * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
+ * @flags: see "struct clk.flags possibilities" above
+ * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
+ * @src_offset: bitshift for source selection bitfield (OMAP1 only)
+ *
+ * XXX @rate_offset, @src_offset should probably be removed and OMAP1
+ * clock code converted to use clksel.
+ *
+ * XXX @usecount is poorly named.  It should be "enable_count" or
+ * something similar.  "users" in the description refers to kernel
+ * code (core code or drivers) that have called clk_enable() and not
+ * yet called clk_disable(); the usecount of parent clocks is also
+ * incremented by the clock code when clk_enable() is called on child
+ * clocks and decremented by the clock code when clk_disable() is
+ * called on child clocks.
+ *
+ * XXX @clkdm, @usecount, @children, @sibling should be marked for
+ * internal use only.
+ *
+ * @children and @sibling are used to optimize parent-to-child clock
+ * tree traversals.  (child-to-parent traversals use @parent.)
+ *
+ * XXX The notion of the clock's current rate probably needs to be
+ * separated from the clock's target rate.
+ */
+struct clk {
+        struct list_head        node;
+        const struct clkops     *ops;
+        const char              *name;
+        struct clk              *parent;
+        struct list_head        children;
+        struct list_head        sibling;        /* node for children */
+        unsigned long           rate;
+        void __iomem            *enable_reg;
+        unsigned long           (*recalc)(struct clk *);
+        int                     (*set_rate)(struct clk *, unsigned long);
+        long                    (*round_rate)(struct clk *, unsigned long);
+        void                    (*init)(struct clk *);
+        u8                      enable_bit;
+        s8                      usecount;
+        u8                      fixed_div;
+        u8                      flags;
+        u8                      rate_offset;
+        u8                      src_offset;
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+        struct dentry           *dent;  /* For visible tree hierarchy */
+#endif
+};
+
+struct clk_functions {
+        int             (*clk_enable)(struct clk *clk);
+        void            (*clk_disable)(struct clk *clk);
+        long            (*clk_round_rate)(struct clk *clk, unsigned long rate);
+        int             (*clk_set_rate)(struct clk *clk, unsigned long rate);
+        int             (*clk_set_parent)(struct clk *clk, struct clk *parent);
+        void            (*clk_allow_idle)(struct clk *clk);
+        void            (*clk_deny_idle)(struct clk *clk);
+        void            (*clk_disable_unused)(struct clk *clk);
+};
+
+extern int mpurate;
+
+extern int clk_init(struct clk_functions *custom_clocks);
+extern void clk_preinit(struct clk *clk);
+extern int clk_register(struct clk *clk);
+extern void clk_reparent(struct clk *child, struct clk *parent);
+extern void clk_unregister(struct clk *clk);
+extern void propagate_rate(struct clk *clk);
+extern void recalculate_root_clocks(void);
+extern unsigned long followparent_recalc(struct clk *clk);
+extern void clk_enable_init_clocks(void);
+unsigned long omap_fixed_divisor_recalc(struct clk *clk);
+extern struct clk *omap_clk_get_by_name(const char *name);
+extern int omap_clk_enable_autoidle_all(void);
+extern int omap_clk_disable_autoidle_all(void);
+
+extern const struct clkops clkops_null;
+
+extern struct clk dummy_ck;
 
 int omap1_clk_init(void);
 void omap1_clk_late_init(void);
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 9b45f4b0ee22..cb7c6ae2e3fc 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -22,16 +22,14 @@
 
 #include <asm/mach-types.h>  /* for machine_is_* */
 
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/clkdev_omap.h>
-#include <plat/sram.h>  /* for omap_sram_reprogram_clock() */
+#include "soc.h"
 
 #include <mach/hardware.h>
 #include <mach/usb.h>   /* for OTG_BASE */
 
 #include "iomap.h"
 #include "clock.h"
+#include "sram.h"
 
 /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
 #define IDL_CLKOUT_ARM_SHIFT                    12
@@ -765,14 +763,6 @@ static struct omap_clk omap_clks[] = {
  * init
  */
 
-static struct clk_functions omap1_clk_functions = {
-        .clk_enable             = omap1_clk_enable,
-        .clk_disable            = omap1_clk_disable,
-        .clk_round_rate         = omap1_clk_round_rate,
-        .clk_set_rate           = omap1_clk_set_rate,
-        .clk_disable_unused     = omap1_clk_disable_unused,
-};
-
 static void __init omap1_show_rates(void)
 {
         pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
@@ -803,8 +793,6 @@ int __init omap1_clk_init(void)
         if (!cpu_is_omap15xx())
                 omap_writew(0, SOFT_REQ_REG2);
 
-        clk_init(&omap1_clk_functions);
-
         /* By default all idlect1 clocks are allowed to idle */
         arm_idlect1_mask = ~0;
 
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index c2552b24f9f2..b53e0854422f 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -26,8 +26,10 @@
 #ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
 #define __ARCH_ARM_MACH_OMAP1_COMMON_H
 
-#include <plat/common.h>
 #include <linux/mtd/mtd.h>
+#include <linux/i2c-omap.h>
+
+#include <plat/i2c.h>
 
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 void omap7xx_map_io(void);
@@ -38,6 +40,7 @@ static inline void omap7xx_map_io(void)
 #endif
 
 #ifdef CONFIG_ARCH_OMAP15XX
+void omap1510_fpga_init_irq(void);
 void omap15xx_map_io(void);
 #else
 static inline void omap15xx_map_io(void)
@@ -90,4 +93,6 @@ extern int ocpi_enable(void);
 static inline int ocpi_enable(void) { return 0; }
 #endif
 
+extern u32 omap1_get_reset_sources(void);
+
 #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index d3fec92c54cb..0af635205e8a 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -17,12 +17,12 @@
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
 
+#include <linux/platform_data/omap-wd-timer.h>
+
 #include <asm/mach/map.h>
 
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
-#include <plat/mmc.h>
 
 #include <mach/omap7xx.h>
 #include <mach/camera.h>
@@ -30,6 +30,9 @@
 
 #include "common.h"
 #include "clock.h"
+#include "dma.h"
+#include "mmc.h"
+#include "sram.h"
 
 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
 
@@ -175,6 +178,13 @@ static int __init omap_mmc_add(const char *name, int id, unsigned long base,
         res[3].name = "tx";
         res[3].flags = IORESOURCE_DMA;
 
+        if (cpu_is_omap7xx())
+                data->slots[0].features = MMC_OMAP7XX;
+        if (cpu_is_omap15xx())
+                data->slots[0].features = MMC_OMAP15XX;
+        if (cpu_is_omap16xx())
+                data->slots[0].features = MMC_OMAP16XX;
+
         ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
         if (ret == 0)
                 ret = platform_device_add_data(pdev, data, sizeof(*data));
@@ -439,18 +449,31 @@ static struct resource wdt_resources[] = {
 };
 
 static struct platform_device omap_wdt_device = {
-        .name      = "omap_wdt",
-        .id          = -1,
+        .name           = "omap_wdt",
+        .id             = -1,
         .num_resources  = ARRAY_SIZE(wdt_resources),
         .resource       = wdt_resources,
 };
 
 static int __init omap_init_wdt(void)
 {
+        struct omap_wd_timer_platform_data pdata;
+        int ret;
+
         if (!cpu_is_omap16xx())
                 return -ENODEV;
 
-        return platform_device_register(&omap_wdt_device);
+        pdata.read_reset_sources = omap1_get_reset_sources;
+
+        ret = platform_device_register(&omap_wdt_device);
+        if (!ret) {
+                ret = platform_device_add_data(&omap_wdt_device, &pdata,
+                                               sizeof(pdata));
+                if (ret)
+                        platform_device_del(&omap_wdt_device);
+        }
+
+        return ret;
 }
 subsys_initcall(omap_init_wdt);
 #endif
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index 29007fef84cd..978aed85d328 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -25,11 +25,13 @@
 #include <linux/device.h>
 #include <linux/io.h>
 
-#include <plat/dma.h>
-#include <plat/tc.h>
+#include <plat-omap/dma-omap.h>
+#include <mach/tc.h>
 
 #include <mach/irqs.h>
 
+#include "dma.h"
+
 #define OMAP1_DMA_BASE                  (0xfffed800)
 #define OMAP1_LOGICAL_DMA_CH_COUNT      17
 #define OMAP1_DMA_STRIDE                0x40
@@ -319,6 +321,9 @@ static int __init omap1_system_dma_init(void)
                 d->dev_caps = ENABLE_1510_MODE;
         enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
 
+        if (cpu_is_omap16xx())
+                d->dev_caps = ENABLE_16XX_MODE;
+
         d->dev_caps             |= SRC_PORT;
         d->dev_caps             |= DST_PORT;
         d->dev_caps             |= SRC_INDEX;
diff --git a/arch/arm/mach-omap1/dma.h b/arch/arm/mach-omap1/dma.h
new file mode 100644
index 000000000000..da6345dab03f
--- /dev/null
+++ b/arch/arm/mach-omap1/dma.h
@@ -0,0 +1,83 @@
+/*
+ *  OMAP1 DMA channel definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __OMAP1_DMA_CHANNEL_H
+#define __OMAP1_DMA_CHANNEL_H
+
+/* DMA channels for omap1 */
+#define OMAP_DMA_NO_DEVICE              0
+#define OMAP_DMA_MCSI1_TX               1
+#define OMAP_DMA_MCSI1_RX               2
+#define OMAP_DMA_I2C_RX                 3
+#define OMAP_DMA_I2C_TX                 4
+#define OMAP_DMA_EXT_NDMA_REQ           5
+#define OMAP_DMA_EXT_NDMA_REQ2          6
+#define OMAP_DMA_UWIRE_TX               7
+#define OMAP_DMA_MCBSP1_TX              8
+#define OMAP_DMA_MCBSP1_RX              9
+#define OMAP_DMA_MCBSP3_TX              10
+#define OMAP_DMA_MCBSP3_RX              11
+#define OMAP_DMA_UART1_TX               12
+#define OMAP_DMA_UART1_RX               13
+#define OMAP_DMA_UART2_TX               14
+#define OMAP_DMA_UART2_RX               15
+#define OMAP_DMA_MCBSP2_TX              16
+#define OMAP_DMA_MCBSP2_RX              17
+#define OMAP_DMA_UART3_TX               18
+#define OMAP_DMA_UART3_RX               19
+#define OMAP_DMA_CAMERA_IF_RX           20
+#define OMAP_DMA_MMC_TX                 21
+#define OMAP_DMA_MMC_RX                 22
+#define OMAP_DMA_NAND                   23
+#define OMAP_DMA_IRQ_LCD_LINE           24
+#define OMAP_DMA_MEMORY_STICK           25
+#define OMAP_DMA_USB_W2FC_RX0           26
+#define OMAP_DMA_USB_W2FC_RX1           27
+#define OMAP_DMA_USB_W2FC_RX2           28
+#define OMAP_DMA_USB_W2FC_TX0           29
+#define OMAP_DMA_USB_W2FC_TX1           30
+#define OMAP_DMA_USB_W2FC_TX2           31
+
+/* These are only for 1610 */
+#define OMAP_DMA_CRYPTO_DES_IN          32
+#define OMAP_DMA_SPI_TX                 33
+#define OMAP_DMA_SPI_RX                 34
+#define OMAP_DMA_CRYPTO_HASH            35
+#define OMAP_DMA_CCP_ATTN               36
+#define OMAP_DMA_CCP_FIFO_NOT_EMPTY     37
+#define OMAP_DMA_CMT_APE_TX_CHAN_0      38
+#define OMAP_DMA_CMT_APE_RV_CHAN_0      39
+#define OMAP_DMA_CMT_APE_TX_CHAN_1      40
+#define OMAP_DMA_CMT_APE_RV_CHAN_1      41
+#define OMAP_DMA_CMT_APE_TX_CHAN_2      42
+#define OMAP_DMA_CMT_APE_RV_CHAN_2      43
+#define OMAP_DMA_CMT_APE_TX_CHAN_3      44
+#define OMAP_DMA_CMT_APE_RV_CHAN_3      45
+#define OMAP_DMA_CMT_APE_TX_CHAN_4      46
+#define OMAP_DMA_CMT_APE_RV_CHAN_4      47
+#define OMAP_DMA_CMT_APE_TX_CHAN_5      48
+#define OMAP_DMA_CMT_APE_RV_CHAN_5      49
+#define OMAP_DMA_CMT_APE_TX_CHAN_6      50
+#define OMAP_DMA_CMT_APE_RV_CHAN_6      51
+#define OMAP_DMA_CMT_APE_TX_CHAN_7      52
+#define OMAP_DMA_CMT_APE_RV_CHAN_7      53
+#define OMAP_DMA_MMC2_TX                54
+#define OMAP_DMA_MMC2_RX                55
+#define OMAP_DMA_CRYPTO_DES_OUT         56
+
+#endif /* __OMAP1_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c
index 73ae6169aa4a..b3fb531af94e 100644
--- a/arch/arm/mach-omap1/flash.c
+++ b/arch/arm/mach-omap1/flash.c
@@ -10,7 +10,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/map.h>
 
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <mach/flash.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 29ec50fc688d..8bd71b2d0967 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -27,11 +27,11 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 
-#include <plat/fpga.h>
-
 #include <mach/hardware.h>
 
 #include "iomap.h"
+#include "common.h"
+#include "fpga.h"
 
 static void fpga_mask_irq(struct irq_data *d)
 {
diff --git a/arch/arm/mach-omap1/fpga.h b/arch/arm/mach-omap1/fpga.h
new file mode 100644
index 000000000000..4b4307a80e48
--- /dev/null
+++ b/arch/arm/mach-omap1/fpga.h
@@ -0,0 +1,52 @@
+/*
+ * Interrupt handler for OMAP-1510 FPGA
+ *
+ * Copyright (C) 2001 RidgeRun, Inc.
+ * Author: Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * Copyright (C) 2002 MontaVista Software, Inc.
+ *
+ * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
+ * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_OMAP_FPGA_H
+#define __ASM_ARCH_OMAP_FPGA_H
+
+/*
+ * ---------------------------------------------------------------------------
+ *  H2/P2 Debug board FPGA
+ * ---------------------------------------------------------------------------
+ */
+/* maps in the FPGA registers and the ETHR registers */
+#define H2P2_DBG_FPGA_BASE              0xE8000000              /* VA */
+#define H2P2_DBG_FPGA_SIZE              SZ_4K                   /* SIZE */
+#define H2P2_DBG_FPGA_START             0x04000000              /* PA */
+
+#define H2P2_DBG_FPGA_ETHR_START        (H2P2_DBG_FPGA_START + 0x300)
+#define H2P2_DBG_FPGA_FPGA_REV          IOMEM(H2P2_DBG_FPGA_BASE + 0x10)        /* FPGA Revision */
+#define H2P2_DBG_FPGA_BOARD_REV         IOMEM(H2P2_DBG_FPGA_BASE + 0x12)        /* Board Revision */
+#define H2P2_DBG_FPGA_GPIO              IOMEM(H2P2_DBG_FPGA_BASE + 0x14)        /* GPIO outputs */
+#define H2P2_DBG_FPGA_LEDS              IOMEM(H2P2_DBG_FPGA_BASE + 0x16)        /* LEDs outputs */
+#define H2P2_DBG_FPGA_MISC_INPUTS       IOMEM(H2P2_DBG_FPGA_BASE + 0x18)        /* Misc inputs */
+#define H2P2_DBG_FPGA_LAN_STATUS        IOMEM(H2P2_DBG_FPGA_BASE + 0x1A)        /* LAN Status line */
+#define H2P2_DBG_FPGA_LAN_RESET         IOMEM(H2P2_DBG_FPGA_BASE + 0x1C)        /* LAN Reset line */
+
+/* LEDs definition on debug board (16 LEDs, all physically green) */
+#define H2P2_DBG_FPGA_LED_GREEN         (1 << 15)
+#define H2P2_DBG_FPGA_LED_AMBER         (1 << 14)
+#define H2P2_DBG_FPGA_LED_RED           (1 << 13)
+#define H2P2_DBG_FPGA_LED_BLUE          (1 << 12)
+/*  cpu0 load-meter LEDs */
+#define H2P2_DBG_FPGA_LOAD_METER        (1 << 0)        // A bit of fun on our board ...
+#define H2P2_DBG_FPGA_LOAD_METER_SIZE   11
+#define H2P2_DBG_FPGA_LOAD_METER_MASK   ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
+
+#define H2P2_DBG_FPGA_P2_LED_TIMER              (1 << 0)
+#define H2P2_DBG_FPGA_P2_LED_IDLE               (1 << 1)
+
+#endif
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 98e6f39224a4..02b3eb2e201c 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP1_MPUIO_VBASE               OMAP1_MPUIO_BASE
 #define OMAP1510_GPIO_BASE              0xFFFCE000
 
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 33f419236b17..b9952a258d82 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP1610_GPIO1_BASE             0xfffbe400
 #define OMAP1610_GPIO2_BASE             0xfffbec00
 #define OMAP1610_GPIO3_BASE             0xfffbb400
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 958ce9acee95..f5819b2b7cbe 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -19,6 +19,8 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <mach/irqs.h>
+
 #define OMAP7XX_GPIO1_BASE              0xfffbc000
 #define OMAP7XX_GPIO2_BASE              0xfffbc800
 #define OMAP7XX_GPIO3_BASE              0xfffbd000
diff --git a/arch/arm/mach-omap1/i2c.c b/arch/arm/mach-omap1/i2c.c
index a0551a6d7451..faca808cb3d9 100644
--- a/arch/arm/mach-omap1/i2c.c
+++ b/arch/arm/mach-omap1/i2c.c
@@ -19,11 +19,25 @@
  *
  */
 
-#include <plat/i2c.h>
+#include <linux/i2c-omap.h>
 #include <mach/mux.h>
-#include <plat/cpu.h>
+#include "soc.h"
+
+#include <plat/i2c.h>
+
+#define OMAP_I2C_SIZE           0x3f
+#define OMAP1_I2C_BASE          0xfffb3800
+#define OMAP1_INT_I2C           (32 + 4)
+
+static const char name[] = "omap_i2c";
 
-void __init omap1_i2c_mux_pins(int bus_id)
+static struct resource i2c_resources[2] = {
+};
+
+static struct platform_device omap_i2c_devices[1] = {
+};
+
+static void __init omap1_i2c_mux_pins(int bus_id)
 {
         if (cpu_is_omap7xx()) {
                 omap_cfg_reg(I2C_7XX_SDA);
@@ -33,3 +47,47 @@ void __init omap1_i2c_mux_pins(int bus_id)
                 omap_cfg_reg(I2C_SCL);
         }
 }
+
+int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
+                                int bus_id)
+{
+        struct platform_device *pdev;
+        struct resource *res;
+
+        if (bus_id > 1)
+                return -EINVAL;
+
+        omap1_i2c_mux_pins(bus_id);
+
+        pdev = &omap_i2c_devices[bus_id - 1];
+        pdev->id = bus_id;
+        pdev->name = name;
+        pdev->num_resources = ARRAY_SIZE(i2c_resources);
+        res = i2c_resources;
+        res[0].start = OMAP1_I2C_BASE;
+        res[0].end = res[0].start + OMAP_I2C_SIZE;
+        res[0].flags = IORESOURCE_MEM;
+        res[1].start = OMAP1_INT_I2C;
+        res[1].flags = IORESOURCE_IRQ;
+        pdev->resource = res;
+
+        /* all OMAP1 have IP version 1 register set */
+        pdata->rev = OMAP_I2C_IP_VERSION_1;
+
+        /* all OMAP1 I2C are implemented like this */
+        pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
+                       OMAP_I2C_FLAG_SIMPLE_CLOCK |
+                       OMAP_I2C_FLAG_16BIT_DATA_REG |
+                       OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
+
+        /* how the cpu bus is wired up differs for 7xx only */
+
+        if (cpu_is_omap7xx())
+                pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
+        else
+                pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
+
+        pdev->dev.platform_data = pdata;
+
+        return platform_device_register(pdev);
+}
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index a1b846aacdaf..52de382fc804 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -17,7 +17,7 @@
 #include <linux/io.h>
 #include <asm/system_info.h>
 
-#include <plat/cpu.h>
+#include "soc.h"
 
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S
index 2b36a281dc84..5c1a26c9f490 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
 
 #include <linux/serial_reg.h>
 
-#include <plat/serial.h>
+#include "serial.h"
 
                 .pushsection .data
 omap_uart_phys: .word   0x0
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index 88f08cab1717..78a8c6c24764 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -13,8 +13,6 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 
-#include "../../iomap.h"
-
                 .macro  get_irqnr_preamble, base, tmp
                 .endm
 
diff --git a/arch/arm/mach-omap1/include/mach/gpio.h b/arch/arm/mach-omap1/include/mach/gpio.h
deleted file mode 100644
index ebf86c0f4f46..000000000000
--- a/arch/arm/mach-omap1/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/gpio.h
- */
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h
index 84248d250adb..5875a5098d35 100644
--- a/arch/arm/mach-omap1/include/mach/hardware.h
+++ b/arch/arm/mach-omap1/include/mach/hardware.h
@@ -39,7 +39,7 @@
 #include <asm/sizes.h>
 #ifndef __ASSEMBLER__
 #include <asm/types.h>
-#include <plat/cpu.h>
+#include <mach/soc.h>
 
 /*
  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
@@ -51,7 +51,7 @@ extern void omap_writeb(u8 v, u32 pa);
 extern void omap_writew(u16 v, u32 pa);
 extern void omap_writel(u32 v, u32 pa);
 
-#include <plat/tc.h>
+#include <mach/tc.h>
 
 /* Almost all documentation for chip and board memory maps assumes
  * BM is clear.  Most devel boards have a switch to control booting
@@ -72,7 +72,10 @@ static inline u32 omap_cs3_phys(void)
 
 #endif  /* ifndef __ASSEMBLER__ */
 
-#include <plat/serial.h>
+#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
+#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
+
+#include <mach/serial.h>
 
 /*
  * ---------------------------------------------------------------------------
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h
index 901082def9bd..3c2530523111 100644
--- a/arch/arm/mach-omap1/include/mach/memory.h
+++ b/arch/arm/mach-omap1/include/mach/memory.h
@@ -19,7 +19,7 @@
  * because of the strncmp().
  */
 #if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
-#include <plat/cpu.h>
+#include <mach/soc.h>
 
 /*
  * OMAP-1510 Local Bus address offset
diff --git a/arch/arm/mach-omap1/include/mach/omap1510.h b/arch/arm/mach-omap1/include/mach/omap1510.h
index 8fe05d6137c0..3d235244bf5c 100644
--- a/arch/arm/mach-omap1/include/mach/omap1510.h
+++ b/arch/arm/mach-omap1/include/mach/omap1510.h
@@ -45,5 +45,118 @@
 
 #define OMAP1510_DSP_MMU_BASE   (0xfffed200)
 
+/*
+ * ---------------------------------------------------------------------------
+ *  OMAP-1510 FPGA
+ * ---------------------------------------------------------------------------
+ */
+#define OMAP1510_FPGA_BASE              0xE8000000              /* VA */
+#define OMAP1510_FPGA_SIZE              SZ_4K
+#define OMAP1510_FPGA_START             0x08000000              /* PA */
+
+/* Revision */
+#define OMAP1510_FPGA_REV_LOW                   IOMEM(OMAP1510_FPGA_BASE + 0x0)
+#define OMAP1510_FPGA_REV_HIGH                  IOMEM(OMAP1510_FPGA_BASE + 0x1)
+#define OMAP1510_FPGA_LCD_PANEL_CONTROL         IOMEM(OMAP1510_FPGA_BASE + 0x2)
+#define OMAP1510_FPGA_LED_DIGIT                 IOMEM(OMAP1510_FPGA_BASE + 0x3)
+#define INNOVATOR_FPGA_HID_SPI                  IOMEM(OMAP1510_FPGA_BASE + 0x4)
+#define OMAP1510_FPGA_POWER                     IOMEM(OMAP1510_FPGA_BASE + 0x5)
+
+/* Interrupt status */
+#define OMAP1510_FPGA_ISR_LO                    IOMEM(OMAP1510_FPGA_BASE + 0x6)
+#define OMAP1510_FPGA_ISR_HI                    IOMEM(OMAP1510_FPGA_BASE + 0x7)
+
+/* Interrupt mask */
+#define OMAP1510_FPGA_IMR_LO                    IOMEM(OMAP1510_FPGA_BASE + 0x8)
+#define OMAP1510_FPGA_IMR_HI                    IOMEM(OMAP1510_FPGA_BASE + 0x9)
+
+/* Reset registers */
+#define OMAP1510_FPGA_HOST_RESET                IOMEM(OMAP1510_FPGA_BASE + 0xa)
+#define OMAP1510_FPGA_RST                       IOMEM(OMAP1510_FPGA_BASE + 0xb)
+
+#define OMAP1510_FPGA_AUDIO                     IOMEM(OMAP1510_FPGA_BASE + 0xc)
+#define OMAP1510_FPGA_DIP                       IOMEM(OMAP1510_FPGA_BASE + 0xe)
+#define OMAP1510_FPGA_FPGA_IO                   IOMEM(OMAP1510_FPGA_BASE + 0xf)
+#define OMAP1510_FPGA_UART1                     IOMEM(OMAP1510_FPGA_BASE + 0x14)
+#define OMAP1510_FPGA_UART2                     IOMEM(OMAP1510_FPGA_BASE + 0x15)
+#define OMAP1510_FPGA_OMAP1510_STATUS           IOMEM(OMAP1510_FPGA_BASE + 0x16)
+#define OMAP1510_FPGA_BOARD_REV                 IOMEM(OMAP1510_FPGA_BASE + 0x18)
+#define INNOVATOR_FPGA_CAM_USB_CONTROL          IOMEM(OMAP1510_FPGA_BASE + 0x20c)
+#define OMAP1510P1_PPT_DATA                     IOMEM(OMAP1510_FPGA_BASE + 0x100)
+#define OMAP1510P1_PPT_STATUS                   IOMEM(OMAP1510_FPGA_BASE + 0x101)
+#define OMAP1510P1_PPT_CONTROL                  IOMEM(OMAP1510_FPGA_BASE + 0x102)
+
+#define OMAP1510_FPGA_TOUCHSCREEN               IOMEM(OMAP1510_FPGA_BASE + 0x204)
+
+#define INNOVATOR_FPGA_INFO                     IOMEM(OMAP1510_FPGA_BASE + 0x205)
+#define INNOVATOR_FPGA_LCD_BRIGHT_LO            IOMEM(OMAP1510_FPGA_BASE + 0x206)
+#define INNOVATOR_FPGA_LCD_BRIGHT_HI            IOMEM(OMAP1510_FPGA_BASE + 0x207)
+#define INNOVATOR_FPGA_LED_GRN_LO               IOMEM(OMAP1510_FPGA_BASE + 0x208)
+#define INNOVATOR_FPGA_LED_GRN_HI               IOMEM(OMAP1510_FPGA_BASE + 0x209)
+#define INNOVATOR_FPGA_LED_RED_LO               IOMEM(OMAP1510_FPGA_BASE + 0x20a)
+#define INNOVATOR_FPGA_LED_RED_HI               IOMEM(OMAP1510_FPGA_BASE + 0x20b)
+#define INNOVATOR_FPGA_EXP_CONTROL              IOMEM(OMAP1510_FPGA_BASE + 0x20d)
+#define INNOVATOR_FPGA_ISR2                     IOMEM(OMAP1510_FPGA_BASE + 0x20e)
+#define INNOVATOR_FPGA_IMR2                     IOMEM(OMAP1510_FPGA_BASE + 0x210)
+
+#define OMAP1510_FPGA_ETHR_START                (OMAP1510_FPGA_START + 0x300)
+
+/*
+ * Power up Giga UART driver, turn on HID clock.
+ * Turn off BT power, since we're not using it and it
+ * draws power.
+ */
+#define OMAP1510_FPGA_RESET_VALUE               0x42
+
+#define OMAP1510_FPGA_PCR_IF_PD0                (1 << 7)
+#define OMAP1510_FPGA_PCR_COM2_EN               (1 << 6)
+#define OMAP1510_FPGA_PCR_COM1_EN               (1 << 5)
+#define OMAP1510_FPGA_PCR_EXP_PD0               (1 << 4)
+#define OMAP1510_FPGA_PCR_EXP_PD1               (1 << 3)
+#define OMAP1510_FPGA_PCR_48MHZ_CLK             (1 << 2)
+#define OMAP1510_FPGA_PCR_4MHZ_CLK              (1 << 1)
+#define OMAP1510_FPGA_PCR_RSRVD_BIT0            (1 << 0)
+
+/*
+ * Innovator/OMAP1510 FPGA HID register bit definitions
+ */
+#define OMAP1510_FPGA_HID_SCLK  (1<<0)  /* output */
+#define OMAP1510_FPGA_HID_MOSI  (1<<1)  /* output */
+#define OMAP1510_FPGA_HID_nSS   (1<<2)  /* output 0/1 chip idle/select */
+#define OMAP1510_FPGA_HID_nHSUS (1<<3)  /* output 0/1 host active/suspended */
+#define OMAP1510_FPGA_HID_MISO  (1<<4)  /* input */
+#define OMAP1510_FPGA_HID_ATN   (1<<5)  /* input  0/1 chip idle/ATN */
+#define OMAP1510_FPGA_HID_rsrvd (1<<6)
+#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
+
+/* The FPGA IRQ is cascaded through GPIO_13 */
+#define OMAP1510_INT_FPGA               (IH_GPIO_BASE + 13)
+
+/* IRQ Numbers for interrupts muxed through the FPGA */
+#define OMAP1510_INT_FPGA_ATN           (OMAP_FPGA_IRQ_BASE + 0)
+#define OMAP1510_INT_FPGA_ACK           (OMAP_FPGA_IRQ_BASE + 1)
+#define OMAP1510_INT_FPGA2              (OMAP_FPGA_IRQ_BASE + 2)
+#define OMAP1510_INT_FPGA3              (OMAP_FPGA_IRQ_BASE + 3)
+#define OMAP1510_INT_FPGA4              (OMAP_FPGA_IRQ_BASE + 4)
+#define OMAP1510_INT_FPGA5              (OMAP_FPGA_IRQ_BASE + 5)
+#define OMAP1510_INT_FPGA6              (OMAP_FPGA_IRQ_BASE + 6)
+#define OMAP1510_INT_FPGA7              (OMAP_FPGA_IRQ_BASE + 7)
+#define OMAP1510_INT_FPGA8              (OMAP_FPGA_IRQ_BASE + 8)
+#define OMAP1510_INT_FPGA9              (OMAP_FPGA_IRQ_BASE + 9)
+#define OMAP1510_INT_FPGA10             (OMAP_FPGA_IRQ_BASE + 10)
+#define OMAP1510_INT_FPGA11             (OMAP_FPGA_IRQ_BASE + 11)
+#define OMAP1510_INT_FPGA12             (OMAP_FPGA_IRQ_BASE + 12)
+#define OMAP1510_INT_ETHER              (OMAP_FPGA_IRQ_BASE + 13)
+#define OMAP1510_INT_FPGAUART1          (OMAP_FPGA_IRQ_BASE + 14)
+#define OMAP1510_INT_FPGAUART2          (OMAP_FPGA_IRQ_BASE + 15)
+#define OMAP1510_INT_FPGA_TS            (OMAP_FPGA_IRQ_BASE + 16)
+#define OMAP1510_INT_FPGA17             (OMAP_FPGA_IRQ_BASE + 17)
+#define OMAP1510_INT_FPGA_CAM           (OMAP_FPGA_IRQ_BASE + 18)
+#define OMAP1510_INT_FPGA_RTC_A         (OMAP_FPGA_IRQ_BASE + 19)
+#define OMAP1510_INT_FPGA_RTC_B         (OMAP_FPGA_IRQ_BASE + 20)
+#define OMAP1510_INT_FPGA_CD            (OMAP_FPGA_IRQ_BASE + 21)
+#define OMAP1510_INT_FPGA22             (OMAP_FPGA_IRQ_BASE + 22)
+#define OMAP1510_INT_FPGA23             (OMAP_FPGA_IRQ_BASE + 23)
+
 #endif /*  __ASM_ARCH_OMAP15XX_H */
 
diff --git a/arch/arm/mach-omap1/include/mach/serial.h b/arch/arm/mach-omap1/include/mach/serial.h
new file mode 100644
index 000000000000..2ce6a2db470b
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/serial.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_SERIAL_H
+#define __ASM_ARCH_SERIAL_H
+
+#include <linux/init.h>
+
+/*
+ * Memory entry used for the DEBUG_LL UART configuration, relative to
+ * start of RAM. See also uncompress.h and debug-macro.S.
+ *
+ * Note that using a memory location for storing the UART configuration
+ * has at least two limitations:
+ *
+ * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
+ *    uncompress code could then partially overwrite itself
+ * 2. We assume printascii is called at least once before paging_init,
+ *    and addruart has a chance to read OMAP_UART_INFO
+ */
+#define OMAP_UART_INFO_OFS      0x3ffc
+
+/* OMAP1 serial ports */
+#define OMAP1_UART1_BASE        0xfffb0000
+#define OMAP1_UART2_BASE        0xfffb0800
+#define OMAP1_UART3_BASE        0xfffb9800
+
+#define OMAP_PORT_SHIFT         2
+#define OMAP7XX_PORT_SHIFT      0
+
+#define OMAP1510_BASE_BAUD      (12000000/16)
+#define OMAP16XX_BASE_BAUD      (48000000/16)
+
+/*
+ * DEBUG_LL port encoding stored into the UART1 scratchpad register by
+ * decomp_setup in uncompress.h
+ */
+#define OMAP1UART1              11
+#define OMAP1UART2              12
+#define OMAP1UART3              13
+
+#ifndef __ASSEMBLER__
+extern void omap_serial_init(void);
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap1/include/mach/soc.h b/arch/arm/mach-omap1/include/mach/soc.h
new file mode 100644
index 000000000000..6cf9c1cc2bef
--- /dev/null
+++ b/arch/arm/mach-omap1/include/mach/soc.h
@@ -0,0 +1,229 @@
+/*
+ * OMAP cpu type detection
+ *
+ * Copyright (C) 2004, 2008 Nokia Corporation
+ *
+ * Copyright (C) 2009-11 Texas Instruments.
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARCH_OMAP_CPU_H
+#define __ASM_ARCH_OMAP_CPU_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
+
+/*
+ * Test if multicore OMAP support is needed
+ */
+#undef MULTI_OMAP1
+#undef OMAP_NAME
+
+#ifdef CONFIG_ARCH_OMAP730
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap730
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP850
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap850
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP15XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap1510
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP16XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP1
+#  define MULTI_OMAP1
+# else
+#  define OMAP_NAME omap16xx
+# endif
+#endif
+
+/*
+ * omap_rev bits:
+ * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
+ * CPU revision (See _REV_ defined in cpu.h)    [15:08]
+ * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
+ */
+unsigned int omap_rev(void);
+
+/*
+ * Get the CPU revision for OMAP devices
+ */
+#define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
+
+/*
+ * Macros to group OMAP into cpu classes.
+ * These can be used in most places.
+ * cpu_is_omap7xx():    True for OMAP730, OMAP850
+ * cpu_is_omap15xx():   True for OMAP1510, OMAP5910 and OMAP310
+ * cpu_is_omap16xx():   True for OMAP1610, OMAP5912 and OMAP1710
+ */
+#define GET_OMAP_CLASS  (omap_rev() & 0xff)
+
+#define IS_OMAP_CLASS(class, id)                        \
+static inline int is_omap ##class (void)                \
+{                                                       \
+        return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
+}
+
+#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
+
+#define IS_OMAP_SUBCLASS(subclass, id)                  \
+static inline int is_omap ##subclass (void)             \
+{                                                       \
+        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
+}
+
+IS_OMAP_CLASS(7xx, 0x07)
+IS_OMAP_CLASS(15xx, 0x15)
+IS_OMAP_CLASS(16xx, 0x16)
+
+#define cpu_is_omap7xx()                0
+#define cpu_is_omap15xx()               0
+#define cpu_is_omap16xx()               0
+
+#if defined(MULTI_OMAP1)
+# if defined(CONFIG_ARCH_OMAP730)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              is_omap7xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+#  undef  cpu_is_omap15xx
+#  define cpu_is_omap15xx()             is_omap15xx()
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+#  undef  cpu_is_omap16xx
+#  define cpu_is_omap16xx()             is_omap16xx()
+# endif
+#else
+# if defined(CONFIG_ARCH_OMAP730)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              1
+# endif
+# if defined(CONFIG_ARCH_OMAP850)
+#  undef  cpu_is_omap7xx
+#  define cpu_is_omap7xx()              1
+# endif
+# if defined(CONFIG_ARCH_OMAP15XX)
+#  undef  cpu_is_omap15xx
+#  define cpu_is_omap15xx()             1
+# endif
+# if defined(CONFIG_ARCH_OMAP16XX)
+#  undef  cpu_is_omap16xx
+#  define cpu_is_omap16xx()             1
+# endif
+#endif
+
+/*
+ * Macros to detect individual cpu types.
+ * These are only rarely needed.
+ * cpu_is_omap310():    True for OMAP310
+ * cpu_is_omap1510():   True for OMAP1510
+ * cpu_is_omap1610():   True for OMAP1610
+ * cpu_is_omap1611():   True for OMAP1611
+ * cpu_is_omap5912():   True for OMAP5912
+ * cpu_is_omap1621():   True for OMAP1621
+ * cpu_is_omap1710():   True for OMAP1710
+ */
+#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
+
+#define IS_OMAP_TYPE(type, id)                          \
+static inline int is_omap ##type (void)                 \
+{                                                       \
+        return (GET_OMAP_TYPE == (id)) ? 1 : 0;         \
+}
+
+IS_OMAP_TYPE(310, 0x0310)
+IS_OMAP_TYPE(1510, 0x1510)
+IS_OMAP_TYPE(1610, 0x1610)
+IS_OMAP_TYPE(1611, 0x1611)
+IS_OMAP_TYPE(5912, 0x1611)
+IS_OMAP_TYPE(1621, 0x1621)
+IS_OMAP_TYPE(1710, 0x1710)
+
+#define cpu_is_omap310()                0
+#define cpu_is_omap1510()               0
+#define cpu_is_omap1610()               0
+#define cpu_is_omap5912()               0
+#define cpu_is_omap1611()               0
+#define cpu_is_omap1621()               0
+#define cpu_is_omap1710()               0
+
+/* These are needed to compile common code */
+#ifdef CONFIG_ARCH_OMAP1
+#define cpu_is_omap242x()               0
+#define cpu_is_omap2430()               0
+#define cpu_is_omap243x()               0
+#define cpu_is_omap24xx()               0
+#define cpu_is_omap34xx()               0
+#define cpu_is_omap44xx()               0
+#define soc_is_omap54xx()               0
+#define soc_is_am33xx()                 0
+#define cpu_class_is_omap1()            1
+#define cpu_class_is_omap2()            0
+#endif
+
+/*
+ * Whether we have MULTI_OMAP1 or not, we still need to distinguish
+ * between 310 vs. 1510 and 1611B/5912 vs. 1710.
+ */
+
+#if defined(CONFIG_ARCH_OMAP15XX)
+# undef  cpu_is_omap310
+# undef  cpu_is_omap1510
+# define cpu_is_omap310()               is_omap310()
+# define cpu_is_omap1510()              is_omap1510()
+#endif
+
+#if defined(CONFIG_ARCH_OMAP16XX)
+# undef  cpu_is_omap1610
+# undef  cpu_is_omap1611
+# undef  cpu_is_omap5912
+# undef  cpu_is_omap1621
+# undef  cpu_is_omap1710
+# define cpu_is_omap1610()              is_omap1610()
+# define cpu_is_omap1611()              is_omap1611()
+# define cpu_is_omap5912()              is_omap5912()
+# define cpu_is_omap1621()              is_omap1621()
+# define cpu_is_omap1710()              is_omap1710()
+#endif
+
+#endif  /* __ASSEMBLY__ */
+#endif
diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/mach-omap1/include/mach/tc.h
index 1b4b2da86203..1b4b2da86203 100644
--- a/arch/arm/plat-omap/include/plat/tc.h
+++ b/arch/arm/mach-omap1/include/mach/tc.h
diff --git a/arch/arm/mach-omap1/include/mach/uncompress.h b/arch/arm/mach-omap1/include/mach/uncompress.h
index 0ff22dc075c7..ad6fbe7d83f2 100644
--- a/arch/arm/mach-omap1/include/mach/uncompress.h
+++ b/arch/arm/mach-omap1/include/mach/uncompress.h
@@ -1,5 +1,122 @@
 /*
- * arch/arm/mach-omap1/include/mach/uncompress.h
+ * arch/arm/plat-omap/include/mach/uncompress.h
+ *
+ * Serial port stubs for kernel decompress status messages
+ *
+ * Initially based on:
+ * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * Rewritten by:
+ * Author: <source@mvista.com>
+ * 2004 (c) MontaVista Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
  */
 
-#include <plat/uncompress.h>
+#include <linux/types.h>
+#include <linux/serial_reg.h>
+
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+
+#include "serial.h"
+
+#define MDR1_MODE_MASK                  0x07
+
+volatile u8 *uart_base;
+int uart_shift;
+
+/*
+ * Store the DEBUG_LL uart number into memory.
+ * See also debug-macro.S, and serial.c for related code.
+ */
+static void set_omap_uart_info(unsigned char port)
+{
+        /*
+         * Get address of some.bss variable and round it down
+         * a la CONFIG_AUTO_ZRELADDR.
+         */
+        u32 ram_start = (u32)&uart_shift & 0xf8000000;
+        u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
+        *uart_info = port;
+}
+
+static void putc(int c)
+{
+        if (!uart_base)
+                return;
+
+        /* Check for UART 16x mode */
+        if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
+                return;
+
+        while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
+                barrier();
+        uart_base[UART_TX << uart_shift] = c;
+}
+
+static inline void flush(void)
+{
+}
+
+/*
+ * Macros to configure UART1 and debug UART
+ */
+#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id)               \
+        if (machine_is_##mach()) {                                      \
+                uart_base = (volatile u8 *)(dbg_uart);                  \
+                uart_shift = (dbg_shft);                                \
+                port = (dbg_id);                                        \
+                set_omap_uart_info(port);                               \
+                break;                                                  \
+        }
+
+#define DEBUG_LL_OMAP7XX(p, mach)                                       \
+        _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \
+                OMAP1UART##p)
+
+#define DEBUG_LL_OMAP1(p, mach)                                         \
+        _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT,    \
+                OMAP1UART##p)
+
+static inline void arch_decomp_setup(void)
+{
+        int port = 0;
+
+        /*
+         * Initialize the port based on the machine ID from the bootloader.
+         * Note that we're using macros here instead of switch statement
+         * as machine_is functions are optimized out for the boards that
+         * are not selected.
+         */
+        do {
+                /* omap7xx/8xx based boards using UART1 with shift 0 */
+                DEBUG_LL_OMAP7XX(1, herald);
+                DEBUG_LL_OMAP7XX(1, omap_perseus2);
+
+                /* omap15xx/16xx based boards using UART1 */
+                DEBUG_LL_OMAP1(1, ams_delta);
+                DEBUG_LL_OMAP1(1, nokia770);
+                DEBUG_LL_OMAP1(1, omap_h2);
+                DEBUG_LL_OMAP1(1, omap_h3);
+                DEBUG_LL_OMAP1(1, omap_innovator);
+                DEBUG_LL_OMAP1(1, omap_osk);
+                DEBUG_LL_OMAP1(1, omap_palmte);
+                DEBUG_LL_OMAP1(1, omap_palmz71);
+
+                /* omap15xx/16xx based boards using UART2 */
+                DEBUG_LL_OMAP1(2, omap_palmtt);
+
+                /* omap15xx/16xx based boards using UART3 */
+                DEBUG_LL_OMAP1(3, sx1);
+        } while (0);
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_wdog()
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 6a5baab1f4cb..5a3b80617a11 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -17,8 +17,8 @@
 #include <asm/mach/map.h>
 
 #include <mach/mux.h>
-#include <plat/tc.h>
-#include <plat/dma.h>
+#include <mach/tc.h>
+#include <plat-omap/dma-omap.h>
 
 #include "iomap.h"
 #include "common.h"
@@ -134,7 +134,6 @@ void __init omap1_init_early(void)
          */
         omap1_clk_init();
         omap1_mux_init();
-        omap_init_consistent_dma_size();
 }
 
 void __init omap1_init_late(void)
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
index 330c4716b028..f4e2d7a21365 100644
--- a/arch/arm/mach-omap1/iomap.h
+++ b/arch/arm/mach-omap1/iomap.h
@@ -22,9 +22,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
-#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
-
 /*
  * ----------------------------------------------------------------------------
  * Omap1 specific IO mapping
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 6995fb6a3345..122ef67939a2 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -45,7 +45,7 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 
-#include <plat/cpu.h>
+#include "soc.h"
 
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index ed42628611bc..7ed8c1857d56 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -27,11 +27,13 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 #include <mach/hardware.h>
 #include <mach/lcdc.h>
 
+#include "dma.h"
+
 int omap_lcd_dma_running(void)
 {
         /*
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index bdc2e7541adb..c6d8fdf92e9c 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -19,14 +19,15 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/mux.h>
-#include <plat/cpu.h>
+#include "soc.h"
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 
 #include <mach/irqs.h>
 
 #include "iomap.h"
+#include "dma.h"
 
 #define DPS_RSTCT2_PER_EN       (1 << 0)
 #define DSP_RSTCT2_WD_PER_EN    (1 << 1)
diff --git a/arch/arm/mach-omap1/mmc.h b/arch/arm/mach-omap1/mmc.h
new file mode 100644
index 000000000000..39c2b13de884
--- /dev/null
+++ b/arch/arm/mach-omap1/mmc.h
@@ -0,0 +1,18 @@
+#include <linux/mmc/host.h>
+#include <linux/platform_data/mmc-omap.h>
+
+#define OMAP15XX_NR_MMC         1
+#define OMAP16XX_NR_MMC         2
+#define OMAP1_MMC_SIZE          0x080
+#define OMAP1_MMC1_BASE         0xfffb7800
+#define OMAP1_MMC2_BASE         0xfffb7c00      /* omap16xx only */
+
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers);
+#else
+static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
+                                int nr_controllers)
+{
+}
+#endif
diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c
index 9cd4ddb51397..8dcebe6d8882 100644
--- a/arch/arm/mach-omap1/opp_data.c
+++ b/arch/arm/mach-omap1/opp_data.c
@@ -10,7 +10,7 @@
  * published by the Free Software Foundation.
  */
 
-#include <plat/clkdev_omap.h>
+#include "clock.h"
 #include "opp.h"
 
 /*-------------------------------------------------------------------------
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 47ec16155483..66d663a6ef3a 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -44,23 +44,23 @@
 #include <linux/io.h>
 #include <linux/atomic.h>
 
+#include <asm/fncpy.h>
 #include <asm/system_misc.h>
 #include <asm/irq.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 
-#include <plat/cpu.h>
-#include <plat/clock.h>
-#include <plat/sram.h>
-#include <plat/tc.h>
+#include <mach/tc.h>
 #include <mach/mux.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/dmtimer.h>
 
 #include <mach/irqs.h>
 
 #include "iomap.h"
+#include "clock.h"
 #include "pm.h"
+#include "sram.h"
 
 static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE];
 static unsigned short dsp_sleep_save[DSP_SLEEP_SAVE_SIZE];
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index 7868e75ad077..3f2d39672393 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -19,8 +19,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 
-#include <plat/omap_device.h>
-#include <plat/omap-pm.h>
+#include "soc.h"
 
 #ifdef CONFIG_PM_RUNTIME
 static int omap1_pm_runtime_suspend(struct device *dev)
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index b17709103866..5eebd7e889d0 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -4,12 +4,24 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
-#include <plat/prcm.h>
-
 #include <mach/hardware.h>
 
+#include "iomap.h"
 #include "common.h"
 
+/* ARM_SYSST bit shifts related to SoC reset sources */
+#define ARM_SYSST_POR_SHIFT                             5
+#define ARM_SYSST_EXT_RST_SHIFT                         4
+#define ARM_SYSST_ARM_WDRST_SHIFT                       2
+#define ARM_SYSST_GLOB_SWRST_SHIFT                      1
+
+/* Standardized reset source bits (across all OMAP SoCs) */
+#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT               0
+#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT               1
+#define OMAP_MPU_WD_RST_SRC_ID_SHIFT                    3
+#define OMAP_EXTWARM_RST_SRC_ID_SHIFT                   5
+
+
 void omap1_restart(char mode, const char *cmd)
 {
         /*
@@ -23,3 +35,28 @@ void omap1_restart(char mode, const char *cmd)
 
         omap_writew(1, ARM_RSTCT1);
 }
+
+/**
+ * omap1_get_reset_sources - return the source of the SoC's last reset
+ *
+ * Returns bits that represent the last reset source for the SoC.  The
+ * format is standardized across OMAPs for use by the OMAP watchdog.
+ */
+u32 omap1_get_reset_sources(void)
+{
+        u32 ret = 0;
+        u16 rs;
+
+        rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST));
+
+        if (rs & (1 << ARM_SYSST_POR_SHIFT))
+                ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT;
+        if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT))
+                ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT;
+        if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT))
+                ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT;
+        if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT))
+                ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT;
+
+        return ret;
+}
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index b9d6834af835..d1ac08016f0b 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -23,7 +23,6 @@
 #include <asm/mach-types.h>
 
 #include <mach/mux.h>
-#include <plat/fpga.h>
 
 #include "pm.h"
 
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 0e628743bd03..a908c51839a4 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -36,6 +36,8 @@
 
 #include <asm/assembler.h>
 
+#include <mach/hardware.h>
+
 #include "iomap.h"
 #include "pm.h"
 
diff --git a/arch/arm/mach-omap1/soc.h b/arch/arm/mach-omap1/soc.h
new file mode 100644
index 000000000000..69daf0187b1d
--- /dev/null
+++ b/arch/arm/mach-omap1/soc.h
@@ -0,0 +1,4 @@
+/*
+ * We can move mach/soc.h here once the drivers are fixed
+ */
+#include <mach/soc.h>
diff --git a/arch/arm/mach-omap1/sram-init.c b/arch/arm/mach-omap1/sram-init.c
new file mode 100644
index 000000000000..6431b0f862ce
--- /dev/null
+++ b/arch/arm/mach-omap1/sram-init.c
@@ -0,0 +1,76 @@
+/*
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "sram.h"
+
+#define OMAP1_SRAM_PA           0x20000000
+#define SRAM_BOOTLOADER_SZ      0x80
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_and_map_sram(void)
+{
+        unsigned long omap_sram_skip = SRAM_BOOTLOADER_SZ;
+        unsigned long omap_sram_start = OMAP1_SRAM_PA;
+        unsigned long omap_sram_size;
+
+        if (cpu_is_omap7xx())
+                omap_sram_size = 0x32000;       /* 200K */
+        else if (cpu_is_omap15xx())
+                omap_sram_size = 0x30000;       /* 192K */
+        else if (cpu_is_omap1610() || cpu_is_omap1611() ||
+                        cpu_is_omap1621() || cpu_is_omap1710())
+                omap_sram_size = 0x4000;        /* 16K */
+        else {
+                pr_err("Could not detect SRAM size\n");
+                omap_sram_size = 0x4000;
+        }
+
+        omap_map_sram(omap_sram_start, omap_sram_size,
+                omap_sram_skip, 1);
+}
+
+static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
+
+void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
+{
+        BUG_ON(!_omap_sram_reprogram_clock);
+        /* On 730, bit 13 must always be 1 */
+        if (cpu_is_omap7xx())
+                ckctl |= 0x2000;
+        _omap_sram_reprogram_clock(dpllctl, ckctl);
+}
+
+int __init omap_sram_init(void)
+{
+        omap_detect_and_map_sram();
+        _omap_sram_reprogram_clock =
+                        omap_sram_push(omap1_sram_reprogram_clock,
+                                        omap1_sram_reprogram_clock_sz);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap1/sram.h b/arch/arm/mach-omap1/sram.h
new file mode 100644
index 000000000000..d5a6c8362301
--- /dev/null
+++ b/arch/arm/mach-omap1/sram.h
@@ -0,0 +1,7 @@
+#include <plat/sram.h>
+
+extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
+
+/* Do not use these */
+extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
+extern unsigned long omap1_sram_reprogram_clock_sz;
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
index cdeb9d3ef640..bde7a35e5000 100644
--- a/arch/arm/mach-omap1/timer.c
+++ b/arch/arm/mach-omap1/timer.c
@@ -25,6 +25,7 @@
 #include <linux/err.h>
 #include <linux/slab.h>
 #include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 
 #include <mach/irqs.h>
 
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 74529549130c..41152fadd4c0 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -50,7 +50,7 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
-#include <plat/dmtimer.h>
+#include <plat/counter-32k.h>
 
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index 84267edd9421..104fed366b8f 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -301,7 +301,7 @@ static inline void otg_device_init(struct omap_usb_config *pdata)
 
 #endif
 
-u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
+static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
 {
         u32     syscon1 = 0;
 
@@ -409,7 +409,7 @@ u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
         return syscon1 << 16;
 }
 
-u32 __init omap1_usb1_init(unsigned nwires)
+static u32 __init omap1_usb1_init(unsigned nwires)
 {
         u32     syscon1 = 0;
 
@@ -475,7 +475,7 @@ bad:
         return syscon1 << 20;
 }
 
-u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
+static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
 {
         u32     syscon1 = 0;
 
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fe40d9e488c9..dd76ff77760b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,30 +4,37 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
-         common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o
-
-# INTCPS IP block support - XXX should be moved to drivers/
-obj-$(CONFIG_ARCH_OMAP2)                += irq.o
-obj-$(CONFIG_ARCH_OMAP3)                += irq.o
-obj-$(CONFIG_SOC_AM33XX)                += irq.o
-
-# Secure monitor API support
-obj-$(CONFIG_ARCH_OMAP3)                += omap-smc.o omap-secure.o
-obj-$(CONFIG_ARCH_OMAP4)                += omap-smc.o omap-secure.o
-obj-$(CONFIG_SOC_OMAP5)                 += omap-smc.o omap-secure.o
+         common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
+         omap_device.o sram.o
+
+omap-2-3-common                         = irq.o
+hwmod-common                            = omap_hwmod.o \
+                                          omap_hwmod_common_data.o
+clock-common                            = clock.o clock_common_data.o \
+                                          clkt_dpll.o clkt_clksel.o
+secure-common                           = omap-smc.o omap-secure.o
+
+obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
+obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
+obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
+obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
+obj-$(CONFIG_SOC_OMAP5)  += prm44xx.o $(hwmod-common) $(secure-common)
 
 ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
 obj-y += mcbsp.o
 endif
 
-obj-$(CONFIG_TWL4030_CORE)              += omap_twl.o
+obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
+obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)        += sdrc.o
 
 # SMP support ONLY available for OMAP4
 
 obj-$(CONFIG_SMP)                       += omap-smp.o omap-headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)               += omap-hotplug.o
-obj-$(CONFIG_ARCH_OMAP4)                += omap4-common.o omap-wakeupgen.o
-obj-$(CONFIG_SOC_OMAP5)                 += omap4-common.o omap-wakeupgen.o
+omap-4-5-common                         =  omap4-common.o omap-wakeupgen.o \
+                                           sleep44xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += $(omap-4-5-common)
+obj-$(CONFIG_SOC_OMAP5)                 += $(omap-4-5-common)
 
 plus_sec := $(call as-instr,.arch_extension sec,+sec)
 AFLAGS_omap-headsmp.o                   :=-Wa,-march=armv7-a$(plus_sec)
@@ -43,6 +50,11 @@ AFLAGS_sram242x.o			:=-Wa,-march=armv6
 AFLAGS_sram243x.o                       :=-Wa,-march=armv6
 AFLAGS_sram34xx.o                       :=-Wa,-march=armv7-a
 
+# Restart code (OMAP4/5 currently in omap4-common.c)
+obj-$(CONFIG_SOC_OMAP2420)              += omap2-restart.o
+obj-$(CONFIG_SOC_OMAP2430)              += omap2-restart.o
+obj-$(CONFIG_ARCH_OMAP3)                += omap3-restart.o
+
 # Pin multiplexing
 obj-$(CONFIG_SOC_OMAP2420)              += mux2420.o
 obj-$(CONFIG_SOC_OMAP2430)              += mux2430.o
@@ -52,7 +64,6 @@ obj-$(CONFIG_ARCH_OMAP4)		+= mux44xx.o
 # SMS/SDRC
 obj-$(CONFIG_ARCH_OMAP2)                += sdrc2xxx.o
 # obj-$(CONFIG_ARCH_OMAP3)              += sdrc3xxx.o
-obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)        += sdrc.o
 
 # OPP table initialization
 ifeq ($(CONFIG_PM_OPP),y)
@@ -62,16 +73,18 @@ obj-$(CONFIG_ARCH_OMAP4)		+= opp4xxx_data.o
 endif
 
 # Power Management
+obj-$(CONFIG_OMAP_PM_NOOP)              += omap-pm-noop.o
+
 ifeq ($(CONFIG_PM),y)
-obj-$(CONFIG_ARCH_OMAP2)                += pm24xx.o sleep24xx.o
+obj-$(CONFIG_ARCH_OMAP2)                += pm24xx.o
+obj-$(CONFIG_ARCH_OMAP2)                += sleep24xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += pm34xx.o sleep34xx.o
 obj-$(CONFIG_ARCH_OMAP4)                += pm44xx.o omap-mpuss-lowpower.o
-obj-$(CONFIG_ARCH_OMAP4)                += sleep44xx.o
-obj-$(CONFIG_SOC_OMAP5)                 += omap-mpuss-lowpower.o sleep44xx.o
+obj-$(CONFIG_SOC_OMAP5)                 += omap-mpuss-lowpower.o
 obj-$(CONFIG_PM_DEBUG)                  += pm-debug.o
 
 obj-$(CONFIG_POWER_AVS_OMAP)            += sr_device.o
-obj-$(CONFIG_POWER_AVS_OMAP_CLASS3)     += smartreflex-class3.o
+obj-$(CONFIG_POWER_AVS_OMAP_CLASS3)    += smartreflex-class3.o
 
 AFLAGS_sleep24xx.o                      :=-Wa,-march=armv6
 AFLAGS_sleep34xx.o                      :=-Wa,-march=armv7-a$(plus_sec)
@@ -83,76 +96,82 @@ endif
 endif
 
 ifeq ($(CONFIG_CPU_IDLE),y)
-obj-$(CONFIG_ARCH_OMAP3)                += cpuidle34xx.o
-obj-$(CONFIG_ARCH_OMAP4)                += cpuidle44xx.o
+obj-$(CONFIG_ARCH_OMAP3)                += cpuidle34xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += cpuidle44xx.o
 endif
 
 # PRCM
-obj-y                                   += prcm.o prm_common.o
-obj-$(CONFIG_ARCH_OMAP2)                += cm2xxx_3xxx.o prm2xxx_3xxx.o
-obj-$(CONFIG_ARCH_OMAP3)                += cm2xxx_3xxx.o prm2xxx_3xxx.o
+obj-y                                   += prm_common.o cm_common.o
+obj-$(CONFIG_ARCH_OMAP2)                += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
+obj-$(CONFIG_ARCH_OMAP3)                += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)                += vc3xxx_data.o vp3xxx_data.o
 obj-$(CONFIG_SOC_AM33XX)                += prm33xx.o cm33xx.o
 omap-prcm-4-5-common                    =  cminst44xx.o cm44xx.o prm44xx.o \
                                            prcm_mpu44xx.o prminst44xx.o \
-                                           vc44xx_data.o vp44xx_data.o \
-                                           prm44xx.o
+                                           vc44xx_data.o vp44xx_data.o
 obj-$(CONFIG_ARCH_OMAP4)                += $(omap-prcm-4-5-common)
 obj-$(CONFIG_SOC_OMAP5)                 += $(omap-prcm-4-5-common)
 
 # OMAP voltage domains
-obj-y                                   += voltage.o vc.o vp.o
+voltagedomain-common                    := voltage.o vc.o vp.o
+obj-$(CONFIG_ARCH_OMAP2)                += $(voltagedomain-common)
 obj-$(CONFIG_ARCH_OMAP2)                += voltagedomains2xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3)                += $(voltagedomain-common)
 obj-$(CONFIG_ARCH_OMAP3)                += voltagedomains3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP4)                += $(voltagedomain-common)
 obj-$(CONFIG_ARCH_OMAP4)                += voltagedomains44xx_data.o
-obj-$(CONFIG_SOC_AM33XX)                += voltagedomains33xx_data.o
+obj-$(CONFIG_SOC_AM33XX)                += $(voltagedomain-common)
+obj-$(CONFIG_SOC_AM33XX)                += voltagedomains33xx_data.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(voltagedomain-common)
 
 # OMAP powerdomain framework
-obj-y                                   += powerdomain.o powerdomain-common.o
+powerdomain-common                      += powerdomain.o powerdomain-common.o
+obj-$(CONFIG_ARCH_OMAP2)                += $(powerdomain-common)
 obj-$(CONFIG_ARCH_OMAP2)                += powerdomains2xxx_data.o
-obj-$(CONFIG_ARCH_OMAP2)                += powerdomain2xxx_3xxx.o
 obj-$(CONFIG_ARCH_OMAP2)                += powerdomains2xxx_3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP3)                += powerdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)                += $(powerdomain-common)
 obj-$(CONFIG_ARCH_OMAP3)                += powerdomains3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)                += powerdomains2xxx_3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP4)                += powerdomain44xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += $(powerdomain-common)
 obj-$(CONFIG_ARCH_OMAP4)                += powerdomains44xx_data.o
-obj-$(CONFIG_SOC_AM33XX)                += powerdomain33xx.o
+obj-$(CONFIG_SOC_AM33XX)                += $(powerdomain-common)
 obj-$(CONFIG_SOC_AM33XX)                += powerdomains33xx_data.o
-obj-$(CONFIG_SOC_OMAP5)                 += powerdomain44xx.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(powerdomain-common)
 
 # PRCM clockdomain control
-obj-y                                   += clockdomain.o
-obj-$(CONFIG_ARCH_OMAP2)                += clockdomain2xxx_3xxx.o
+clockdomain-common                      += clockdomain.o
+obj-$(CONFIG_ARCH_OMAP2)                += $(clockdomain-common)
 obj-$(CONFIG_ARCH_OMAP2)                += clockdomains2xxx_3xxx_data.o
 obj-$(CONFIG_SOC_OMAP2420)              += clockdomains2420_data.o
 obj-$(CONFIG_SOC_OMAP2430)              += clockdomains2430_data.o
-obj-$(CONFIG_ARCH_OMAP3)                += clockdomain2xxx_3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)                += $(clockdomain-common)
 obj-$(CONFIG_ARCH_OMAP3)                += clockdomains2xxx_3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP3)                += clockdomains3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP4)                += clockdomain44xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += $(clockdomain-common)
 obj-$(CONFIG_ARCH_OMAP4)                += clockdomains44xx_data.o
-obj-$(CONFIG_SOC_AM33XX)                += clockdomain33xx.o
+obj-$(CONFIG_SOC_AM33XX)                += $(clockdomain-common)
 obj-$(CONFIG_SOC_AM33XX)                += clockdomains33xx_data.o
-obj-$(CONFIG_SOC_OMAP5)                 += clockdomain44xx.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(clockdomain-common)
 
 # Clock framework
-obj-y                                   += clock.o clock_common_data.o \
-                                           clkt_dpll.o clkt_clksel.o
-obj-$(CONFIG_ARCH_OMAP2)                += clock2xxx.o
-obj-$(CONFIG_ARCH_OMAP2)                += clkt2xxx_dpllcore.o clkt2xxx_sys.o
+obj-$(CONFIG_ARCH_OMAP2)                += $(clock-common) clock2xxx.o
+obj-$(CONFIG_ARCH_OMAP2)                += clkt2xxx_sys.o
+obj-$(CONFIG_ARCH_OMAP2)                += clkt2xxx_dpllcore.o
 obj-$(CONFIG_ARCH_OMAP2)                += clkt2xxx_virt_prcm_set.o
 obj-$(CONFIG_ARCH_OMAP2)                += clkt2xxx_apll.o clkt2xxx_osc.o
 obj-$(CONFIG_ARCH_OMAP2)                += clkt2xxx_dpll.o clkt_iclk.o
 obj-$(CONFIG_SOC_OMAP2420)              += clock2420_data.o
 obj-$(CONFIG_SOC_OMAP2430)              += clock2430.o clock2430_data.o
-obj-$(CONFIG_ARCH_OMAP3)                += clock3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)                += $(clock-common) clock3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)                += clock34xx.o clkt34xx_dpll3m2.o
-obj-$(CONFIG_ARCH_OMAP3)                += clock3517.o clock36xx.o clkt_iclk.o
+obj-$(CONFIG_ARCH_OMAP3)                += clock3517.o clock36xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += dpll3xxx.o clock3xxx_data.o
-obj-$(CONFIG_ARCH_OMAP4)                += clock44xx_data.o
+obj-$(CONFIG_ARCH_OMAP3)                += clkt_iclk.o
+obj-$(CONFIG_ARCH_OMAP4)                += $(clock-common) clock44xx_data.o
 obj-$(CONFIG_ARCH_OMAP4)                += dpll3xxx.o dpll44xx.o
-obj-$(CONFIG_SOC_AM33XX)                += dpll3xxx.o clock33xx_data.o
+obj-$(CONFIG_SOC_AM33XX)                += $(clock-common) dpll3xxx.o
+obj-$(CONFIG_SOC_AM33XX)                += clock33xx_data.o
+obj-$(CONFIG_SOC_OMAP5)                 += $(clock-common)
 obj-$(CONFIG_SOC_OMAP5)                 += dpll3xxx.o dpll44xx.o
 
 # OMAP2 clock rate set data (old "OPP" data)
@@ -160,7 +179,6 @@ obj-$(CONFIG_SOC_OMAP2420)		+= opp2420_data.o
 obj-$(CONFIG_SOC_OMAP2430)              += opp2430_data.o
 
 # hwmod data
-obj-y                                   += omap_hwmod_common_data.o
 obj-$(CONFIG_SOC_OMAP2420)              += omap_hwmod_2xxx_ipblock_data.o
 obj-$(CONFIG_SOC_OMAP2420)              += omap_hwmod_2xxx_3xxx_ipblock_data.o
 obj-$(CONFIG_SOC_OMAP2420)              += omap_hwmod_2xxx_interconnect_data.o
@@ -206,10 +224,10 @@ obj-$(CONFIG_MACH_OMAP_H4)		+= board-h4.o
 obj-$(CONFIG_MACH_OMAP_2430SDP)         += board-2430sdp.o
 obj-$(CONFIG_MACH_OMAP_APOLLON)         += board-apollon.o
 obj-$(CONFIG_MACH_OMAP3_BEAGLE)         += board-omap3beagle.o
-obj-$(CONFIG_MACH_DEVKIT8000)           += board-devkit8000.o
+obj-$(CONFIG_MACH_DEVKIT8000)           += board-devkit8000.o
 obj-$(CONFIG_MACH_OMAP_LDP)             += board-ldp.o
-obj-$(CONFIG_MACH_OMAP3530_LV_SOM)      += board-omap3logic.o
-obj-$(CONFIG_MACH_OMAP3_TORPEDO)        += board-omap3logic.o
+obj-$(CONFIG_MACH_OMAP3530_LV_SOM)      += board-omap3logic.o
+obj-$(CONFIG_MACH_OMAP3_TORPEDO)        += board-omap3logic.o
 obj-$(CONFIG_MACH_ENCORE)               += board-omap3encore.o
 obj-$(CONFIG_MACH_OVERO)                += board-overo.o
 obj-$(CONFIG_MACH_OMAP3EVM)             += board-omap3evm.o
diff --git a/arch/arm/mach-omap2/am33xx.h b/arch/arm/mach-omap2/am33xx.h
index 06c19bb7bca6..43296c1af9ee 100644
--- a/arch/arm/mach-omap2/am33xx.h
+++ b/arch/arm/mach-omap2/am33xx.h
@@ -21,5 +21,6 @@
 #define AM33XX_SCM_BASE         0x44E10000
 #define AM33XX_CTRL_BASE        AM33XX_SCM_BASE
 #define AM33XX_PRCM_BASE        0x44E00000
+#define AM33XX_TAP_BASE         (AM33XX_CTRL_BASE + 0x3FC)
 
 #endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
index d0c54c573d34..af11dcdb7e2c 100644
--- a/arch/arm/mach-omap2/am35xx-emac.c
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -18,7 +18,7 @@
 #include <linux/err.h>
 #include <linux/davinci_emac.h>
 #include <asm/system.h>
-#include <plat/omap_device.h>
+#include "omap_device.h"
 #include "am35xx.h"
 #include "control.h"
 #include "am35xx-emac.h"
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 95b384d54f8a..4815ea6f8f5d 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -28,14 +28,12 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/gpmc.h>
-#include <plat/usb.h>
+#include "gpmc.h"
 #include "gpmc-smc91x.h"
 
 #include <video/omapdss.h>
@@ -287,5 +285,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
         .init_machine   = omap_2430sdp_init,
         .init_late      = omap2430_init_late,
         .timer          = &omap2_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 96cd3693e1ae..6601754f9512 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -30,15 +30,15 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat/usb.h>
 #include "common.h"
-#include <plat/dma.h>
-#include <plat/gpmc.h>
+#include <plat-omap/dma-omap.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-tfp410.h>
 
+#include "gpmc.h"
 #include "gpmc-smc91x.h"
 
+#include "soc.h"
 #include "board-flash.h"
 #include "mux.h"
 #include "sdram-qimonda-hyb18m512160af-6.h"
@@ -597,5 +597,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
         .init_machine   = omap_3430sdp_init,
         .init_late      = omap3430_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index fc224ad86747..050aaa771254 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -18,9 +18,8 @@
 
 #include "common.h"
 #include "gpmc-smc91x.h"
-#include <plat/usb.h>
 
-#include <mach/board-zoom.h>
+#include "board-zoom.h"
 
 #include "board-flash.h"
 #include "mux.h"
@@ -213,5 +212,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
         .init_machine   = omap_sdp_init,
         .init_late      = omap3630_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 3669c120c7e8..85dfa71e0dc6 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -27,6 +27,7 @@
 #include <linux/leds.h>
 #include <linux/leds_pwm.h>
 #include <linux/platform_data/omap4-keypad.h>
+#include <linux/usb/musb.h>
 
 #include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
@@ -34,8 +35,6 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/usb.h>
-#include <plat/mmc.h>
 #include "omap4-keypad.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-nokia-dsi.h>
@@ -45,6 +44,7 @@
 
 #include "soc.h"
 #include "mux.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "control.h"
 #include "common-board-devices.h"
@@ -881,5 +881,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
         .init_machine   = omap_4430sdp_init,
         .init_late      = omap4430_init_late,
         .timer          = &omap4_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 318feadb1d6e..51b96a1206d1 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -26,7 +26,6 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/usb.h>
 
 #include "am35xx-emac.h"
 #include "mux.h"
@@ -94,5 +93,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
         .init_machine   = am3517_crane_init,
         .init_late      = am35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index e16289755f2e..4be58fd071f6 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -25,6 +25,7 @@
 #include <linux/can/platform/ti_hecc.h>
 #include <linux/davinci_emac.h>
 #include <linux/mmc/host.h>
+#include <linux/usb/musb.h>
 #include <linux/platform_data/gpio-omap.h>
 
 #include "am35xx.h"
@@ -33,7 +34,6 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/usb.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
@@ -393,5 +393,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
         .init_machine   = am3517_evm_init,
         .init_late      = am35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index cea3abace815..5d0a61f54165 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -28,14 +28,14 @@
 #include <linux/clk.h>
 #include <linux/smc91x.h>
 #include <linux/gpio.h>
+#include <linux/platform_data/leds-omap.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 
-#include <plat/led.h>
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
@@ -338,5 +338,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
         .init_machine   = omap_apollon_init,
         .init_late      = omap2420_init_late,
         .timer          = &omap2_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 376d26eb601c..c8e37dc00892 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -38,21 +38,19 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include "common.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/gpmc.h>
-#include <plat/usb.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
-#include <mach/hardware.h>
-
+#include "common.h"
 #include "mux.h"
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "gpmc.h"
+#include "gpmc-nand.h"
 
 #define CM_T35_GPIO_PENDOWN             57
 #define SB_T35_USB_HUB_RESET_GPIO       167
@@ -181,7 +179,7 @@ static struct omap_nand_platform_data cm_t35_nand_data = {
 
 static void __init cm_t35_init_nand(void)
 {
-        if (gpmc_nand_init(&cm_t35_nand_data) < 0)
+        if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
                 pr_err("CM-T35: Unable to register NAND device\n");
 }
 #else
@@ -753,18 +751,18 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
         .init_machine   = cm_t35_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
 
 MACHINE_START(CM_T3730, "Compulab CM-T3730")
-        .atag_offset    = 0x100,
-        .reserve        = omap_reserve,
-        .map_io         = omap3_map_io,
-        .init_early     = omap3630_init_early,
-        .init_irq       = omap3_init_irq,
+        .atag_offset    = 0x100,
+        .reserve        = omap_reserve,
+        .map_io         = omap3_map_io,
+        .init_early     = omap3630_init_early,
+        .init_irq       = omap3_init_irq,
         .handle_irq     = omap3_intc_handle_irq,
-        .init_machine   = cm_t3730_init,
+        .init_machine   = cm_t3730_init,
         .init_late     = omap3630_init_late,
-        .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .timer          = &omap3_timer,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 59c0a45f75b0..ebbc2adb499e 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -39,9 +39,8 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/usb.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 
 #include "am35xx.h"
 
@@ -49,6 +48,7 @@
 #include "control.h"
 #include "common-board-devices.h"
 #include "am35xx-emac.h"
+#include "gpmc-nand.h"
 
 #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
 static struct gpio_led cm_t3517_leds[] = {
@@ -240,7 +240,7 @@ static struct omap_nand_platform_data cm_t3517_nand_data = {
 
 static void __init cm_t3517_init_nand(void)
 {
-        if (gpmc_nand_init(&cm_t3517_nand_data) < 0)
+        if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0)
                 pr_err("CM-T3517: NAND initialization failed\n");
 }
 #else
@@ -297,6 +297,6 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3517_init,
         .init_late      = am35xx_init_late,
-        .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .timer          = &omap3_gp_timer,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 1fd161e934c7..7667eb749522 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -39,9 +39,8 @@
 #include <asm/mach/flash.h>
 
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/usb.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
@@ -55,8 +54,11 @@
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "mux.h"
 #include "hsmmc.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
 
+#define NAND_CS                 0
+
 #define OMAP_DM9000_GPIO_IRQ    25
 #define OMAP3_DEVKIT_TS_GPIO    27
 
@@ -621,8 +623,9 @@ static void __init devkit8000_init(void)
 
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
-                             ARRAY_SIZE(devkit8000_nand_partitions));
+        board_nand_init(devkit8000_nand_partitions,
+                        ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
         omap_twl4030_audio_init("omap3beagle");
 
         /* Ensure SDRC pins are mux'd for self-refresh */
@@ -640,5 +643,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
         .init_machine   = devkit8000_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_secure_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index e642acf9cad0..c33adea0247c 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -17,14 +17,14 @@
 #include <linux/mtd/physmap.h>
 #include <linux/io.h>
 
-#include <plat/cpu.h>
-#include <plat/gpmc.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
-#include <plat/tc.h>
 
+#include "soc.h"
 #include "common.h"
 #include "board-flash.h"
+#include "gpmc-onenand.h"
+#include "gpmc-nand.h"
 
 #define REG_FPGA_REV                    0x10
 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
@@ -104,36 +104,35 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
                 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 
 /* Note that all values in this struct are in nanoseconds */
-static struct gpmc_timings nand_timings = {
+struct gpmc_timings nand_default_timings[1] = {
+        {
+                .sync_clk = 0,
 
-        .sync_clk = 0,
+                .cs_on = 0,
+                .cs_rd_off = 36,
+                .cs_wr_off = 36,
 
-        .cs_on = 0,
-        .cs_rd_off = 36,
-        .cs_wr_off = 36,
+                .adv_on = 6,
+                .adv_rd_off = 24,
+                .adv_wr_off = 36,
 
-        .adv_on = 6,
-        .adv_rd_off = 24,
-        .adv_wr_off = 36,
+                .we_off = 30,
+                .oe_off = 48,
 
-        .we_off = 30,
-        .oe_off = 48,
+                .access = 54,
+                .rd_cycle = 72,
+                .wr_cycle = 72,
 
-        .access = 54,
-        .rd_cycle = 72,
-        .wr_cycle = 72,
-
-        .wr_access = 30,
-        .wr_data_mux_bus = 0,
+                .wr_access = 30,
+                .wr_data_mux_bus = 0,
+        },
 };
 
-static struct omap_nand_platform_data board_nand_data = {
-        .gpmc_t         = &nand_timings,
-};
+static struct omap_nand_platform_data board_nand_data;
 
 void
-__init board_nand_init(struct mtd_partition *nand_parts,
-                        u8 nr_parts, u8 cs, int nand_type)
+__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
+                                int nand_type, struct gpmc_timings *gpmc_t)
 {
         board_nand_data.cs              = cs;
         board_nand_data.parts           = nand_parts;
@@ -141,7 +140,7 @@ __init board_nand_init(struct mtd_partition *nand_parts,
         board_nand_data.devsize         = nand_type;
 
         board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
-        gpmc_nand_init(&board_nand_data);
+        gpmc_nand_init(&board_nand_data, gpmc_t);
 }
 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
 
@@ -238,5 +237,6 @@ void __init board_flash_init(struct flash_partitions partition_info[],
                 pr_err("NAND: Unable to find configuration in GPMC\n");
         else
                 board_nand_init(partition_info[2].parts,
-                        partition_info[2].nr_parts, nandcs, nand_type);
+                        partition_info[2].nr_parts, nandcs,
+                        nand_type, nand_default_timings);
 }
diff --git a/arch/arm/mach-omap2/board-flash.h b/arch/arm/mach-omap2/board-flash.h
index c44b70d52021..2fb5d41a9fae 100644
--- a/arch/arm/mach-omap2/board-flash.h
+++ b/arch/arm/mach-omap2/board-flash.h
@@ -12,7 +12,7 @@
  */
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
-#include <plat/gpmc.h>
+#include "gpmc.h"
 
 #define PDC_NOR         1
 #define PDC_NAND        2
@@ -40,12 +40,14 @@ static inline void board_flash_init(struct flash_partitions part[],
 #if defined(CONFIG_MTD_NAND_OMAP2) || \
                 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 extern void board_nand_init(struct mtd_partition *nand_parts,
-                                        u8 nr_parts, u8 cs, int nand_type);
+                u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t);
+extern struct gpmc_timings nand_default_timings[];
 #else
 static inline void board_nand_init(struct mtd_partition *nand_parts,
-                                        u8 nr_parts, u8 cs, int nand_type)
+                u8 nr_parts, u8 cs, int nand_type, struct gpmc_timings *gpmc_t)
 {
 }
+#define nand_default_timings    NULL
 #endif
 
 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 601ecdfb1cf9..aa6e4a19dd90 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -57,7 +57,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
         .init_machine   = omap_generic_init,
         .timer          = &omap2_timer,
         .dt_compat      = omap242x_boards_compat,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
 #endif
 
@@ -76,7 +76,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
         .init_machine   = omap_generic_init,
         .timer          = &omap2_timer,
         .dt_compat      = omap243x_boards_compat,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
 #endif
 
@@ -95,6 +95,23 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
         .init_machine   = omap_generic_init,
         .timer          = &omap3_timer,
         .dt_compat      = omap3_boards_compat,
+        .restart        = omap3xxx_restart,
+MACHINE_END
+
+static const char *omap3_gp_boards_compat[] __initdata = {
+        "ti,omap3-beagle",
+        NULL,
+};
+
+DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
+        .reserve        = omap_reserve,
+        .map_io         = omap3_map_io,
+        .init_early     = omap3430_init_early,
+        .init_irq       = omap_intc_of_init,
+        .handle_irq     = omap3_intc_handle_irq,
+        .init_machine   = omap_generic_init,
+        .timer          = &omap3_secure_timer,
+        .dt_compat      = omap3_gp_boards_compat,
         .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
@@ -134,7 +151,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
         .init_late      = omap4430_init_late,
         .timer          = &omap4_timer,
         .dt_compat      = omap4_boards_compat,
-        .restart        = omap_prcm_restart,
+        .restart        = omap44xx_restart,
 MACHINE_END
 #endif
 
@@ -154,6 +171,6 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
         .init_machine   = omap_generic_init,
         .timer          = &omap5_timer,
         .dt_compat      = omap5_boards_compat,
-        .restart        = omap_prcm_restart,
+        .restart        = omap44xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 8d04bf851af4..b626dbe6f7bc 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -26,15 +26,14 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/input/matrix_keypad.h>
+#include <linux/mfd/menelaus.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat/menelaus.h>
-#include <plat/dma.h>
-#include <plat/gpmc.h>
-#include "debug-devices.h"
+#include <plat-omap/dma-omap.h>
+#include <plat/debug-devices.h>
 
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
@@ -42,6 +41,7 @@
 #include "common.h"
 #include "mux.h"
 #include "control.h"
+#include "gpmc.h"
 
 #define H4_FLASH_CS     0
 #define H4_SMC91X_CS    1
@@ -386,5 +386,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
         .init_machine   = omap_h4_init,
         .init_late      = omap2420_init_late,
         .timer          = &omap2_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 378590694447..0f24cb84ba5a 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -29,20 +29,19 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#include "common.h"
-#include <plat/gpmc.h>
-#include <plat/usb.h>
-
 #include <video/omapdss.h>
 #include <video/omap-panel-tfp410.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
 
+#include "common.h"
+#include "gpmc.h"
 #include "mux.h"
 #include "hsmmc.h"
 #include "sdram-numonyx-m65kxxxxam.h"
 #include "common-board-devices.h"
 #include "board-flash.h"
 #include "control.h"
+#include "gpmc-onenand.h"
 
 #define IGEP2_SMSC911X_CS       5
 #define IGEP2_SMSC911X_GPIO     176
@@ -175,7 +174,7 @@ static void __init igep_flash_init(void)
                 pr_info("IGEP: initializing NAND memory device\n");
                 board_nand_init(igep_flash_partitions,
                                 ARRAY_SIZE(igep_flash_partitions),
-                                0, NAND_BUSWIDTH_16);
+                                0, NAND_BUSWIDTH_16, nand_default_timings);
         } else if (mux == IGEP_SYSBOOT_ONENAND) {
                 pr_info("IGEP: initializing OneNAND memory device\n");
                 board_onenand_init(igep_flash_partitions,
@@ -657,7 +656,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
         .init_machine   = igep_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
 
 MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -670,5 +669,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
         .init_machine   = igep_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ee8c3cfb95b3..0869f4f3d3e1 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -35,9 +35,8 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/gpmc.h>
-#include <mach/board-zoom.h>
-#include <plat/usb.h>
+#include "board-zoom.h"
+#include "gpmc.h"
 #include "gpmc-smsc911x.h"
 
 #include <video/omapdss.h>
@@ -420,8 +419,8 @@ static void __init omap_ldp_init(void)
         omap_serial_init();
         omap_sdrc_init(NULL, NULL);
         usb_musb_init(NULL);
-        board_nand_init(ldp_nand_partitions,
-                ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
+        board_nand_init(ldp_nand_partitions, ARRAY_SIZE(ldp_nand_partitions),
+                        ZOOM_NAND_CS, 0, nand_default_timings);
 
         omap_hsmmc_init(mmc);
         ldp_display_init();
@@ -437,5 +436,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
         .init_machine   = omap_ldp_init,
         .init_late      = omap3430_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index d95f727ca39a..a4e167c55c1d 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -22,16 +22,17 @@
 #include <linux/usb/musb.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
+#include <linux/mfd/menelaus.h>
 #include <sound/tlv320aic3x.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
 #include "common.h"
-#include <plat/menelaus.h>
-#include <plat/mmc.h>
+#include "mmc.h"
 
 #include "mux.h"
+#include "gpmc-onenand.h"
 
 #define TUSB6010_ASYNC_CS       1
 #define TUSB6010_SYNC_CS        4
@@ -689,7 +690,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
         .init_machine   = n8x0_init_machine,
         .init_late      = omap2420_init_late,
         .timer          = &omap2_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -702,7 +703,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
         .init_machine   = n8x0_init_machine,
         .init_late      = omap2420_init_late,
         .timer          = &omap2_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -715,5 +716,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
         .init_machine   = n8x0_init_machine,
         .init_late      = omap2420_init_late,
         .timer          = &omap2_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap2xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index d41ab98890ff..22c483d5dfa8 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -39,19 +39,22 @@
 #include <asm/mach/map.h>
 #include <asm/mach/flash.h>
 
-#include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-tfp410.h>
-#include <plat/gpmc.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/usb.h>
-#include <plat/omap_device.h>
 
+#include "common.h"
+#include "omap_device.h"
+#include "gpmc.h"
+#include "soc.h"
 #include "mux.h"
 #include "hsmmc.h"
 #include "pm.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
 
+#define NAND_CS 0
+
 /*
  * OMAP3 Beagle revision
  * Run time detection of Beagle revision is done by reading GPIO.
@@ -518,8 +521,9 @@ static void __init omap3_beagle_init(void)
 
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
-                             ARRAY_SIZE(omap3beagle_nand_partitions));
+        board_nand_init(omap3beagle_nand_partitions,
+                        ARRAY_SIZE(omap3beagle_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
         omap_twl4030_audio_init("omap3beagle");
 
         /* Ensure msecure is mux'd to be able to set the RTC. */
@@ -541,5 +545,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
         .init_machine   = omap3_beagle_init,
         .init_late      = omap3_init_late,
         .timer          = &omap3_secure_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index b9b776b6c954..54647d6286b4 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -32,6 +32,7 @@
 #include <linux/spi/ads7846.h>
 #include <linux/i2c/twl.h>
 #include <linux/usb/otg.h>
+#include <linux/usb/musb.h>
 #include <linux/usb/nop-usb-xceiv.h>
 #include <linux/smsc911x.h>
 
@@ -45,17 +46,20 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include <plat/usb.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
 #include "common.h"
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-tfp410.h>
 
+#include "soc.h"
 #include "mux.h"
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "board-flash.h"
+
+#define NAND_CS                 0
 
 #define OMAP3_EVM_TS_GPIO       175
 #define OMAP3_EVM_EHCI_VBUS     22
@@ -731,8 +735,9 @@ static void __init omap3_evm_init(void)
         }
         usb_musb_init(&musb_board_data);
         usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, omap3evm_nand_partitions,
-                             ARRAY_SIZE(omap3evm_nand_partitions));
+        board_nand_init(omap3evm_nand_partitions,
+                        ARRAY_SIZE(omap3evm_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
 
         omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
         omap3evm_init_smsc911x();
@@ -752,5 +757,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
         .init_machine   = omap3_evm_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 7bd8253b5d1d..2a065ba6eb58 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -34,16 +34,13 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include "gpmc-smsc911x.h"
-#include <plat/gpmc.h>
-#include <plat/sdrc.h>
-#include <plat/usb.h>
-
 #include "common.h"
 #include "mux.h"
 #include "hsmmc.h"
 #include "control.h"
 #include "common-board-devices.h"
+#include "gpmc.h"
+#include "gpmc-smsc911x.h"
 
 #define OMAP3LOGIC_SMSC911X_CS                  1
 
@@ -235,7 +232,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
         .init_machine   = omap3logic_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
 
 MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
@@ -248,5 +245,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
         .init_machine   = omap3logic_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 00a1f4ae6e44..a53a6683c1b8 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -42,7 +42,6 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/usb.h>
 #include <video/omapdss.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
 
@@ -50,6 +49,7 @@
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "gpmc-nand.h"
 
 #define PANDORA_WIFI_IRQ_GPIO           21
 #define PANDORA_WIFI_NRESET_GPIO        23
@@ -602,7 +602,7 @@ static void __init omap3pandora_init(void)
         omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
         usbhs_init(&usbhs_bdata);
         usb_musb_init(NULL);
-        gpmc_nand_init(&pandora_nand_data);
+        gpmc_nand_init(&pandora_nand_data, NULL);
 
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
@@ -619,5 +619,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
         .init_machine   = omap3pandora_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 731235eb319e..d8638b3b4f94 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -40,9 +40,8 @@
 #include <asm/mach/flash.h>
 
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/usb.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
@@ -428,5 +427,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
         .init_machine           = omap3_stalker_init,
         .init_late              = omap35xx_init_late,
         .timer                  = &omap3_secure_timer,
-        .restart                = omap_prcm_restart,
+        .restart                = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 944ffc436577..263cb9cfbf37 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -44,12 +44,12 @@
 #include <asm/system_info.h>
 
 #include "common.h"
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include <linux/platform_data/mtd-nand-omap2.h>
-#include <plat/usb.h>
 
 #include "mux.h"
 #include "hsmmc.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
 
 #include <asm/setup.h>
@@ -59,6 +59,8 @@
 #define TB_BL_PWM_TIMER         9
 #define TB_KILL_POWER_GPIO      168
 
+#define NAND_CS                 0
+
 static unsigned long touchbook_revision;
 
 static struct mtd_partition omap3touchbook_nand_partitions[] = {
@@ -365,8 +367,9 @@ static void __init omap3_touchbook_init(void)
         omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata);
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
-        omap_nand_flash_init(NAND_BUSWIDTH_16, omap3touchbook_nand_partitions,
-                             ARRAY_SIZE(omap3touchbook_nand_partitions));
+        board_nand_init(omap3touchbook_nand_partitions,
+                        ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS,
+                        NAND_BUSWIDTH_16, NULL);
 
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
@@ -384,5 +387,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
         .init_machine   = omap3_touchbook_init,
         .init_late      = omap3430_init_late,
         .timer          = &omap3_secure_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index bfcd397e233c..12a3a24d5bb5 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -29,6 +29,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
 #include <linux/ti_wilink_st.h>
+#include <linux/usb/musb.h>
 #include <linux/wl12xx.h>
 #include <linux/platform_data/omap-abe-twl6040.h>
 
@@ -38,12 +39,11 @@
 #include <asm/mach/map.h>
 #include <video/omapdss.h>
 
-#include "common.h"
-#include <plat/usb.h>
-#include <plat/mmc.h>
 #include <video/omap-panel-tfp410.h>
 
+#include "common.h"
 #include "soc.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "control.h"
 #include "mux.h"
@@ -524,5 +524,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
         .init_machine   = omap4_panda_init,
         .init_late      = omap4430_init_late,
         .timer          = &omap4_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index b700685762b5..c8fde3e56441 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -45,18 +45,20 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include "common.h"
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>
 #include <video/omap-panel-tfp410.h>
-#include <plat/gpmc.h>
-#include <plat/usb.h>
 
+#include "common.h"
 #include "mux.h"
 #include "sdram-micron-mt46h32m32lf-6.h"
+#include "gpmc.h"
 #include "hsmmc.h"
+#include "board-flash.h"
 #include "common-board-devices.h"
 
+#define NAND_CS                 0
+
 #define OVERO_GPIO_BT_XGATE     15
 #define OVERO_GPIO_W2W_NRESET   16
 #define OVERO_GPIO_PENDOWN      114
@@ -495,8 +497,8 @@ static void __init overo_init(void)
         omap_serial_init();
         omap_sdrc_init(mt46h32m32lf6_sdrc_params,
                                   mt46h32m32lf6_sdrc_params);
-        omap_nand_flash_init(0, overo_nand_partitions,
-                             ARRAY_SIZE(overo_nand_partitions));
+        board_nand_init(overo_nand_partitions,
+                        ARRAY_SIZE(overo_nand_partitions), NAND_CS, 0, NULL);
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         overo_spi_init();
@@ -550,5 +552,5 @@ MACHINE_START(OVERO, "Gumstix Overo")
         .init_machine   = overo_init,
         .init_late      = omap35xx_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 45997bfbcbd2..cbcb1b2dc31f 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -22,17 +22,14 @@
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
-#include <plat/i2c.h>
-#include <plat/mmc.h>
-#include <plat/usb.h>
-#include <plat/gpmc.h>
 #include "common.h"
-#include <plat/serial.h>
-
 #include "mux.h"
+#include "gpmc.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "sdram-nokia.h"
 #include "common-board-devices.h"
+#include "gpmc-onenand.h"
 
 static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
         REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
@@ -151,7 +148,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
         .init_machine   = rm680_init,
         .init_late      = omap3630_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
 
 MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
@@ -164,5 +161,5 @@ MACHINE_START(NOKIA_RM696, "Nokia RM-696 board")
         .init_machine   = rm680_init,
         .init_late      = omap3630_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 020e03c95bfe..07005fe40a2a 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -31,9 +31,7 @@
 #include <asm/system_info.h>
 
 #include "common.h"
-#include <plat/dma.h>
-#include <plat/gpmc.h>
-#include <plat/omap-pm.h>
+#include <plat-omap/dma-omap.h>
 #include "gpmc-smc91x.h"
 
 #include "board-rx51.h"
@@ -52,8 +50,11 @@
 #endif
 
 #include "mux.h"
+#include "omap-pm.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#include "gpmc.h"
+#include "gpmc-onenand.h"
 
 #define SYSTEM_REV_B_USES_VAUX3 0x1699
 #define SYSTEM_REV_S_USES_VAUX3 0x8
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 7bbb05d9689b..bf8f74b0ce3e 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -17,18 +17,18 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 #include <linux/leds.h>
+#include <linux/usb/musb.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
-#include "common.h"
-#include <plat/dma.h>
-#include <plat/gpmc.h>
-#include <plat/usb.h>
+#include <plat-omap/dma-omap.h>
 
+#include "common.h"
 #include "mux.h"
+#include "gpmc.h"
 #include "pm.h"
 #include "sdram-nokia.h"
 
@@ -127,5 +127,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
         .init_machine   = rx51_init,
         .init_late      = omap3430_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index c4f8833b4c3c..1a3e056d63a7 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -14,13 +14,14 @@
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/usb/musb.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/usb.h>
 
 static struct omap_musb_board_data musb_board_data = {
         .set_phy_power  = ti81xx_musb_phy_power,
@@ -45,7 +46,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
         .timer          = &omap3_timer,
         .init_machine   = ti81xx_evm_init,
         .init_late      = ti81xx_init_late,
-        .restart        = omap_prcm_restart,
+        .restart        = omap44xx_restart,
 MACHINE_END
 
 MACHINE_START(TI8148EVM, "ti8148evm")
@@ -57,5 +58,5 @@ MACHINE_START(TI8148EVM, "ti8148evm")
         .timer          = &omap3_timer,
         .init_machine   = ti81xx_evm_init,
         .init_late      = ti81xx_init_late,
-        .restart        = omap_prcm_restart,
+        .restart        = omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index afb2278a29f6..42e5f231a799 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -17,10 +17,10 @@
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "gpmc-smsc911x.h"
 
-#include <mach/board-zoom.h>
+#include "board-zoom.h"
 
 #include "soc.h"
 #include "common.h"
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c
index b940ab2259fb..1c7c834a5b5f 100644
--- a/arch/arm/mach-omap2/board-zoom-display.c
+++ b/arch/arm/mach-omap2/board-zoom-display.c
@@ -16,8 +16,9 @@
 #include <linux/spi/spi.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <video/omapdss.h>
-#include <mach/board-zoom.h>
+#include "board-zoom.h"
 
+#include "soc.h"
 #include "common.h"
 
 #define LCD_PANEL_RESET_GPIO_PROD       96
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index c166fe1fdff9..26e07addc9d7 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -26,9 +26,8 @@
 #include <asm/mach/map.h>
 
 #include "common.h"
-#include <plat/usb.h>
 
-#include <mach/board-zoom.h>
+#include "board-zoom.h"
 
 #include "mux.h"
 #include "hsmmc.h"
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 4994438e1f46..d7fa31e67238 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -22,9 +22,8 @@
 #include <asm/mach/arch.h>
 
 #include "common.h"
-#include <plat/usb.h>
 
-#include <mach/board-zoom.h>
+#include "board-zoom.h"
 
 #include "board-flash.h"
 #include "mux.h"
@@ -113,8 +112,9 @@ static void __init omap_zoom_init(void)
                 usbhs_init(&usbhs_bdata);
         }
 
-        board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions),
-                                                ZOOM_NAND_CS, NAND_BUSWIDTH_16);
+        board_nand_init(zoom_nand_partitions,
+                        ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS,
+                        NAND_BUSWIDTH_16, nand_default_timings);
         zoom_debugboard_init();
         zoom_peripherals_init();
 
@@ -138,7 +138,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
         .init_machine   = omap_zoom_init,
         .init_late      = omap3430_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
 
 MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -151,5 +151,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
         .init_machine   = omap_zoom_init,
         .init_late      = omap3630_init_late,
         .timer          = &omap3_timer,
-        .restart        = omap_prcm_restart,
+        .restart        = omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h b/arch/arm/mach-omap2/board-zoom.h
index 2e9486940ead..2e9486940ead 100644
--- a/arch/arm/mach-omap2/include/mach/board-zoom.h
+++ b/arch/arm/mach-omap2/board-zoom.h
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index c2d15212d64d..8c5b13e7ee61 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -21,12 +21,10 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-#include <plat/prcm.h>
 
 #include "clock.h"
 #include "clock2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 
 /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
@@ -38,44 +36,16 @@
 #define APLLS_CLKIN_13MHZ               2
 #define APLLS_CLKIN_12MHZ               3
 
-void __iomem *cm_idlest_pll;
-
 /* Private functions */
 
-/* Enable an APLL if off */
-static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask)
-{
-        u32 cval, apll_mask;
-
-        apll_mask = EN_APLL_LOCKED << clk->enable_bit;
-
-        cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
-
-        if ((cval & apll_mask) == apll_mask)
-                return 0;   /* apll already enabled */
-
-        cval &= ~apll_mask;
-        cval |= apll_mask;
-        omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
-
-        omap2_cm_wait_idlest(cm_idlest_pll, status_mask,
-                             OMAP24XX_CM_IDLEST_VAL, __clk_get_name(clk));
-
-        /*
-         * REVISIT: Should we return an error code if omap2_wait_clock_ready()
-         * fails?
-         */
-        return 0;
-}
-
-static int omap2_clk_apll96_enable(struct clk *clk)
+static int _apll96_enable(struct clk *clk)
 {
-        return omap2_clk_apll_enable(clk, OMAP24XX_ST_96M_APLL_MASK);
+        return omap2xxx_cm_apll96_enable();
 }
 
-static int omap2_clk_apll54_enable(struct clk *clk)
+static int _apll54_enable(struct clk *clk)
 {
-        return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL_MASK);
+        return omap2xxx_cm_apll54_enable();
 }
 
 static void _apll96_allow_idle(struct clk *clk)
@@ -98,28 +68,28 @@ static void _apll54_deny_idle(struct clk *clk)
         omap2xxx_cm_set_apll54_disable_autoidle();
 }
 
-/* Stop APLL */
-static void omap2_clk_apll_disable(struct clk *clk)
+static void _apll96_disable(struct clk *clk)
 {
-        u32 cval;
+        omap2xxx_cm_apll96_disable();
+}
 
-        cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
-        cval &= ~(EN_APLL_LOCKED << clk->enable_bit);
-        omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+static void _apll54_disable(struct clk *clk)
+{
+        omap2xxx_cm_apll54_disable();
 }
 
 /* Public data */
 
 const struct clkops clkops_apll96 = {
-        .enable         = omap2_clk_apll96_enable,
-        .disable        = omap2_clk_apll_disable,
+        .enable         = _apll96_enable,
+        .disable        = _apll96_disable,
         .allow_idle     = _apll96_allow_idle,
         .deny_idle      = _apll96_deny_idle,
 };
 
 const struct clkops clkops_apll54 = {
-        .enable         = omap2_clk_apll54_enable,
-        .disable        = omap2_clk_apll_disable,
+        .enable         = _apll54_enable,
+        .disable        = _apll54_disable,
         .allow_idle     = _apll54_allow_idle,
         .deny_idle      = _apll54_deny_idle,
 };
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c
index 1502a7bc20bb..399534c7843b 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c
@@ -14,10 +14,8 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "clock.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 
 /* Private functions */
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 4ae439222085..825e44cdf1cf 100644
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -25,21 +25,25 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-#include <plat/sram.h>
-#include <plat/sdrc.h>
-
 #include "clock.h"
 #include "clock2xxx.h"
 #include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
+#include "sdrc.h"
+#include "sram.h"
 
 /* #define DOWN_VARIABLE_DPLL 1 */              /* Experimental */
 
+/*
+ * dpll_core_ck: pointer to the combined dpll_ck + core_ck on OMAP2xxx
+ * (currently defined as "dpll_ck" in the OMAP2xxx clock tree).  Set
+ * during dpll_ck init and used later by omap2xxx_clk_get_core_rate().
+ */
+static struct clk *dpll_core_ck;
+
 /**
  * omap2xxx_clk_get_core_rate - return the CORE_CLK rate
- * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck")
  *
  * Returns the CORE_CLK rate.  CORE_CLK can have one of three rate
  * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz
@@ -47,12 +51,14 @@
  * struct clk *dpll_ck, which is a composite clock of dpll_ck and
  * core_ck.
  */
-unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
+unsigned long omap2xxx_clk_get_core_rate(void)
 {
         long long core_clk;
         u32 v;
 
-        core_clk = omap2_get_dpll_rate(clk);
+        WARN_ON(!dpll_core_ck);
+
+        core_clk = omap2_get_dpll_rate(dpll_core_ck);
 
         v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
         v &= OMAP24XX_CORE_CLK_SRC_MASK;
@@ -100,7 +106,7 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate)
 
 unsigned long omap2_dpllcore_recalc(struct clk *clk)
 {
-        return omap2xxx_clk_get_core_rate(clk);
+        return omap2xxx_clk_get_core_rate();
 }
 
 int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
@@ -110,7 +116,7 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
         struct prcm_config tmpset;
         const struct dpll_data *dd;
 
-        cur_rate = omap2xxx_clk_get_core_rate(dclk);
+        cur_rate = omap2xxx_clk_get_core_rate();
         mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
         mult &= OMAP24XX_CORE_CLK_SRC_MASK;
 
@@ -171,3 +177,19 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+/**
+ * omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck
+ * @clk: struct clk *dpll_ck
+ *
+ * Store a local copy of @clk in dpll_core_ck so other code can query
+ * the core rate without having to clk_get(), which can sleep.  Must
+ * only be called once.  No return value.  XXX If the clock
+ * registration process is ever changed such that dpll_ck is no longer
+ * statically defined, this code may need to change to increment some
+ * kind of use count on dpll_ck.
+ */
+void omap2xxx_clkt_dpllcore_init(struct clk *clk)
+{
+        WARN(dpll_core_ck, "dpll_core_ck already set - should never happen");
+        dpll_core_ck = clk;
+}
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c b/arch/arm/mach-omap2/clkt2xxx_osc.c
index c3460928b5e0..e1777371bb5e 100644
--- a/arch/arm/mach-omap2/clkt2xxx_osc.c
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -23,8 +23,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "clock.h"
 #include "clock2xxx.h"
 #include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c
index 8693cfdac49a..46683b3c2461 100644
--- a/arch/arm/mach-omap2/clkt2xxx_sys.c
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -22,8 +22,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "clock.h"
 #include "clock2xxx.h"
 #include "prm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index 3524f0e7b6d5..1c2041fbd718 100644
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -1,7 +1,7 @@
 /*
  * OMAP2xxx DVFS virtual clock functions
  *
- * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2005-2008, 2012 Texas Instruments, Inc.
  * Copyright (C) 2004-2010 Nokia Corporation
  *
  * Contacts:
@@ -33,20 +33,25 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 
-#include <plat/clock.h>
-#include <plat/sram.h>
-#include <plat/sdrc.h>
-
 #include "soc.h"
 #include "clock.h"
 #include "clock2xxx.h"
 #include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
+#include "sdrc.h"
+#include "sram.h"
 
 const struct prcm_config *curr_prcm_set;
 const struct prcm_config *rate_table;
 
+/*
+ * sys_ck_rate: the rate of the external high-frequency clock
+ * oscillator on the board.  Set by the SoC-specific clock init code.
+ * Once set during a boot, will not change.
+ */
+static unsigned long sys_ck_rate;
+
 /**
  * omap2_table_mpu_recalc - just return the MPU speed
  * @clk: virt_prcm_set struct clk
@@ -68,15 +73,14 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk)
 long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
 {
         const struct prcm_config *ptr;
-        long highest_rate, sys_clk_rate;
+        long highest_rate;
 
         highest_rate = -EINVAL;
-        sys_clk_rate = __clk_get_rate(sclk);
 
         for (ptr = rate_table; ptr->mpu_speed; ptr++) {
                 if (!(ptr->flags & cpu_mask))
                         continue;
-                if (ptr->xtal_speed != sys_clk_rate)
+                if (ptr->xtal_speed != sys_ck_rate)
                         continue;
 
                 highest_rate = ptr->mpu_speed;
@@ -95,15 +99,12 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
         const struct prcm_config *prcm;
         unsigned long found_speed = 0;
         unsigned long flags;
-        long sys_clk_rate;
-
-        sys_clk_rate = __clk_get_rate(sclk);
 
         for (prcm = rate_table; prcm->mpu_speed; prcm++) {
                 if (!(prcm->flags & cpu_mask))
                         continue;
 
-                if (prcm->xtal_speed != sys_clk_rate)
+                if (prcm->xtal_speed != sys_ck_rate)
                         continue;
 
                 if (prcm->mpu_speed <= rate) {
@@ -119,7 +120,7 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
         }
 
         curr_prcm_set = prcm;
-        cur_rate = omap2xxx_clk_get_core_rate(dclk);
+        cur_rate = omap2xxx_clk_get_core_rate();
 
         if (prcm->dpll_speed == cur_rate / 2) {
                 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
@@ -169,3 +170,50 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
 
         return 0;
 }
+
+/**
+ * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate
+ * table sets matches the current CORE DPLL hardware rate
+ *
+ * Check the MPU rate set by bootloader.  Sets the 'curr_prcm_set'
+ * global to point to the active rate set when found; otherwise, sets
+ * it to NULL.  No return value;
+ */
+void omap2xxx_clkt_vps_check_bootloader_rates(void)
+{
+        const struct prcm_config *prcm = NULL;
+        unsigned long rate;
+
+        rate = omap2xxx_clk_get_core_rate();
+        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
+                if (!(prcm->flags & cpu_mask))
+                        continue;
+                if (prcm->xtal_speed != sys_ck_rate)
+                        continue;
+                if (prcm->dpll_speed <= rate)
+                        break;
+        }
+        curr_prcm_set = prcm;
+}
+
+/**
+ * omap2xxx_clkt_vps_late_init - store a copy of the sys_ck rate
+ *
+ * Store a copy of the sys_ck rate for later use by the OMAP2xxx DVFS
+ * code.  (The sys_ck rate does not -- or rather, must not -- change
+ * during kernel runtime.)  Must be called after we have a valid
+ * sys_ck rate, but before the virt_prcm_set clock rate is
+ * recalculated.  No return value.
+ */
+void omap2xxx_clkt_vps_late_init(void)
+{
+        struct clk *c;
+
+        c = clk_get(NULL, "sys_ck");
+        if (IS_ERR(c)) {
+                WARN(1, "could not locate sys_ck\n");
+        } else {
+                sys_ck_rate = clk_get_rate(c);
+                clk_put(c);
+        }
+}
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 7c6da2f731dc..6cf298e262f6 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -21,14 +21,11 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-#include <plat/sram.h>
-#include <plat/sdrc.h>
-
 #include "clock.h"
 #include "clock3xxx.h"
 #include "clock34xx.h"
 #include "sdrc.h"
+#include "sram.h"
 
 #define CYCLES_PER_MHZ                  1000000
 
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index 3ff22114d702..53646facda45 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -45,8 +45,6 @@
 #include <linux/io.h>
 #include <linux/bug.h>
 
-#include <plat/clock.h>
-
 #include "clock.h"
 
 /* Private functions */
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 80411142f482..8463cc356245 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -21,8 +21,6 @@
 
 #include <asm/div64.h>
 
-#include <plat/clock.h>
-
 #include "soc.h"
 #include "clock.h"
 #include "cm-regbits-24xx.h"
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
index 3d43fba2542f..fe774a09dd0c 100644
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ b/arch/arm/mach-omap2/clkt_iclk.c
@@ -14,8 +14,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-#include <plat/prcm.h>
 
 #include "clock.h"
 #include "clock2xxx.h"
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 961ac8f7e13d..e381d991092c 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -15,6 +15,7 @@
 #undef DEBUG
 
 #include <linux/kernel.h>
+#include <linux/export.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
@@ -25,17 +26,24 @@
 
 #include <asm/cpu.h>
 
-#include <plat/clock.h>
-#include <plat/prcm.h>
 
 #include <trace/events/power.h>
 
 #include "soc.h"
 #include "clockdomain.h"
 #include "clock.h"
-#include "cm2xxx_3xxx.h"
+#include "cm.h"
+#include "cm2xxx.h"
+#include "cm3xxx.h"
 #include "cm-regbits-24xx.h"
 #include "cm-regbits-34xx.h"
+#include "common.h"
+
+/*
+ * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait
+ * for a module to indicate that it is no longer in idle
+ */
+#define MAX_MODULE_ENABLE_WAIT          100000
 
 u16 cpu_mask;
 
@@ -47,12 +55,50 @@ u16 cpu_mask;
  */
 static bool clkdm_control = true;
 
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+static DEFINE_SPINLOCK(clockfw_lock);
+
 /*
  * OMAP2+ specific clock functions
  */
 
 /* Private functions */
 
+
+/**
+ * _wait_idlest_generic - wait for a module to leave the idle state
+ * @reg: virtual address of module IDLEST register
+ * @mask: value to mask against to determine if the module is active
+ * @idlest: idle state indicator (0 or 1) for the clock
+ * @name: name of the clock (for printk)
+ *
+ * Wait for a module to leave idle, where its idle-status register is
+ * not inside the CM module.  Returns 1 if the module left idle
+ * promptly, or 0 if the module did not leave idle before the timeout
+ * elapsed.  XXX Deprecated - should be moved into drivers for the
+ * individual IP block that the IDLEST register exists in.
+ */
+static int _wait_idlest_generic(void __iomem *reg, u32 mask, u8 idlest,
+                                const char *name)
+{
+        int i = 0, ena = 0;
+
+        ena = (idlest) ? 0 : mask;
+
+        omap_test_timeout(((__raw_readl(reg) & mask) == ena),
+                          MAX_MODULE_ENABLE_WAIT, i);
+
+        if (i < MAX_MODULE_ENABLE_WAIT)
+                pr_debug("omap clock: module associated with clock %s ready after %d loops\n",
+                         name, i);
+        else
+                pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n",
+                       name, MAX_MODULE_ENABLE_WAIT);
+
+        return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
+};
+
 /**
  * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
  * @clk: struct clk * belonging to the module
@@ -66,7 +112,9 @@ static bool clkdm_control = true;
 static void _omap2_module_wait_ready(struct clk *clk)
 {
         void __iomem *companion_reg, *idlest_reg;
-        u8 other_bit, idlest_bit, idlest_val;
+        u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
+        s16 prcm_mod;
+        int r;
 
         /* Not all modules have multiple clocks that their IDLEST depends on */
         if (clk->ops->find_companion) {
@@ -77,8 +125,14 @@ static void _omap2_module_wait_ready(struct clk *clk)
 
         clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
 
-        omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val,
-                             __clk_get_name(clk));
+        r = cm_split_idlest_reg(idlest_reg, &prcm_mod, &idlest_reg_id);
+        if (r) {
+                /* IDLEST register not in the CM module */
+                _wait_idlest_generic(idlest_reg, (1 << idlest_bit), idlest_val,
+                                     clk->name);
+        } else {
+                cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
+        };
 }
 
 /* Public functions */
@@ -512,12 +566,510 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
 
 /* Common data */
 
-struct clk_functions omap2_clk_functions = {
-        .clk_enable             = omap2_clk_enable,
-        .clk_disable            = omap2_clk_disable,
-        .clk_round_rate         = omap2_clk_round_rate,
-        .clk_set_rate           = omap2_clk_set_rate,
-        .clk_set_parent         = omap2_clk_set_parent,
-        .clk_disable_unused     = omap2_clk_disable_unused,
+int clk_enable(struct clk *clk)
+{
+        unsigned long flags;
+        int ret;
+
+        if (clk == NULL || IS_ERR(clk))
+                return -EINVAL;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = omap2_clk_enable(clk);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+        unsigned long flags;
+
+        if (clk == NULL || IS_ERR(clk))
+                return;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        if (clk->usecount == 0) {
+                pr_err("Trying disable clock %s with 0 usecount\n",
+                       clk->name);
+                WARN_ON(1);
+                goto out;
+        }
+
+        omap2_clk_disable(clk);
+
+out:
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+        unsigned long flags;
+        unsigned long ret;
+
+        if (clk == NULL || IS_ERR(clk))
+                return 0;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = clk->rate;
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+/*
+ * Optional clock functions defined in include/linux/clk.h
+ */
+
+long clk_round_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long flags;
+        long ret;
+
+        if (clk == NULL || IS_ERR(clk))
+                return 0;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = omap2_clk_round_rate(clk, rate);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_round_rate);
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned long flags;
+        int ret = -EINVAL;
+
+        if (clk == NULL || IS_ERR(clk))
+                return ret;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        ret = omap2_clk_set_rate(clk, rate);
+        if (ret == 0)
+                propagate_rate(clk);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_set_rate);
+
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        unsigned long flags;
+        int ret = -EINVAL;
+
+        if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
+                return ret;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        if (clk->usecount == 0) {
+                ret = omap2_clk_set_parent(clk, parent);
+                if (ret == 0)
+                        propagate_rate(clk);
+        } else {
+                ret = -EBUSY;
+        }
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL(clk_set_parent);
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+        return clk->parent;
+}
+EXPORT_SYMBOL(clk_get_parent);
+
+/*
+ * OMAP specific clock functions shared between omap1 and omap2
+ */
+
+int __initdata mpurate;
+
+/*
+ * By default we use the rate set by the bootloader.
+ * You can override this with mpurate= cmdline option.
+ */
+static int __init omap_clk_setup(char *str)
+{
+        get_option(&str, &mpurate);
+
+        if (!mpurate)
+                return 1;
+
+        if (mpurate < 1000)
+                mpurate *= 1000000;
+
+        return 1;
+}
+__setup("mpurate=", omap_clk_setup);
+
+/* Used for clocks that always have same value as the parent clock */
+unsigned long followparent_recalc(struct clk *clk)
+{
+        return clk->parent->rate;
+}
+
+/*
+ * Used for clocks that have the same value as the parent clock,
+ * divided by some factor
+ */
+unsigned long omap_fixed_divisor_recalc(struct clk *clk)
+{
+        WARN_ON(!clk->fixed_div);
+
+        return clk->parent->rate / clk->fixed_div;
+}
+
+void clk_reparent(struct clk *child, struct clk *parent)
+{
+        list_del_init(&child->sibling);
+        if (parent)
+                list_add(&child->sibling, &parent->children);
+        child->parent = parent;
+
+        /* now do the debugfs renaming to reattach the child
+           to the proper parent */
+}
+
+/* Propagate rate to children */
+void propagate_rate(struct clk *tclk)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &tclk->children, sibling) {
+                if (clkp->recalc)
+                        clkp->rate = clkp->recalc(clkp);
+                propagate_rate(clkp);
+        }
+}
+
+static LIST_HEAD(root_clks);
+
+/**
+ * recalculate_root_clocks - recalculate and propagate all root clocks
+ *
+ * Recalculates all root clocks (clocks with no parent), which if the
+ * clock's .recalc is set correctly, should also propagate their rates.
+ * Called at init.
+ */
+void recalculate_root_clocks(void)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &root_clks, sibling) {
+                if (clkp->recalc)
+                        clkp->rate = clkp->recalc(clkp);
+                propagate_rate(clkp);
+        }
+}
+
+/**
+ * clk_preinit - initialize any fields in the struct clk before clk init
+ * @clk: struct clk * to initialize
+ *
+ * Initialize any struct clk fields needed before normal clk initialization
+ * can run.  No return value.
+ */
+void clk_preinit(struct clk *clk)
+{
+        INIT_LIST_HEAD(&clk->children);
+}
+
+int clk_register(struct clk *clk)
+{
+        if (clk == NULL || IS_ERR(clk))
+                return -EINVAL;
+
+        /*
+         * trap out already registered clocks
+         */
+        if (clk->node.next || clk->node.prev)
+                return 0;
+
+        mutex_lock(&clocks_mutex);
+        if (clk->parent)
+                list_add(&clk->sibling, &clk->parent->children);
+        else
+                list_add(&clk->sibling, &root_clks);
+
+        list_add(&clk->node, &clocks);
+        if (clk->init)
+                clk->init(clk);
+        mutex_unlock(&clocks_mutex);
+
+        return 0;
+}
+EXPORT_SYMBOL(clk_register);
+
+void clk_unregister(struct clk *clk)
+{
+        if (clk == NULL || IS_ERR(clk))
+                return;
+
+        mutex_lock(&clocks_mutex);
+        list_del(&clk->sibling);
+        list_del(&clk->node);
+        mutex_unlock(&clocks_mutex);
+}
+EXPORT_SYMBOL(clk_unregister);
+
+void clk_enable_init_clocks(void)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &clocks, node)
+                if (clkp->flags & ENABLE_ON_INIT)
+                        clk_enable(clkp);
+}
+
+/**
+ * omap_clk_get_by_name - locate OMAP struct clk by its name
+ * @name: name of the struct clk to locate
+ *
+ * Locate an OMAP struct clk by its name.  Assumes that struct clk
+ * names are unique.  Returns NULL if not found or a pointer to the
+ * struct clk if found.
+ */
+struct clk *omap_clk_get_by_name(const char *name)
+{
+        struct clk *c;
+        struct clk *ret = NULL;
+
+        mutex_lock(&clocks_mutex);
+
+        list_for_each_entry(c, &clocks, node) {
+                if (!strcmp(c->name, name)) {
+                        ret = c;
+                        break;
+                }
+        }
+
+        mutex_unlock(&clocks_mutex);
+
+        return ret;
+}
+
+int omap_clk_enable_autoidle_all(void)
+{
+        struct clk *c;
+        unsigned long flags;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+
+        list_for_each_entry(c, &clocks, node)
+                if (c->ops->allow_idle)
+                        c->ops->allow_idle(c);
+
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return 0;
+}
+
+int omap_clk_disable_autoidle_all(void)
+{
+        struct clk *c;
+        unsigned long flags;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+
+        list_for_each_entry(c, &clocks, node)
+                if (c->ops->deny_idle)
+                        c->ops->deny_idle(c);
+
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return 0;
+}
+
+/*
+ * Low level helpers
+ */
+static int clkll_enable_null(struct clk *clk)
+{
+        return 0;
+}
+
+static void clkll_disable_null(struct clk *clk)
+{
+}
+
+const struct clkops clkops_null = {
+        .enable         = clkll_enable_null,
+        .disable        = clkll_disable_null,
+};
+
+/*
+ * Dummy clock
+ *
+ * Used for clock aliases that are needed on some OMAPs, but not others
+ */
+struct clk dummy_ck = {
+        .name   = "dummy",
+        .ops    = &clkops_null,
+};
+
+/*
+ *
+ */
+
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+/*
+ * Disable any unused clocks left on by the bootloader
+ */
+static int __init clk_disable_unused(void)
+{
+        struct clk *ck;
+        unsigned long flags;
+
+        pr_info("clock: disabling unused clocks to save power\n");
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        list_for_each_entry(ck, &clocks, node) {
+                if (ck->ops == &clkops_null)
+                        continue;
+
+                if (ck->usecount > 0 || !ck->enable_reg)
+                        continue;
+
+                omap2_clk_disable_unused(ck);
+        }
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return 0;
+}
+late_initcall(clk_disable_unused);
+late_initcall(omap_clk_enable_autoidle_all);
+#endif
+
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+/*
+ *      debugfs support to trace clock tree hierarchy and attributes
+ */
+
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+
+static struct dentry *clk_debugfs_root;
+
+static int clk_dbg_show_summary(struct seq_file *s, void *unused)
+{
+        struct clk *c;
+        struct clk *pa;
+
+        mutex_lock(&clocks_mutex);
+        seq_printf(s, "%-30s %-30s %-10s %s\n",
+                   "clock-name", "parent-name", "rate", "use-count");
+
+        list_for_each_entry(c, &clocks, node) {
+                pa = c->parent;
+                seq_printf(s, "%-30s %-30s %-10lu %d\n",
+                           c->name, pa ? pa->name : "none", c->rate,
+                           c->usecount);
+        }
+        mutex_unlock(&clocks_mutex);
+
+        return 0;
+}
+
+static int clk_dbg_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, clk_dbg_show_summary, inode->i_private);
+}
+
+static const struct file_operations debug_clock_fops = {
+        .open           = clk_dbg_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
 };
 
+static int clk_debugfs_register_one(struct clk *c)
+{
+        int err;
+        struct dentry *d;
+        struct clk *pa = c->parent;
+
+        d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
+        if (!d)
+                return -ENOMEM;
+        c->dent = d;
+
+        d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        return 0;
+
+err_out:
+        debugfs_remove_recursive(c->dent);
+        return err;
+}
+
+static int clk_debugfs_register(struct clk *c)
+{
+        int err;
+        struct clk *pa = c->parent;
+
+        if (pa && !pa->dent) {
+                err = clk_debugfs_register(pa);
+                if (err)
+                        return err;
+        }
+
+        if (!c->dent) {
+                err = clk_debugfs_register_one(c);
+                if (err)
+                        return err;
+        }
+        return 0;
+}
+
+static int __init clk_debugfs_init(void)
+{
+        struct clk *c;
+        struct dentry *d;
+        int err;
+
+        d = debugfs_create_dir("clock", NULL);
+        if (!d)
+                return -ENOMEM;
+        clk_debugfs_root = d;
+
+        list_for_each_entry(c, &clocks, node) {
+                err = clk_debugfs_register(c);
+                if (err)
+                        goto err_out;
+        }
+
+        d = debugfs_create_file("summary", S_IRUGO,
+                d, NULL, &debug_clock_fops);
+        if (!d)
+                return -ENOMEM;
+
+        return 0;
+err_out:
+        debugfs_remove_recursive(clk_debugfs_root);
+        return err;
+}
+late_initcall(clk_debugfs_init);
+
+#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
+
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 35ec5f3d9a73..ff9789bc0fd1 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -17,8 +17,323 @@
 #define __ARCH_ARM_MACH_OMAP2_CLOCK_H
 
 #include <linux/kernel.h>
+#include <linux/list.h>
+
+#include <linux/clkdev.h>
+
+struct omap_clk {
+        u16                             cpu;
+        struct clk_lookup               lk;
+};
+
+#define CLK(dev, con, ck, cp)           \
+        {                               \
+                 .cpu = cp,             \
+                .lk = {                 \
+                        .dev_id = dev,  \
+                        .con_id = con,  \
+                        .clk = ck,      \
+                },                      \
+        }
+
+/* Platform flags for the clkdev-OMAP integration code */
+#define CK_242X         (1 << 0)
+#define CK_243X         (1 << 1)        /* 243x, 253x */
+#define CK_3430ES1      (1 << 2)        /* 34xxES1 only */
+#define CK_3430ES2PLUS  (1 << 3)        /* 34xxES2, ES3, non-Sitara 35xx only */
+#define CK_AM35XX       (1 << 4)        /* Sitara AM35xx */
+#define CK_36XX         (1 << 5)        /* 36xx/37xx-specific clocks */
+#define CK_443X         (1 << 6)
+#define CK_TI816X       (1 << 7)
+#define CK_446X         (1 << 8)
+#define CK_AM33XX       (1 << 9)        /* AM33xx specific clocks */
+
+
+#define CK_34XX         (CK_3430ES1 | CK_3430ES2PLUS)
+#define CK_3XXX         (CK_34XX | CK_AM35XX | CK_36XX)
+
+struct module;
+struct clk;
+struct clockdomain;
+
+/* Temporary, needed during the common clock framework conversion */
+#define __clk_get_name(clk)     (clk->name)
+#define __clk_get_parent(clk)   (clk->parent)
+#define __clk_get_rate(clk)     (clk->rate)
+
+/**
+ * struct clkops - some clock function pointers
+ * @enable: fn ptr that enables the current clock in hardware
+ * @disable: fn ptr that enables the current clock in hardware
+ * @find_idlest: function returning the IDLEST register for the clock's IP blk
+ * @find_companion: function returning the "companion" clk reg for the clock
+ * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
+ * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
+ *
+ * A "companion" clk is an accompanying clock to the one being queried
+ * that must be enabled for the IP module connected to the clock to
+ * become accessible by the hardware.  Neither @find_idlest nor
+ * @find_companion should be needed; that information is IP
+ * block-specific; the hwmod code has been created to handle this, but
+ * until hwmod data is ready and drivers have been converted to use PM
+ * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
+ * @find_companion must, unfortunately, remain.
+ */
+struct clkops {
+        int                     (*enable)(struct clk *);
+        void                    (*disable)(struct clk *);
+        void                    (*find_idlest)(struct clk *, void __iomem **,
+                                               u8 *, u8 *);
+        void                    (*find_companion)(struct clk *, void __iomem **,
+                                                  u8 *);
+        void                    (*allow_idle)(struct clk *);
+        void                    (*deny_idle)(struct clk *);
+};
+
+/* struct clksel_rate.flags possibilities */
+#define RATE_IN_242X            (1 << 0)
+#define RATE_IN_243X            (1 << 1)
+#define RATE_IN_3430ES1         (1 << 2)        /* 3430ES1 rates only */
+#define RATE_IN_3430ES2PLUS     (1 << 3)        /* 3430 ES >= 2 rates only */
+#define RATE_IN_36XX            (1 << 4)
+#define RATE_IN_4430            (1 << 5)
+#define RATE_IN_TI816X          (1 << 6)
+#define RATE_IN_4460            (1 << 7)
+#define RATE_IN_AM33XX          (1 << 8)
+#define RATE_IN_TI814X          (1 << 9)
+
+#define RATE_IN_24XX            (RATE_IN_242X | RATE_IN_243X)
+#define RATE_IN_34XX            (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
+#define RATE_IN_3XXX            (RATE_IN_34XX | RATE_IN_36XX)
+#define RATE_IN_44XX            (RATE_IN_4430 | RATE_IN_4460)
+
+/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
+#define RATE_IN_3430ES2PLUS_36XX        (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
+
+
+/**
+ * struct clksel_rate - register bitfield values corresponding to clk divisors
+ * @val: register bitfield value (shifted to bit 0)
+ * @div: clock divisor corresponding to @val
+ * @flags: (see "struct clksel_rate.flags possibilities" above)
+ *
+ * @val should match the value of a read from struct clk.clksel_reg
+ * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
+ *
+ * @div is the divisor that should be applied to the parent clock's rate
+ * to produce the current clock's rate.
+ */
+struct clksel_rate {
+        u32                     val;
+        u8                      div;
+        u16                     flags;
+};
+
+/**
+ * struct clksel - available parent clocks, and a pointer to their divisors
+ * @parent: struct clk * to a possible parent clock
+ * @rates: available divisors for this parent clock
+ *
+ * A struct clksel is always associated with one or more struct clks
+ * and one or more struct clksel_rates.
+ */
+struct clksel {
+        struct clk               *parent;
+        const struct clksel_rate *rates;
+};
+
+/**
+ * struct dpll_data - DPLL registers and integration data
+ * @mult_div1_reg: register containing the DPLL M and N bitfields
+ * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
+ * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
+ * @clk_bypass: struct clk pointer to the clock's bypass clock input
+ * @clk_ref: struct clk pointer to the clock's reference clock input
+ * @control_reg: register containing the DPLL mode bitfield
+ * @enable_mask: mask of the DPLL mode bitfield in @control_reg
+ * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
+ * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
+ * @max_multiplier: maximum valid non-bypass multiplier value (actual)
+ * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
+ * @min_divider: minimum valid non-bypass divider value (actual)
+ * @max_divider: maximum valid non-bypass divider value (actual)
+ * @modes: possible values of @enable_mask
+ * @autoidle_reg: register containing the DPLL autoidle mode bitfield
+ * @idlest_reg: register containing the DPLL idle status bitfield
+ * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
+ * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
+ * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
+ * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
+ * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
+ * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
+ * @flags: DPLL type/features (see below)
+ *
+ * Possible values for @flags:
+ * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
+ *
+ * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
+ *
+ * XXX Some DPLLs have multiple bypass inputs, so it's not technically
+ * correct to only have one @clk_bypass pointer.
+ *
+ * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
+ * @last_rounded_n) should be separated from the runtime-fixed fields
+ * and placed into a different structure, so that the runtime-fixed data
+ * can be placed into read-only space.
+ */
+struct dpll_data {
+        void __iomem            *mult_div1_reg;
+        u32                     mult_mask;
+        u32                     div1_mask;
+        struct clk              *clk_bypass;
+        struct clk              *clk_ref;
+        void __iomem            *control_reg;
+        u32                     enable_mask;
+        unsigned long           last_rounded_rate;
+        u16                     last_rounded_m;
+        u16                     max_multiplier;
+        u8                      last_rounded_n;
+        u8                      min_divider;
+        u16                     max_divider;
+        u8                      modes;
+        void __iomem            *autoidle_reg;
+        void __iomem            *idlest_reg;
+        u32                     autoidle_mask;
+        u32                     freqsel_mask;
+        u32                     idlest_mask;
+        u32                     dco_mask;
+        u32                     sddiv_mask;
+        u8                      auto_recal_bit;
+        u8                      recal_en_bit;
+        u8                      recal_st_bit;
+        u8                      flags;
+};
+
+/*
+ * struct clk.flags possibilities
+ *
+ * XXX document the rest of the clock flags here
+ *
+ * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
+ *     bits share the same register.  This flag allows the
+ *     omap4_dpllmx*() code to determine which GATE_CTRL bit field
+ *     should be used.  This is a temporary solution - a better approach
+ *     would be to associate clock type-specific data with the clock,
+ *     similar to the struct dpll_data approach.
+ */
+#define ENABLE_REG_32BIT        (1 << 0)        /* Use 32-bit access */
+#define CLOCK_IDLE_CONTROL      (1 << 1)
+#define CLOCK_NO_IDLE_PARENT    (1 << 2)
+#define ENABLE_ON_INIT          (1 << 3)        /* Enable upon framework init */
+#define INVERT_ENABLE           (1 << 4)        /* 0 enables, 1 disables */
+#define CLOCK_CLKOUTX2          (1 << 5)
+
+/**
+ * struct clk - OMAP struct clk
+ * @node: list_head connecting this clock into the full clock list
+ * @ops: struct clkops * for this clock
+ * @name: the name of the clock in the hardware (used in hwmod data and debug)
+ * @parent: pointer to this clock's parent struct clk
+ * @children: list_head connecting to the child clks' @sibling list_heads
+ * @sibling: list_head connecting this clk to its parent clk's @children
+ * @rate: current clock rate
+ * @enable_reg: register to write to enable the clock (see @enable_bit)
+ * @recalc: fn ptr that returns the clock's current rate
+ * @set_rate: fn ptr that can change the clock's current rate
+ * @round_rate: fn ptr that can round the clock's current rate
+ * @init: fn ptr to do clock-specific initialization
+ * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
+ * @usecount: number of users that have requested this clock to be enabled
+ * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
+ * @flags: see "struct clk.flags possibilities" above
+ * @clksel_reg: for clksel clks, register va containing src/divisor select
+ * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
+ * @clksel: for clksel clks, pointer to struct clksel for this clock
+ * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
+ * @clkdm_name: clockdomain name that this clock is contained in
+ * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
+ * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
+ * @src_offset: bitshift for source selection bitfield (OMAP1 only)
+ *
+ * XXX @rate_offset, @src_offset should probably be removed and OMAP1
+ * clock code converted to use clksel.
+ *
+ * XXX @usecount is poorly named.  It should be "enable_count" or
+ * something similar.  "users" in the description refers to kernel
+ * code (core code or drivers) that have called clk_enable() and not
+ * yet called clk_disable(); the usecount of parent clocks is also
+ * incremented by the clock code when clk_enable() is called on child
+ * clocks and decremented by the clock code when clk_disable() is
+ * called on child clocks.
+ *
+ * XXX @clkdm, @usecount, @children, @sibling should be marked for
+ * internal use only.
+ *
+ * @children and @sibling are used to optimize parent-to-child clock
+ * tree traversals.  (child-to-parent traversals use @parent.)
+ *
+ * XXX The notion of the clock's current rate probably needs to be
+ * separated from the clock's target rate.
+ */
+struct clk {
+        struct list_head        node;
+        const struct clkops     *ops;
+        const char              *name;
+        struct clk              *parent;
+        struct list_head        children;
+        struct list_head        sibling;        /* node for children */
+        unsigned long           rate;
+        void __iomem            *enable_reg;
+        unsigned long           (*recalc)(struct clk *);
+        int                     (*set_rate)(struct clk *, unsigned long);
+        long                    (*round_rate)(struct clk *, unsigned long);
+        void                    (*init)(struct clk *);
+        u8                      enable_bit;
+        s8                      usecount;
+        u8                      fixed_div;
+        u8                      flags;
+        void __iomem            *clksel_reg;
+        u32                     clksel_mask;
+        const struct clksel     *clksel;
+        struct dpll_data        *dpll_data;
+        const char              *clkdm_name;
+        struct clockdomain      *clkdm;
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+        struct dentry           *dent;  /* For visible tree hierarchy */
+#endif
+};
+
+struct clk_functions {
+        int             (*clk_enable)(struct clk *clk);
+        void            (*clk_disable)(struct clk *clk);
+        long            (*clk_round_rate)(struct clk *clk, unsigned long rate);
+        int             (*clk_set_rate)(struct clk *clk, unsigned long rate);
+        int             (*clk_set_parent)(struct clk *clk, struct clk *parent);
+        void            (*clk_allow_idle)(struct clk *clk);
+        void            (*clk_deny_idle)(struct clk *clk);
+        void            (*clk_disable_unused)(struct clk *clk);
+};
+
+extern int mpurate;
+
+extern int clk_init(struct clk_functions *custom_clocks);
+extern void clk_preinit(struct clk *clk);
+extern int clk_register(struct clk *clk);
+extern void clk_reparent(struct clk *child, struct clk *parent);
+extern void clk_unregister(struct clk *clk);
+extern void propagate_rate(struct clk *clk);
+extern void recalculate_root_clocks(void);
+extern unsigned long followparent_recalc(struct clk *clk);
+extern void clk_enable_init_clocks(void);
+unsigned long omap_fixed_divisor_recalc(struct clk *clk);
+extern struct clk *omap_clk_get_by_name(const char *name);
+extern int omap_clk_enable_autoidle_all(void);
+extern int omap_clk_disable_autoidle_all(void);
+
+extern const struct clkops clkops_null;
+
+extern struct clk dummy_ck;
 
-#include <plat/clock.h>
 
 /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
 #define CORE_CLK_SRC_32K                0x0
@@ -94,33 +409,6 @@ extern void omap2_clkt_iclk_deny_idle(struct clk *clk);
 u32 omap2_get_dpll_rate(struct clk *clk);
 void omap2_init_dpll_parent(struct clk *clk);
 
-int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
-
-
-#ifdef CONFIG_ARCH_OMAP2
-void omap2xxx_clk_prepare_for_reboot(void);
-#else
-static inline void omap2xxx_clk_prepare_for_reboot(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-void omap3_clk_prepare_for_reboot(void);
-#else
-static inline void omap3_clk_prepare_for_reboot(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-void omap4_clk_prepare_for_reboot(void);
-#else
-static inline void omap4_clk_prepare_for_reboot(void)
-{
-}
-#endif
-
 int omap2_dflt_clk_enable(struct clk *clk);
 void omap2_dflt_clk_disable(struct clk *clk);
 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
@@ -139,7 +427,6 @@ extern const struct clkops clkops_dummy;
 extern const struct clkops clkops_omap2_dflt;
 
 extern struct clk_functions omap2_clk_functions;
-extern struct clk *vclk, *sclk;
 
 extern const struct clksel_rate gpt_32k_rates[];
 extern const struct clksel_rate gpt_sys_rates[];
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index c3cde1a2b6de..608874b651e8 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1,7 +1,7 @@
 /*
  * OMAP2420 clock data
  *
- * Copyright (C) 2005-2009 Texas Instruments, Inc.
+ * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc.
  * Copyright (C) 2004-2011 Nokia Corporation
  *
  * Contacts:
@@ -18,14 +18,12 @@
 #include <linux/clk.h>
 #include <linux/list.h>
 
-#include <plat/clkdev_omap.h>
-
 #include "soc.h"
 #include "iomap.h"
 #include "clock.h"
 #include "clock2xxx.h"
 #include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
 #include "cm-regbits-24xx.h"
@@ -126,6 +124,7 @@ static struct clk dpll_ck = {
         .name           = "dpll_ck",
         .ops            = &clkops_omap2xxx_dpll_ops,
         .parent         = &sys_ck,              /* Can be func_32k also */
+        .init           = &omap2xxx_clkt_dpllcore_init,
         .dpll_data      = &dpll_dd,
         .clkdm_name     = "wkup_clkdm",
         .recalc         = &omap2_dpllcore_recalc,
@@ -1926,17 +1925,12 @@ static struct omap_clk omap2420_clks[] = {
 
 int __init omap2420_clk_init(void)
 {
-        const struct prcm_config *prcm;
         struct omap_clk *c;
-        u32 clkrate;
 
         prcm_clksrc_ctrl = OMAP2420_PRCM_CLKSRC_CTRL;
-        cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST);
         cpu_mask = RATE_IN_242X;
         rate_table = omap2420_rate_table;
 
-        clk_init(&omap2_clk_functions);
-
         for (c = omap2420_clks; c < omap2420_clks + ARRAY_SIZE(omap2420_clks);
              c++)
                 clk_preinit(c->lk.clk);
@@ -1953,20 +1947,13 @@ int __init omap2420_clk_init(void)
                 omap2_init_clk_clkdm(c->lk.clk);
         }
 
+        omap2xxx_clkt_vps_late_init();
+
         /* Disable autoidle on all clocks; let the PM code enable it later */
         omap_clk_disable_autoidle_all();
 
-        /* Check the MPU rate set by bootloader */
-        clkrate = omap2xxx_clk_get_core_rate(&dpll_ck);
-        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
-                if (!(prcm->flags & cpu_mask))
-                        continue;
-                if (prcm->xtal_speed != sys_ck.rate)
-                        continue;
-                if (prcm->dpll_speed <= clkrate)
-                        break;
-        }
-        curr_prcm_set = prcm;
+        /* XXX Can this be done from the virt_prcm_set clk init function? */
+        omap2xxx_clkt_vps_check_bootloader_rates();
 
         recalculate_root_clocks();
 
@@ -1980,11 +1967,6 @@ int __init omap2420_clk_init(void)
          */
         clk_enable_init_clocks();
 
-        /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
-        vclk = clk_get(NULL, "virt_prcm_set");
-        sclk = clk_get(NULL, "sys_ck");
-        dclk = clk_get(NULL, "dpll_ck");
-
         return 0;
 }
 
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
index a8e326177466..e37df538bcd3 100644
--- a/arch/arm/mach-omap2/clock2430.c
+++ b/arch/arm/mach-omap2/clock2430.c
@@ -21,13 +21,11 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "soc.h"
 #include "iomap.h"
 #include "clock.h"
 #include "clock2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 
 /**
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 22404fe435e7..b179b6ef4329 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1,7 +1,7 @@
 /*
  * OMAP2430 clock data
  *
- * Copyright (C) 2005-2009 Texas Instruments, Inc.
+ * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc.
  * Copyright (C) 2004-2011 Nokia Corporation
  *
  * Contacts:
@@ -17,14 +17,12 @@
 #include <linux/clk.h>
 #include <linux/list.h>
 
-#include <plat/clkdev_omap.h>
-
 #include "soc.h"
 #include "iomap.h"
 #include "clock.h"
 #include "clock2xxx.h"
 #include "opp2xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
 #include "cm-regbits-24xx.h"
@@ -125,6 +123,7 @@ static struct clk dpll_ck = {
         .name           = "dpll_ck",
         .ops            = &clkops_omap2xxx_dpll_ops,
         .parent         = &sys_ck,              /* Can be func_32k also */
+        .init           = &omap2xxx_clkt_dpllcore_init,
         .dpll_data      = &dpll_dd,
         .clkdm_name     = "wkup_clkdm",
         .recalc         = &omap2_dpllcore_recalc,
@@ -2025,17 +2024,12 @@ static struct omap_clk omap2430_clks[] = {
 
 int __init omap2430_clk_init(void)
 {
-        const struct prcm_config *prcm;
         struct omap_clk *c;
-        u32 clkrate;
 
         prcm_clksrc_ctrl = OMAP2430_PRCM_CLKSRC_CTRL;
-        cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST);
         cpu_mask = RATE_IN_243X;
         rate_table = omap2430_rate_table;
 
-        clk_init(&omap2_clk_functions);
-
         for (c = omap2430_clks; c < omap2430_clks + ARRAY_SIZE(omap2430_clks);
              c++)
                 clk_preinit(c->lk.clk);
@@ -2052,20 +2046,13 @@ int __init omap2430_clk_init(void)
                 omap2_init_clk_clkdm(c->lk.clk);
         }
 
+        omap2xxx_clkt_vps_late_init();
+
         /* Disable autoidle on all clocks; let the PM code enable it later */
         omap_clk_disable_autoidle_all();
 
-        /* Check the MPU rate set by bootloader */
-        clkrate = omap2xxx_clk_get_core_rate(&dpll_ck);
-        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
-                if (!(prcm->flags & cpu_mask))
-                        continue;
-                if (prcm->xtal_speed != sys_ck.rate)
-                        continue;
-                if (prcm->dpll_speed <= clkrate)
-                        break;
-        }
-        curr_prcm_set = prcm;
+        /* XXX Can this be done from the virt_prcm_set clk init function? */
+        omap2xxx_clkt_vps_check_bootloader_rates();
 
         recalculate_root_clocks();
 
@@ -2079,11 +2066,6 @@ int __init omap2430_clk_init(void)
          */
         clk_enable_init_clocks();
 
-        /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
-        vclk = clk_get(NULL, "virt_prcm_set");
-        sclk = clk_get(NULL, "sys_ck");
-        dclk = clk_get(NULL, "dpll_ck");
-
         return 0;
 }
 
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e92be1fc1a00..5f7faeb4c19b 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -22,35 +22,17 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "soc.h"
 #include "clock.h"
 #include "clock2xxx.h"
 #include "cm.h"
 #include "cm-regbits-24xx.h"
 
-struct clk *vclk, *sclk, *dclk;
-
 /*
  * Omap24xx specific clock functions
  */
 
 /*
- * Set clocks for bypass mode for reboot to work.
- */
-void omap2xxx_clk_prepare_for_reboot(void)
-{
-        u32 rate;
-
-        if (vclk == NULL || sclk == NULL)
-                return;
-
-        rate = clk_get_rate(sclk);
-        clk_set_rate(vclk, rate);
-}
-
-/*
  * Switch the MPU rate if specified on cmdline.  We cannot do this
  * early until cmdline is parsed.  XXX This should be removed from the
  * clock code and handled by the OPP layer code in the near future.
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index cb6df8ca9e4a..ce809c913b6f 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -15,10 +15,13 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk *clk);
 unsigned long omap2_osc_clk_recalc(struct clk *clk);
 unsigned long omap2_dpllcore_recalc(struct clk *clk);
 int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);
-unsigned long omap2xxx_clk_get_core_rate(struct clk *clk);
+unsigned long omap2xxx_clk_get_core_rate(void);
 u32 omap2xxx_get_apll_clkin(void);
 u32 omap2xxx_get_sysclkdiv(void);
 void omap2xxx_clk_prepare_for_reboot(void);
+void omap2xxx_clkt_dpllcore_init(struct clk *clk);
+void omap2xxx_clkt_vps_check_bootloader_rates(void);
+void omap2xxx_clkt_vps_late_init(void);
 
 #ifdef CONFIG_SOC_OMAP2420
 int omap2420_clk_init(void);
@@ -32,9 +35,7 @@ int omap2430_clk_init(void);
 #define omap2430_clk_init()     do { } while(0)
 #endif
 
-extern void __iomem *prcm_clksrc_ctrl, *cm_idlest_pll;
-
-extern struct clk *dclk;
+extern void __iomem *prcm_clksrc_ctrl;
 
 extern const struct clkops clkops_omap2430_i2chs_wait;
 extern const struct clkops clkops_oscck;
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 1a45d6bd2539..17e3de51bcba 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -17,9 +17,8 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/clk.h>
-#include <plat/clkdev_omap.h>
 
-#include "am33xx.h"
+#include "soc.h"
 #include "iomap.h"
 #include "control.h"
 #include "clock.h"
@@ -1087,8 +1086,6 @@ int __init am33xx_clk_init(void)
                 cpu_clkflg = CK_AM33XX;
         }
 
-        clk_init(&omap2_clk_functions);
-
         for (c = am33xx_clks; c < am33xx_clks + ARRAY_SIZE(am33xx_clks); c++)
                 clk_preinit(c->lk.clk);
 
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 1fc96b9ee330..e41819ba7482 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -21,11 +21,9 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "clock.h"
 #include "clock34xx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
 
 /**
diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c
index 2e97d08f0e56..622ea0502610 100644
--- a/arch/arm/mach-omap2/clock3517.c
+++ b/arch/arm/mach-omap2/clock3517.c
@@ -21,11 +21,9 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "clock.h"
 #include "clock3517.h"
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
 
 /*
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
index 0c5e25ed8879..0e1e9e4e2fa4 100644
--- a/arch/arm/mach-omap2/clock36xx.c
+++ b/arch/arm/mach-omap2/clock36xx.c
@@ -22,8 +22,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "clock.h"
 #include "clock36xx.h"
 
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 83bb01427d40..3e8aca2b1b61 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,8 +21,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-
 #include "soc.h"
 #include "clock.h"
 #include "clock3xxx.h"
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 1f42c9d5ecf3..6cca19953950 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -21,8 +21,6 @@
 #include <linux/list.h>
 #include <linux/io.h>
 
-#include <plat/clkdev_omap.h>
-
 #include "soc.h"
 #include "iomap.h"
 #include "clock.h"
@@ -30,7 +28,7 @@
 #include "clock34xx.h"
 #include "clock36xx.h"
 #include "clock3517.h"
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
 #include "prm2xxx_3xxx.h"
 #include "prm-regbits-34xx.h"
@@ -3573,8 +3571,6 @@ int __init omap3xxx_clk_init(void)
         else
                 dpll4_dd = dpll4_dd_34xx;
 
-        clk_init(&omap2_clk_functions);
-
         for (c = omap3xxx_clks; c < omap3xxx_clks + ARRAY_SIZE(omap3xxx_clks);
              c++)
                 clk_preinit(c->lk.clk);
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 6efc30c961a5..2a450c9b9a7b 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -28,8 +28,6 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clkdev_omap.h>
-
 #include "soc.h"
 #include "iomap.h"
 #include "clock.h"
@@ -3366,8 +3364,6 @@ int __init omap4xxx_clk_init(void)
                 return 0;
         }
 
-        clk_init(&omap2_clk_functions);
-
         /*
          * Must stay commented until all OMAP SoC drivers are
          * converted to runtime PM, or drivers may start crashing
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 512e79a842cb..64e50465a4b5 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -27,7 +27,8 @@
 
 #include <linux/bitops.h>
 
-#include <plat/clock.h>
+#include "soc.h"
+#include "clock.h"
 #include "clockdomain.h"
 
 /* clkdm_list contains all registered struct clockdomains */
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 629576be7444..bc42446e23ab 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -18,9 +18,8 @@
 #include <linux/spinlock.h>
 
 #include "powerdomain.h"
-#include <plat/clock.h>
-#include <plat/omap_hwmod.h>
-#include <plat/cpu.h>
+#include "clock.h"
+#include "omap_hwmod.h"
 
 /*
  * Clockdomain flags
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
deleted file mode 100644
index 70294f54e35a..000000000000
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ /dev/null
@@ -1,339 +0,0 @@
-/*
- * OMAP2 and OMAP3 clockdomain control
- *
- * Copyright (C) 2008-2010 Texas Instruments, Inc.
- * Copyright (C) 2008-2010 Nokia Corporation
- *
- * Derived from mach-omap2/clockdomain.c written by Paul Walmsley
- * Rajendra Nayak <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/types.h>
-#include <plat/prcm.h>
-#include "prm.h"
-#include "prm2xxx_3xxx.h"
-#include "cm.h"
-#include "cm2xxx_3xxx.h"
-#include "cm-regbits-24xx.h"
-#include "cm-regbits-34xx.h"
-#include "prm-regbits-24xx.h"
-#include "clockdomain.h"
-
-static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1,
-                                                struct clockdomain *clkdm2)
-{
-        omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
-                                clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
-        return 0;
-}
-
-static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1,
-                                                 struct clockdomain *clkdm2)
-{
-        omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
-                                clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
-        return 0;
-}
-
-static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
-                                                 struct clockdomain *clkdm2)
-{
-        return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
-                                PM_WKDEP, (1 << clkdm2->dep_bit));
-}
-
-static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
-{
-        struct clkdm_dep *cd;
-        u32 mask = 0;
-
-        for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
-                if (!cd->clkdm)
-                        continue; /* only happens if data is erroneous */
-
-                /* PRM accesses are slow, so minimize them */
-                mask |= 1 << cd->clkdm->dep_bit;
-                atomic_set(&cd->wkdep_usecount, 0);
-        }
-
-        omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
-                                 PM_WKDEP);
-        return 0;
-}
-
-static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1,
-                                                 struct clockdomain *clkdm2)
-{
-        omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
-                                clkdm1->pwrdm.ptr->prcm_offs,
-                                OMAP3430_CM_SLEEPDEP);
-        return 0;
-}
-
-static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1,
-                                                 struct clockdomain *clkdm2)
-{
-        omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
-                                clkdm1->pwrdm.ptr->prcm_offs,
-                                OMAP3430_CM_SLEEPDEP);
-        return 0;
-}
-
-static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1,
-                                                 struct clockdomain *clkdm2)
-{
-        return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
-                                OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit));
-}
-
-static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
-{
-        struct clkdm_dep *cd;
-        u32 mask = 0;
-
-        for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) {
-                if (!cd->clkdm)
-                        continue; /* only happens if data is erroneous */
-
-                /* PRM accesses are slow, so minimize them */
-                mask |= 1 << cd->clkdm->dep_bit;
-                atomic_set(&cd->sleepdep_usecount, 0);
-        }
-        omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
-                                OMAP3430_CM_SLEEPDEP);
-        return 0;
-}
-
-static int omap2_clkdm_sleep(struct clockdomain *clkdm)
-{
-        omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
-                                clkdm->pwrdm.ptr->prcm_offs,
-                                OMAP2_PM_PWSTCTRL);
-        return 0;
-}
-
-static int omap2_clkdm_wakeup(struct clockdomain *clkdm)
-{
-        omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
-                                clkdm->pwrdm.ptr->prcm_offs,
-                                OMAP2_PM_PWSTCTRL);
-        return 0;
-}
-
-static void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
-{
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_add_autodeps(clkdm);
-
-        omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-}
-
-static void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
-{
-        omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_del_autodeps(clkdm);
-}
-
-static void _enable_hwsup(struct clockdomain *clkdm)
-{
-        if (cpu_is_omap24xx())
-                omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                               clkdm->clktrctrl_mask);
-        else if (cpu_is_omap34xx())
-                omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                               clkdm->clktrctrl_mask);
-}
-
-static void _disable_hwsup(struct clockdomain *clkdm)
-{
-        if (cpu_is_omap24xx())
-                omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                                clkdm->clktrctrl_mask);
-        else if (cpu_is_omap34xx())
-                omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                                clkdm->clktrctrl_mask);
-}
-
-static int omap3_clkdm_sleep(struct clockdomain *clkdm)
-{
-        omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-        return 0;
-}
-
-static int omap3_clkdm_wakeup(struct clockdomain *clkdm)
-{
-        omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-        return 0;
-}
-
-static int omap2_clkdm_clk_enable(struct clockdomain *clkdm)
-{
-        bool hwsup = false;
-
-        if (!clkdm->clktrctrl_mask)
-                return 0;
-
-        hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-
-        if (hwsup) {
-                /* Disable HW transitions when we are changing deps */
-                _disable_hwsup(clkdm);
-                _clkdm_add_autodeps(clkdm);
-                _enable_hwsup(clkdm);
-        } else {
-                if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
-                        omap2_clkdm_wakeup(clkdm);
-        }
-
-        return 0;
-}
-
-static int omap2_clkdm_clk_disable(struct clockdomain *clkdm)
-{
-        bool hwsup = false;
-
-        if (!clkdm->clktrctrl_mask)
-                return 0;
-
-        hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-
-        if (hwsup) {
-                /* Disable HW transitions when we are changing deps */
-                _disable_hwsup(clkdm);
-                _clkdm_del_autodeps(clkdm);
-                _enable_hwsup(clkdm);
-        } else {
-                if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
-                        omap2_clkdm_sleep(clkdm);
-        }
-
-        return 0;
-}
-
-static void omap3_clkdm_allow_idle(struct clockdomain *clkdm)
-{
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_add_autodeps(clkdm);
-
-        omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-}
-
-static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
-{
-        omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-
-        if (atomic_read(&clkdm->usecount) > 0)
-                _clkdm_del_autodeps(clkdm);
-}
-
-static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
-{
-        bool hwsup = false;
-
-        if (!clkdm->clktrctrl_mask)
-                return 0;
-
-        /*
-         * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
-         * more details on the unpleasant problem this is working
-         * around
-         */
-        if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) &&
-            (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) {
-                omap3_clkdm_wakeup(clkdm);
-                return 0;
-        }
-
-        hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-
-        if (hwsup) {
-                /* Disable HW transitions when we are changing deps */
-                _disable_hwsup(clkdm);
-                _clkdm_add_autodeps(clkdm);
-                _enable_hwsup(clkdm);
-        } else {
-                if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
-                        omap3_clkdm_wakeup(clkdm);
-        }
-
-        return 0;
-}
-
-static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
-{
-        bool hwsup = false;
-
-        if (!clkdm->clktrctrl_mask)
-                return 0;
-
-        /*
-         * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
-         * more details on the unpleasant problem this is working
-         * around
-         */
-        if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
-            !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
-                _enable_hwsup(clkdm);
-                return 0;
-        }
-
-        hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
-                                clkdm->clktrctrl_mask);
-
-        if (hwsup) {
-                /* Disable HW transitions when we are changing deps */
-                _disable_hwsup(clkdm);
-                _clkdm_del_autodeps(clkdm);
-                _enable_hwsup(clkdm);
-        } else {
-                if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
-                        omap3_clkdm_sleep(clkdm);
-        }
-
-        return 0;
-}
-
-struct clkdm_ops omap2_clkdm_operations = {
-        .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
-        .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
-        .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
-        .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
-        .clkdm_sleep            = omap2_clkdm_sleep,
-        .clkdm_wakeup           = omap2_clkdm_wakeup,
-        .clkdm_allow_idle       = omap2_clkdm_allow_idle,
-        .clkdm_deny_idle        = omap2_clkdm_deny_idle,
-        .clkdm_clk_enable       = omap2_clkdm_clk_enable,
-        .clkdm_clk_disable      = omap2_clkdm_clk_disable,
-};
-
-struct clkdm_ops omap3_clkdm_operations = {
-        .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
-        .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
-        .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
-        .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
-        .clkdm_add_sleepdep     = omap3_clkdm_add_sleepdep,
-        .clkdm_del_sleepdep     = omap3_clkdm_del_sleepdep,
-        .clkdm_read_sleepdep    = omap3_clkdm_read_sleepdep,
-        .clkdm_clear_all_sleepdeps      = omap3_clkdm_clear_all_sleepdeps,
-        .clkdm_sleep            = omap3_clkdm_sleep,
-        .clkdm_wakeup           = omap3_clkdm_wakeup,
-        .clkdm_allow_idle       = omap3_clkdm_allow_idle,
-        .clkdm_deny_idle        = omap3_clkdm_deny_idle,
-        .clkdm_clk_enable       = omap3xxx_clkdm_clk_enable,
-        .clkdm_clk_disable      = omap3xxx_clkdm_clk_disable,
-};
diff --git a/arch/arm/mach-omap2/clockdomain33xx.c b/arch/arm/mach-omap2/clockdomain33xx.c
deleted file mode 100644
index aca6388fad76..000000000000
--- a/arch/arm/mach-omap2/clockdomain33xx.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * AM33XX clockdomain control
- *
- * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
- * Vaibhav Hiremath <hvaibhav@ti.com>
- *
- * Derived from mach-omap2/clockdomain44xx.c written by Rajendra Nayak
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-
-#include "clockdomain.h"
-#include "cm33xx.h"
-
-
-static int am33xx_clkdm_sleep(struct clockdomain *clkdm)
-{
-        am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs);
-        return 0;
-}
-
-static int am33xx_clkdm_wakeup(struct clockdomain *clkdm)
-{
-        am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs);
-        return 0;
-}
-
-static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm)
-{
-        am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
-}
-
-static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm)
-{
-        am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
-}
-
-static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm)
-{
-        if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
-                return am33xx_clkdm_wakeup(clkdm);
-
-        return 0;
-}
-
-static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
-{
-        bool hwsup = false;
-
-        hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
-
-        if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
-                am33xx_clkdm_sleep(clkdm);
-
-        return 0;
-}
-
-struct clkdm_ops am33xx_clkdm_operations = {
-        .clkdm_sleep            = am33xx_clkdm_sleep,
-        .clkdm_wakeup           = am33xx_clkdm_wakeup,
-        .clkdm_allow_idle       = am33xx_clkdm_allow_idle,
-        .clkdm_deny_idle        = am33xx_clkdm_deny_idle,
-        .clkdm_clk_enable       = am33xx_clkdm_clk_enable,
-        .clkdm_clk_disable      = am33xx_clkdm_clk_disable,
-};
diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c
deleted file mode 100644
index 6fc6155625bc..000000000000
--- a/arch/arm/mach-omap2/clockdomain44xx.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * OMAP4 clockdomain control
- *
- * Copyright (C) 2008-2010 Texas Instruments, Inc.
- * Copyright (C) 2008-2010 Nokia Corporation
- *
- * Derived from mach-omap2/clockdomain.c written by Paul Walmsley
- * Rajendra Nayak <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include "clockdomain.h"
-#include "cminst44xx.h"
-#include "cm44xx.h"
-
-static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1,
-                                        struct clockdomain *clkdm2)
-{
-        omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit),
-                                        clkdm1->prcm_partition,
-                                        clkdm1->cm_inst, clkdm1->clkdm_offs +
-                                        OMAP4_CM_STATICDEP);
-        return 0;
-}
-
-static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1,
-                                        struct clockdomain *clkdm2)
-{
-        omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit),
-                                        clkdm1->prcm_partition,
-                                        clkdm1->cm_inst, clkdm1->clkdm_offs +
-                                        OMAP4_CM_STATICDEP);
-        return 0;
-}
-
-static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1,
-                                        struct clockdomain *clkdm2)
-{
-        return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition,
-                                        clkdm1->cm_inst, clkdm1->clkdm_offs +
-                                        OMAP4_CM_STATICDEP,
-                                        (1 << clkdm2->dep_bit));
-}
-
-static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
-{
-        struct clkdm_dep *cd;
-        u32 mask = 0;
-
-        if (!clkdm->prcm_partition)
-                return 0;
-
-        for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
-                if (!cd->clkdm)
-                        continue; /* only happens if data is erroneous */
-
-                mask |= 1 << cd->clkdm->dep_bit;
-                atomic_set(&cd->wkdep_usecount, 0);
-        }
-
-        omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition,
-                                        clkdm->cm_inst, clkdm->clkdm_offs +
-                                        OMAP4_CM_STATICDEP);
-        return 0;
-}
-
-static int omap4_clkdm_sleep(struct clockdomain *clkdm)
-{
-        omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
-                                        clkdm->cm_inst, clkdm->clkdm_offs);
-        return 0;
-}
-
-static int omap4_clkdm_wakeup(struct clockdomain *clkdm)
-{
-        omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition,
-                                        clkdm->cm_inst, clkdm->clkdm_offs);
-        return 0;
-}
-
-static void omap4_clkdm_allow_idle(struct clockdomain *clkdm)
-{
-        omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
-                                        clkdm->cm_inst, clkdm->clkdm_offs);
-}
-
-static void omap4_clkdm_deny_idle(struct clockdomain *clkdm)
-{
-        if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
-                omap4_clkdm_wakeup(clkdm);
-        else
-                omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
-                                                 clkdm->cm_inst,
-                                                 clkdm->clkdm_offs);
-}
-
-static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)
-{
-        if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
-                return omap4_clkdm_wakeup(clkdm);
-
-        return 0;
-}
-
-static int omap4_clkdm_clk_disable(struct clockdomain *clkdm)
-{
-        bool hwsup = false;
-
-        if (!clkdm->prcm_partition)
-                return 0;
-
-        /*
-         * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
-         * more details on the unpleasant problem this is working
-         * around
-         */
-        if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
-            !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
-                omap4_clkdm_allow_idle(clkdm);
-                return 0;
-        }
-
-        hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
-                                        clkdm->cm_inst, clkdm->clkdm_offs);
-
-        if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
-                omap4_clkdm_sleep(clkdm);
-
-        return 0;
-}
-
-struct clkdm_ops omap4_clkdm_operations = {
-        .clkdm_add_wkdep        = omap4_clkdm_add_wkup_sleep_dep,
-        .clkdm_del_wkdep        = omap4_clkdm_del_wkup_sleep_dep,
-        .clkdm_read_wkdep       = omap4_clkdm_read_wkup_sleep_dep,
-        .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps,
-        .clkdm_add_sleepdep     = omap4_clkdm_add_wkup_sleep_dep,
-        .clkdm_del_sleepdep     = omap4_clkdm_del_wkup_sleep_dep,
-        .clkdm_read_sleepdep    = omap4_clkdm_read_wkup_sleep_dep,
-        .clkdm_clear_all_sleepdeps      = omap4_clkdm_clear_all_wkup_sleep_deps,
-        .clkdm_sleep            = omap4_clkdm_sleep,
-        .clkdm_wakeup           = omap4_clkdm_wakeup,
-        .clkdm_allow_idle       = omap4_clkdm_allow_idle,
-        .clkdm_deny_idle        = omap4_clkdm_deny_idle,
-        .clkdm_clk_enable       = omap4_clkdm_clk_enable,
-        .clkdm_clk_disable      = omap4_clkdm_clk_disable,
-};
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
index 5c741852fac0..7e76becf3a4a 100644
--- a/arch/arm/mach-omap2/clockdomains2420_data.c
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -35,6 +35,7 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
+#include "soc.h"
 #include "clockdomain.h"
 #include "prm2xxx_3xxx.h"
 #include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
index f09617555e15..b923007e45d0 100644
--- a/arch/arm/mach-omap2/clockdomains2430_data.c
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -35,6 +35,7 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
+#include "soc.h"
 #include "clockdomain.h"
 #include "prm2xxx_3xxx.h"
 #include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 933a35cd124a..e6b91e552d3d 100644
--- a/arch/arm/mach-omap2/clockdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -33,6 +33,7 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
+#include "soc.h"
 #include "clockdomain.h"
 #include "prm2xxx_3xxx.h"
 #include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h
index 686290437568..11eaf16880c4 100644
--- a/arch/arm/mach-omap2/cm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-24xx.h
@@ -333,7 +333,9 @@
 #define OMAP24XX_EN_DPLL_MASK                           (0x3 << 0)
 
 /* CM_IDLEST_CKGEN */
+#define OMAP24XX_ST_54M_APLL_SHIFT                      9
 #define OMAP24XX_ST_54M_APLL_MASK                       (1 << 9)
+#define OMAP24XX_ST_96M_APLL_SHIFT                      8
 #define OMAP24XX_ST_96M_APLL_MASK                       (1 << 8)
 #define OMAP24XX_ST_54M_CLK_MASK                        (1 << 6)
 #define OMAP24XX_ST_12M_CLK_MASK                        (1 << 5)
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index f24e3f7a2bbc..93473f9a551c 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -1,7 +1,7 @@
 /*
  * OMAP2+ Clock Management prototypes
  *
- * Copyright (C) 2007-2009 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
  * Copyright (C) 2007-2009 Nokia Corporation
  *
  * Written by Paul Walmsley
@@ -22,6 +22,12 @@
  */
 #define MAX_MODULE_READY_TIME           2000
 
+# ifndef __ASSEMBLER__
+extern void __iomem *cm_base;
+extern void __iomem *cm2_base;
+extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2);
+# endif
+
 /*
  * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
  * the PRCM to request that a module enter the inactive state in the
@@ -33,4 +39,26 @@
  */
 #define MAX_MODULE_DISABLE_TIME         5000
 
+# ifndef __ASSEMBLER__
+
+/**
+ * struct cm_ll_data - fn ptrs to per-SoC CM function implementations
+ * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
+ * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
+ */
+struct cm_ll_data {
+        int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
+                                u8 *idlest_reg_id);
+        int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+};
+
+extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+                               u8 *idlest_reg_id);
+extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+
+extern int cm_register(struct cm_ll_data *cld);
+extern int cm_unregister(struct cm_ll_data *cld);
+
+# endif
+
 #endif
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
new file mode 100644
index 000000000000..db650690e9d0
--- /dev/null
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -0,0 +1,381 @@
+/*
+ * OMAP2xxx CM module functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc.
+ * Paul Walmsley
+ * Rajendra Nayak <rnayak@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include "soc.h"
+#include "iomap.h"
+#include "common.h"
+#include "prm2xxx.h"
+#include "cm.h"
+#include "cm2xxx.h"
+#include "cm-regbits-24xx.h"
+#include "clockdomain.h"
+
+/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */
+#define DPLL_AUTOIDLE_DISABLE                           0x0
+#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP           0x3
+
+/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */
+#define OMAP2XXX_APLL_AUTOIDLE_DISABLE                  0x0
+#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP           0x3
+
+/* CM_IDLEST_PLL bit value offset for APLLs (OMAP2xxx only) */
+#define EN_APLL_LOCKED                                  3
+
+static const u8 omap2xxx_cm_idlest_offs[] = {
+        CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4
+};
+
+/*
+ *
+ */
+
+static void _write_clktrctrl(u8 c, s16 module, u32 mask)
+{
+        u32 v;
+
+        v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL);
+        v &= ~mask;
+        v |= c << __ffs(mask);
+        omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
+}
+
+bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+{
+        u32 v;
+
+        v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL);
+        v &= mask;
+        v >>= __ffs(mask);
+
+        return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
+}
+
+void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+{
+        _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
+}
+
+void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+{
+        _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
+}
+
+/*
+ * DPLL autoidle control
+ */
+
+static void _omap2xxx_set_dpll_autoidle(u8 m)
+{
+        u32 v;
+
+        v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
+        v &= ~OMAP24XX_AUTO_DPLL_MASK;
+        v |= m << OMAP24XX_AUTO_DPLL_SHIFT;
+        omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
+}
+
+void omap2xxx_cm_set_dpll_disable_autoidle(void)
+{
+        _omap2xxx_set_dpll_autoidle(OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP);
+}
+
+void omap2xxx_cm_set_dpll_auto_low_power_stop(void)
+{
+        _omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE);
+}
+
+/*
+ * APLL control
+ */
+
+static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask)
+{
+        u32 v;
+
+        v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
+        v &= ~mask;
+        v |= m << __ffs(mask);
+        omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
+}
+
+void omap2xxx_cm_set_apll54_disable_autoidle(void)
+{
+        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
+                                    OMAP24XX_AUTO_54M_MASK);
+}
+
+void omap2xxx_cm_set_apll54_auto_low_power_stop(void)
+{
+        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
+                                    OMAP24XX_AUTO_54M_MASK);
+}
+
+void omap2xxx_cm_set_apll96_disable_autoidle(void)
+{
+        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
+                                    OMAP24XX_AUTO_96M_MASK);
+}
+
+void omap2xxx_cm_set_apll96_auto_low_power_stop(void)
+{
+        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
+                                    OMAP24XX_AUTO_96M_MASK);
+}
+
+/* Enable an APLL if off */
+static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
+{
+        u32 v, m;
+
+        m = EN_APLL_LOCKED << enable_bit;
+
+        v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+        if (v & m)
+                return 0;   /* apll already enabled */
+
+        v |= m;
+        omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
+
+        omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
+
+        /*
+         * REVISIT: Should we return an error code if
+         * omap2xxx_cm_wait_module_ready() fails?
+         */
+        return 0;
+}
+
+/* Stop APLL */
+static void _omap2xxx_apll_disable(u8 enable_bit)
+{
+        u32 v;
+
+        v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+        v &= ~(EN_APLL_LOCKED << enable_bit);
+        omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
+}
+
+/* Enable an APLL if off */
+int omap2xxx_cm_apll54_enable(void)
+{
+        return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT,
+                                     OMAP24XX_ST_54M_APLL_SHIFT);
+}
+
+/* Enable an APLL if off */
+int omap2xxx_cm_apll96_enable(void)
+{
+        return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT,
+                                     OMAP24XX_ST_96M_APLL_SHIFT);
+}
+
+/* Stop APLL */
+void omap2xxx_cm_apll54_disable(void)
+{
+        _omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT);
+}
+
+/* Stop APLL */
+void omap2xxx_cm_apll96_disable(void)
+{
+        _omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT);
+}
+
+/**
+ * omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * XXX This function is only needed until absolute register addresses are
+ * removed from the OMAP struct clk records.
+ */
+int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+                                 u8 *idlest_reg_id)
+{
+        unsigned long offs;
+        u8 idlest_offs;
+        int i;
+
+        if (idlest_reg < cm_base || idlest_reg > (cm_base + 0x0fff))
+                return -EINVAL;
+
+        idlest_offs = (unsigned long)idlest_reg & 0xff;
+        for (i = 0; i < ARRAY_SIZE(omap2xxx_cm_idlest_offs); i++) {
+                if (idlest_offs == omap2xxx_cm_idlest_offs[i]) {
+                        *idlest_reg_id = i + 1;
+                        break;
+                }
+        }
+
+        if (i == ARRAY_SIZE(omap2xxx_cm_idlest_offs))
+                return -EINVAL;
+
+        offs = idlest_reg - cm_base;
+        offs &= 0xff00;
+        *prcm_inst = offs;
+
+        return 0;
+}
+
+/*
+ *
+ */
+
+/**
+ * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset
+ * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
+ * success or -EBUSY if the module doesn't enable in time.
+ */
+int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+{
+        int ena = 0, i = 0;
+        u8 cm_idlest_reg;
+        u32 mask;
+
+        if (!idlest_id || (idlest_id > ARRAY_SIZE(omap2xxx_cm_idlest_offs)))
+                return -EINVAL;
+
+        cm_idlest_reg = omap2xxx_cm_idlest_offs[idlest_id - 1];
+
+        mask = 1 << idlest_shift;
+        ena = mask;
+
+        omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) &
+                            mask) == ena), MAX_MODULE_READY_TIME, i);
+
+        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
+
+/* Clockdomain low-level functions */
+
+static void omap2xxx_clkdm_allow_idle(struct clockdomain *clkdm)
+{
+        if (atomic_read(&clkdm->usecount) > 0)
+                _clkdm_add_autodeps(clkdm);
+
+        omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                       clkdm->clktrctrl_mask);
+}
+
+static void omap2xxx_clkdm_deny_idle(struct clockdomain *clkdm)
+{
+        omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                        clkdm->clktrctrl_mask);
+
+        if (atomic_read(&clkdm->usecount) > 0)
+                _clkdm_del_autodeps(clkdm);
+}
+
+static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
+
+        if (!clkdm->clktrctrl_mask)
+                return 0;
+
+        hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                              clkdm->clktrctrl_mask);
+
+        if (hwsup) {
+                /* Disable HW transitions when we are changing deps */
+                omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                                clkdm->clktrctrl_mask);
+                _clkdm_add_autodeps(clkdm);
+                omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                               clkdm->clktrctrl_mask);
+        } else {
+                if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+                        omap2xxx_clkdm_wakeup(clkdm);
+        }
+
+        return 0;
+}
+
+static int omap2xxx_clkdm_clk_disable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
+
+        if (!clkdm->clktrctrl_mask)
+                return 0;
+
+        hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                              clkdm->clktrctrl_mask);
+
+        if (hwsup) {
+                /* Disable HW transitions when we are changing deps */
+                omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                                clkdm->clktrctrl_mask);
+                _clkdm_del_autodeps(clkdm);
+                omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                               clkdm->clktrctrl_mask);
+        } else {
+                if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
+                        omap2xxx_clkdm_sleep(clkdm);
+        }
+
+        return 0;
+}
+
+struct clkdm_ops omap2_clkdm_operations = {
+        .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
+        .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
+        .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
+        .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
+        .clkdm_sleep            = omap2xxx_clkdm_sleep,
+        .clkdm_wakeup           = omap2xxx_clkdm_wakeup,
+        .clkdm_allow_idle       = omap2xxx_clkdm_allow_idle,
+        .clkdm_deny_idle        = omap2xxx_clkdm_deny_idle,
+        .clkdm_clk_enable       = omap2xxx_clkdm_clk_enable,
+        .clkdm_clk_disable      = omap2xxx_clkdm_clk_disable,
+};
+
+/*
+ *
+ */
+
+static struct cm_ll_data omap2xxx_cm_ll_data = {
+        .split_idlest_reg       = &omap2xxx_cm_split_idlest_reg,
+        .wait_module_ready      = &omap2xxx_cm_wait_module_ready,
+};
+
+int __init omap2xxx_cm_init(void)
+{
+        if (!cpu_is_omap24xx())
+                return 0;
+
+        return cm_register(&omap2xxx_cm_ll_data);
+}
+
+static void __exit omap2xxx_cm_exit(void)
+{
+        if (!cpu_is_omap24xx())
+                return;
+
+        /* Should never happen */
+        WARN(cm_unregister(&omap2xxx_cm_ll_data),
+             "%s: cm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap2xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
new file mode 100644
index 000000000000..4cbb39b051d2
--- /dev/null
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -0,0 +1,70 @@
+/*
+ * OMAP2xxx Clock Management (CM) register definitions
+ *
+ * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
+ * Copyright (C) 2007-2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * The CM hardware modules on the OMAP2/3 are quite similar to each
+ * other.  The CM modules/instances on OMAP4 are quite different, so
+ * they are handled in a separate file.
+ */
+#ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_H
+#define __ARCH_ASM_MACH_OMAP2_CM2XXX_H
+
+#include "prcm-common.h"
+#include "cm2xxx_3xxx.h"
+
+#define OMAP2420_CM_REGADDR(module, reg)                                \
+                        OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
+#define OMAP2430_CM_REGADDR(module, reg)                                \
+                        OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
+
+/*
+ * Module specific CM register offsets from CM_BASE + domain offset
+ * Use cm_{read,write}_mod_reg() with these registers.
+ * These register offsets generally appear in more than one PRCM submodule.
+ */
+
+/* OMAP2-specific register offsets */
+
+#define OMAP24XX_CM_FCLKEN2                             0x0004
+#define OMAP24XX_CM_ICLKEN4                             0x001c
+#define OMAP24XX_CM_AUTOIDLE4                           0x003c
+#define OMAP24XX_CM_IDLEST4                             0x002c
+
+/* CM_IDLEST bit field values to indicate deasserted IdleReq */
+
+#define OMAP24XX_CM_IDLEST_VAL                          0
+
+
+/* Clock management domain register get/set */
+
+#ifndef __ASSEMBLER__
+
+extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
+extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
+
+extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
+extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
+
+extern void omap2xxx_cm_set_apll54_disable_autoidle(void);
+extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
+extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
+extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
+
+extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
+extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
+                                         u8 idlest_shift);
+extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+                                        s16 *prcm_inst, u8 *idlest_reg_id);
+
+extern int __init omap2xxx_cm_init(void);
+
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h
index 57b2f3c2fbf3..98e6b3c9cd9b 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h
@@ -16,28 +16,7 @@
 #ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
 #define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H
 
-#include "prcm-common.h"
-
-#define OMAP2420_CM_REGADDR(module, reg)                                \
-                        OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
-#define OMAP2430_CM_REGADDR(module, reg)                                \
-                        OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
-#define OMAP34XX_CM_REGADDR(module, reg)                                \
-                        OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
-
-
-/*
- * OMAP3-specific global CM registers
- * Use cm_{read,write}_reg() with these registers.
- * These registers appear once per CM module.
- */
-
-#define OMAP3430_CM_REVISION            OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000)
-#define OMAP3430_CM_SYSCONFIG           OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010)
-#define OMAP3430_CM_POLCTRL             OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c)
-
-#define OMAP3_CM_CLKOUT_CTRL_OFFSET     0x0070
-#define OMAP3430_CM_CLKOUT_CTRL         OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
+#include "cm.h"
 
 /*
  * Module specific CM register offsets from CM_BASE + domain offset
@@ -57,6 +36,7 @@
 #define CM_IDLEST                                       0x0020
 #define CM_IDLEST1                                      CM_IDLEST
 #define CM_IDLEST2                                      0x0024
+#define OMAP2430_CM_IDLEST3                             0x0028
 #define CM_AUTOIDLE                                     0x0030
 #define CM_AUTOIDLE1                                    CM_AUTOIDLE
 #define CM_AUTOIDLE2                                    0x0034
@@ -66,70 +46,60 @@
 #define CM_CLKSEL2                                      0x0044
 #define OMAP2_CM_CLKSTCTRL                              0x0048
 
-/* OMAP2-specific register offsets */
-
-#define OMAP24XX_CM_FCLKEN2                             0x0004
-#define OMAP24XX_CM_ICLKEN4                             0x001c
-#define OMAP24XX_CM_AUTOIDLE4                           0x003c
-#define OMAP24XX_CM_IDLEST4                             0x002c
-
-#define OMAP2430_CM_IDLEST3                             0x0028
-
-/* OMAP3-specific register offsets */
-
-#define OMAP3430_CM_CLKEN_PLL                           0x0004
-#define OMAP3430ES2_CM_CLKEN2                           0x0004
-#define OMAP3430ES2_CM_FCLKEN3                          0x0008
-#define OMAP3430_CM_IDLEST_PLL                          CM_IDLEST2
-#define OMAP3430_CM_AUTOIDLE_PLL                        CM_AUTOIDLE2
-#define OMAP3430ES2_CM_AUTOIDLE2_PLL                    CM_AUTOIDLE2
-#define OMAP3430_CM_CLKSEL1                             CM_CLKSEL
-#define OMAP3430_CM_CLKSEL1_PLL                         CM_CLKSEL
-#define OMAP3430_CM_CLKSEL2_PLL                         CM_CLKSEL2
-#define OMAP3430_CM_SLEEPDEP                            CM_CLKSEL2
-#define OMAP3430_CM_CLKSEL3                             OMAP2_CM_CLKSTCTRL
-#define OMAP3430_CM_CLKSTST                             0x004c
-#define OMAP3430ES2_CM_CLKSEL4                          0x004c
-#define OMAP3430ES2_CM_CLKSEL5                          0x0050
-#define OMAP3430_CM_CLKSEL2_EMU                         0x0050
-#define OMAP3430_CM_CLKSEL3_EMU                         0x0054
+#ifndef __ASSEMBLER__
 
+#include <linux/io.h>
 
-/* CM_IDLEST bit field values to indicate deasserted IdleReq */
+static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx)
+{
+        return __raw_readl(cm_base + module + idx);
+}
 
-#define OMAP24XX_CM_IDLEST_VAL                          0
-#define OMAP34XX_CM_IDLEST_VAL                          1
+static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx)
+{
+        __raw_writel(val, cm_base + module + idx);
+}
 
+/* Read-modify-write a register in a CM module. Caller must lock */
+static inline u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module,
+                                            s16 idx)
+{
+        u32 v;
 
-/* Clock management domain register get/set */
+        v = omap2_cm_read_mod_reg(module, idx);
+        v &= ~mask;
+        v |= bits;
+        omap2_cm_write_mod_reg(v, module, idx);
 
-#ifndef __ASSEMBLER__
+        return v;
+}
 
-extern u32 omap2_cm_read_mod_reg(s16 module, u16 idx);
-extern void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx);
-extern u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
+/* Read a CM register, AND it, and shift the result down to bit 0 */
+static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
+{
+        u32 v;
 
-extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
-                                      u8 idlest_shift);
-extern u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx);
-extern u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx);
+        v = omap2_cm_read_mod_reg(domain, idx);
+        v &= mask;
+        v >>= __ffs(mask);
 
-extern bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
-extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
+        return v;
+}
 
-extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
-extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
+static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+        return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx);
+}
 
-extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
-extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
+static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+        return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+}
 
-extern void omap2xxx_cm_set_apll54_disable_autoidle(void);
-extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
-extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
-extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
+extern int omap2xxx_cm_apll54_enable(void);
+extern void omap2xxx_cm_apll54_disable(void);
+extern int omap2xxx_cm_apll96_enable(void);
+extern void omap2xxx_cm_apll96_disable(void);
 
 #endif
 
@@ -146,11 +116,4 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
 /* CM_IDLEST_GFX */
 #define OMAP_ST_GFX_MASK                                (1 << 0)
 
-
-/* Function prototypes */
-# ifndef __ASSEMBLER__
-extern void omap3_cm_save_context(void);
-extern void omap3_cm_restore_context(void);
-# endif
-
 #endif
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index 13f56eafef03..058ce3c0873e 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -22,8 +22,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
-
+#include "clockdomain.h"
 #include "cm.h"
 #include "cm33xx.h"
 #include "cm-regbits-34xx.h"
@@ -311,3 +310,58 @@ void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs)
         v &= ~AM33XX_MODULEMODE_MASK;
         am33xx_cm_write_reg(v, inst, clkctrl_offs);
 }
+
+/*
+ * Clockdomain low-level functions
+ */
+
+static int am33xx_clkdm_sleep(struct clockdomain *clkdm)
+{
+        am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs);
+        return 0;
+}
+
+static int am33xx_clkdm_wakeup(struct clockdomain *clkdm)
+{
+        am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs);
+        return 0;
+}
+
+static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm)
+{
+        am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
+}
+
+static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm)
+{
+        am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
+}
+
+static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm)
+{
+        if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+                return am33xx_clkdm_wakeup(clkdm);
+
+        return 0;
+}
+
+static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
+
+        hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
+
+        if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
+                am33xx_clkdm_sleep(clkdm);
+
+        return 0;
+}
+
+struct clkdm_ops am33xx_clkdm_operations = {
+        .clkdm_sleep            = am33xx_clkdm_sleep,
+        .clkdm_wakeup           = am33xx_clkdm_wakeup,
+        .clkdm_allow_idle       = am33xx_clkdm_allow_idle,
+        .clkdm_deny_idle        = am33xx_clkdm_deny_idle,
+        .clkdm_clk_enable       = am33xx_clkdm_clk_enable,
+        .clkdm_clk_disable      = am33xx_clkdm_clk_disable,
+};
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index 7f07ab02a5b3..c2086f2e86b6 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -1,8 +1,10 @@
 /*
- * OMAP2/3 CM module functions
+ * OMAP3xxx CM module functions
  *
  * Copyright (C) 2009 Nokia Corporation
+ * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc.
  * Paul Walmsley
+ * Rajendra Nayak <rnayak@ti.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -12,8 +14,6 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/io.h>
@@ -21,56 +21,16 @@
 #include "soc.h"
 #include "iomap.h"
 #include "common.h"
+#include "prm2xxx_3xxx.h"
 #include "cm.h"
-#include "cm2xxx_3xxx.h"
-#include "cm-regbits-24xx.h"
+#include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
+#include "clockdomain.h"
 
-/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */
-#define DPLL_AUTOIDLE_DISABLE                           0x0
-#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP           0x3
-
-/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */
-#define OMAP2XXX_APLL_AUTOIDLE_DISABLE                  0x0
-#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP           0x3
-
-static const u8 cm_idlest_offs[] = {
-        CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4
+static const u8 omap3xxx_cm_idlest_offs[] = {
+        CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
 };
 
-u32 omap2_cm_read_mod_reg(s16 module, u16 idx)
-{
-        return __raw_readl(cm_base + module + idx);
-}
-
-void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx)
-{
-        __raw_writel(val, cm_base + module + idx);
-}
-
-/* Read-modify-write a register in a CM module. Caller must lock */
-u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
-{
-        u32 v;
-
-        v = omap2_cm_read_mod_reg(module, idx);
-        v &= ~mask;
-        v |= bits;
-        omap2_cm_write_mod_reg(v, module, idx);
-
-        return v;
-}
-
-u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
-{
-        return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx);
-}
-
-u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
-{
-        return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
-}
-
 /*
  *
  */
@@ -85,33 +45,15 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
         omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
 }
 
-bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
 {
         u32 v;
-        bool ret = 0;
-
-        BUG_ON(!cpu_is_omap24xx() && !cpu_is_omap34xx());
 
         v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL);
         v &= mask;
         v >>= __ffs(mask);
 
-        if (cpu_is_omap24xx())
-                ret = (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
-        else
-                ret = (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
-
-        return ret;
-}
-
-void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
-{
-        _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
-}
-
-void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
-{
-        _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
+        return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
 }
 
 void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
@@ -135,109 +77,247 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask)
 }
 
 /*
- * DPLL autoidle control
+ *
  */
 
-static void _omap2xxx_set_dpll_autoidle(u8 m)
+/**
+ * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset
+ * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
+ * success or -EBUSY if the module doesn't enable in time.
+ */
+int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
 {
-        u32 v;
+        int ena = 0, i = 0;
+        u8 cm_idlest_reg;
+        u32 mask;
 
-        v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
-        v &= ~OMAP24XX_AUTO_DPLL_MASK;
-        v |= m << OMAP24XX_AUTO_DPLL_SHIFT;
-        omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
-}
+        if (!idlest_id || (idlest_id > ARRAY_SIZE(omap3xxx_cm_idlest_offs)))
+                return -EINVAL;
 
-void omap2xxx_cm_set_dpll_disable_autoidle(void)
-{
-        _omap2xxx_set_dpll_autoidle(OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP);
+        cm_idlest_reg = omap3xxx_cm_idlest_offs[idlest_id - 1];
+
+        mask = 1 << idlest_shift;
+        ena = 0;
+
+        omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) &
+                            mask) == ena), MAX_MODULE_READY_TIME, i);
+
+        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
 }
 
-void omap2xxx_cm_set_dpll_auto_low_power_stop(void)
+/**
+ * omap3xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * XXX This function is only needed until absolute register addresses are
+ * removed from the OMAP struct clk records.
+ */
+int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+                                 u8 *idlest_reg_id)
 {
-        _omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE);
+        unsigned long offs;
+        u8 idlest_offs;
+        int i;
+
+        if (idlest_reg < (cm_base + OMAP3430_IVA2_MOD) ||
+            idlest_reg > (cm_base + 0x1ffff))
+                return -EINVAL;
+
+        idlest_offs = (unsigned long)idlest_reg & 0xff;
+        for (i = 0; i < ARRAY_SIZE(omap3xxx_cm_idlest_offs); i++) {
+                if (idlest_offs == omap3xxx_cm_idlest_offs[i]) {
+                        *idlest_reg_id = i + 1;
+                        break;
+                }
+        }
+
+        if (i == ARRAY_SIZE(omap3xxx_cm_idlest_offs))
+                return -EINVAL;
+
+        offs = idlest_reg - cm_base;
+        offs &= 0xff00;
+        *prcm_inst = offs;
+
+        return 0;
 }
 
-/*
- * APLL autoidle control
- */
+/* Clockdomain low-level operations */
 
-static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask)
+static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1,
+                                       struct clockdomain *clkdm2)
 {
-        u32 v;
+        omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit),
+                                  clkdm1->pwrdm.ptr->prcm_offs,
+                                  OMAP3430_CM_SLEEPDEP);
+        return 0;
+}
 
-        v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
-        v &= ~mask;
-        v |= m << __ffs(mask);
-        omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
+static int omap3xxx_clkdm_del_sleepdep(struct clockdomain *clkdm1,
+                                       struct clockdomain *clkdm2)
+{
+        omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
+                                    clkdm1->pwrdm.ptr->prcm_offs,
+                                    OMAP3430_CM_SLEEPDEP);
+        return 0;
 }
 
-void omap2xxx_cm_set_apll54_disable_autoidle(void)
+static int omap3xxx_clkdm_read_sleepdep(struct clockdomain *clkdm1,
+                                        struct clockdomain *clkdm2)
 {
-        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
-                                    OMAP24XX_AUTO_54M_MASK);
+        return omap2_cm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
+                                            OMAP3430_CM_SLEEPDEP,
+                                            (1 << clkdm2->dep_bit));
 }
 
-void omap2xxx_cm_set_apll54_auto_low_power_stop(void)
+static int omap3xxx_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
 {
-        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
-                                    OMAP24XX_AUTO_54M_MASK);
+        struct clkdm_dep *cd;
+        u32 mask = 0;
+
+        for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) {
+                if (!cd->clkdm)
+                        continue; /* only happens if data is erroneous */
+
+                mask |= 1 << cd->clkdm->dep_bit;
+                atomic_set(&cd->sleepdep_usecount, 0);
+        }
+        omap2_cm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
+                                    OMAP3430_CM_SLEEPDEP);
+        return 0;
 }
 
-void omap2xxx_cm_set_apll96_disable_autoidle(void)
+static int omap3xxx_clkdm_sleep(struct clockdomain *clkdm)
 {
-        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
-                                    OMAP24XX_AUTO_96M_MASK);
+        omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs,
+                                      clkdm->clktrctrl_mask);
+        return 0;
 }
 
-void omap2xxx_cm_set_apll96_auto_low_power_stop(void)
+static int omap3xxx_clkdm_wakeup(struct clockdomain *clkdm)
 {
-        _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
-                                    OMAP24XX_AUTO_96M_MASK);
+        omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs,
+                                       clkdm->clktrctrl_mask);
+        return 0;
 }
 
-/*
- *
- */
+static void omap3xxx_clkdm_allow_idle(struct clockdomain *clkdm)
+{
+        if (atomic_read(&clkdm->usecount) > 0)
+                _clkdm_add_autodeps(clkdm);
 
-/**
- * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
- * @prcm_mod: PRCM module offset
- * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
- * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
- *
- * XXX document
- */
-int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+        omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                       clkdm->clktrctrl_mask);
+}
+
+static void omap3xxx_clkdm_deny_idle(struct clockdomain *clkdm)
 {
-        int ena = 0, i = 0;
-        u8 cm_idlest_reg;
-        u32 mask;
+        omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                        clkdm->clktrctrl_mask);
 
-        if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
-                return -EINVAL;
+        if (atomic_read(&clkdm->usecount) > 0)
+                _clkdm_del_autodeps(clkdm);
+}
 
-        cm_idlest_reg = cm_idlest_offs[idlest_id - 1];
+static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
 
-        mask = 1 << idlest_shift;
+        if (!clkdm->clktrctrl_mask)
+                return 0;
 
-        if (cpu_is_omap24xx())
-                ena = mask;
-        else if (cpu_is_omap34xx())
-                ena = 0;
-        else
-                BUG();
+        /*
+         * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
+         * more details on the unpleasant problem this is working
+         * around
+         */
+        if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) &&
+            (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) {
+                omap3xxx_clkdm_wakeup(clkdm);
+                return 0;
+        }
+
+        hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                              clkdm->clktrctrl_mask);
+
+        if (hwsup) {
+                /* Disable HW transitions when we are changing deps */
+                omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                                clkdm->clktrctrl_mask);
+                _clkdm_add_autodeps(clkdm);
+                omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                               clkdm->clktrctrl_mask);
+        } else {
+                if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+                        omap3xxx_clkdm_wakeup(clkdm);
+        }
+
+        return 0;
+}
 
-        omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena),
-                          MAX_MODULE_READY_TIME, i);
+static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
 
-        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+        if (!clkdm->clktrctrl_mask)
+                return 0;
+
+        /*
+         * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
+         * more details on the unpleasant problem this is working
+         * around
+         */
+        if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
+            !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
+                omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                               clkdm->clktrctrl_mask);
+                return 0;
+        }
+
+        hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                              clkdm->clktrctrl_mask);
+
+        if (hwsup) {
+                /* Disable HW transitions when we are changing deps */
+                omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                                clkdm->clktrctrl_mask);
+                _clkdm_del_autodeps(clkdm);
+                omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                               clkdm->clktrctrl_mask);
+        } else {
+                if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
+                        omap3xxx_clkdm_sleep(clkdm);
+        }
+
+        return 0;
 }
 
+struct clkdm_ops omap3_clkdm_operations = {
+        .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
+        .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
+        .clkdm_read_wkdep       = omap2_clkdm_read_wkdep,
+        .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps,
+        .clkdm_add_sleepdep     = omap3xxx_clkdm_add_sleepdep,
+        .clkdm_del_sleepdep     = omap3xxx_clkdm_del_sleepdep,
+        .clkdm_read_sleepdep    = omap3xxx_clkdm_read_sleepdep,
+        .clkdm_clear_all_sleepdeps      = omap3xxx_clkdm_clear_all_sleepdeps,
+        .clkdm_sleep            = omap3xxx_clkdm_sleep,
+        .clkdm_wakeup           = omap3xxx_clkdm_wakeup,
+        .clkdm_allow_idle       = omap3xxx_clkdm_allow_idle,
+        .clkdm_deny_idle        = omap3xxx_clkdm_deny_idle,
+        .clkdm_clk_enable       = omap3xxx_clkdm_clk_enable,
+        .clkdm_clk_disable      = omap3xxx_clkdm_clk_disable,
+};
+
 /*
  * Context save/restore code - OMAP3 only
  */
-#ifdef CONFIG_ARCH_OMAP3
 struct omap3_cm_regs {
         u32 iva2_cm_clksel1;
         u32 iva2_cm_clksel2;
@@ -555,4 +635,31 @@ void omap3_cm_restore_context(void)
         omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
                                OMAP3_CM_CLKOUT_CTRL_OFFSET);
 }
-#endif
+
+/*
+ *
+ */
+
+static struct cm_ll_data omap3xxx_cm_ll_data = {
+        .split_idlest_reg       = &omap3xxx_cm_split_idlest_reg,
+        .wait_module_ready      = &omap3xxx_cm_wait_module_ready,
+};
+
+int __init omap3xxx_cm_init(void)
+{
+        if (!cpu_is_omap34xx())
+                return 0;
+
+        return cm_register(&omap3xxx_cm_ll_data);
+}
+
+static void __exit omap3xxx_cm_exit(void)
+{
+        if (!cpu_is_omap34xx())
+                return;
+
+        /* Should never happen */
+        WARN(cm_unregister(&omap3xxx_cm_ll_data),
+             "%s: cm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap3xxx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
new file mode 100644
index 000000000000..e8e146f4a43f
--- /dev/null
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -0,0 +1,91 @@
+/*
+ * OMAP2/3 Clock Management (CM) register definitions
+ *
+ * Copyright (C) 2007-2009 Texas Instruments, Inc.
+ * Copyright (C) 2007-2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * The CM hardware modules on the OMAP2/3 are quite similar to each
+ * other.  The CM modules/instances on OMAP4 are quite different, so
+ * they are handled in a separate file.
+ */
+#ifndef __ARCH_ASM_MACH_OMAP2_CM3XXX_H
+#define __ARCH_ASM_MACH_OMAP2_CM3XXX_H
+
+#include "prcm-common.h"
+#include "cm2xxx_3xxx.h"
+
+#define OMAP34XX_CM_REGADDR(module, reg)                                \
+                        OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
+
+
+/*
+ * OMAP3-specific global CM registers
+ * Use cm_{read,write}_reg() with these registers.
+ * These registers appear once per CM module.
+ */
+
+#define OMAP3430_CM_REVISION            OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000)
+#define OMAP3430_CM_SYSCONFIG           OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010)
+#define OMAP3430_CM_POLCTRL             OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c)
+
+#define OMAP3_CM_CLKOUT_CTRL_OFFSET     0x0070
+#define OMAP3430_CM_CLKOUT_CTRL         OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
+
+/*
+ * Module specific CM register offsets from CM_BASE + domain offset
+ * Use cm_{read,write}_mod_reg() with these registers.
+ * These register offsets generally appear in more than one PRCM submodule.
+ */
+
+/* OMAP3-specific register offsets */
+
+#define OMAP3430_CM_CLKEN_PLL                           0x0004
+#define OMAP3430ES2_CM_CLKEN2                           0x0004
+#define OMAP3430ES2_CM_FCLKEN3                          0x0008
+#define OMAP3430_CM_IDLEST_PLL                          CM_IDLEST2
+#define OMAP3430_CM_AUTOIDLE_PLL                        CM_AUTOIDLE2
+#define OMAP3430ES2_CM_AUTOIDLE2_PLL                    CM_AUTOIDLE2
+#define OMAP3430_CM_CLKSEL1                             CM_CLKSEL
+#define OMAP3430_CM_CLKSEL1_PLL                         CM_CLKSEL
+#define OMAP3430_CM_CLKSEL2_PLL                         CM_CLKSEL2
+#define OMAP3430_CM_SLEEPDEP                            CM_CLKSEL2
+#define OMAP3430_CM_CLKSEL3                             OMAP2_CM_CLKSTCTRL
+#define OMAP3430_CM_CLKSTST                             0x004c
+#define OMAP3430ES2_CM_CLKSEL4                          0x004c
+#define OMAP3430ES2_CM_CLKSEL5                          0x0050
+#define OMAP3430_CM_CLKSEL2_EMU                         0x0050
+#define OMAP3430_CM_CLKSEL3_EMU                         0x0054
+
+
+/* CM_IDLEST bit field values to indicate deasserted IdleReq */
+
+#define OMAP34XX_CM_IDLEST_VAL                          1
+
+
+#ifndef __ASSEMBLER__
+
+extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
+extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
+extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask);
+extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
+
+extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
+extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
+                                         u8 idlest_shift);
+
+extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+                                        s16 *prcm_inst, u8 *idlest_reg_id);
+
+extern void omap3_cm_save_context(void);
+extern void omap3_cm_restore_context(void);
+
+extern int __init omap3xxx_cm_init(void);
+
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
new file mode 100644
index 000000000000..40b3b5a84458
--- /dev/null
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -0,0 +1,140 @@
+/*
+ * OMAP2+ common Clock Management (CM) IP block functions
+ *
+ * Copyright (C) 2012 Texas Instruments, Inc.
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX This code should eventually be moved to a CM driver.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+
+#include "cm2xxx.h"
+#include "cm3xxx.h"
+#include "cm44xx.h"
+#include "common.h"
+
+/*
+ * cm_ll_data: function pointers to SoC-specific implementations of
+ * common CM functions
+ */
+static struct cm_ll_data null_cm_ll_data;
+static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
+
+/* cm_base: base virtual address of the CM IP block */
+void __iomem *cm_base;
+
+/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
+void __iomem *cm2_base;
+
+/**
+ * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
+ * @cm: CM base virtual address
+ * @cm2: CM2 base virtual address (if present on the booted SoC)
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
+{
+        cm_base = cm;
+        cm2_base = cm2;
+}
+
+/**
+ * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
+ * @idlest_reg: CM_IDLEST* virtual address
+ * @prcm_inst: pointer to an s16 to return the PRCM instance offset
+ * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
+ *
+ * Given an absolute CM_IDLEST register address @idlest_reg, passes
+ * the PRCM instance offset and IDLEST register ID back to the caller
+ * via the @prcm_inst and @idlest_reg_id.  Returns -EINVAL upon error,
+ * or 0 upon success.  XXX This function is only needed until absolute
+ * register addresses are removed from the OMAP struct clk records.
+ */
+int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
+                        u8 *idlest_reg_id)
+{
+        if (!cm_ll_data->split_idlest_reg) {
+                WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+                          __func__);
+                return -EINVAL;
+        }
+
+        return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
+                                           idlest_reg_id);
+}
+
+/**
+ * cm_wait_module_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset
+ * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
+ * success, -EBUSY if the module doesn't enable in time, or -EINVAL if
+ * no per-SoC wait_module_ready() function pointer has been registered
+ * or if the idlest register is unknown on the SoC.
+ */
+int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+{
+        if (!cm_ll_data->wait_module_ready) {
+                WARN_ONCE(1, "cm: %s: no low-level function defined\n",
+                          __func__);
+                return -EINVAL;
+        }
+
+        return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift);
+}
+
+/**
+ * cm_register - register per-SoC low-level data with the CM
+ * @cld: low-level per-SoC OMAP CM data & function pointers to register
+ *
+ * Register per-SoC low-level OMAP CM data and function pointers with
+ * the OMAP CM common interface.  The caller must keep the data
+ * pointed to by @cld valid until it calls cm_unregister() and
+ * it returns successfully.  Returns 0 upon success, -EINVAL if @cld
+ * is NULL, or -EEXIST if cm_register() has already been called
+ * without an intervening cm_unregister().
+ */
+int cm_register(struct cm_ll_data *cld)
+{
+        if (!cld)
+                return -EINVAL;
+
+        if (cm_ll_data != &null_cm_ll_data)
+                return -EEXIST;
+
+        cm_ll_data = cld;
+
+        return 0;
+}
+
+/**
+ * cm_unregister - unregister per-SoC low-level data & function pointers
+ * @cld: low-level per-SoC OMAP CM data & function pointers to unregister
+ *
+ * Unregister per-SoC low-level OMAP CM data and function pointers
+ * that were previously registered with cm_register().  The
+ * caller may not destroy any of the data pointed to by @cld until
+ * this function returns successfully.  Returns 0 upon success, or
+ * -EINVAL if @cld is NULL or if @cld does not match the struct
+ * cm_ll_data * previously registered by cm_register().
+ */
+int cm_unregister(struct cm_ll_data *cld)
+{
+        if (!cld || cm_ll_data != cld)
+                return -EINVAL;
+
+        cm_ll_data = &null_cm_ll_data;
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 1894015ff04b..7f9a464f01e9 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -2,8 +2,9 @@
  * OMAP4 CM instance functions
  *
  * Copyright (C) 2009 Nokia Corporation
- * Copyright (C) 2011 Texas Instruments, Inc.
+ * Copyright (C) 2008-2011 Texas Instruments, Inc.
  * Paul Walmsley
+ * Rajendra Nayak <rnayak@ti.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -22,6 +23,7 @@
 
 #include "iomap.h"
 #include "common.h"
+#include "clockdomain.h"
 #include "cm.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
@@ -343,3 +345,141 @@ void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
         v &= ~OMAP4430_MODULEMODE_MASK;
         omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs);
 }
+
+/*
+ * Clockdomain low-level functions
+ */
+
+static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1,
+                                        struct clockdomain *clkdm2)
+{
+        omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit),
+                                       clkdm1->prcm_partition,
+                                       clkdm1->cm_inst, clkdm1->clkdm_offs +
+                                       OMAP4_CM_STATICDEP);
+        return 0;
+}
+
+static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1,
+                                        struct clockdomain *clkdm2)
+{
+        omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit),
+                                         clkdm1->prcm_partition,
+                                         clkdm1->cm_inst, clkdm1->clkdm_offs +
+                                         OMAP4_CM_STATICDEP);
+        return 0;
+}
+
+static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1,
+                                        struct clockdomain *clkdm2)
+{
+        return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition,
+                                               clkdm1->cm_inst,
+                                               clkdm1->clkdm_offs +
+                                               OMAP4_CM_STATICDEP,
+                                               (1 << clkdm2->dep_bit));
+}
+
+static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
+{
+        struct clkdm_dep *cd;
+        u32 mask = 0;
+
+        if (!clkdm->prcm_partition)
+                return 0;
+
+        for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
+                if (!cd->clkdm)
+                        continue; /* only happens if data is erroneous */
+
+                mask |= 1 << cd->clkdm->dep_bit;
+                atomic_set(&cd->wkdep_usecount, 0);
+        }
+
+        omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition,
+                                         clkdm->cm_inst, clkdm->clkdm_offs +
+                                         OMAP4_CM_STATICDEP);
+        return 0;
+}
+
+static int omap4_clkdm_sleep(struct clockdomain *clkdm)
+{
+        omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
+                                        clkdm->cm_inst, clkdm->clkdm_offs);
+        return 0;
+}
+
+static int omap4_clkdm_wakeup(struct clockdomain *clkdm)
+{
+        omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition,
+                                        clkdm->cm_inst, clkdm->clkdm_offs);
+        return 0;
+}
+
+static void omap4_clkdm_allow_idle(struct clockdomain *clkdm)
+{
+        omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
+                                        clkdm->cm_inst, clkdm->clkdm_offs);
+}
+
+static void omap4_clkdm_deny_idle(struct clockdomain *clkdm)
+{
+        if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+                omap4_clkdm_wakeup(clkdm);
+        else
+                omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
+                                                 clkdm->cm_inst,
+                                                 clkdm->clkdm_offs);
+}
+
+static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)
+{
+        if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+                return omap4_clkdm_wakeup(clkdm);
+
+        return 0;
+}
+
+static int omap4_clkdm_clk_disable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
+
+        if (!clkdm->prcm_partition)
+                return 0;
+
+        /*
+         * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
+         * more details on the unpleasant problem this is working
+         * around
+         */
+        if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
+            !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
+                omap4_clkdm_allow_idle(clkdm);
+                return 0;
+        }
+
+        hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
+                                        clkdm->cm_inst, clkdm->clkdm_offs);
+
+        if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
+                omap4_clkdm_sleep(clkdm);
+
+        return 0;
+}
+
+struct clkdm_ops omap4_clkdm_operations = {
+        .clkdm_add_wkdep        = omap4_clkdm_add_wkup_sleep_dep,
+        .clkdm_del_wkdep        = omap4_clkdm_del_wkup_sleep_dep,
+        .clkdm_read_wkdep       = omap4_clkdm_read_wkup_sleep_dep,
+        .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps,
+        .clkdm_add_sleepdep     = omap4_clkdm_add_wkup_sleep_dep,
+        .clkdm_del_sleepdep     = omap4_clkdm_del_wkup_sleep_dep,
+        .clkdm_read_sleepdep    = omap4_clkdm_read_wkup_sleep_dep,
+        .clkdm_clear_all_sleepdeps      = omap4_clkdm_clear_all_wkup_sleep_deps,
+        .clkdm_sleep            = omap4_clkdm_sleep,
+        .clkdm_wakeup           = omap4_clkdm_wakeup,
+        .clkdm_allow_idle       = omap4_clkdm_allow_idle,
+        .clkdm_deny_idle        = omap4_clkdm_deny_idle,
+        .clkdm_clk_enable       = omap4_clkdm_clk_enable,
+        .clkdm_clk_disable      = omap4_clkdm_clk_disable,
+};
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index d69fdefef985..bd7bab889745 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -38,4 +38,6 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst,
 extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
                                            u32 mask);
 
+extern void omap_cm_base_init(void);
+
 #endif
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 84551f205e46..d246efd9f734 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -25,7 +25,6 @@
 #include <linux/spi/ads7846.h>
 
 #include <linux/platform_data/spi-omap2-mcspi.h>
-#include <linux/platform_data/mtd-nand-omap2.h>
 
 #include "common.h"
 #include "common-board-devices.h"
@@ -102,48 +101,3 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
 {
 }
 #endif
-
-#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-static struct omap_nand_platform_data nand_data;
-
-void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
-                                 int nr_parts)
-{
-        u8 cs = 0;
-        u8 nandcs = GPMC_CS_NUM + 1;
-
-        /* find out the chip-select on which NAND exists */
-        while (cs < GPMC_CS_NUM) {
-                u32 ret = 0;
-                ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
-
-                if ((ret & 0xC00) == 0x800) {
-                        printk(KERN_INFO "Found NAND on CS%d\n", cs);
-                        if (nandcs > GPMC_CS_NUM)
-                                nandcs = cs;
-                }
-                cs++;
-        }
-
-        if (nandcs > GPMC_CS_NUM) {
-                pr_info("NAND: Unable to find configuration in GPMC\n");
-                return;
-        }
-
-        if (nandcs < GPMC_CS_NUM) {
-                nand_data.cs = nandcs;
-                nand_data.parts = parts;
-                nand_data.nr_parts = nr_parts;
-                nand_data.devsize = options;
-
-                printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
-                if (gpmc_nand_init(&nand_data) < 0)
-                        printk(KERN_ERR "Unable to register NAND device\n");
-        }
-}
-#else
-void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
-                                 int nr_parts)
-{
-}
-#endif
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index a0b4a42836ab..72bb41b3fd25 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -10,6 +10,5 @@ struct ads7846_platform_data;
 
 void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
                        struct ads7846_platform_data *board_pdata);
-void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts);
 
 #endif /* __OMAP_COMMON_BOARD_DEVICES__ */
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 17950c6e130b..5c2fd4863b2b 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -14,189 +14,26 @@
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
+#include <linux/platform_data/dsp-omap.h>
 
-#include <plat/clock.h>
+#include <plat/vram.h>
 
-#include "soc.h"
-#include "iomap.h"
 #include "common.h"
-#include "sdrc.h"
-#include "control.h"
-
-/* Global address base setup code */
-
-static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
-{
-        omap2_set_globals_tap(omap2_globals);
-        omap2_set_globals_sdrc(omap2_globals);
-        omap2_set_globals_control(omap2_globals);
-        omap2_set_globals_prcm(omap2_globals);
-}
-
-#if defined(CONFIG_SOC_OMAP2420)
-
-static struct omap_globals omap242x_globals = {
-        .class  = OMAP242X_CLASS,
-        .tap    = OMAP2_L4_IO_ADDRESS(0x48014000),
-        .sdrc   = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
-        .sms    = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
-        .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
-        .prm    = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
-        .cm     = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
-};
-
-void __init omap2_set_globals_242x(void)
-{
-        __omap2_set_globals(&omap242x_globals);
-}
-
-void __init omap242x_map_io(void)
-{
-        omap242x_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_SOC_OMAP2430)
-
-static struct omap_globals omap243x_globals = {
-        .class  = OMAP243X_CLASS,
-        .tap    = OMAP2_L4_IO_ADDRESS(0x4900a000),
-        .sdrc   = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
-        .sms    = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
-        .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
-        .prm    = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
-        .cm     = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
-};
-
-void __init omap2_set_globals_243x(void)
-{
-        __omap2_set_globals(&omap243x_globals);
-}
-
-void __init omap243x_map_io(void)
-{
-        omap243x_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_ARCH_OMAP3)
-
-static struct omap_globals omap3_globals = {
-        .class  = OMAP343X_CLASS,
-        .tap    = OMAP2_L4_IO_ADDRESS(0x4830A000),
-        .sdrc   = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
-        .sms    = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
-        .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
-        .prm    = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
-        .cm     = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
-};
-
-void __init omap2_set_globals_3xxx(void)
-{
-        __omap2_set_globals(&omap3_globals);
-}
-
-void __init omap3_map_io(void)
-{
-        omap34xx_map_common_io();
-}
+#include "omap-secure.h"
 
 /*
- * Adjust TAP register base such that omap3_check_revision accesses the correct
- * TI81XX register for checking device ID (it adds 0x204 to tap base while
- * TI81XX DEVICE ID register is at offset 0x600 from control base).
+ * Stub function for OMAP2 so that common files
+ * continue to build when custom builds are used
  */
-#define TI81XX_TAP_BASE         (TI81XX_CTRL_BASE + \
-                                TI81XX_CONTROL_DEVICE_ID - 0x204)
-
-static struct omap_globals ti81xx_globals = {
-        .class  = OMAP343X_CLASS,
-        .tap    = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE),
-        .ctrl   = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
-        .prm    = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
-        .cm     = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE),
-};
-
-void __init omap2_set_globals_ti81xx(void)
-{
-        __omap2_set_globals(&ti81xx_globals);
-}
-
-void __init ti81xx_map_io(void)
-{
-        omapti81xx_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_SOC_AM33XX)
-#define AM33XX_TAP_BASE         (AM33XX_CTRL_BASE + \
-                                TI81XX_CONTROL_DEVICE_ID - 0x204)
-
-static struct omap_globals am33xx_globals = {
-        .class  = AM335X_CLASS,
-        .tap    = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE),
-        .ctrl   = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
-        .prm    = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
-        .cm     = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE),
-};
-
-void __init omap2_set_globals_am33xx(void)
-{
-        __omap2_set_globals(&am33xx_globals);
-}
-
-void __init am33xx_map_io(void)
-{
-        omapam33xx_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_ARCH_OMAP4)
-static struct omap_globals omap4_globals = {
-        .class  = OMAP443X_CLASS,
-        .tap    = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
-        .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
-        .ctrl_pad       = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
-        .prm    = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
-        .cm     = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
-        .cm2    = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
-        .prcm_mpu       = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE),
-};
-
-void __init omap2_set_globals_443x(void)
-{
-        __omap2_set_globals(&omap4_globals);
-}
-
-void __init omap4_map_io(void)
-{
-        omap44xx_map_common_io();
-}
-#endif
-
-#if defined(CONFIG_SOC_OMAP5)
-static struct omap_globals omap5_globals = {
-        .class  = OMAP54XX_CLASS,
-        .tap    = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
-        .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
-        .ctrl_pad       = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE),
-        .prm    = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE),
-        .cm     = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
-        .cm2    = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE),
-        .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE),
-};
-
-void __init omap2_set_globals_5xxx(void)
+int __weak omap_secure_ram_reserve_memblock(void)
 {
-        omap2_set_globals_tap(&omap5_globals);
-        omap2_set_globals_control(&omap5_globals);
-        omap2_set_globals_prcm(&omap5_globals);
+        return 0;
 }
 
-void __init omap5_map_io(void)
+void __init omap_reserve(void)
 {
-        omap5_map_common_io();
+        omap_vram_reserve_sdram_memblock();
+        omap_dsp_reserve_sdram_memblock();
+        omap_secure_ram_reserve_memblock();
+        omap_barrier_reserve_memblock();
 }
-#endif
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 7045e4d61ac3..3bbcde87dead 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -28,63 +28,18 @@
 
 #include <linux/irq.h>
 #include <linux/delay.h>
+#include <linux/i2c.h>
 #include <linux/i2c/twl.h>
+#include <linux/i2c-omap.h>
 
 #include <asm/proc-fns.h>
 
-#include <plat/cpu.h>
-#include <plat/serial.h>
-#include <plat/common.h>
+#include "i2c.h"
+#include "serial.h"
 
-#define OMAP_INTC_START         NR_IRQS
-
-#ifdef CONFIG_SOC_OMAP2420
-extern void omap242x_map_common_io(void);
-#else
-static inline void omap242x_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-extern void omap243x_map_common_io(void);
-#else
-static inline void omap243x_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-extern void omap34xx_map_common_io(void);
-#else
-static inline void omap34xx_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_SOC_TI81XX
-extern void omapti81xx_map_common_io(void);
-#else
-static inline void omapti81xx_map_common_io(void)
-{
-}
-#endif
+#include "usb.h"
 
-#ifdef CONFIG_SOC_AM33XX
-extern void omapam33xx_map_common_io(void);
-#else
-static inline void omapam33xx_map_common_io(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-extern void omap44xx_map_common_io(void);
-#else
-static inline void omap44xx_map_common_io(void)
-{
-}
-#endif
+#define OMAP_INTC_START         NR_IRQS
 
 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
 int omap2_pm_init(void);
@@ -122,19 +77,12 @@ static inline int omap_mux_late_init(void)
 }
 #endif
 
-#ifdef CONFIG_SOC_OMAP5
-extern void omap5_map_common_io(void);
-#else
-static inline void omap5_map_common_io(void)
-{
-}
-#endif
-
 extern void omap2_init_common_infrastructure(void);
 
 extern struct sys_timer omap2_timer;
 extern struct sys_timer omap3_timer;
 extern struct sys_timer omap3_secure_timer;
+extern struct sys_timer omap3_gp_timer;
 extern struct sys_timer omap3_am33xx_timer;
 extern struct sys_timer omap4_timer;
 extern struct sys_timer omap5_timer;
@@ -162,52 +110,43 @@ void am35xx_init_late(void);
 void ti81xx_init_late(void);
 void omap4430_init_late(void);
 int omap2_common_pm_late_init(void);
-void omap_prcm_restart(char, const char *);
 
-/*
- * IO bases for various OMAP processors
- * Except the tap base, rest all the io bases
- * listed are physical addresses.
- */
-struct omap_globals {
-        u32             class;          /* OMAP class to detect */
-        void __iomem    *tap;           /* Control module ID code */
-        void __iomem    *sdrc;           /* SDRAM Controller */
-        void __iomem    *sms;            /* SDRAM Memory Scheduler */
-        void __iomem    *ctrl;           /* System Control Module */
-        void __iomem    *ctrl_pad;      /* PAD Control Module */
-        void __iomem    *prm;            /* Power and Reset Management */
-        void __iomem    *cm;             /* Clock Management */
-        void __iomem    *cm2;
-        void __iomem    *prcm_mpu;
-};
-
-void omap2_set_globals_242x(void);
-void omap2_set_globals_243x(void);
-void omap2_set_globals_3xxx(void);
-void omap2_set_globals_443x(void);
-void omap2_set_globals_5xxx(void);
-void omap2_set_globals_ti81xx(void);
-void omap2_set_globals_am33xx(void);
-
-/* These get called from omap2_set_globals_xxxx(), do not call these */
-void omap2_set_globals_tap(struct omap_globals *);
-#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
-void omap2_set_globals_sdrc(struct omap_globals *);
+#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
+void omap2xxx_restart(char mode, const char *cmd);
+#else
+static inline void omap2xxx_restart(char mode, const char *cmd)
+{
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+void omap3xxx_restart(char mode, const char *cmd);
+#else
+static inline void omap3xxx_restart(char mode, const char *cmd)
+{
+}
+#endif
+
+#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
+void omap44xx_restart(char mode, const char *cmd);
 #else
-static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
-{ }
+static inline void omap44xx_restart(char mode, const char *cmd)
+{
+}
 #endif
-void omap2_set_globals_control(struct omap_globals *);
-void omap2_set_globals_prcm(struct omap_globals *);
-
-void omap242x_map_io(void);
-void omap243x_map_io(void);
-void omap3_map_io(void);
-void am33xx_map_io(void);
-void omap4_map_io(void);
-void omap5_map_io(void);
-void ti81xx_map_io(void);
+
+/* This gets called from mach-omap2/io.c, do not call this */
+void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
+
+void __init omap242x_map_io(void);
+void __init omap243x_map_io(void);
+void __init omap3_map_io(void);
+void __init am33xx_map_io(void);
+void __init omap4_map_io(void);
+void __init omap5_map_io(void);
+void __init ti81xx_map_io(void);
+
+/* omap_barriers_init() is OMAP4 only */
 void omap_barriers_init(void);
 
 /**
@@ -338,6 +277,10 @@ extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
                                       struct omap_sdrc_params *sdrc_cs1);
 struct omap2_hsmmc_info;
 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
+extern void omap_reserve(void);
+
+struct omap_hwmod;
+extern int omap_dss_reset(struct omap_hwmod *);
 
 #endif /* __ASSEMBLER__ */
 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index d1ff8399a222..2adb2683f074 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -1,7 +1,7 @@
 /*
  * OMAP2/3 System Control Module register access
  *
- * Copyright (C) 2007 Texas Instruments, Inc.
+ * Copyright (C) 2007, 2012 Texas Instruments, Inc.
  * Copyright (C) 2007 Nokia Corporation
  *
  * Written by Paul Walmsley
@@ -15,15 +15,13 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
-#include <plat/sdrc.h>
-
 #include "soc.h"
 #include "iomap.h"
 #include "common.h"
 #include "cm-regbits-34xx.h"
 #include "prm-regbits-34xx.h"
-#include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "prm3xxx.h"
+#include "cm3xxx.h"
 #include "sdrc.h"
 #include "pm.h"
 #include "control.h"
@@ -149,13 +147,11 @@ static struct omap3_control_regs control_context;
 #define OMAP_CTRL_REGADDR(reg)          (omap2_ctrl_base + (reg))
 #define OMAP4_CTRL_PAD_REGADDR(reg)     (omap4_ctrl_pad_base + (reg))
 
-void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
+void __init omap2_set_globals_control(void __iomem *ctrl,
+                                      void __iomem *ctrl_pad)
 {
-        if (omap2_globals->ctrl)
-                omap2_ctrl_base = omap2_globals->ctrl;
-
-        if (omap2_globals->ctrl_pad)
-                omap4_ctrl_pad_base = omap2_globals->ctrl_pad;
+        omap2_ctrl_base = ctrl;
+        omap4_ctrl_pad_base = ctrl_pad;
 }
 
 void __iomem *omap_ctrl_base_get(void)
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index a89e8256fd0e..4ca8747b3cc9 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -414,6 +414,8 @@ extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr);
 extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode);
 extern void omap3630_ctrl_disable_rta(void);
 extern int omap3_ctrl_save_padconf(void);
+extern void omap2_set_globals_control(void __iomem *ctrl,
+                                      void __iomem *ctrl_pad);
 #else
 #define omap_ctrl_base_get()            0
 #define omap_ctrl_readb(x)              0
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index bc2756959be5..bca7a8885703 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -27,7 +27,6 @@
 #include <linux/export.h>
 #include <linux/cpu_pm.h>
 
-#include <plat/prcm.h>
 #include "powerdomain.h"
 #include "clockdomain.h"
 
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c72b5a727720..d2215e9873a5 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -24,10 +24,11 @@
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 
+#include <plat-omap/dma-omap.h>
+
 #include "iomap.h"
-#include <plat/dma.h>
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
+#include "omap_hwmod.h"
+#include "omap_device.h"
 #include "omap4-keypad.h"
 
 #include "soc.h"
@@ -35,6 +36,7 @@
 #include "mux.h"
 #include "control.h"
 #include "devices.h"
+#include "dma.h"
 
 #define L3_MODULES_MAX_LEN 12
 #define L3_MODULES 3
@@ -723,29 +725,3 @@ static int __init omap2_init_devices(void)
         return 0;
 }
 arch_initcall(omap2_init_devices);
-
-#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
-static int __init omap_init_wdt(void)
-{
-        int id = -1;
-        struct platform_device *pdev;
-        struct omap_hwmod *oh;
-        char *oh_name = "wd_timer2";
-        char *dev_name = "omap_wdt";
-
-        if (!cpu_class_is_omap2() || of_have_populated_dt())
-                return 0;
-
-        oh = omap_hwmod_lookup(oh_name);
-        if (!oh) {
-                pr_err("Could not look up wd_timer%d hwmod\n", id);
-                return -EINVAL;
-        }
-
-        pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0);
-        WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
-                                dev_name, oh->name);
-        return 0;
-}
-subsys_initcall(omap_init_wdt);
-#endif
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 1011995f150a..38ba58c97628 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -25,15 +25,17 @@
 #include <linux/delay.h>
 
 #include <video/omapdss.h>
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
-#include <plat/omap-pm.h>
+#include "omap_hwmod.h"
+#include "omap_device.h"
+#include "omap-pm.h"
 #include "common.h"
 
+#include "soc.h"
 #include "iomap.h"
 #include "mux.h"
 #include "control.h"
 #include "display.h"
+#include "prm.h"
 
 #define DISPC_CONTROL           0x0040
 #define DISPC_CONTROL2          0x0238
@@ -284,6 +286,35 @@ err:
         return ERR_PTR(r);
 }
 
+static enum omapdss_version __init omap_display_get_version(void)
+{
+        if (cpu_is_omap24xx())
+                return OMAPDSS_VER_OMAP24xx;
+        else if (cpu_is_omap3630())
+                return OMAPDSS_VER_OMAP3630;
+        else if (cpu_is_omap34xx()) {
+                if (soc_is_am35xx()) {
+                        return OMAPDSS_VER_AM35xx;
+                } else {
+                        if (omap_rev() < OMAP3430_REV_ES3_0)
+                                return OMAPDSS_VER_OMAP34xx_ES1;
+                        else
+                                return OMAPDSS_VER_OMAP34xx_ES3;
+                }
+        } else if (omap_rev() == OMAP4430_REV_ES1_0)
+                return OMAPDSS_VER_OMAP4430_ES1;
+        else if (omap_rev() == OMAP4430_REV_ES2_0 ||
+                        omap_rev() == OMAP4430_REV_ES2_1 ||
+                        omap_rev() == OMAP4430_REV_ES2_2)
+                return OMAPDSS_VER_OMAP4430_ES2;
+        else if (cpu_is_omap44xx())
+                return OMAPDSS_VER_OMAP4;
+        else if (soc_is_omap54xx())
+                return OMAPDSS_VER_OMAP5;
+        else
+                return OMAPDSS_VER_UNKNOWN;
+}
+
 int __init omap_display_init(struct omap_dss_board_info *board_data)
 {
         int r = 0;
@@ -291,9 +322,18 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
         int i, oh_count;
         const struct omap_dss_hwmod_data *curr_dss_hwmod;
         struct platform_device *dss_pdev;
+        enum omapdss_version ver;
 
         /* create omapdss device */
 
+        ver = omap_display_get_version();
+
+        if (ver == OMAPDSS_VER_UNKNOWN) {
+                pr_err("DSS not supported on this SoC\n");
+                return -ENODEV;
+        }
+
+        board_data->version = ver;
         board_data->dsi_enable_pads = omap_dsi_enable_pads;
         board_data->dsi_disable_pads = omap_dsi_disable_pads;
         board_data->get_context_loss_count = omap_pm_get_dev_context_loss_count;
@@ -473,7 +513,6 @@ static void dispc_disable_outputs(void)
         }
 }
 
-#define MAX_MODULE_SOFTRESET_WAIT       10000
 int omap_dss_reset(struct omap_hwmod *oh)
 {
         struct omap_hwmod_opt_clk *oc;
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index ff75abe60af2..e5aba58da5d2 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -28,9 +28,11 @@
 #include <linux/init.h>
 #include <linux/device.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
+
+#include "soc.h"
+#include "omap_hwmod.h"
+#include "omap_device.h"
 
 #define OMAP2_DMA_STRIDE        0x60
 
@@ -274,6 +276,9 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
                 return -ENOMEM;
         }
 
+        if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
+                d->dev_caps |= HS_CHANNELS_RESERVED;
+
         /* Check the capabilities register for descriptor loading feature */
         if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
                 dma_common_ch_end = CCDN;
diff --git a/arch/arm/mach-omap2/dma.h b/arch/arm/mach-omap2/dma.h
new file mode 100644
index 000000000000..eba80dbc5218
--- /dev/null
+++ b/arch/arm/mach-omap2/dma.h
@@ -0,0 +1,131 @@
+/*
+ *  OMAP2PLUS DMA channel definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __OMAP2PLUS_DMA_CHANNEL_H
+#define __OMAP2PLUS_DMA_CHANNEL_H
+
+
+/* DMA channels for 24xx */
+#define OMAP24XX_DMA_NO_DEVICE          0
+#define OMAP24XX_DMA_XTI_DMA            1       /* S_DMA_0 */
+#define OMAP24XX_DMA_EXT_DMAREQ0        2       /* S_DMA_1 */
+#define OMAP24XX_DMA_EXT_DMAREQ1        3       /* S_DMA_2 */
+#define OMAP24XX_DMA_GPMC               4       /* S_DMA_3 */
+#define OMAP24XX_DMA_GFX                5       /* S_DMA_4 */
+#define OMAP24XX_DMA_DSS                6       /* S_DMA_5 */
+#define OMAP242X_DMA_VLYNQ_TX           7       /* S_DMA_6 */
+#define OMAP24XX_DMA_EXT_DMAREQ2        7       /* S_DMA_6 */
+#define OMAP24XX_DMA_CWT                8       /* S_DMA_7 */
+#define OMAP24XX_DMA_AES_TX             9       /* S_DMA_8 */
+#define OMAP24XX_DMA_AES_RX             10      /* S_DMA_9 */
+#define OMAP24XX_DMA_DES_TX             11      /* S_DMA_10 */
+#define OMAP24XX_DMA_DES_RX             12      /* S_DMA_11 */
+#define OMAP24XX_DMA_SHA1MD5_RX         13      /* S_DMA_12 */
+#define OMAP34XX_DMA_SHA2MD5_RX         13      /* S_DMA_12 */
+#define OMAP242X_DMA_EXT_DMAREQ2        14      /* S_DMA_13 */
+#define OMAP242X_DMA_EXT_DMAREQ3        15      /* S_DMA_14 */
+#define OMAP242X_DMA_EXT_DMAREQ4        16      /* S_DMA_15 */
+#define OMAP242X_DMA_EAC_AC_RD          17      /* S_DMA_16 */
+#define OMAP242X_DMA_EAC_AC_WR          18      /* S_DMA_17 */
+#define OMAP242X_DMA_EAC_MD_UL_RD       19      /* S_DMA_18 */
+#define OMAP242X_DMA_EAC_MD_UL_WR       20      /* S_DMA_19 */
+#define OMAP242X_DMA_EAC_MD_DL_RD       21      /* S_DMA_20 */
+#define OMAP242X_DMA_EAC_MD_DL_WR       22      /* S_DMA_21 */
+#define OMAP242X_DMA_EAC_BT_UL_RD       23      /* S_DMA_22 */
+#define OMAP242X_DMA_EAC_BT_UL_WR       24      /* S_DMA_23 */
+#define OMAP242X_DMA_EAC_BT_DL_RD       25      /* S_DMA_24 */
+#define OMAP242X_DMA_EAC_BT_DL_WR       26      /* S_DMA_25 */
+#define OMAP243X_DMA_EXT_DMAREQ3        14      /* S_DMA_13 */
+#define OMAP24XX_DMA_SPI3_TX0           15      /* S_DMA_14 */
+#define OMAP24XX_DMA_SPI3_RX0           16      /* S_DMA_15 */
+#define OMAP24XX_DMA_MCBSP3_TX          17      /* S_DMA_16 */
+#define OMAP24XX_DMA_MCBSP3_RX          18      /* S_DMA_17 */
+#define OMAP24XX_DMA_MCBSP4_TX          19      /* S_DMA_18 */
+#define OMAP24XX_DMA_MCBSP4_RX          20      /* S_DMA_19 */
+#define OMAP24XX_DMA_MCBSP5_TX          21      /* S_DMA_20 */
+#define OMAP24XX_DMA_MCBSP5_RX          22      /* S_DMA_21 */
+#define OMAP24XX_DMA_SPI3_TX1           23      /* S_DMA_22 */
+#define OMAP24XX_DMA_SPI3_RX1           24      /* S_DMA_23 */
+#define OMAP243X_DMA_EXT_DMAREQ4        25      /* S_DMA_24 */
+#define OMAP243X_DMA_EXT_DMAREQ5        26      /* S_DMA_25 */
+#define OMAP34XX_DMA_I2C3_TX            25      /* S_DMA_24 */
+#define OMAP34XX_DMA_I2C3_RX            26      /* S_DMA_25 */
+#define OMAP24XX_DMA_I2C1_TX            27      /* S_DMA_26 */
+#define OMAP24XX_DMA_I2C1_RX            28      /* S_DMA_27 */
+#define OMAP24XX_DMA_I2C2_TX            29      /* S_DMA_28 */
+#define OMAP24XX_DMA_I2C2_RX            30      /* S_DMA_29 */
+#define OMAP24XX_DMA_MCBSP1_TX          31      /* S_DMA_30 */
+#define OMAP24XX_DMA_MCBSP1_RX          32      /* S_DMA_31 */
+#define OMAP24XX_DMA_MCBSP2_TX          33      /* S_DMA_32 */
+#define OMAP24XX_DMA_MCBSP2_RX          34      /* S_DMA_33 */
+#define OMAP24XX_DMA_SPI1_TX0           35      /* S_DMA_34 */
+#define OMAP24XX_DMA_SPI1_RX0           36      /* S_DMA_35 */
+#define OMAP24XX_DMA_SPI1_TX1           37      /* S_DMA_36 */
+#define OMAP24XX_DMA_SPI1_RX1           38      /* S_DMA_37 */
+#define OMAP24XX_DMA_SPI1_TX2           39      /* S_DMA_38 */
+#define OMAP24XX_DMA_SPI1_RX2           40      /* S_DMA_39 */
+#define OMAP24XX_DMA_SPI1_TX3           41      /* S_DMA_40 */
+#define OMAP24XX_DMA_SPI1_RX3           42      /* S_DMA_41 */
+#define OMAP24XX_DMA_SPI2_TX0           43      /* S_DMA_42 */
+#define OMAP24XX_DMA_SPI2_RX0           44      /* S_DMA_43 */
+#define OMAP24XX_DMA_SPI2_TX1           45      /* S_DMA_44 */
+#define OMAP24XX_DMA_SPI2_RX1           46      /* S_DMA_45 */
+#define OMAP24XX_DMA_MMC2_TX            47      /* S_DMA_46 */
+#define OMAP24XX_DMA_MMC2_RX            48      /* S_DMA_47 */
+#define OMAP24XX_DMA_UART1_TX           49      /* S_DMA_48 */
+#define OMAP24XX_DMA_UART1_RX           50      /* S_DMA_49 */
+#define OMAP24XX_DMA_UART2_TX           51      /* S_DMA_50 */
+#define OMAP24XX_DMA_UART2_RX           52      /* S_DMA_51 */
+#define OMAP24XX_DMA_UART3_TX           53      /* S_DMA_52 */
+#define OMAP24XX_DMA_UART3_RX           54      /* S_DMA_53 */
+#define OMAP24XX_DMA_USB_W2FC_TX0       55      /* S_DMA_54 */
+#define OMAP24XX_DMA_USB_W2FC_RX0       56      /* S_DMA_55 */
+#define OMAP24XX_DMA_USB_W2FC_TX1       57      /* S_DMA_56 */
+#define OMAP24XX_DMA_USB_W2FC_RX1       58      /* S_DMA_57 */
+#define OMAP24XX_DMA_USB_W2FC_TX2       59      /* S_DMA_58 */
+#define OMAP24XX_DMA_USB_W2FC_RX2       60      /* S_DMA_59 */
+#define OMAP24XX_DMA_MMC1_TX            61      /* S_DMA_60 */
+#define OMAP24XX_DMA_MMC1_RX            62      /* S_DMA_61 */
+#define OMAP24XX_DMA_MS                 63      /* S_DMA_62 */
+#define OMAP242X_DMA_EXT_DMAREQ5        64      /* S_DMA_63 */
+#define OMAP243X_DMA_EXT_DMAREQ6        64      /* S_DMA_63 */
+#define OMAP34XX_DMA_EXT_DMAREQ3        64      /* S_DMA_63 */
+#define OMAP34XX_DMA_AES2_TX            65      /* S_DMA_64 */
+#define OMAP34XX_DMA_AES2_RX            66      /* S_DMA_65 */
+#define OMAP34XX_DMA_DES2_TX            67      /* S_DMA_66 */
+#define OMAP34XX_DMA_DES2_RX            68      /* S_DMA_67 */
+#define OMAP34XX_DMA_SHA1MD5_RX         69      /* S_DMA_68 */
+#define OMAP34XX_DMA_SPI4_TX0           70      /* S_DMA_69 */
+#define OMAP34XX_DMA_SPI4_RX0           71      /* S_DMA_70 */
+#define OMAP34XX_DSS_DMA0               72      /* S_DMA_71 */
+#define OMAP34XX_DSS_DMA1               73      /* S_DMA_72 */
+#define OMAP34XX_DSS_DMA2               74      /* S_DMA_73 */
+#define OMAP34XX_DSS_DMA3               75      /* S_DMA_74 */
+#define OMAP34XX_DMA_MMC3_TX            77      /* S_DMA_76 */
+#define OMAP34XX_DMA_MMC3_RX            78      /* S_DMA_77 */
+#define OMAP34XX_DMA_USIM_TX            79      /* S_DMA_78 */
+#define OMAP34XX_DMA_USIM_RX            80      /* S_DMA_79 */
+
+#define OMAP36XX_DMA_UART4_TX           81      /* S_DMA_80 */
+#define OMAP36XX_DMA_UART4_RX           82      /* S_DMA_81 */
+
+/* Only for AM35xx */
+#define AM35XX_DMA_UART4_TX             54
+#define AM35XX_DMA_UART4_RX             55
+
+#endif /* __OMAP2PLUS_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 814e1808e158..eacf51f2bc27 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -28,8 +28,6 @@
 #include <linux/bitops.h>
 #include <linux/clkdev.h>
 
-#include <plat/clock.h>
-
 #include "soc.h"
 #include "clock.h"
 #include "cm2xxx_3xxx.h"
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 09d0ccccb861..5854da168a9c 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -15,8 +15,6 @@
 #include <linux/io.h>
 #include <linux/bitops.h>
 
-#include <plat/clock.h>
-
 #include "soc.h"
 #include "clock.h"
 #include "clock44xx.h"
diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c
index 72e0f01b715c..6282cc826613 100644
--- a/arch/arm/mach-omap2/drm.c
+++ b/arch/arm/mach-omap2/drm.c
@@ -24,8 +24,8 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 
-#include <plat/omap_device.h>
-#include <plat/omap_hwmod.h>
+#include "omap_device.h"
+#include "omap_hwmod.h"
 
 #if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE)
 
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 98388109f22a..b155500e84a8 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -27,7 +27,7 @@
 #include "cm2xxx_3xxx.h"
 #include "prm2xxx_3xxx.h"
 #ifdef CONFIG_BRIDGE_DVFS
-#include <plat/omap-pm.h>
+#include "omap-pm.h"
 #endif
 
 #include <linux/platform_data/dsp-omap.h>
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index d1058f16fb40..399acabc3d0b 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,9 +23,9 @@
 #include <linux/of.h>
 #include <linux/platform_data/gpio-omap.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
-#include <plat/omap-pm.h>
+#include "omap_hwmod.h"
+#include "omap_device.h"
+#include "omap-pm.h"
 
 #include "powerdomain.h"
 
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 4acf497faeb3..8607735b3ab3 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -17,9 +17,12 @@
 
 #include <asm/mach/flash.h>
 
-#include <plat/gpmc.h>
-
+#include "gpmc.h"
 #include "soc.h"
+#include "gpmc-nand.h"
+
+/* minimum size for IO mapping */
+#define NAND_IO_SIZE    4
 
 static struct resource gpmc_nand_resource[] = {
         {
@@ -40,41 +43,36 @@ static struct platform_device gpmc_nand_device = {
         .resource       = gpmc_nand_resource,
 };
 
-static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
+static int omap2_nand_gpmc_retime(
+                                struct omap_nand_platform_data *gpmc_nand_data,
+                                struct gpmc_timings *gpmc_t)
 {
         struct gpmc_timings t;
         int err;
 
-        if (!gpmc_nand_data->gpmc_t)
-                return 0;
-
         memset(&t, 0, sizeof(t));
-        t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk;
-        t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
-        t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on);
+        t.sync_clk = gpmc_t->sync_clk;
+        t.cs_on = gpmc_round_ns_to_ticks(gpmc_t->cs_on);
+        t.adv_on = gpmc_round_ns_to_ticks(gpmc_t->adv_on);
 
         /* Read */
-        t.adv_rd_off = gpmc_round_ns_to_ticks(
-                                gpmc_nand_data->gpmc_t->adv_rd_off);
+        t.adv_rd_off = gpmc_round_ns_to_ticks(gpmc_t->adv_rd_off);
         t.oe_on  = t.adv_on;
-        t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access);
-        t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off);
-        t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off);
-        t.rd_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle);
+        t.access = gpmc_round_ns_to_ticks(gpmc_t->access);
+        t.oe_off = gpmc_round_ns_to_ticks(gpmc_t->oe_off);
+        t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_t->cs_rd_off);
+        t.rd_cycle  = gpmc_round_ns_to_ticks(gpmc_t->rd_cycle);
 
         /* Write */
-        t.adv_wr_off = gpmc_round_ns_to_ticks(
-                                gpmc_nand_data->gpmc_t->adv_wr_off);
+        t.adv_wr_off = gpmc_round_ns_to_ticks(gpmc_t->adv_wr_off);
         t.we_on  = t.oe_on;
         if (cpu_is_omap34xx()) {
-            t.wr_data_mux_bus = gpmc_round_ns_to_ticks(
-                                gpmc_nand_data->gpmc_t->wr_data_mux_bus);
-            t.wr_access = gpmc_round_ns_to_ticks(
-                                gpmc_nand_data->gpmc_t->wr_access);
+            t.wr_data_mux_bus = gpmc_round_ns_to_ticks(gpmc_t->wr_data_mux_bus);
+            t.wr_access = gpmc_round_ns_to_ticks(gpmc_t->wr_access);
         }
-        t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off);
-        t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off);
-        t.wr_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
+        t.we_off = gpmc_round_ns_to_ticks(gpmc_t->we_off);
+        t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_t->cs_wr_off);
+        t.wr_cycle  = gpmc_round_ns_to_ticks(gpmc_t->wr_cycle);
 
         /* Configure GPMC */
         if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
@@ -91,7 +89,29 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data
         return 0;
 }
 
-int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
+static bool __init gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
+{
+        /* support only OMAP3 class */
+        if (!cpu_is_omap34xx()) {
+                pr_err("BCH ecc is not supported on this CPU\n");
+                return 0;
+        }
+
+        /*
+         * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
+         * Other chips may be added if confirmed to work.
+         */
+        if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
+            (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
+                pr_err("BCH 4-bit mode is not supported on this CPU\n");
+                return 0;
+        }
+
+        return 1;
+}
+
+int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
+                          struct gpmc_timings *gpmc_t)
 {
         int err = 0;
         struct device *dev = &gpmc_nand_device.dev;
@@ -112,11 +132,13 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
                                 gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
         gpmc_nand_resource[2].start =
                                 gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
-         /* Set timings in GPMC */
-        err = omap2_nand_gpmc_retime(gpmc_nand_data);
-        if (err < 0) {
-                dev_err(dev, "Unable to set gpmc timings: %d\n", err);
-                return err;
+
+        if (gpmc_t) {
+                err = omap2_nand_gpmc_retime(gpmc_nand_data, gpmc_t);
+                if (err < 0) {
+                        dev_err(dev, "Unable to set gpmc timings: %d\n", err);
+                        return err;
+                }
         }
 
         /* Enable RD PIN Monitoring Reg */
@@ -126,6 +148,9 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
 
         gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
 
+        if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt))
+                return -EINVAL;
+
         err = platform_device_register(&gpmc_nand_device);
         if (err < 0) {
                 dev_err(dev, "Unable to register NAND device\n");
diff --git a/arch/arm/mach-omap2/gpmc-nand.h b/arch/arm/mach-omap2/gpmc-nand.h
new file mode 100644
index 000000000000..d59e1281e851
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-nand.h
@@ -0,0 +1,27 @@
+/*
+ *  arch/arm/mach-omap2/gpmc-nand.h
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+
+#ifndef __OMAP2_GPMC_NAND_H
+#define __OMAP2_GPMC_NAND_H
+
+#include "gpmc.h"
+#include <linux/platform_data/mtd-nand-omap2.h>
+
+#if IS_ENABLED(CONFIG_MTD_NAND_OMAP2)
+extern int gpmc_nand_init(struct omap_nand_platform_data *d,
+                          struct gpmc_timings *gpmc_t);
+#else
+static inline int gpmc_nand_init(struct omap_nand_platform_data *d,
+                                 struct gpmc_timings *gpmc_t)
+{
+        return 0;
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 916716e1da3b..d102183ed9a5 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -16,15 +16,25 @@
 #include <linux/mtd/onenand_regs.h>
 #include <linux/io.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
+#include <linux/err.h>
 
 #include <asm/mach/flash.h>
 
-#include <plat/gpmc.h>
-
+#include "gpmc.h"
 #include "soc.h"
+#include "gpmc-onenand.h"
 
 #define ONENAND_IO_SIZE SZ_128K
 
+#define ONENAND_FLAG_SYNCREAD   (1 << 0)
+#define ONENAND_FLAG_SYNCWRITE  (1 << 1)
+#define ONENAND_FLAG_HF         (1 << 2)
+#define ONENAND_FLAG_VHF        (1 << 3)
+
+static unsigned onenand_flags;
+static unsigned latency;
+static int fclk_offset;
+
 static struct omap_onenand_platform_data *gpmc_onenand_data;
 
 static struct resource gpmc_onenand_resource = {
@@ -38,11 +48,9 @@ static struct platform_device gpmc_onenand_device = {
         .resource       = &gpmc_onenand_resource,
 };
 
-static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
+static struct gpmc_timings omap2_onenand_calc_async_timings(void)
 {
         struct gpmc_timings t;
-        u32 reg;
-        int err;
 
         const int t_cer = 15;
         const int t_avdp = 12;
@@ -55,11 +63,6 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
         const int t_wpl = 40;
         const int t_wph = 30;
 
-        /* Ensure sync read and sync write are disabled */
-        reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
-        reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
-        writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
-
         memset(&t, 0, sizeof(t));
         t.sync_clk = 0;
         t.cs_on = 0;
@@ -86,25 +89,30 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
         t.cs_wr_off = t.we_off + gpmc_round_ns_to_ticks(t_wph);
         t.wr_cycle  = t.cs_wr_off + gpmc_round_ns_to_ticks(t_cez);
 
+        return t;
+}
+
+static int gpmc_set_async_mode(int cs, struct gpmc_timings *t)
+{
         /* Configure GPMC for asynchronous read */
         gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
                           GPMC_CONFIG1_DEVICESIZE_16 |
                           GPMC_CONFIG1_MUXADDDATA);
 
-        err = gpmc_cs_set_timings(cs, &t);
-        if (err)
-                return err;
+        return gpmc_cs_set_timings(cs, t);
+}
+
+static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
+{
+        u32 reg;
 
         /* Ensure sync read and sync write are disabled */
         reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
         reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;
         writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
-
-        return 0;
 }
 
-static void set_onenand_cfg(void __iomem *onenand_base, int latency,
-                                int sync_read, int sync_write, int hf, int vhf)
+static void set_onenand_cfg(void __iomem *onenand_base)
 {
         u32 reg;
 
@@ -112,19 +120,19 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency,
         reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
         reg |=  (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
                 ONENAND_SYS_CFG1_BL_16;
-        if (sync_read)
+        if (onenand_flags & ONENAND_FLAG_SYNCREAD)
                 reg |= ONENAND_SYS_CFG1_SYNC_READ;
         else
                 reg &= ~ONENAND_SYS_CFG1_SYNC_READ;
-        if (sync_write)
+        if (onenand_flags & ONENAND_FLAG_SYNCWRITE)
                 reg |= ONENAND_SYS_CFG1_SYNC_WRITE;
         else
                 reg &= ~ONENAND_SYS_CFG1_SYNC_WRITE;
-        if (hf)
+        if (onenand_flags & ONENAND_FLAG_HF)
                 reg |= ONENAND_SYS_CFG1_HF;
         else
                 reg &= ~ONENAND_SYS_CFG1_HF;
-        if (vhf)
+        if (onenand_flags & ONENAND_FLAG_VHF)
                 reg |= ONENAND_SYS_CFG1_VHF;
         else
                 reg &= ~ONENAND_SYS_CFG1_VHF;
@@ -132,21 +140,10 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency,
 }
 
 static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
-                                  void __iomem *onenand_base, bool *clk_dep)
+                                  void __iomem *onenand_base)
 {
         u16 ver = readw(onenand_base + ONENAND_REG_VERSION_ID);
-        int freq = 0;
-
-        if (cfg->get_freq) {
-                struct onenand_freq_info fi;
-
-                fi.maf_id = readw(onenand_base + ONENAND_REG_MANUFACTURER_ID);
-                fi.dev_id = readw(onenand_base + ONENAND_REG_DEVICE_ID);
-                fi.ver_id = ver;
-                freq = cfg->get_freq(&fi, clk_dep);
-                if (freq)
-                        return freq;
-        }
+        int freq;
 
         switch ((ver >> 4) & 0xf) {
         case 0:
@@ -172,9 +169,9 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
         return freq;
 }
 
-static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
-                                        void __iomem *onenand_base,
-                                        int *freq_ptr)
+static struct gpmc_timings
+omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
+                                int freq)
 {
         struct gpmc_timings t;
         const int t_cer  = 15;
@@ -184,29 +181,15 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
         const int t_wpl  = 40;
         const int t_wph  = 30;
         int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo;
-        int div, fclk_offset_ns, fclk_offset, gpmc_clk_ns, latency;
-        int first_time = 0, hf = 0, vhf = 0, sync_read = 0, sync_write = 0;
-        int err, ticks_cez;
-        int cs = cfg->cs, freq = *freq_ptr;
         u32 reg;
-        bool clk_dep = false;
+        int div, fclk_offset_ns, gpmc_clk_ns;
+        int ticks_cez;
+        int cs = cfg->cs;
 
-        if (cfg->flags & ONENAND_SYNC_READ) {
-                sync_read = 1;
-        } else if (cfg->flags & ONENAND_SYNC_READWRITE) {
-                sync_read = 1;
-                sync_write = 1;
-        } else
-                return omap2_onenand_set_async_mode(cs, onenand_base);
-
-        if (!freq) {
-                /* Very first call freq is not known */
-                err = omap2_onenand_set_async_mode(cs, onenand_base);
-                if (err)
-                        return err;
-                freq = omap2_onenand_get_freq(cfg, onenand_base, &clk_dep);
-                first_time = 1;
-        }
+        if (cfg->flags & ONENAND_SYNC_READ)
+                onenand_flags = ONENAND_FLAG_SYNCREAD;
+        else if (cfg->flags & ONENAND_SYNC_READWRITE)
+                onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE;
 
         switch (freq) {
         case 104:
@@ -244,44 +227,31 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                 t_ach   = 9;
                 t_aavdh = 7;
                 t_rdyo  = 15;
-                sync_write = 0;
+                onenand_flags &= ~ONENAND_FLAG_SYNCWRITE;
                 break;
         }
 
-        div = gpmc_cs_calc_divider(cs, min_gpmc_clk_period);
+        div = gpmc_calc_divider(min_gpmc_clk_period);
         gpmc_clk_ns = gpmc_ticks_to_ns(div);
         if (gpmc_clk_ns < 15) /* >66Mhz */
-                hf = 1;
+                onenand_flags |= ONENAND_FLAG_HF;
+        else
+                onenand_flags &= ~ONENAND_FLAG_HF;
         if (gpmc_clk_ns < 12) /* >83Mhz */
-                vhf = 1;
-        if (vhf)
+                onenand_flags |= ONENAND_FLAG_VHF;
+        else
+                onenand_flags &= ~ONENAND_FLAG_VHF;
+        if (onenand_flags & ONENAND_FLAG_VHF)
                 latency = 8;
-        else if (hf)
+        else if (onenand_flags & ONENAND_FLAG_HF)
                 latency = 6;
         else if (gpmc_clk_ns >= 25) /* 40 MHz*/
                 latency = 3;
         else
                 latency = 4;
 
-        if (clk_dep) {
-                if (gpmc_clk_ns < 12) { /* >83Mhz */
-                        t_ces   = 3;
-                        t_avds  = 4;
-                } else if (gpmc_clk_ns < 15) { /* >66Mhz */
-                        t_ces   = 5;
-                        t_avds  = 4;
-                } else if (gpmc_clk_ns < 25) { /* >40Mhz */
-                        t_ces   = 6;
-                        t_avds  = 5;
-                } else {
-                        t_ces   = 7;
-                        t_avds  = 7;
-                }
-        }
-
-        if (first_time)
-                set_onenand_cfg(onenand_base, latency,
-                                        sync_read, sync_write, hf, vhf);
+        /* Set synchronous read timings */
+        memset(&t, 0, sizeof(t));
 
         if (div == 1) {
                 reg = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG2);
@@ -307,8 +277,6 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG4, reg);
         }
 
-        /* Set synchronous read timings */
-        memset(&t, 0, sizeof(t));
         t.sync_clk = min_gpmc_clk_period;
         t.cs_on = 0;
         t.adv_on = 0;
@@ -330,7 +298,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                      ticks_cez);
 
         /* Write */
-        if (sync_write) {
+        if (onenand_flags & ONENAND_FLAG_SYNCWRITE) {
                 t.adv_wr_off = t.adv_rd_off;
                 t.we_on  = 0;
                 t.we_off = t.cs_rd_off;
@@ -355,6 +323,14 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                 }
         }
 
+        return t;
+}
+
+static int gpmc_set_sync_mode(int cs, struct gpmc_timings *t)
+{
+        unsigned sync_read = onenand_flags & ONENAND_FLAG_SYNCREAD;
+        unsigned sync_write = onenand_flags & ONENAND_FLAG_SYNCWRITE;
+
         /* Configure GPMC for synchronous read */
         gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1,
                           GPMC_CONFIG1_WRAPBURST_SUPP |
@@ -371,11 +347,45 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
                           GPMC_CONFIG1_DEVICETYPE_NOR |
                           GPMC_CONFIG1_MUXADDDATA);
 
-        err = gpmc_cs_set_timings(cs, &t);
-        if (err)
-                return err;
+        return gpmc_cs_set_timings(cs, t);
+}
+
+static int omap2_onenand_setup_async(void __iomem *onenand_base)
+{
+        struct gpmc_timings t;
+        int ret;
+
+        omap2_onenand_set_async_mode(onenand_base);
 
-        set_onenand_cfg(onenand_base, latency, sync_read, sync_write, hf, vhf);
+        t = omap2_onenand_calc_async_timings();
+
+        ret = gpmc_set_async_mode(gpmc_onenand_data->cs, &t);
+        if (IS_ERR_VALUE(ret))
+                return ret;
+
+        omap2_onenand_set_async_mode(onenand_base);
+
+        return 0;
+}
+
+static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
+{
+        int ret, freq = *freq_ptr;
+        struct gpmc_timings t;
+
+        if (!freq) {
+                /* Very first call freq is not known */
+                freq = omap2_onenand_get_freq(gpmc_onenand_data, onenand_base);
+                set_onenand_cfg(onenand_base);
+        }
+
+        t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq);
+
+        ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t);
+        if (IS_ERR_VALUE(ret))
+                return ret;
+
+        set_onenand_cfg(onenand_base);
 
         *freq_ptr = freq;
 
@@ -385,15 +395,22 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg,
 static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
 {
         struct device *dev = &gpmc_onenand_device.dev;
+        unsigned l = ONENAND_SYNC_READ | ONENAND_SYNC_READWRITE;
+        int ret;
 
-        /* Set sync timings in GPMC */
-        if (omap2_onenand_set_sync_mode(gpmc_onenand_data, onenand_base,
-                        freq_ptr) < 0) {
-                dev_err(dev, "Unable to set synchronous mode\n");
-                return -EINVAL;
+        ret = omap2_onenand_setup_async(onenand_base);
+        if (ret) {
+                dev_err(dev, "unable to set to async mode\n");
+                return ret;
         }
 
-        return 0;
+        if (!(gpmc_onenand_data->flags & l))
+                return 0;
+
+        ret = omap2_onenand_setup_sync(onenand_base, freq_ptr);
+        if (ret)
+                dev_err(dev, "unable to set to sync mode\n");
+        return ret;
 }
 
 void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
@@ -411,6 +428,11 @@ void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
                 gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
         }
 
+        if (cpu_is_omap34xx())
+                gpmc_onenand_data->flags |= ONENAND_IN_OMAP34XX;
+        else
+                gpmc_onenand_data->flags &= ~ONENAND_IN_OMAP34XX;
+
         err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE,
                                 (unsigned long *)&gpmc_onenand_resource.start);
         if (err < 0) {
diff --git a/arch/arm/mach-omap2/gpmc-onenand.h b/arch/arm/mach-omap2/gpmc-onenand.h
new file mode 100644
index 000000000000..216f23a8b45c
--- /dev/null
+++ b/arch/arm/mach-omap2/gpmc-onenand.h
@@ -0,0 +1,24 @@
+/*
+ *  arch/arm/mach-omap2/gpmc-onenand.h
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+
+#ifndef __OMAP2_GPMC_ONENAND_H
+#define __OMAP2_GPMC_ONENAND_H
+
+#include <linux/platform_data/mtd-onenand-omap2.h>
+
+#if IS_ENABLED(CONFIG_MTD_ONENAND_OMAP2)
+extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
+#else
+#define board_onenand_data      NULL
+static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
+{
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap2/gpmc-smc91x.c b/arch/arm/mach-omap2/gpmc-smc91x.c
index 565475310374..6eed907d594c 100644
--- a/arch/arm/mach-omap2/gpmc-smc91x.c
+++ b/arch/arm/mach-omap2/gpmc-smc91x.c
@@ -17,7 +17,7 @@
 #include <linux/io.h>
 #include <linux/smc91x.h>
 
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "gpmc-smc91x.h"
 
 #include "soc.h"
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 249a0b440cd6..ef990118d32b 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -20,7 +20,7 @@
 #include <linux/io.h>
 #include <linux/smsc911x.h>
 
-#include <plat/gpmc.h>
+#include "gpmc.h"
 #include "gpmc-smsc911x.h"
 
 static struct resource gpmc_smsc911x_resources[] = {
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 92b5718fa722..bf6117c32f4b 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -26,16 +26,14 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 
-#include <asm/mach-types.h>
-#include <plat/gpmc.h>
+#include <linux/platform_data/mtd-nand-omap2.h>
 
-#include <plat/cpu.h>
-#include <plat/gpmc.h>
-#include <plat/sdrc.h>
-#include <plat/omap_device.h>
+#include <asm/mach-types.h>
 
 #include "soc.h"
 #include "common.h"
+#include "omap_device.h"
+#include "gpmc.h"
 
 #define DEVICE_NAME             "omap-gpmc"
 
@@ -59,6 +57,9 @@
 #define GPMC_ECC_SIZE_CONFIG    0x1fc
 #define GPMC_ECC1_RESULT        0x200
 #define GPMC_ECC_BCH_RESULT_0   0x240   /* not available on OMAP2 */
+#define GPMC_ECC_BCH_RESULT_1   0x244   /* not available on OMAP2 */
+#define GPMC_ECC_BCH_RESULT_2   0x248   /* not available on OMAP2 */
+#define GPMC_ECC_BCH_RESULT_3   0x24c   /* not available on OMAP2 */
 
 /* GPMC ECC control settings */
 #define GPMC_ECC_CTRL_ECCCLEAR          0x100
@@ -75,6 +76,7 @@
 
 #define GPMC_CS0_OFFSET         0x60
 #define GPMC_CS_SIZE            0x30
+#define GPMC_BCH_SIZE           0x10
 
 #define GPMC_MEM_START          0x00000000
 #define GPMC_MEM_END            0x3FFFFFFF
@@ -137,7 +139,6 @@ static struct resource	gpmc_mem_root;
 static struct resource  gpmc_cs_mem[GPMC_CS_NUM];
 static DEFINE_SPINLOCK(gpmc_mem_lock);
 static unsigned int gpmc_cs_map;        /* flag for cs which are initialized */
-static int gpmc_ecc_used = -EINVAL;     /* cs using ecc engine */
 static struct device *gpmc_dev;
 static int gpmc_irq;
 static resource_size_t phys_base, mem_size;
@@ -158,22 +159,6 @@ static u32 gpmc_read_reg(int idx)
         return __raw_readl(gpmc_base + idx);
 }
 
-static void gpmc_cs_write_byte(int cs, int idx, u8 val)
-{
-        void __iomem *reg_addr;
-
-        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
-        __raw_writeb(val, reg_addr);
-}
-
-static u8 gpmc_cs_read_byte(int cs, int idx)
-{
-        void __iomem *reg_addr;
-
-        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
-        return __raw_readb(reg_addr);
-}
-
 void gpmc_cs_write_reg(int cs, int idx, u32 val)
 {
         void __iomem *reg_addr;
@@ -288,7 +273,7 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
                 return -1
 #endif
 
-int gpmc_cs_calc_divider(int cs, unsigned int sync_clk)
+int gpmc_calc_divider(unsigned int sync_clk)
 {
         int div;
         u32 l;
@@ -308,7 +293,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
         int div;
         u32 l;
 
-        div = gpmc_cs_calc_divider(cs, t->sync_clk);
+        div = gpmc_calc_divider(t->sync_clk);
         if (div < 0)
                 return div;
 
@@ -509,44 +494,6 @@ void gpmc_cs_free(int cs)
 EXPORT_SYMBOL(gpmc_cs_free);
 
 /**
- * gpmc_read_status - read access request to get the different gpmc status
- * @cmd: command type
- * @return status
- */
-int gpmc_read_status(int cmd)
-{
-        int     status = -EINVAL;
-        u32     regval = 0;
-
-        switch (cmd) {
-        case GPMC_GET_IRQ_STATUS:
-                status = gpmc_read_reg(GPMC_IRQSTATUS);
-                break;
-
-        case GPMC_PREFETCH_FIFO_CNT:
-                regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
-                status = GPMC_PREFETCH_STATUS_FIFO_CNT(regval);
-                break;
-
-        case GPMC_PREFETCH_COUNT:
-                regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
-                status = GPMC_PREFETCH_STATUS_COUNT(regval);
-                break;
-
-        case GPMC_STATUS_BUFFER:
-                regval = gpmc_read_reg(GPMC_STATUS);
-                /* 1 : buffer is available to write */
-                status = regval & GPMC_STATUS_BUFF_EMPTY;
-                break;
-
-        default:
-                printk(KERN_ERR "gpmc_read_status: Not supported\n");
-        }
-        return status;
-}
-EXPORT_SYMBOL(gpmc_read_status);
-
-/**
  * gpmc_cs_configure - write request to configure gpmc
  * @cs: chip select number
  * @cmd: command type
@@ -614,121 +561,10 @@ int gpmc_cs_configure(int cs, int cmd, int wval)
 }
 EXPORT_SYMBOL(gpmc_cs_configure);
 
-/**
- * gpmc_nand_read - nand specific read access request
- * @cs: chip select number
- * @cmd: command type
- */
-int gpmc_nand_read(int cs, int cmd)
-{
-        int rval = -EINVAL;
-
-        switch (cmd) {
-        case GPMC_NAND_DATA:
-                rval = gpmc_cs_read_byte(cs, GPMC_CS_NAND_DATA);
-                break;
-
-        default:
-                printk(KERN_ERR "gpmc_read_nand_ctrl: Not supported\n");
-        }
-        return rval;
-}
-EXPORT_SYMBOL(gpmc_nand_read);
-
-/**
- * gpmc_nand_write - nand specific write request
- * @cs: chip select number
- * @cmd: command type
- * @wval: value to write
- */
-int gpmc_nand_write(int cs, int cmd, int wval)
-{
-        int err = 0;
-
-        switch (cmd) {
-        case GPMC_NAND_COMMAND:
-                gpmc_cs_write_byte(cs, GPMC_CS_NAND_COMMAND, wval);
-                break;
-
-        case GPMC_NAND_ADDRESS:
-                gpmc_cs_write_byte(cs, GPMC_CS_NAND_ADDRESS, wval);
-                break;
-
-        case GPMC_NAND_DATA:
-                gpmc_cs_write_byte(cs, GPMC_CS_NAND_DATA, wval);
-
-        default:
-                printk(KERN_ERR "gpmc_write_nand_ctrl: Not supported\n");
-                err = -EINVAL;
-        }
-        return err;
-}
-EXPORT_SYMBOL(gpmc_nand_write);
-
-
-
-/**
- * gpmc_prefetch_enable - configures and starts prefetch transfer
- * @cs: cs (chip select) number
- * @fifo_th: fifo threshold to be used for read/ write
- * @dma_mode: dma mode enable (1) or disable (0)
- * @u32_count: number of bytes to be transferred
- * @is_write: prefetch read(0) or write post(1) mode
- */
-int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
-                                unsigned int u32_count, int is_write)
-{
-
-        if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) {
-                pr_err("gpmc: fifo threshold is not supported\n");
-                return -1;
-        } else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
-                /* Set the amount of bytes to be prefetched */
-                gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
-
-                /* Set dma/mpu mode, the prefetch read / post write and
-                 * enable the engine. Set which cs is has requested for.
-                 */
-                gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) |
-                                        PREFETCH_FIFOTHRESHOLD(fifo_th) |
-                                        ENABLE_PREFETCH |
-                                        (dma_mode << DMA_MPU_MODE) |
-                                        (0x1 & is_write)));
-
-                /*  Start the prefetch engine */
-                gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
-        } else {
-                return -EBUSY;
-        }
-
-        return 0;
-}
-EXPORT_SYMBOL(gpmc_prefetch_enable);
-
-/**
- * gpmc_prefetch_reset - disables and stops the prefetch engine
- */
-int gpmc_prefetch_reset(int cs)
-{
-        u32 config1;
-
-        /* check if the same module/cs is trying to reset */
-        config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
-        if (((config1 >> CS_NUM_SHIFT) & 0x7) != cs)
-                return -EINVAL;
-
-        /* Stop the PFPW engine */
-        gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0);
-
-        /* Reset/disable the PFPW engine */
-        gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0);
-
-        return 0;
-}
-EXPORT_SYMBOL(gpmc_prefetch_reset);
-
 void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
 {
+        int i;
+
         reg->gpmc_status = gpmc_base + GPMC_STATUS;
         reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +
                                 GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
@@ -744,7 +580,17 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
         reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;
         reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;
         reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;
-        reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0;
+
+        for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) {
+                reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 +
+                                           GPMC_BCH_SIZE * i;
+                reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 +
+                                           GPMC_BCH_SIZE * i;
+                reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 +
+                                           GPMC_BCH_SIZE * i;
+                reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 +
+                                           GPMC_BCH_SIZE * i;
+        }
 }
 
 int gpmc_get_client_irq(unsigned irq_config)
@@ -1093,267 +939,3 @@ void omap3_gpmc_restore_context(void)
         }
 }
 #endif /* CONFIG_ARCH_OMAP3 */
-
-/**
- * gpmc_enable_hwecc - enable hardware ecc functionality
- * @cs: chip select number
- * @mode: read/write mode
- * @dev_width: device bus width(1 for x16, 0 for x8)
- * @ecc_size: bytes for which ECC will be generated
- */
-int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
-{
-        unsigned int val;
-
-        /* check if ecc module is in used */
-        if (gpmc_ecc_used != -EINVAL)
-                return -EINVAL;
-
-        gpmc_ecc_used = cs;
-
-        /* clear ecc and enable bits */
-        gpmc_write_reg(GPMC_ECC_CONTROL,
-                        GPMC_ECC_CTRL_ECCCLEAR |
-                        GPMC_ECC_CTRL_ECCREG1);
-
-        /* program ecc and result sizes */
-        val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
-        gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, val);
-
-        switch (mode) {
-        case GPMC_ECC_READ:
-        case GPMC_ECC_WRITE:
-                gpmc_write_reg(GPMC_ECC_CONTROL,
-                                GPMC_ECC_CTRL_ECCCLEAR |
-                                GPMC_ECC_CTRL_ECCREG1);
-                break;
-        case GPMC_ECC_READSYN:
-                gpmc_write_reg(GPMC_ECC_CONTROL,
-                                GPMC_ECC_CTRL_ECCCLEAR |
-                                GPMC_ECC_CTRL_ECCDISABLE);
-                break;
-        default:
-                printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
-                break;
-        }
-
-        /* (ECC 16 or 8 bit col) | ( CS  )  | ECC Enable */
-        val = (dev_width << 7) | (cs << 1) | (0x1);
-        gpmc_write_reg(GPMC_ECC_CONFIG, val);
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_enable_hwecc);
-
-/**
- * gpmc_calculate_ecc - generate non-inverted ecc bytes
- * @cs: chip select number
- * @dat: data pointer over which ecc is computed
- * @ecc_code: ecc code buffer
- *
- * Using non-inverted ECC is considered ugly since writing a blank
- * page (padding) will clear the ECC bytes. This is not a problem as long
- * no one is trying to write data on the seemingly unused page. Reading
- * an erased page will produce an ECC mismatch between generated and read
- * ECC bytes that has to be dealt with separately.
- */
-int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
-{
-        unsigned int val = 0x0;
-
-        if (gpmc_ecc_used != cs)
-                return -EINVAL;
-
-        /* read ecc result */
-        val = gpmc_read_reg(GPMC_ECC1_RESULT);
-        *ecc_code++ = val;          /* P128e, ..., P1e */
-        *ecc_code++ = val >> 16;    /* P128o, ..., P1o */
-        /* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */
-        *ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0);
-
-        gpmc_ecc_used = -EINVAL;
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_calculate_ecc);
-
-#ifdef CONFIG_ARCH_OMAP3
-
-/**
- * gpmc_init_hwecc_bch - initialize hardware BCH ecc functionality
- * @cs: chip select number
- * @nsectors: how many 512-byte sectors to process
- * @nerrors: how many errors to correct per sector (4 or 8)
- *
- * This function must be executed before any call to gpmc_enable_hwecc_bch.
- */
-int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors)
-{
-        /* check if ecc module is in use */
-        if (gpmc_ecc_used != -EINVAL)
-                return -EINVAL;
-
-        /* support only OMAP3 class */
-        if (!cpu_is_omap34xx()) {
-                printk(KERN_ERR "BCH ecc is not supported on this CPU\n");
-                return -EINVAL;
-        }
-
-        /*
-         * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
-         * Other chips may be added if confirmed to work.
-         */
-        if ((nerrors == 4) &&
-            (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
-                printk(KERN_ERR "BCH 4-bit mode is not supported on this CPU\n");
-                return -EINVAL;
-        }
-
-        /* sanity check */
-        if (nsectors > 8) {
-                printk(KERN_ERR "BCH cannot process %d sectors (max is 8)\n",
-                       nsectors);
-                return -EINVAL;
-        }
-
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_init_hwecc_bch);
-
-/**
- * gpmc_enable_hwecc_bch - enable hardware BCH ecc functionality
- * @cs: chip select number
- * @mode: read/write mode
- * @dev_width: device bus width(1 for x16, 0 for x8)
- * @nsectors: how many 512-byte sectors to process
- * @nerrors: how many errors to correct per sector (4 or 8)
- */
-int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
-                          int nerrors)
-{
-        unsigned int val;
-
-        /* check if ecc module is in use */
-        if (gpmc_ecc_used != -EINVAL)
-                return -EINVAL;
-
-        gpmc_ecc_used = cs;
-
-        /* clear ecc and enable bits */
-        gpmc_write_reg(GPMC_ECC_CONTROL, 0x1);
-
-        /*
-         * When using BCH, sector size is hardcoded to 512 bytes.
-         * Here we are using wrapping mode 6 both for reading and writing, with:
-         *  size0 = 0  (no additional protected byte in spare area)
-         *  size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
-         */
-        gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (32 << 22) | (0 << 12));
-
-        /* BCH configuration */
-        val = ((1                        << 16) | /* enable BCH */
-               (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
-               (0x06                     <<  8) | /* wrap mode = 6 */
-               (dev_width                <<  7) | /* bus width */
-               (((nsectors-1) & 0x7)     <<  4) | /* number of sectors */
-               (cs                       <<  1) | /* ECC CS */
-               (0x1));                            /* enable ECC */
-
-        gpmc_write_reg(GPMC_ECC_CONFIG, val);
-        gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_enable_hwecc_bch);
-
-/**
- * gpmc_calculate_ecc_bch4 - Generate 7 ecc bytes per sector of 512 data bytes
- * @cs:  chip select number
- * @dat: The pointer to data on which ecc is computed
- * @ecc: The ecc output buffer
- */
-int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc)
-{
-        int i;
-        unsigned long nsectors, reg, val1, val2;
-
-        if (gpmc_ecc_used != cs)
-                return -EINVAL;
-
-        nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1;
-
-        for (i = 0; i < nsectors; i++) {
-
-                reg = GPMC_ECC_BCH_RESULT_0 + 16*i;
-
-                /* Read hw-computed remainder */
-                val1 = gpmc_read_reg(reg + 0);
-                val2 = gpmc_read_reg(reg + 4);
-
-                /*
-                 * Add constant polynomial to remainder, in order to get an ecc
-                 * sequence of 0xFFs for a buffer filled with 0xFFs; and
-                 * left-justify the resulting polynomial.
-                 */
-                *ecc++ = 0x28 ^ ((val2 >> 12) & 0xFF);
-                *ecc++ = 0x13 ^ ((val2 >>  4) & 0xFF);
-                *ecc++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
-                *ecc++ = 0x39 ^ ((val1 >> 20) & 0xFF);
-                *ecc++ = 0x96 ^ ((val1 >> 12) & 0xFF);
-                *ecc++ = 0xac ^ ((val1 >> 4) & 0xFF);
-                *ecc++ = 0x7f ^ ((val1 & 0xF) << 4);
-        }
-
-        gpmc_ecc_used = -EINVAL;
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch4);
-
-/**
- * gpmc_calculate_ecc_bch8 - Generate 13 ecc bytes per block of 512 data bytes
- * @cs:  chip select number
- * @dat: The pointer to data on which ecc is computed
- * @ecc: The ecc output buffer
- */
-int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc)
-{
-        int i;
-        unsigned long nsectors, reg, val1, val2, val3, val4;
-
-        if (gpmc_ecc_used != cs)
-                return -EINVAL;
-
-        nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) >> 4) & 0x7) + 1;
-
-        for (i = 0; i < nsectors; i++) {
-
-                reg = GPMC_ECC_BCH_RESULT_0 + 16*i;
-
-                /* Read hw-computed remainder */
-                val1 = gpmc_read_reg(reg + 0);
-                val2 = gpmc_read_reg(reg + 4);
-                val3 = gpmc_read_reg(reg + 8);
-                val4 = gpmc_read_reg(reg + 12);
-
-                /*
-                 * Add constant polynomial to remainder, in order to get an ecc
-                 * sequence of 0xFFs for a buffer filled with 0xFFs.
-                 */
-                *ecc++ = 0xef ^ (val4 & 0xFF);
-                *ecc++ = 0x51 ^ ((val3 >> 24) & 0xFF);
-                *ecc++ = 0x2e ^ ((val3 >> 16) & 0xFF);
-                *ecc++ = 0x09 ^ ((val3 >> 8) & 0xFF);
-                *ecc++ = 0xed ^ (val3 & 0xFF);
-                *ecc++ = 0x93 ^ ((val2 >> 24) & 0xFF);
-                *ecc++ = 0x9a ^ ((val2 >> 16) & 0xFF);
-                *ecc++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
-                *ecc++ = 0x97 ^ (val2 & 0xFF);
-                *ecc++ = 0x79 ^ ((val1 >> 24) & 0xFF);
-                *ecc++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
-                *ecc++ = 0x24 ^ ((val1 >> 8) & 0xFF);
-                *ecc++ = 0xb5 ^ (val1 & 0xFF);
-        }
-
-        gpmc_ecc_used = -EINVAL;
-        return 0;
-}
-EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch8);
-
-#endif /* CONFIG_ARCH_OMAP3 */
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/mach-omap2/gpmc.h
index 2e6e2597178c..79f4dfc2adb3 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/mach-omap2/gpmc.h
@@ -11,6 +11,8 @@
 #ifndef __OMAP2_GPMC_H
 #define __OMAP2_GPMC_H
 
+#include <linux/platform_data/mtd-nand-omap2.h>
+
 /* Maximum Number of Chip Selects */
 #define GPMC_CS_NUM             8
 
@@ -32,15 +34,6 @@
 #define GPMC_SET_IRQ_STATUS     0x00000004
 #define GPMC_CONFIG_WP          0x00000005
 
-#define GPMC_GET_IRQ_STATUS     0x00000006
-#define GPMC_PREFETCH_FIFO_CNT  0x00000007 /* bytes available in FIFO for r/w */
-#define GPMC_PREFETCH_COUNT     0x00000008 /* remaining bytes to be read/write*/
-#define GPMC_STATUS_BUFFER      0x00000009 /* 1: buffer is available to write */
-
-#define GPMC_NAND_COMMAND       0x0000000a
-#define GPMC_NAND_ADDRESS       0x0000000b
-#define GPMC_NAND_DATA          0x0000000c
-
 #define GPMC_ENABLE_IRQ         0x0000000d
 
 /* ECC commands */
@@ -76,25 +69,10 @@
 #define GPMC_DEVICETYPE_NOR             0
 #define GPMC_DEVICETYPE_NAND            2
 #define GPMC_CONFIG_WRITEPROTECT        0x00000010
-#define GPMC_STATUS_BUFF_EMPTY          0x00000001
 #define WR_RD_PIN_MONITORING            0x00600000
-#define GPMC_PREFETCH_STATUS_FIFO_CNT(val)      ((val >> 24) & 0x7F)
-#define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
 #define GPMC_IRQ_FIFOEVENTENABLE        0x01
 #define GPMC_IRQ_COUNT_EVENT            0x02
 
-#define PREFETCH_FIFOTHRESHOLD_MAX      0x40
-#define PREFETCH_FIFOTHRESHOLD(val)     ((val) << 8)
-
-enum omap_ecc {
-                /* 1-bit ecc: stored at end of spare area */
-        OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
-        OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
-                /* 1-bit ecc: stored at beginning of spare area as romcode */
-        OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
-        OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
-        OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
-};
 
 /*
  * Note that all values in this struct are in nanoseconds except sync_clk
@@ -133,22 +111,6 @@ struct gpmc_timings {
         u16 wr_data_mux_bus;    /* WRDATAONADMUXBUS */
 };
 
-struct gpmc_nand_regs {
-        void __iomem    *gpmc_status;
-        void __iomem    *gpmc_nand_command;
-        void __iomem    *gpmc_nand_address;
-        void __iomem    *gpmc_nand_data;
-        void __iomem    *gpmc_prefetch_config1;
-        void __iomem    *gpmc_prefetch_config2;
-        void __iomem    *gpmc_prefetch_control;
-        void __iomem    *gpmc_prefetch_status;
-        void __iomem    *gpmc_ecc_config;
-        void __iomem    *gpmc_ecc_control;
-        void __iomem    *gpmc_ecc_size_config;
-        void __iomem    *gpmc_ecc1_result;
-        void __iomem    *gpmc_bch_result0;
-};
-
 extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
 extern int gpmc_get_client_irq(unsigned irq_config);
 
@@ -160,31 +122,14 @@ extern unsigned long gpmc_get_fclk_period(void);
 
 extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
 extern u32 gpmc_cs_read_reg(int cs, int idx);
-extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk);
+extern int gpmc_calc_divider(unsigned int sync_clk);
 extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t);
 extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
 extern void gpmc_cs_free(int cs);
 extern int gpmc_cs_set_reserved(int cs, int reserved);
 extern int gpmc_cs_reserved(int cs);
-extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
-                                        unsigned int u32_count, int is_write);
-extern int gpmc_prefetch_reset(int cs);
 extern void omap3_gpmc_save_context(void);
 extern void omap3_gpmc_restore_context(void);
-extern int gpmc_read_status(int cmd);
 extern int gpmc_cs_configure(int cs, int cmd, int wval);
-extern int gpmc_nand_read(int cs, int cmd);
-extern int gpmc_nand_write(int cs, int cmd, int wval);
-
-int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size);
-int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code);
-
-#ifdef CONFIG_ARCH_OMAP3
-int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors);
-int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
-                          int nerrors);
-int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc);
-int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc);
-#endif /* CONFIG_ARCH_OMAP3 */
 
 #endif
diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c
index e003f2bba30c..ab7bf181a105 100644
--- a/arch/arm/mach-omap2/hdq1w.c
+++ b/arch/arm/mach-omap2/hdq1w.c
@@ -27,15 +27,13 @@
 #include <linux/err.h>
 #include <linux/platform_device.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
+#include "omap_hwmod.h"
+#include "omap_device.h"
 #include "hdq1w.h"
 
+#include "prm.h"
 #include "common.h"
 
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT       10000
-
 /**
  * omap_hdq1w_reset - reset the OMAP HDQ1W module
  * @oh: struct omap_hwmod *
diff --git a/arch/arm/mach-omap2/hdq1w.h b/arch/arm/mach-omap2/hdq1w.h
index 0c1efc846d8d..c7e08d2a7a46 100644
--- a/arch/arm/mach-omap2/hdq1w.h
+++ b/arch/arm/mach-omap2/hdq1w.h
@@ -21,7 +21,7 @@
 #ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H
 #define ARCH_ARM_MACH_OMAP2_HDQ1W_H
 
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
 
 /*
  * XXX A future cleanup patch should modify
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 4d3a6324155f..4a964338992a 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -14,14 +14,14 @@
 #include <linux/string.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
-#include <mach/hardware.h>
 #include <linux/platform_data/gpio-omap.h>
 
-#include <plat/mmc.h>
-#include <plat/omap-pm.h>
-#include <plat/omap_device.h>
+#include "soc.h"
+#include "omap_device.h"
+#include "omap-pm.h"
 
 #include "mux.h"
+#include "mmc.h"
 #include "hsmmc.h"
 #include "control.h"
 
diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c
index 8763c8520dc2..1df9b5feda16 100644
--- a/arch/arm/mach-omap2/hwspinlock.c
+++ b/arch/arm/mach-omap2/hwspinlock.c
@@ -21,8 +21,8 @@
 #include <linux/err.h>
 #include <linux/hwspinlock.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
+#include "omap_hwmod.h"
+#include "omap_device.h"
 
 static struct hwspinlock_pdata omap_hwspinlock_pdata __initdata = {
         .base_id = 0,
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index fc57e67b321f..fbb9b152cd5e 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,21 +19,23 @@
  *
  */
 
-#include <plat/i2c.h>
-#include "common.h"
-#include <plat/omap_hwmod.h>
+#include "soc.h"
+#include "omap_hwmod.h"
+#include "omap_device.h"
 
+#include "prm.h"
+#include "common.h"
 #include "mux.h"
+#include "i2c.h"
 
 /* In register I2C_CON, Bit 15 is the I2C enable bit */
 #define I2C_EN                                  BIT(15)
 #define OMAP2_I2C_CON_OFFSET                    0x24
 #define OMAP4_I2C_CON_OFFSET                    0xA4
 
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT       10000
+#define MAX_OMAP_I2C_HWMOD_NAME_LEN     16
 
-void __init omap2_i2c_mux_pins(int bus_id)
+static void __init omap2_i2c_mux_pins(int bus_id)
 {
         char mux_name[sizeof("i2c2_scl.i2c2_scl")];
 
@@ -104,3 +106,62 @@ int omap_i2c_reset(struct omap_hwmod *oh)
 
         return 0;
 }
+
+static int __init omap_i2c_nr_ports(void)
+{
+        int ports = 0;
+
+        if (cpu_is_omap24xx())
+                ports = 2;
+        else if (cpu_is_omap34xx())
+                ports = 3;
+        else if (cpu_is_omap44xx())
+                ports = 4;
+        return ports;
+}
+
+static const char name[] = "omap_i2c";
+
+int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
+                                int bus_id)
+{
+        int l;
+        struct omap_hwmod *oh;
+        struct platform_device *pdev;
+        char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
+        struct omap_i2c_bus_platform_data *pdata;
+        struct omap_i2c_dev_attr *dev_attr;
+
+        if (bus_id > omap_i2c_nr_ports())
+                return -EINVAL;
+
+        omap2_i2c_mux_pins(bus_id);
+
+        l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
+        WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
+                "String buffer overflow in I2C%d device setup\n", bus_id);
+        oh = omap_hwmod_lookup(oh_name);
+        if (!oh) {
+                        pr_err("Could not look up %s\n", oh_name);
+                        return -EEXIST;
+        }
+
+        pdata = i2c_pdata;
+        /*
+         * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
+         * use, and functionality implementation flags, up to the OMAP I2C
+         * driver via platform data
+         */
+        pdata->rev = oh->class->rev;
+
+        dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
+        pdata->flags = dev_attr->flags;
+
+        pdev = omap_device_build(name, bus_id, oh, pdata,
+                        sizeof(struct omap_i2c_bus_platform_data),
+                        NULL, 0, 0);
+        WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
+
+        return PTR_RET(pdev);
+}
+
diff --git a/arch/arm/mach-omap2/i2c.h b/arch/arm/mach-omap2/i2c.h
new file mode 100644
index 000000000000..42b6f2e7d190
--- /dev/null
+++ b/arch/arm/mach-omap2/i2c.h
@@ -0,0 +1,42 @@
+/*
+ * Helper module for board specific I2C bus registration
+ *
+ * Copyright (C) 2009 Nokia Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include <plat/i2c.h>
+
+#ifndef __MACH_OMAP2_I2C_H
+#define __MACH_OMAP2_I2C_H
+
+/**
+ * i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
+ * @fifo_depth: total controller FIFO size (in bytes)
+ * @flags: differences in hardware support capability
+ *
+ * @fifo_depth represents what exists on the hardware, not what is
+ * actually configured at runtime by the device driver.
+ */
+struct omap_i2c_dev_attr {
+        u8      fifo_depth;
+        u32     flags;
+};
+
+int omap_i2c_reset(struct omap_hwmod *oh);
+
+#endif  /* __MACH_OMAP2_I2C_H */
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index cf2362ccb234..45cc7ed4dd58 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,6 +28,9 @@
 #include "soc.h"
 #include "control.h"
 
+#define OMAP4_SILICON_TYPE_STANDARD             0x01
+#define OMAP4_SILICON_TYPE_PERFORMANCE          0x02
+
 static unsigned int omap_revision;
 static const char *cpu_rev;
 u32 omap_features;
@@ -273,25 +276,11 @@ void __init omap4xxx_check_features(void)
 {
         u32 si_type;
 
-        if (cpu_is_omap443x())
-                omap_features |= OMAP4_HAS_MPU_1GHZ;
-
+        si_type =
+        (read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1) >> 16) & 0x03;
 
-        if (cpu_is_omap446x()) {
-                si_type =
-                        read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
-                switch ((si_type & (3 << 16)) >> 16) {
-                case 2:
-                        /* High performance device */
-                        omap_features |= OMAP4_HAS_MPU_1_5GHZ;
-                        break;
-                case 1:
-                default:
-                        /* Standard device */
-                        omap_features |= OMAP4_HAS_MPU_1_2GHZ;
-                        break;
-                }
-        }
+        if (si_type == OMAP4_SILICON_TYPE_PERFORMANCE)
+                omap_features = OMAP4_HAS_PERF_SILICON;
 }
 
 void __init ti81xx_check_features(void)
@@ -559,11 +548,12 @@ void __init omap5xxx_check_revision(void)
  * detect the exact revision later on in omap2_detect_revision() once map_io
  * is done.
  */
-void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
+void __init omap2_set_globals_tap(u32 class, void __iomem *tap)
 {
-        omap_revision = omap2_globals->class;
-        tap_base = omap2_globals->tap;
+        omap_revision = class;
+        tap_base = tap;
 
+        /* XXX What is this intended to do? */
         if (cpu_is_omap34xx())
                 tap_prod_id = 0x0210;
         else
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 93d10de7129f..cfaed13d0040 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -13,7 +13,7 @@
 
 #include <linux/serial_reg.h>
 
-#include <plat/serial.h>
+#include <mach/serial.h>
 
 #define UART_OFFSET(addr)       ((addr) & 0x00ffffff)
 
diff --git a/arch/arm/mach-omap2/include/mach/gpio.h b/arch/arm/mach-omap2/include/mach/gpio.h
deleted file mode 100644
index 5621cc59c9f4..000000000000
--- a/arch/arm/mach-omap2/include/mach/gpio.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/gpio.h
- */
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/mach-omap2/include/mach/serial.h
index 65fce44dce34..70eda00db7a4 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/mach-omap2/include/mach/serial.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/plat-omap/include/mach/serial.h
- *
  * Copyright (C) 2009 Texas Instruments
  * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
  *
@@ -10,11 +8,6 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-#include <linux/init.h>
-
 /*
  * Memory entry used for the DEBUG_LL UART configuration, relative to
  * start of RAM. See also uncompress.h and debug-macro.S.
@@ -29,11 +22,6 @@
  */
 #define OMAP_UART_INFO_OFS      0x3ffc
 
-/* OMAP1 serial ports */
-#define OMAP1_UART1_BASE        0xfffb0000
-#define OMAP1_UART2_BASE        0xfffb0800
-#define OMAP1_UART3_BASE        0xfffb9800
-
 /* OMAP2 serial ports */
 #define OMAP2_UART1_BASE        0x4806a000
 #define OMAP2_UART2_BASE        0x4806c000
@@ -76,20 +64,14 @@
 #define ZOOM_UART_VIRT          0xfa400000
 
 #define OMAP_PORT_SHIFT         2
-#define OMAP7XX_PORT_SHIFT      0
 #define ZOOM_PORT_SHIFT         1
 
-#define OMAP1510_BASE_BAUD      (12000000/16)
-#define OMAP16XX_BASE_BAUD      (48000000/16)
 #define OMAP24XX_BASE_BAUD      (48000000/16)
 
 /*
  * DEBUG_LL port encoding stored into the UART1 scratchpad register by
  * decomp_setup in uncompress.h
  */
-#define OMAP1UART1              11
-#define OMAP1UART2              12
-#define OMAP1UART3              13
 #define OMAP2UART1              21
 #define OMAP2UART2              22
 #define OMAP2UART3              23
@@ -109,15 +91,6 @@
 #define OMAP5UART4              OMAP4UART4
 #define ZOOM_UART               95              /* Only on zoom2/3 */
 
-/* This is only used by 8250.c for omap1510 */
-#define is_omap_port(pt)        ({int __ret = 0;                        \
-                        if ((pt)->port.mapbase == OMAP1_UART1_BASE ||   \
-                            (pt)->port.mapbase == OMAP1_UART2_BASE ||   \
-                            (pt)->port.mapbase == OMAP1_UART3_BASE)     \
-                                __ret = 1;                              \
-                        __ret;                                          \
-                        })
-
 #ifndef __ASSEMBLER__
 
 struct omap_board_data;
@@ -128,5 +101,3 @@ extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
 extern void omap_serial_init_port(struct omap_board_data *bdata,
                 struct omap_uart_port_info *platform_data);
 #endif
-
-#endif
diff --git a/arch/arm/mach-omap2/include/mach/uncompress.h b/arch/arm/mach-omap2/include/mach/uncompress.h
index 78e0557bfd4e..8e3546d3e041 100644
--- a/arch/arm/mach-omap2/include/mach/uncompress.h
+++ b/arch/arm/mach-omap2/include/mach/uncompress.h
@@ -1,5 +1,176 @@
 /*
- * arch/arm/mach-omap2/include/mach/uncompress.h
+ * arch/arm/plat-omap/include/mach/uncompress.h
+ *
+ * Serial port stubs for kernel decompress status messages
+ *
+ * Initially based on:
+ * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * Rewritten by:
+ * Author: <source@mvista.com>
+ * 2004 (c) MontaVista Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
  */
 
-#include <plat/uncompress.h>
+#include <linux/types.h>
+#include <linux/serial_reg.h>
+
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+
+#include <mach/serial.h>
+
+#define MDR1_MODE_MASK                  0x07
+
+volatile u8 *uart_base;
+int uart_shift;
+
+/*
+ * Store the DEBUG_LL uart number into memory.
+ * See also debug-macro.S, and serial.c for related code.
+ */
+static void set_omap_uart_info(unsigned char port)
+{
+        /*
+         * Get address of some.bss variable and round it down
+         * a la CONFIG_AUTO_ZRELADDR.
+         */
+        u32 ram_start = (u32)&uart_shift & 0xf8000000;
+        u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
+        *uart_info = port;
+}
+
+static void putc(int c)
+{
+        if (!uart_base)
+                return;
+
+        /* Check for UART 16x mode */
+        if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
+                return;
+
+        while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
+                barrier();
+        uart_base[UART_TX << uart_shift] = c;
+}
+
+static inline void flush(void)
+{
+}
+
+/*
+ * Macros to configure UART1 and debug UART
+ */
+#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id)               \
+        if (machine_is_##mach()) {                                      \
+                uart_base = (volatile u8 *)(dbg_uart);                  \
+                uart_shift = (dbg_shft);                                \
+                port = (dbg_id);                                        \
+                set_omap_uart_info(port);                               \
+                break;                                                  \
+        }
+
+#define DEBUG_LL_OMAP2(p, mach)                                         \
+        _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT,    \
+                OMAP2UART##p)
+
+#define DEBUG_LL_OMAP3(p, mach)                                         \
+        _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT,    \
+                OMAP3UART##p)
+
+#define DEBUG_LL_OMAP4(p, mach)                                         \
+        _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT,    \
+                OMAP4UART##p)
+
+#define DEBUG_LL_OMAP5(p, mach)                                         \
+        _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT,    \
+                OMAP5UART##p)
+/* Zoom2/3 shift is different for UART1 and external port */
+#define DEBUG_LL_ZOOM(mach)                                             \
+        _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
+
+#define DEBUG_LL_TI81XX(p, mach)                                        \
+        _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT,   \
+                TI81XXUART##p)
+
+#define DEBUG_LL_AM33XX(p, mach)                                        \
+        _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT,   \
+                AM33XXUART##p)
+
+static inline void arch_decomp_setup(void)
+{
+        int port = 0;
+
+        /*
+         * Initialize the port based on the machine ID from the bootloader.
+         * Note that we're using macros here instead of switch statement
+         * as machine_is functions are optimized out for the boards that
+         * are not selected.
+         */
+        do {
+                /* omap2 based boards using UART1 */
+                DEBUG_LL_OMAP2(1, omap_2430sdp);
+                DEBUG_LL_OMAP2(1, omap_apollon);
+                DEBUG_LL_OMAP2(1, omap_h4);
+
+                /* omap2 based boards using UART3 */
+                DEBUG_LL_OMAP2(3, nokia_n800);
+                DEBUG_LL_OMAP2(3, nokia_n810);
+                DEBUG_LL_OMAP2(3, nokia_n810_wimax);
+
+                /* omap3 based boards using UART1 */
+                DEBUG_LL_OMAP2(1, omap3evm);
+                DEBUG_LL_OMAP3(1, omap_3430sdp);
+                DEBUG_LL_OMAP3(1, omap_3630sdp);
+                DEBUG_LL_OMAP3(1, omap3530_lv_som);
+                DEBUG_LL_OMAP3(1, omap3_torpedo);
+
+                /* omap3 based boards using UART3 */
+                DEBUG_LL_OMAP3(3, cm_t35);
+                DEBUG_LL_OMAP3(3, cm_t3517);
+                DEBUG_LL_OMAP3(3, cm_t3730);
+                DEBUG_LL_OMAP3(3, craneboard);
+                DEBUG_LL_OMAP3(3, devkit8000);
+                DEBUG_LL_OMAP3(3, igep0020);
+                DEBUG_LL_OMAP3(3, igep0030);
+                DEBUG_LL_OMAP3(3, nokia_rm680);
+                DEBUG_LL_OMAP3(3, nokia_rm696);
+                DEBUG_LL_OMAP3(3, nokia_rx51);
+                DEBUG_LL_OMAP3(3, omap3517evm);
+                DEBUG_LL_OMAP3(3, omap3_beagle);
+                DEBUG_LL_OMAP3(3, omap3_pandora);
+                DEBUG_LL_OMAP3(3, omap_ldp);
+                DEBUG_LL_OMAP3(3, overo);
+                DEBUG_LL_OMAP3(3, touchbook);
+
+                /* omap4 based boards using UART3 */
+                DEBUG_LL_OMAP4(3, omap_4430sdp);
+                DEBUG_LL_OMAP4(3, omap4_panda);
+
+                /* omap5 based boards using UART3 */
+                DEBUG_LL_OMAP5(3, omap5_sevm);
+
+                /* zoom2/3 external uart */
+                DEBUG_LL_ZOOM(omap_zoom2);
+                DEBUG_LL_ZOOM(omap_zoom3);
+
+                /* TI8168 base boards using UART3 */
+                DEBUG_LL_TI81XX(3, ti8168evm);
+
+                /* TI8148 base boards using UART1 */
+                DEBUG_LL_TI81XX(1, ti8148evm);
+
+                /* AM33XX base boards using UART1 */
+                DEBUG_LL_AM33XX(1, am335xevm);
+        } while (0);
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_wdog()
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 4234d28dc171..9df757644cce 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -25,14 +25,9 @@
 #include <asm/tlb.h>
 #include <asm/mach/map.h>
 
-#include <plat/sram.h>
-#include <plat/sdrc.h>
-#include <plat/serial.h>
-#include <plat/omap-pm.h>
-#include <plat/omap_hwmod.h>
-#include <plat/multi.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
+#include "omap_hwmod.h"
 #include "soc.h"
 #include "iomap.h"
 #include "voltage.h"
@@ -43,6 +38,18 @@
 #include "clock2xxx.h"
 #include "clock3xxx.h"
 #include "clock44xx.h"
+#include "omap-pm.h"
+#include "sdrc.h"
+#include "control.h"
+#include "serial.h"
+#include "sram.h"
+#include "cm2xxx.h"
+#include "cm3xxx.h"
+#include "prm.h"
+#include "cm.h"
+#include "prcm_mpu44xx.h"
+#include "prminst44xx.h"
+#include "cminst44xx.h"
 
 /*
  * The machine specific code may provide the extra mapping besides the
@@ -265,7 +272,7 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
 #endif
 
 #ifdef CONFIG_SOC_OMAP2420
-void __init omap242x_map_common_io(void)
+void __init omap242x_map_io(void)
 {
         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
@@ -273,7 +280,7 @@ void __init omap242x_map_common_io(void)
 #endif
 
 #ifdef CONFIG_SOC_OMAP2430
-void __init omap243x_map_common_io(void)
+void __init omap243x_map_io(void)
 {
         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
@@ -281,28 +288,28 @@ void __init omap243x_map_common_io(void)
 #endif
 
 #ifdef CONFIG_ARCH_OMAP3
-void __init omap34xx_map_common_io(void)
+void __init omap3_map_io(void)
 {
         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
 }
 #endif
 
 #ifdef CONFIG_SOC_TI81XX
-void __init omapti81xx_map_common_io(void)
+void __init ti81xx_map_io(void)
 {
         iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
 }
 #endif
 
 #ifdef CONFIG_SOC_AM33XX
-void __init omapam33xx_map_common_io(void)
+void __init am33xx_map_io(void)
 {
         iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
 }
 #endif
 
 #ifdef CONFIG_ARCH_OMAP4
-void __init omap44xx_map_common_io(void)
+void __init omap4_map_io(void)
 {
         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
         omap_barriers_init();
@@ -310,7 +317,7 @@ void __init omap44xx_map_common_io(void)
 #endif
 
 #ifdef CONFIG_SOC_OMAP5
-void __init omap5_map_common_io(void)
+void __init omap5_map_io(void)
 {
         iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
 }
@@ -354,11 +361,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 }
 
-static void __init omap_common_init_early(void)
-{
-        omap_init_consistent_dma_size();
-}
-
 static void __init omap_hwmod_init_postsetup(void)
 {
         u8 postsetup_state;
@@ -377,9 +379,15 @@ static void __init omap_hwmod_init_postsetup(void)
 #ifdef CONFIG_SOC_OMAP2420
 void __init omap2420_init_early(void)
 {
-        omap2_set_globals_242x();
+        omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
+        omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
+                               OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
+        omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
+                                  NULL);
+        omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
+        omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
         omap2xxx_check_revision();
-        omap_common_init_early();
+        omap2xxx_cm_init();
         omap2xxx_voltagedomains_init();
         omap242x_powerdomains_init();
         omap242x_clockdomains_init();
@@ -399,9 +407,15 @@ void __init omap2420_init_late(void)
 #ifdef CONFIG_SOC_OMAP2430
 void __init omap2430_init_early(void)
 {
-        omap2_set_globals_243x();
+        omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
+        omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
+                               OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
+        omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
+                                  NULL);
+        omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
+        omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
         omap2xxx_check_revision();
-        omap_common_init_early();
+        omap2xxx_cm_init();
         omap2xxx_voltagedomains_init();
         omap243x_powerdomains_init();
         omap243x_clockdomains_init();
@@ -425,10 +439,16 @@ void __init omap2430_init_late(void)
 #ifdef CONFIG_ARCH_OMAP3
 void __init omap3_init_early(void)
 {
-        omap2_set_globals_3xxx();
+        omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
+        omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
+                               OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
+        omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
+                                  NULL);
+        omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
+        omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
         omap3xxx_check_revision();
         omap3xxx_check_features();
-        omap_common_init_early();
+        omap3xxx_cm_init();
         omap3xxx_voltagedomains_init();
         omap3xxx_powerdomains_init();
         omap3xxx_clockdomains_init();
@@ -459,10 +479,14 @@ void __init am35xx_init_early(void)
 
 void __init ti81xx_init_early(void)
 {
-        omap2_set_globals_ti81xx();
+        omap2_set_globals_tap(OMAP343X_CLASS,
+                              OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
+        omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
+                                  NULL);
+        omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
+        omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
         omap3xxx_check_revision();
         ti81xx_check_features();
-        omap_common_init_early();
         omap3xxx_voltagedomains_init();
         omap3xxx_powerdomains_init();
         omap3xxx_clockdomains_init();
@@ -517,10 +541,14 @@ void __init ti81xx_init_late(void)
 #ifdef CONFIG_SOC_AM33XX
 void __init am33xx_init_early(void)
 {
-        omap2_set_globals_am33xx();
+        omap2_set_globals_tap(AM335X_CLASS,
+                              AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
+        omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
+                                  NULL);
+        omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
+        omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
         omap3xxx_check_revision();
         ti81xx_check_features();
-        omap_common_init_early();
         am33xx_voltagedomains_init();
         am33xx_powerdomains_init();
         am33xx_clockdomains_init();
@@ -533,10 +561,18 @@ void __init am33xx_init_early(void)
 #ifdef CONFIG_ARCH_OMAP4
 void __init omap4430_init_early(void)
 {
-        omap2_set_globals_443x();
+        omap2_set_globals_tap(OMAP443X_CLASS,
+                              OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
+        omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
+                                  OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
+        omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
+        omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
+                             OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
+        omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
+        omap_prm_base_init();
+        omap_cm_base_init();
         omap4xxx_check_revision();
         omap4xxx_check_features();
-        omap_common_init_early();
         omap44xx_voltagedomains_init();
         omap44xx_powerdomains_init();
         omap44xx_clockdomains_init();
@@ -556,9 +592,17 @@ void __init omap4430_init_late(void)
 #ifdef CONFIG_SOC_OMAP5
 void __init omap5_init_early(void)
 {
-        omap2_set_globals_5xxx();
+        omap2_set_globals_tap(OMAP54XX_CLASS,
+                              OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
+        omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
+                                  OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
+        omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
+        omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
+                             OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
+        omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+        omap_prm_base_init();
+        omap_cm_base_init();
         omap5xxx_check_revision();
-        omap_common_init_early();
 }
 #endif
 
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 37f8f948047b..bf496510eb5e 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -19,16 +19,17 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
-
-#include <plat/dma.h>
-#include <plat/omap_device.h>
 #include <linux/pm_runtime.h>
 
+#include <plat-omap/dma-omap.h>
+
+#include "omap_device.h"
+
 /*
  * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
  * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
  */
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
 
 static int omap3_enable_st_clock(unsigned int id, bool enable)
diff --git a/arch/arm/mach-omap2/mmc.h b/arch/arm/mach-omap2/mmc.h
new file mode 100644
index 000000000000..0cd4b089da9c
--- /dev/null
+++ b/arch/arm/mach-omap2/mmc.h
@@ -0,0 +1,23 @@
+#include <linux/mmc/host.h>
+#include <linux/platform_data/mmc-omap.h>
+
+#define OMAP24XX_NR_MMC         2
+#define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
+#define OMAP2_MMC1_BASE         0x4809c000
+
+#define OMAP4_MMC_REG_OFFSET    0x100
+
+#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
+void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
+#else
+static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
+{
+}
+#endif
+
+struct omap_hwmod;
+int omap_msdi_reset(struct omap_hwmod *oh);
+
+/* called from board-specific card detection service routine */
+extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
+                                        int is_closed);
diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c
index 9e57b4aadb06..aafdd4ca9f4f 100644
--- a/arch/arm/mach-omap2/msdi.c
+++ b/arch/arm/mach-omap2/msdi.c
@@ -25,13 +25,13 @@
 #include <linux/err.h>
 #include <linux/platform_data/gpio-omap.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
-#include <plat/mmc.h>
-
+#include "prm.h"
 #include "common.h"
 #include "control.h"
+#include "omap_hwmod.h"
+#include "omap_device.h"
 #include "mux.h"
+#include "mmc.h"
 
 /*
  * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
@@ -44,9 +44,6 @@
 #define MSDI_CON_CLKD_MASK                      (0x3f << 0)
 #define MSDI_CON_CLKD_SHIFT                     0
 
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT       10000
-
 /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
 #define MSDI_TARGET_RESET_CLKD          0x3ff
 
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 701e17cba468..26126343d6ac 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -36,8 +36,9 @@
 #include <linux/interrupt.h>
 
 
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
 
+#include "soc.h"
 #include "control.h"
 #include "mux.h"
 #include "prm.h"
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index ff4e6a0e9c7c..3f5fd7e3549d 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -50,6 +50,7 @@
 #include <asm/suspend.h>
 #include <asm/hardware/cache-l2x0.h>
 
+#include "soc.h"
 #include "common.h"
 #include "omap44xx.h"
 #include "omap4-sar-layout.h"
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c
index 9722f418ae1f..6a3be2bebddb 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/mach-omap2/omap-pm-noop.c
@@ -22,9 +22,8 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 
-/* Interface documentation is in mach/omap-pm.h */
-#include <plat/omap-pm.h>
-#include <plat/omap_device.h>
+#include "omap_device.h"
+#include "omap-pm.h"
 
 static bool off_mode_enabled;
 static int dummy_context_loss_counter;
diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/mach-omap2/omap-pm.h
index 67faa7b8fe92..67faa7b8fe92 100644
--- a/arch/arm/plat-omap/include/plat/omap-pm.h
+++ b/arch/arm/mach-omap2/omap-pm.h
diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c
index e089e4d1ae38..b970440cffca 100644
--- a/arch/arm/mach-omap2/omap-secure.c
+++ b/arch/arm/mach-omap2/omap-secure.c
@@ -18,7 +18,6 @@
 #include <asm/cacheflush.h>
 #include <asm/memblock.h>
 
-#include <plat/omap-secure.h>
 #include "omap-secure.h"
 
 static phys_addr_t omap_secure_memblock_base;
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h
index c90a43589abe..0e729170c46b 100644
--- a/arch/arm/mach-omap2/omap-secure.h
+++ b/arch/arm/mach-omap2/omap-secure.h
@@ -52,6 +52,13 @@ extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
                                 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
 extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
 extern phys_addr_t omap_secure_ram_mempool_base(void);
+extern int omap_secure_ram_reserve_memblock(void);
 
+#ifdef CONFIG_OMAP4_ERRATA_I688
+extern int omap_barrier_reserve_memblock(void);
+#else
+static inline void omap_barrier_reserve_memblock(void)
+{ }
+#endif
 #endif /* __ASSEMBLER__ */
 #endif /* OMAP_ARCH_OMAP_SECURE_H */
diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c
new file mode 100644
index 000000000000..be6bc89ab1e8
--- /dev/null
+++ b/arch/arm/mach-omap2/omap2-restart.c
@@ -0,0 +1,65 @@
+/*
+ * omap2-restart.c - code common to all OMAP2xxx machines.
+ *
+ * Copyright (C) 2012 Texas Instruments
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+
+#include "common.h"
+#include "prm2xxx.h"
+
+/*
+ * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
+ * clock and the sys_ck.  Used during the reset process
+ */
+static struct clk *reset_virt_prcm_set_ck, *reset_sys_ck;
+
+/* Reboot handling */
+
+/**
+ * omap2xxx_restart - Set DPLL to bypass mode for reboot to work
+ *
+ * Set the DPLL to bypass so that reboot completes successfully.  No
+ * return value.
+ */
+void omap2xxx_restart(char mode, const char *cmd)
+{
+        u32 rate;
+
+        rate = clk_get_rate(reset_sys_ck);
+        clk_set_rate(reset_virt_prcm_set_ck, rate);
+
+        /* XXX Should save the cmd argument for use after the reboot */
+
+        omap2xxx_prm_dpll_reset(); /* never returns */
+        while (1);
+}
+
+/**
+ * omap2xxx_common_look_up_clks_for_reset - look up clocks needed for restart
+ *
+ * Some clocks need to be looked up in advance for the SoC restart
+ * operation to work - see omap2xxx_restart().  Returns -EINVAL upon
+ * error or 0 upon success.
+ */
+static int __init omap2xxx_common_look_up_clks_for_reset(void)
+{
+        reset_virt_prcm_set_ck = clk_get(NULL, "virt_prcm_set");
+        if (IS_ERR(reset_virt_prcm_set_ck))
+                return -EINVAL;
+
+        reset_sys_ck = clk_get(NULL, "sys_ck");
+        if (IS_ERR(reset_sys_ck))
+                return -EINVAL;
+
+        return 0;
+}
+core_initcall(omap2xxx_common_look_up_clks_for_reset);
diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c
new file mode 100644
index 000000000000..923c582189e5
--- /dev/null
+++ b/arch/arm/mach-omap2/omap3-restart.c
@@ -0,0 +1,36 @@
+/*
+ * omap3-restart.c - Code common to all OMAP3xxx machines.
+ *
+ * Copyright (C) 2009, 2012 Texas Instruments
+ * Copyright (C) 2010 Nokia Corporation
+ * Tony Lindgren <tony@atomide.com>
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include "iomap.h"
+#include "common.h"
+#include "control.h"
+#include "prm3xxx.h"
+
+/* Global address base setup code */
+
+/**
+ * omap3xxx_restart - trigger a software restart of the SoC
+ * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
+ * @cmd: passed from the userspace program rebooting the system (if provided)
+ *
+ * Resets the SoC.  For @cmd, see the 'reboot' syscall in
+ * kernel/sys.c.  No return value.
+ */
+void omap3xxx_restart(char mode, const char *cmd)
+{
+        omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
+        omap3xxx_prm_dpll3_reset(); /* never returns */
+        while (1);
+}
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index e1f289748c5d..5695885ea340 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -25,16 +25,17 @@
 #include <asm/mach/map.h>
 #include <asm/memblock.h>
 
-#include <plat/sram.h>
-#include <plat/omap-secure.h>
-#include <plat/mmc.h>
-
 #include "omap-wakeupgen.h"
-
 #include "soc.h"
+#include "iomap.h"
 #include "common.h"
+#include "mmc.h"
 #include "hsmmc.h"
+#include "prminst44xx.h"
+#include "prcm_mpu44xx.h"
 #include "omap4-sar-layout.h"
+#include "omap-secure.h"
+#include "sram.h"
 
 #ifdef CONFIG_CACHE_L2X0
 static void __iomem *l2cache_base;
@@ -281,3 +282,19 @@ int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
         return 0;
 }
 #endif
+
+/**
+ * omap44xx_restart - trigger a software restart of the SoC
+ * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
+ * @cmd: passed from the userspace program rebooting the system (if provided)
+ *
+ * Resets the SoC.  For @cmd, see the 'reboot' syscall in
+ * kernel/sys.c.  No return value.
+ */
+void omap44xx_restart(char mode, const char *cmd)
+{
+        /* XXX Should save 'cmd' into scratchpad for use after reboot */
+        omap4_prminst_global_warm_sw_reset(); /* never returns */
+        while (1);
+}
+
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 7a7d1f2a65e9..0ef934fec364 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -89,9 +89,8 @@
 #include <linux/of.h>
 #include <linux/notifier.h>
 
-#include <plat/omap_device.h>
-#include <plat/omap_hwmod.h>
-#include <plat/clock.h>
+#include "omap_device.h"
+#include "omap_hwmod.h"
 
 /* These parameters are passed to _omap_device_{de,}activate() */
 #define USE_WAKEUP_LAT                  0
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 106f50665804..0933c599bf89 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -34,7 +34,7 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
 
 extern struct dev_pm_domain omap_device_pm_domain;
 
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 87cc6d058de2..b3b00f43dd7c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -139,27 +139,25 @@
 #include <linux/slab.h>
 #include <linux/bootmem.h>
 
-#include <plat/clock.h>
-#include <plat/omap_hwmod.h>
-#include <plat/prcm.h>
+#include "clock.h"
+#include "omap_hwmod.h"
 
 #include "soc.h"
 #include "common.h"
 #include "clockdomain.h"
 #include "powerdomain.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
+#include "cm3xxx.h"
 #include "cminst44xx.h"
 #include "cm33xx.h"
-#include "prm2xxx_3xxx.h"
+#include "prm.h"
+#include "prm3xxx.h"
 #include "prm44xx.h"
 #include "prm33xx.h"
 #include "prminst44xx.h"
 #include "mux.h"
 #include "pm.h"
 
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT       10000
-
 /* Name of the OMAP hwmod for the MPU */
 #define MPU_INITIATOR_NAME              "mpu"
 
@@ -2095,7 +2093,8 @@ static int _enable(struct omap_hwmod *oh)
                         _enable_sysc(oh);
                 }
         } else {
-                _omap4_disable_module(oh);
+                if (soc_ops.disable_module)
+                        soc_ops.disable_module(oh);
                 _disable_clocks(oh);
                 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
                          oh->name, r);
@@ -2703,7 +2702,34 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
 /* Static functions intended only for use in soc_ops field function pointers */
 
 /**
- * _omap2_wait_target_ready - wait for a module to leave slave idle
+ * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
+ * @oh: struct omap_hwmod *
+ *
+ * Wait for a module @oh to leave slave idle.  Returns 0 if the module
+ * does not have an IDLEST bit or if the module successfully leaves
+ * slave idle; otherwise, pass along the return value of the
+ * appropriate *_cm*_wait_module_ready() function.
+ */
+static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
+{
+        if (!oh)
+                return -EINVAL;
+
+        if (oh->flags & HWMOD_NO_IDLEST)
+                return 0;
+
+        if (!_find_mpu_rt_port(oh))
+                return 0;
+
+        /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
+
+        return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
+                                             oh->prcm.omap2.idlest_reg_id,
+                                             oh->prcm.omap2.idlest_idle_bit);
+}
+
+/**
+ * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
  * @oh: struct omap_hwmod *
  *
  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
@@ -2711,7 +2737,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  * slave idle; otherwise, pass along the return value of the
  * appropriate *_cm*_wait_module_ready() function.
  */
-static int _omap2_wait_target_ready(struct omap_hwmod *oh)
+static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
 {
         if (!oh)
                 return -EINVAL;
@@ -2724,9 +2750,9 @@ static int _omap2_wait_target_ready(struct omap_hwmod *oh)
 
         /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
 
-        return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
-                                          oh->prcm.omap2.idlest_reg_id,
-                                          oh->prcm.omap2.idlest_idle_bit);
+        return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
+                                             oh->prcm.omap2.idlest_reg_id,
+                                             oh->prcm.omap2.idlest_idle_bit);
 }
 
 /**
@@ -3994,8 +4020,13 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  */
 void __init omap_hwmod_init(void)
 {
-        if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
-                soc_ops.wait_target_ready = _omap2_wait_target_ready;
+        if (cpu_is_omap24xx()) {
+                soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
+                soc_ops.assert_hardreset = _omap2_assert_hardreset;
+                soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
+                soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
+        } else if (cpu_is_omap34xx()) {
+                soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
                 soc_ops.assert_hardreset = _omap2_assert_hardreset;
                 soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
                 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 1db029438022..87a3c5b7aa74 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -35,7 +35,6 @@
 #include <linux/list.h>
 #include <linux/ioport.h>
 #include <linux/spinlock.h>
-#include <plat/cpu.h>
 
 struct omap_device;
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index b5db6007c523..e8efe3d1da6c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -12,21 +12,23 @@
  * XXX handle crossbar/shared link difference for L3?
  * XXX these should be marked initdata for multi-OMAP kernels
  */
+
+#include <linux/i2c-omap.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/dma.h>
-#include <plat/serial.h>
-#include <plat/i2c.h>
-#include <plat/dmtimer.h>
+#include <plat-omap/dma-omap.h>
+
+#include "omap_hwmod.h"
 #include "l3_2xxx.h"
 #include "l4_2xxx.h"
-#include <plat/mmc.h>
 
 #include "omap_hwmod_common_data.h"
 
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"
+#include "i2c.h"
+#include "mmc.h"
+#include "serial.h"
 #include "wd_timer.h"
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index c455e41b0237..32d17e3fd727 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -12,21 +12,22 @@
  * XXX handle crossbar/shared link difference for L3?
  * XXX these should be marked initdata for multi-OMAP kernels
  */
+
+#include <linux/i2c-omap.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/dma.h>
-#include <plat/serial.h>
-#include <plat/i2c.h>
-#include <plat/dmtimer.h>
-#include <plat/mmc.h>
+#include <plat-omap/dma-omap.h>
+
+#include "omap_hwmod.h"
+#include "mmc.h"
 #include "l3_2xxx.h"
 
 #include "soc.h"
 #include "omap_hwmod_common_data.h"
 #include "prm-regbits-24xx.h"
 #include "cm-regbits-24xx.h"
+#include "i2c.h"
 #include "wd_timer.h"
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
index cbb4ef6544ad..0413daba2dba 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c
@@ -13,8 +13,7 @@
  */
 #include <asm/sizes.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/serial.h>
+#include "omap_hwmod.h"
 
 #include "omap_hwmod_common_data.h"
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 8851bbb6bb24..40d6c93d9853 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -9,13 +9,14 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <plat/omap_hwmod.h>
-#include <plat/serial.h>
-#include <plat/dma.h>
-#include <plat/common.h>
+
+#include <plat-omap/dma-omap.h>
+
+#include "omap_hwmod.h"
 #include "hdq1w.h"
 
 #include "omap_hwmod_common_data.h"
+#include "dma.h"
 
 /* UART */
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
index 1a1287d62648..47901a5e76de 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -13,10 +13,10 @@
  */
 #include <asm/sizes.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/serial.h>
+#include "omap_hwmod.h"
 #include "l3_2xxx.h"
 #include "l4_2xxx.h"
+#include "serial.h"
 
 #include "omap_hwmod_common_data.h"
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index bd9220ed5ab9..0db8f450bad9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -8,13 +8,13 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <plat/omap_hwmod.h>
-#include <plat/serial.h>
+
 #include <linux/platform_data/gpio-omap.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <plat/dmtimer.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 
+#include "omap_hwmod.h"
 #include "omap_hwmod_common_data.h"
 #include "cm-regbits-24xx.h"
 #include "prm-regbits-24xx.h"
@@ -58,8 +58,9 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
         .syss_offs      = 0x0014,
         .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
                            SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                           SYSC_HAS_AUTOIDLE),
+                           SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -268,6 +269,7 @@ struct omap_hwmod omap2xxx_timer1_hwmod = {
         },
         .dev_attr       = &capability_alwon_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer2 */
@@ -286,6 +288,7 @@ struct omap_hwmod omap2xxx_timer2_hwmod = {
                 },
         },
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer3 */
@@ -304,6 +307,7 @@ struct omap_hwmod omap2xxx_timer3_hwmod = {
                 },
         },
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer4 */
@@ -322,6 +326,7 @@ struct omap_hwmod omap2xxx_timer4_hwmod = {
                 },
         },
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer5 */
@@ -341,6 +346,7 @@ struct omap_hwmod omap2xxx_timer5_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer6 */
@@ -360,6 +366,7 @@ struct omap_hwmod omap2xxx_timer6_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer7 */
@@ -379,6 +386,7 @@ struct omap_hwmod omap2xxx_timer7_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer8 */
@@ -398,6 +406,7 @@ struct omap_hwmod omap2xxx_timer8_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer9 */
@@ -417,6 +426,7 @@ struct omap_hwmod omap2xxx_timer9_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer10 */
@@ -436,6 +446,7 @@ struct omap_hwmod omap2xxx_timer10_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer11 */
@@ -455,6 +466,7 @@ struct omap_hwmod omap2xxx_timer11_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer12 */
@@ -474,6 +486,7 @@ struct omap_hwmod omap2xxx_timer12_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap2xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* wd_timer2 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 59d5c1cd316d..ad8d43b33273 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -14,13 +14,11 @@
  * GNU General Public License for more details.
  */
 
-#include <plat/omap_hwmod.h>
-#include <plat/cpu.h>
+#include <linux/i2c-omap.h>
+
+#include "omap_hwmod.h"
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
-#include <plat/dma.h>
-#include <plat/mmc.h>
-#include <plat/i2c.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -28,6 +26,8 @@
 #include "cm33xx.h"
 #include "prm33xx.h"
 #include "prm-regbits-33xx.h"
+#include "i2c.h"
+#include "mmc.h"
 
 /*
  * IP blocks
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f67b7ee07dd4..addc1c24ca2e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -14,16 +14,14 @@
  *
  * XXX these should be marked initdata for multi-OMAP kernels
  */
+
+#include <linux/i2c-omap.h>
 #include <linux/power/smartreflex.h>
 #include <linux/platform_data/gpio-omap.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/dma.h>
-#include <plat/serial.h>
+#include <plat-omap/dma-omap.h>
 #include "l3_3xxx.h"
 #include "l4_3xxx.h"
-#include <plat/i2c.h>
-#include <plat/mmc.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <plat/dmtimer.h>
@@ -32,10 +30,16 @@
 #include "am35xx.h"
 
 #include "soc.h"
+#include "omap_hwmod.h"
 #include "omap_hwmod_common_data.h"
 #include "prm-regbits-34xx.h"
 #include "cm-regbits-34xx.h"
+
+#include "dma.h"
+#include "i2c.h"
+#include "mmc.h"
 #include "wd_timer.h"
+#include "serial.h"
 
 /*
  * OMAP3xxx hardware module integration data
@@ -149,29 +153,16 @@ static struct omap_hwmod omap3xxx_debugss_hwmod = {
 };
 
 /* timer class */
-static struct omap_hwmod_class_sysconfig omap3xxx_timer_1ms_sysc = {
-        .rev_offs       = 0x0000,
-        .sysc_offs      = 0x0010,
-        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
-                                SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
-                                SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE),
-        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-        .sysc_fields    = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap3xxx_timer_1ms_hwmod_class = {
-        .name = "timer",
-        .sysc = &omap3xxx_timer_1ms_sysc,
-};
-
 static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
         .rev_offs       = 0x0000,
         .sysc_offs      = 0x0010,
         .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .sysc_flags     = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+                           SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -220,7 +211,8 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
                 },
         },
         .dev_attr       = &capability_alwon_dev_attr,
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer2 */
@@ -237,7 +229,8 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
                 },
         },
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer3 */
@@ -255,6 +248,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
                 },
         },
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer4 */
@@ -272,6 +266,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
                 },
         },
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer5 */
@@ -290,6 +285,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer6 */
@@ -308,6 +304,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer7 */
@@ -326,6 +323,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
         },
         .dev_attr       = &capability_dsp_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer8 */
@@ -344,6 +342,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
         },
         .dev_attr       = &capability_dsp_pwm_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer9 */
@@ -362,6 +361,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer10 */
@@ -379,7 +379,8 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
                 },
         },
         .dev_attr       = &capability_pwm_dev_attr,
-        .class          = &omap3xxx_timer_1ms_hwmod_class,
+        .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer11 */
@@ -398,6 +399,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
         },
         .dev_attr       = &capability_pwm_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /* timer12 */
@@ -421,6 +423,7 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
         },
         .dev_attr       = &capability_secure_dev_attr,
         .class          = &omap3xxx_timer_hwmod_class,
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0b1249e00398..f5b55a78a5f0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -21,23 +21,24 @@
 #include <linux/io.h>
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/power/smartreflex.h>
-#include <linux/platform_data/omap_ocp2scp.h>
+#include <linux/i2c-omap.h>
+
+#include <plat-omap/dma-omap.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/i2c.h>
-#include <plat/dma.h>
+#include <linux/platform_data/omap_ocp2scp.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
-#include <plat/mmc.h>
 #include <plat/dmtimer.h>
-#include <plat/common.h>
 #include <plat/iommu.h>
 
+#include "omap_hwmod.h"
 #include "omap_hwmod_common_data.h"
 #include "cm1_44xx.h"
 #include "cm2_44xx.h"
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
+#include "i2c.h"
+#include "mmc.h"
 #include "wd_timer.h"
 
 /* Base offset for all OMAP4 interrupts external to MPUSS */
@@ -3102,6 +3103,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
                            SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
                            SYSS_HAS_RESET_STATUS),
         .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .clockact       = CLOCKACT_TEST_ICLK,
         .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 
@@ -3155,6 +3157,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
         .name           = "timer1",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .clkdm_name     = "l4_wkup_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer1_irqs,
         .main_clk       = "timer1_fck",
         .prcm = {
@@ -3177,6 +3180,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
         .name           = "timer2",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer2_irqs,
         .main_clk       = "timer2_fck",
         .prcm = {
@@ -3351,6 +3355,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
         .name           = "timer10",
         .class          = &omap44xx_timer_1ms_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
+        .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
         .mpu_irqs       = omap44xx_timer10_irqs,
         .main_clk       = "timer10_fck",
         .prcm = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index 9f1ccdc8cc8c..79d623b83e49 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -16,7 +16,7 @@
  * data and their integration with other OMAP modules and Linux.
  */
 
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
 
 #include "omap_hwmod_common_data.h"
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 2bc8f1705d4a..cfcce299177c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -13,7 +13,7 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H
 #define __ARCH_ARM_MACH_OMAP2_OMAP_HWMOD_COMMON_DATA_H
 
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
 
 #include "common.h"
 #include "display.h"
diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h
index c784c12f98a1..7e437bf6024c 100644
--- a/arch/arm/mach-omap2/omap_opp_data.h
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -19,7 +19,7 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
 #define __ARCH_ARM_MACH_OMAP2_OMAP_OPP_DATA_H
 
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
 
 #include "voltage.h"
 
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index d992db8ff0b0..4d76a3ca5bf3 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -27,11 +27,11 @@
 #include <linux/io.h>
 #include <linux/err.h>
 #include <linux/usb.h>
-
-#include <plat/usb.h>
+#include <linux/usb/musb.h>
 
 #include "soc.h"
 #include "control.h"
+#include "usb.h"
 
 void am35x_musb_reset(void)
 {
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index f515a1a056d5..2bf35dc091be 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -18,6 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/i2c/twl.h>
 
+#include "soc.h"
 #include "voltage.h"
 
 #include "pm.h"
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index 58e16aef40bb..bd41d59a7cab 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -20,7 +20,7 @@
 #include <linux/opp.h>
 #include <linux/cpu.h>
 
-#include <plat/omap_device.h>
+#include "omap_device.h"
 
 #include "omap_opp_data.h"
 
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c
index 75cef5f67a8a..62772e0e0d69 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -19,6 +19,7 @@
  */
 #include <linux/module.h>
 
+#include "soc.h"
 #include "control.h"
 #include "omap_opp_data.h"
 #include "pm.h"
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 46092cd806fa..e2c291f52f92 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -27,12 +27,12 @@
 #include <linux/module.h>
 #include <linux/slab.h>
 
-#include <plat/clock.h>
+#include "clock.h"
 #include "powerdomain.h"
 #include "clockdomain.h"
-#include <plat/dmtimer.h>
-#include <plat/omap-pm.h>
+#include "omap-pm.h"
 
+#include "soc.h"
 #include "cm2xxx_3xxx.h"
 #include "prm2xxx_3xxx.h"
 #include "pm.h"
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index ea61c32957bd..331478f9b864 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -20,10 +20,11 @@
 
 #include <asm/system_misc.h>
 
-#include <plat/omap-pm.h>
-#include <plat/omap_device.h>
+#include "omap-pm.h"
+#include "omap_device.h"
 #include "common.h"
 
+#include "soc.h"
 #include "prcm-common.h"
 #include "voltage.h"
 #include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 8af6cd6ac331..13e1f4303989 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -31,21 +31,24 @@
 #include <linux/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 
+#include <asm/fncpy.h>
+
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 #include <asm/mach-types.h>
 #include <asm/system_misc.h>
 
-#include <plat/clock.h>
-#include <plat/sram.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
+#include "soc.h"
 #include "common.h"
-#include "prm2xxx_3xxx.h"
+#include "clock.h"
+#include "prm2xxx.h"
 #include "prm-regbits-24xx.h"
-#include "cm2xxx_3xxx.h"
+#include "cm2xxx.h"
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "pm.h"
 #include "control.h"
 #include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3a904de4313e..770320061422 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -32,25 +32,24 @@
 
 #include <trace/events/power.h>
 
+#include <asm/fncpy.h>
 #include <asm/suspend.h>
 #include <asm/system_misc.h>
 
-#include <plat/sram.h>
 #include "clockdomain.h"
 #include "powerdomain.h"
-#include <plat/sdrc.h>
-#include <plat/prcm.h>
-#include <plat/gpmc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
+#include "soc.h"
 #include "common.h"
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
 #include "cm-regbits-34xx.h"
+#include "gpmc.h"
 #include "prm-regbits-34xx.h"
-
-#include "prm2xxx_3xxx.h"
+#include "prm3xxx.h"
 #include "pm.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "control.h"
 
 /* pm34xx errata defined in pm.h */
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 04922d149068..7da75aed1514 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -18,6 +18,7 @@
 #include <linux/slab.h>
 #include <asm/system_misc.h>
 
+#include "soc.h"
 #include "common.h"
 #include "clockdomain.h"
 #include "powerdomain.h"
diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
index 2a791766283d..3cf79b54ce61 100644
--- a/arch/arm/mach-omap2/pmu.c
+++ b/arch/arm/mach-omap2/pmu.c
@@ -15,8 +15,9 @@
 
 #include <asm/pmu.h>
 
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
+#include "soc.h"
+#include "omap_hwmod.h"
+#include "omap_device.h"
 
 static char *omap2_pmu_oh_names[] = {"mpu"};
 static char *omap3_pmu_oh_names[] = {"mpu", "debugss"};
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 1678a3284233..dea62a9aad07 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -29,8 +29,6 @@
 
 #include <asm/cpu.h>
 
-#include <plat/prcm.h>
-
 #include "powerdomain.h"
 #include "clockdomain.h"
 
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index baee90608d11..5277d56eb37f 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -22,8 +22,6 @@
 
 #include <linux/atomic.h>
 
-#include <plat/cpu.h>
-
 #include "voltage.h"
 
 /* Powerdomain basic power states */
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
deleted file mode 100644
index 3950ccfe5f4a..000000000000
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
- * OMAP2 and OMAP3 powerdomain control
- *
- * Copyright (C) 2009-2011 Texas Instruments, Inc.
- * Copyright (C) 2007-2009 Nokia Corporation
- *
- * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
- * Rajendra Nayak <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/io.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/bug.h>
-
-#include <plat/prcm.h>
-
-#include "powerdomain.h"
-#include "prm.h"
-#include "prm-regbits-24xx.h"
-#include "prm-regbits-34xx.h"
-
-
-/* Common functions across OMAP2 and OMAP3 */
-static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
-{
-        omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
-                                (pwrst << OMAP_POWERSTATE_SHIFT),
-                                pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
-        return 0;
-}
-
-static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
-{
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                             OMAP2_PM_PWSTCTRL,
-                                             OMAP_POWERSTATE_MASK);
-}
-
-static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
-{
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                             OMAP2_PM_PWSTST,
-                                             OMAP_POWERSTATEST_MASK);
-}
-
-static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
-                                                                u8 pwrst)
-{
-        u32 m;
-
-        m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
-
-        omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
-                                   OMAP2_PM_PWSTCTRL);
-
-        return 0;
-}
-
-static int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
-                                                                u8 pwrst)
-{
-        u32 m;
-
-        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
-
-        omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
-                                   OMAP2_PM_PWSTCTRL);
-
-        return 0;
-}
-
-static int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
-{
-        u32 m;
-
-        m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
-
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST,
-                                             m);
-}
-
-static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
-{
-        u32 m;
-
-        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
-
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                             OMAP2_PM_PWSTCTRL, m);
-}
-
-static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
-{
-        u32 v;
-
-        v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK);
-        omap2_prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v,
-                                   pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
-
-        return 0;
-}
-
-static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm)
-{
-        u32 c = 0;
-
-        /*
-         * REVISIT: pwrdm_wait_transition() may be better implemented
-         * via a callback and a periodic timer check -- how long do we expect
-         * powerdomain transitions to take?
-         */
-
-        /* XXX Is this udelay() value meaningful? */
-        while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) &
-                OMAP_INTRANSITION_MASK) &&
-                (c++ < PWRDM_TRANSITION_BAILOUT))
-                        udelay(1);
-
-        if (c > PWRDM_TRANSITION_BAILOUT) {
-                pr_err("powerdomain: %s: waited too long to complete transition\n",
-                       pwrdm->name);
-                return -EAGAIN;
-        }
-
-        pr_debug("powerdomain: completed transition in %d loops\n", c);
-
-        return 0;
-}
-
-/* Applicable only for OMAP3. Not supported on OMAP2 */
-static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
-{
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                             OMAP3430_PM_PREPWSTST,
-                                             OMAP3430_LASTPOWERSTATEENTERED_MASK);
-}
-
-static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
-{
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                             OMAP2_PM_PWSTST,
-                                             OMAP3430_LOGICSTATEST_MASK);
-}
-
-static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
-{
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                             OMAP2_PM_PWSTCTRL,
-                                             OMAP3430_LOGICSTATEST_MASK);
-}
-
-static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
-{
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                             OMAP3430_PM_PREPWSTST,
-                                             OMAP3430_LASTLOGICSTATEENTERED_MASK);
-}
-
-static int omap3_get_mem_bank_lastmemst_mask(u8 bank)
-{
-        switch (bank) {
-        case 0:
-                return OMAP3430_LASTMEM1STATEENTERED_MASK;
-        case 1:
-                return OMAP3430_LASTMEM2STATEENTERED_MASK;
-        case 2:
-                return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
-        case 3:
-                return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
-        default:
-                WARN_ON(1); /* should never happen */
-                return -EEXIST;
-        }
-        return 0;
-}
-
-static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
-{
-        u32 m;
-
-        m = omap3_get_mem_bank_lastmemst_mask(bank);
-
-        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
-                                OMAP3430_PM_PREPWSTST, m);
-}
-
-static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
-{
-        omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
-        return 0;
-}
-
-static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
-{
-        return omap2_prm_rmw_mod_reg_bits(0,
-                                          1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
-                                          pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
-}
-
-static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
-{
-        return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
-                                          0, pwrdm->prcm_offs,
-                                          OMAP2_PM_PWSTCTRL);
-}
-
-struct pwrdm_ops omap2_pwrdm_operations = {
-        .pwrdm_set_next_pwrst   = omap2_pwrdm_set_next_pwrst,
-        .pwrdm_read_next_pwrst  = omap2_pwrdm_read_next_pwrst,
-        .pwrdm_read_pwrst       = omap2_pwrdm_read_pwrst,
-        .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
-        .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
-        .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,
-        .pwrdm_read_mem_pwrst   = omap2_pwrdm_read_mem_pwrst,
-        .pwrdm_read_mem_retst   = omap2_pwrdm_read_mem_retst,
-        .pwrdm_wait_transition  = omap2_pwrdm_wait_transition,
-};
-
-struct pwrdm_ops omap3_pwrdm_operations = {
-        .pwrdm_set_next_pwrst   = omap2_pwrdm_set_next_pwrst,
-        .pwrdm_read_next_pwrst  = omap2_pwrdm_read_next_pwrst,
-        .pwrdm_read_pwrst       = omap2_pwrdm_read_pwrst,
-        .pwrdm_read_prev_pwrst  = omap3_pwrdm_read_prev_pwrst,
-        .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
-        .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
-        .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst,
-        .pwrdm_read_prev_logic_pwrst    = omap3_pwrdm_read_prev_logic_pwrst,
-        .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
-        .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,
-        .pwrdm_read_mem_pwrst   = omap2_pwrdm_read_mem_pwrst,
-        .pwrdm_read_mem_retst   = omap2_pwrdm_read_mem_retst,
-        .pwrdm_read_prev_mem_pwrst      = omap3_pwrdm_read_prev_mem_pwrst,
-        .pwrdm_clear_all_prev_pwrst     = omap3_pwrdm_clear_all_prev_pwrst,
-        .pwrdm_enable_hdwr_sar  = omap3_pwrdm_enable_hdwr_sar,
-        .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar,
-        .pwrdm_wait_transition  = omap2_pwrdm_wait_transition,
-};
diff --git a/arch/arm/mach-omap2/powerdomain33xx.c b/arch/arm/mach-omap2/powerdomain33xx.c
deleted file mode 100644
index 67c5663899b6..000000000000
--- a/arch/arm/mach-omap2/powerdomain33xx.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * AM33XX Powerdomain control
- *
- * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Derived from mach-omap2/powerdomain44xx.c written by Rajendra Nayak
- * <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <linux/io.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-
-#include <plat/prcm.h>
-
-#include "powerdomain.h"
-#include "prm33xx.h"
-#include "prm-regbits-33xx.h"
-
-
-static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
-{
-        am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
-                                (pwrst << OMAP_POWERSTATE_SHIFT),
-                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-        return 0;
-}
-
-static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = am33xx_prm_read_reg(pwrdm->prcm_offs,  pwrdm->pwrstctrl_offs);
-        v &= OMAP_POWERSTATE_MASK;
-        v >>= OMAP_POWERSTATE_SHIFT;
-
-        return v;
-}
-
-static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-        v &= OMAP_POWERSTATEST_MASK;
-        v >>= OMAP_POWERSTATEST_SHIFT;
-
-        return v;
-}
-
-static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-        v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
-        v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
-
-        return v;
-}
-
-static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
-{
-        am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
-                                (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT),
-                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-        return 0;
-}
-
-static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
-{
-        am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK,
-                                AM33XX_LASTPOWERSTATEENTERED_MASK,
-                                pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-        return 0;
-}
-
-static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
-{
-        u32 m;
-
-        m = pwrdm->logicretstate_mask;
-        if (!m)
-                return -EINVAL;
-
-        am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
-                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-
-        return 0;
-}
-
-static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-        v &= AM33XX_LOGICSTATEST_MASK;
-        v >>= AM33XX_LOGICSTATEST_SHIFT;
-
-        return v;
-}
-
-static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
-{
-        u32 v, m;
-
-        m = pwrdm->logicretstate_mask;
-        if (!m)
-                return -EINVAL;
-
-        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-        v &= m;
-        v >>= __ffs(m);
-
-        return v;
-}
-
-static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
-                u8 pwrst)
-{
-        u32 m;
-
-        m = pwrdm->mem_on_mask[bank];
-        if (!m)
-                return -EINVAL;
-
-        am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
-                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-
-        return 0;
-}
-
-static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
-                                        u8 pwrst)
-{
-        u32 m;
-
-        m = pwrdm->mem_ret_mask[bank];
-        if (!m)
-                return -EINVAL;
-
-        am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
-                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-
-        return 0;
-}
-
-static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
-{
-        u32 m, v;
-
-        m = pwrdm->mem_pwrst_mask[bank];
-        if (!m)
-                return -EINVAL;
-
-        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
-        v &= m;
-        v >>= __ffs(m);
-
-        return v;
-}
-
-static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
-{
-        u32 m, v;
-
-        m = pwrdm->mem_retst_mask[bank];
-        if (!m)
-                return -EINVAL;
-
-        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
-        v &= m;
-        v >>= __ffs(m);
-
-        return v;
-}
-
-static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
-{
-        u32 c = 0;
-
-        /*
-         * REVISIT: pwrdm_wait_transition() may be better implemented
-         * via a callback and a periodic timer check -- how long do we expect
-         * powerdomain transitions to take?
-         */
-
-        /* XXX Is this udelay() value meaningful? */
-        while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs)
-                        & OMAP_INTRANSITION_MASK) &&
-                        (c++ < PWRDM_TRANSITION_BAILOUT))
-                udelay(1);
-
-        if (c > PWRDM_TRANSITION_BAILOUT) {
-                pr_err("powerdomain: %s: waited too long to complete transition\n",
-                       pwrdm->name);
-                return -EAGAIN;
-        }
-
-        pr_debug("powerdomain: completed transition in %d loops\n", c);
-
-        return 0;
-}
-
-struct pwrdm_ops am33xx_pwrdm_operations = {
-        .pwrdm_set_next_pwrst           = am33xx_pwrdm_set_next_pwrst,
-        .pwrdm_read_next_pwrst          = am33xx_pwrdm_read_next_pwrst,
-        .pwrdm_read_pwrst               = am33xx_pwrdm_read_pwrst,
-        .pwrdm_read_prev_pwrst          = am33xx_pwrdm_read_prev_pwrst,
-        .pwrdm_set_logic_retst          = am33xx_pwrdm_set_logic_retst,
-        .pwrdm_read_logic_pwrst         = am33xx_pwrdm_read_logic_pwrst,
-        .pwrdm_read_logic_retst         = am33xx_pwrdm_read_logic_retst,
-        .pwrdm_clear_all_prev_pwrst     = am33xx_pwrdm_clear_all_prev_pwrst,
-        .pwrdm_set_lowpwrstchange       = am33xx_pwrdm_set_lowpwrstchange,
-        .pwrdm_read_mem_pwrst           = am33xx_pwrdm_read_mem_pwrst,
-        .pwrdm_read_mem_retst           = am33xx_pwrdm_read_mem_retst,
-        .pwrdm_set_mem_onst             = am33xx_pwrdm_set_mem_onst,
-        .pwrdm_set_mem_retst            = am33xx_pwrdm_set_mem_retst,
-        .pwrdm_wait_transition          = am33xx_pwrdm_wait_transition,
-};
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
deleted file mode 100644
index aceb4f464c9b..000000000000
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/*
- * OMAP4 powerdomain control
- *
- * Copyright (C) 2009-2010, 2012 Texas Instruments, Inc.
- * Copyright (C) 2007-2009 Nokia Corporation
- *
- * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
- * Rajendra Nayak <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/io.h>
-#include <linux/errno.h>
-#include <linux/delay.h>
-#include <linux/bug.h>
-
-#include "powerdomain.h"
-#include <plat/prcm.h>
-#include "prm2xxx_3xxx.h"
-#include "prm44xx.h"
-#include "prminst44xx.h"
-#include "prm-regbits-44xx.h"
-
-static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
-{
-        omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK,
-                                        (pwrst << OMAP_POWERSTATE_SHIFT),
-                                        pwrdm->prcm_partition,
-                                        pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
-        return 0;
-}
-
-static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTCTRL);
-        v &= OMAP_POWERSTATE_MASK;
-        v >>= OMAP_POWERSTATE_SHIFT;
-
-        return v;
-}
-
-static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTST);
-        v &= OMAP_POWERSTATEST_MASK;
-        v >>= OMAP_POWERSTATEST_SHIFT;
-
-        return v;
-}
-
-static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTST);
-        v &= OMAP4430_LASTPOWERSTATEENTERED_MASK;
-        v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT;
-
-        return v;
-}
-
-static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
-{
-        omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
-                                        (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
-                                        pwrdm->prcm_partition,
-                                        pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
-        return 0;
-}
-
-static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
-{
-        omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
-                                        OMAP4430_LASTPOWERSTATEENTERED_MASK,
-                                        pwrdm->prcm_partition,
-                                        pwrdm->prcm_offs, OMAP4_PM_PWSTST);
-        return 0;
-}
-
-static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
-{
-        u32 v;
-
-        v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
-        omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
-                                        pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTCTRL);
-
-        return 0;
-}
-
-static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
-                                    u8 pwrst)
-{
-        u32 m;
-
-        m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
-
-        omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
-                                        pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTCTRL);
-
-        return 0;
-}
-
-static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
-                                     u8 pwrst)
-{
-        u32 m;
-
-        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
-
-        omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
-                                        pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTCTRL);
-
-        return 0;
-}
-
-static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTST);
-        v &= OMAP4430_LOGICSTATEST_MASK;
-        v >>= OMAP4430_LOGICSTATEST_SHIFT;
-
-        return v;
-}
-
-static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
-{
-        u32 v;
-
-        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTCTRL);
-        v &= OMAP4430_LOGICRETSTATE_MASK;
-        v >>= OMAP4430_LOGICRETSTATE_SHIFT;
-
-        return v;
-}
-
-/**
- * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate
- * @pwrdm: struct powerdomain * to read the state for
- *
- * Reads the previous logic powerstate for a powerdomain. This
- * function must determine the previous logic powerstate by first
- * checking the previous powerstate for the domain. If that was OFF,
- * then logic has been lost. If previous state was RETENTION, the
- * function reads the setting for the next retention logic state to
- * see the actual value.  In every other case, the logic is
- * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET
- * depending whether the logic was retained or not.
- */
-static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
-{
-        int state;
-
-        state = omap4_pwrdm_read_prev_pwrst(pwrdm);
-
-        if (state == PWRDM_POWER_OFF)
-                return PWRDM_POWER_OFF;
-
-        if (state != PWRDM_POWER_RET)
-                return PWRDM_POWER_RET;
-
-        return omap4_pwrdm_read_logic_retst(pwrdm);
-}
-
-static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
-{
-        u32 m, v;
-
-        m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
-
-        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTST);
-        v &= m;
-        v >>= __ffs(m);
-
-        return v;
-}
-
-static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
-{
-        u32 m, v;
-
-        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
-
-        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
-                                        OMAP4_PM_PWSTCTRL);
-        v &= m;
-        v >>= __ffs(m);
-
-        return v;
-}
-
-/**
- * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate
- * @pwrdm: struct powerdomain * to read mem powerstate for
- * @bank: memory bank index
- *
- * Reads the previous memory powerstate for a powerdomain. This
- * function must determine the previous memory powerstate by first
- * checking the previous powerstate for the domain. If that was OFF,
- * then logic has been lost. If previous state was RETENTION, the
- * function reads the setting for the next memory retention state to
- * see the actual value.  In every other case, the logic is
- * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET
- * depending whether logic was retained or not.
- */
-static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
-{
-        int state;
-
-        state = omap4_pwrdm_read_prev_pwrst(pwrdm);
-
-        if (state == PWRDM_POWER_OFF)
-                return PWRDM_POWER_OFF;
-
-        if (state != PWRDM_POWER_RET)
-                return PWRDM_POWER_RET;
-
-        return omap4_pwrdm_read_mem_retst(pwrdm, bank);
-}
-
-static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
-{
-        u32 c = 0;
-
-        /*
-         * REVISIT: pwrdm_wait_transition() may be better implemented
-         * via a callback and a periodic timer check -- how long do we expect
-         * powerdomain transitions to take?
-         */
-
-        /* XXX Is this udelay() value meaningful? */
-        while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition,
-                                            pwrdm->prcm_offs,
-                                            OMAP4_PM_PWSTST) &
-                OMAP_INTRANSITION_MASK) &&
-               (c++ < PWRDM_TRANSITION_BAILOUT))
-                udelay(1);
-
-        if (c > PWRDM_TRANSITION_BAILOUT) {
-                pr_err("powerdomain: %s: waited too long to complete transition\n",
-                       pwrdm->name);
-                return -EAGAIN;
-        }
-
-        pr_debug("powerdomain: completed transition in %d loops\n", c);
-
-        return 0;
-}
-
-struct pwrdm_ops omap4_pwrdm_operations = {
-        .pwrdm_set_next_pwrst   = omap4_pwrdm_set_next_pwrst,
-        .pwrdm_read_next_pwrst  = omap4_pwrdm_read_next_pwrst,
-        .pwrdm_read_pwrst       = omap4_pwrdm_read_pwrst,
-        .pwrdm_read_prev_pwrst  = omap4_pwrdm_read_prev_pwrst,
-        .pwrdm_set_lowpwrstchange       = omap4_pwrdm_set_lowpwrstchange,
-        .pwrdm_clear_all_prev_pwrst     = omap4_pwrdm_clear_all_prev_pwrst,
-        .pwrdm_set_logic_retst  = omap4_pwrdm_set_logic_retst,
-        .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst,
-        .pwrdm_read_prev_logic_pwrst    = omap4_pwrdm_read_prev_logic_pwrst,
-        .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst,
-        .pwrdm_read_mem_pwrst   = omap4_pwrdm_read_mem_pwrst,
-        .pwrdm_read_mem_retst   = omap4_pwrdm_read_mem_retst,
-        .pwrdm_read_prev_mem_pwrst      = omap4_pwrdm_read_prev_mem_pwrst,
-        .pwrdm_set_mem_onst     = omap4_pwrdm_set_mem_onst,
-        .pwrdm_set_mem_retst    = omap4_pwrdm_set_mem_retst,
-        .pwrdm_wait_transition  = omap4_pwrdm_wait_transition,
-};
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index 2385c1f009ee..ba520d4f7c7b 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 
+#include "soc.h"
 #include "powerdomain.h"
 #include "powerdomains2xxx_3xxx_data.h"
 
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 72df97482cc0..c7d355fafd24 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -406,11 +406,6 @@
 #define OMAP3430_EN_CORE_MASK                           (1 << 0)
 
 
-/*
- * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
- * submodule to exit hardreset
- */
-#define MAX_MODULE_HARDRESET_WAIT               10000
 
 /*
  * Maximum time(us) it takes to output the signal WUCLKOUT of the last
@@ -419,24 +414,7 @@
  * microseconds on OMAP4, so this timeout may be too high.
  */
 #define MAX_IOPAD_LATCH_TIME                    100
-
 # ifndef __ASSEMBLER__
-extern void __iomem *prm_base;
-extern void __iomem *cm_base;
-extern void __iomem *cm2_base;
-extern void __iomem *prcm_mpu_base;
-
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
-extern void omap_prm_base_init(void);
-extern void omap_cm_base_init(void);
-#else
-static inline void omap_prm_base_init(void)
-{
-}
-static inline void omap_cm_base_init(void)
-{
-}
-#endif
 
 /**
  * struct omap_prcm_irq - describes a PRCM interrupt bit
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
deleted file mode 100644
index 0f51e034e0aa..000000000000
--- a/arch/arm/mach-omap2/prcm.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * linux/arch/arm/mach-omap2/prcm.c
- *
- * OMAP 24xx Power Reset and Clock Management (PRCM) functions
- *
- * Copyright (C) 2005 Nokia Corporation
- *
- * Written by Tony Lindgren <tony.lindgren@nokia.com>
- *
- * Copyright (C) 2007 Texas Instruments, Inc.
- * Rajendra Nayak <rnayak@ti.com>
- *
- * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc.
- * Upgraded with OMAP4 support by Abhijit Pagare <abhijitpagare@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/export.h>
-
-#include "common.h"
-#include <plat/prcm.h>
-
-#include "clock.h"
-#include "clock2xxx.h"
-#include "cm2xxx_3xxx.h"
-#include "prm2xxx_3xxx.h"
-#include "prm44xx.h"
-#include "prminst44xx.h"
-#include "cminst44xx.h"
-#include "prm-regbits-24xx.h"
-#include "prm-regbits-44xx.h"
-#include "control.h"
-
-void __iomem *prm_base;
-void __iomem *cm_base;
-void __iomem *cm2_base;
-void __iomem *prcm_mpu_base;
-
-#define MAX_MODULE_ENABLE_WAIT          100000
-
-u32 omap_prcm_get_reset_sources(void)
-{
-        /* XXX This presumably needs modification for 34XX */
-        if (cpu_is_omap24xx() || cpu_is_omap34xx())
-                return omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f;
-        if (cpu_is_omap44xx())
-                return omap2_prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f;
-
-        return 0;
-}
-EXPORT_SYMBOL(omap_prcm_get_reset_sources);
-
-/* Resets clock rates and reboots the system. Only called from system.h */
-void omap_prcm_restart(char mode, const char *cmd)
-{
-        s16 prcm_offs = 0;
-
-        if (cpu_is_omap24xx()) {
-                omap2xxx_clk_prepare_for_reboot();
-
-                prcm_offs = WKUP_MOD;
-        } else if (cpu_is_omap34xx()) {
-                prcm_offs = OMAP3430_GR_MOD;
-                omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
-        } else if (cpu_is_omap44xx()) {
-                omap4_prminst_global_warm_sw_reset(); /* never returns */
-        } else {
-                WARN_ON(1);
-        }
-
-        /*
-         * As per Errata i520, in some cases, user will not be able to
-         * access DDR memory after warm-reset.
-         * This situation occurs while the warm-reset happens during a read
-         * access to DDR memory. In that particular condition, DDR memory
-         * does not respond to a corrupted read command due to the warm
-         * reset occurrence but SDRC is waiting for read completion.
-         * SDRC is not sensitive to the warm reset, but the interconnect is
-         * reset on the fly, thus causing a misalignment between SDRC logic,
-         * interconnect logic and DDR memory state.
-         * WORKAROUND:
-         * Steps to perform before a Warm reset is trigged:
-         * 1. enable self-refresh on idle request
-         * 2. put SDRC in idle
-         * 3. wait until SDRC goes to idle
-         * 4. generate SW reset (Global SW reset)
-         *
-         * Steps to be performed after warm reset occurs (in bootloader):
-         * if HW warm reset is the source, apply below steps before any
-         * accesses to SDRAM:
-         * 1. Reset SMS and SDRC and wait till reset is complete
-         * 2. Re-initialize SMS, SDRC and memory
-         *
-         * NOTE: Above work around is required only if arch reset is implemented
-         * using Global SW reset(GLOBAL_SW_RST). DPLL3 reset does not need
-         * the WA since it resets SDRC as well as part of cold reset.
-         */
-
-        /* XXX should be moved to some OMAP2/3 specific code */
-        omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs,
-                                   OMAP2_RM_RSTCTRL);
-        omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
-}
-
-/**
- * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
- * @reg: physical address of module IDLEST register
- * @mask: value to mask against to determine if the module is active
- * @idlest: idle state indicator (0 or 1) for the clock
- * @name: name of the clock (for printk)
- *
- * Returns 1 if the module indicated readiness in time, or 0 if it
- * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds.
- *
- * XXX This function is deprecated.  It should be removed once the
- * hwmod conversion is complete.
- */
-int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
-                                const char *name)
-{
-        int i = 0;
-        int ena = 0;
-
-        if (idlest)
-                ena = 0;
-        else
-                ena = mask;
-
-        /* Wait for lock */
-        omap_test_timeout(((__raw_readl(reg) & mask) == ena),
-                          MAX_MODULE_ENABLE_WAIT, i);
-
-        if (i < MAX_MODULE_ENABLE_WAIT)
-                pr_debug("cm: Module associated with clock %s ready after %d loops\n",
-                         name, i);
-        else
-                pr_err("cm: Module associated with clock %s didn't enable in %d tries\n",
-                       name, MAX_MODULE_ENABLE_WAIT);
-
-        return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
-};
-
-void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
-{
-        if (omap2_globals->prm)
-                prm_base = omap2_globals->prm;
-        if (omap2_globals->cm)
-                cm_base = omap2_globals->cm;
-        if (omap2_globals->cm2)
-                cm2_base = omap2_globals->cm2;
-        if (omap2_globals->prcm_mpu)
-                prcm_mpu_base = omap2_globals->prcm_mpu;
-
-        if (cpu_is_omap44xx() || soc_is_omap54xx()) {
-                omap_prm_base_init();
-                omap_cm_base_init();
-        }
-}
-
-/*
- * Stubbed functions so that common files continue to build when
- * custom builds are used
- * XXX These are temporary and should be removed at the earliest possible
- * opportunity
- */
-int __weak omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
-                                        u16 clkctrl_offs)
-{
-        return 0;
-}
-
-void __weak omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
-                                s16 cdoffs, u16 clkctrl_offs)
-{
-}
-
-void __weak omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
-                                 u16 clkctrl_offs)
-{
-}
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c
index 928dbd4f20ed..c30e44a7fab0 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.c
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.c
@@ -20,6 +20,12 @@
 #include "prcm_mpu44xx.h"
 #include "cm-regbits-44xx.h"
 
+/*
+ * prcm_mpu_base: the virtual address of the start of the PRCM_MPU IP
+ *   block registers
+ */
+void __iomem *prcm_mpu_base;
+
 /* PRCM_MPU low-level functions */
 
 u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg)
@@ -43,3 +49,14 @@ u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
 
         return v;
 }
+
+/**
+ * omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use)
+ * @prcm_mpu: PRCM_MPU base virtual address
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
+ */
+void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu)
+{
+        prcm_mpu_base = prcm_mpu;
+}
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h
index 8a6e250f04b5..884af7bb4afd 100644
--- a/arch/arm/mach-omap2/prcm_mpu44xx.h
+++ b/arch/arm/mach-omap2/prcm_mpu44xx.h
@@ -1,7 +1,7 @@
 /*
  * OMAP44xx PRCM MPU instance offset macros
  *
- * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010, 2012 Texas Instruments, Inc.
  * Copyright (C) 2010 Nokia Corporation
  *
  * Paul Walmsley (paul@pwsan.com)
@@ -25,6 +25,12 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
 #define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
 
+#include "common.h"
+
+# ifndef __ASSEMBLER__
+extern void __iomem *prcm_mpu_base;
+# endif
+
 #define OMAP4430_PRCM_MPU_BASE                  0x48243000
 
 #define OMAP44XX_PRCM_MPU_REGADDR(inst, reg)                            \
@@ -98,6 +104,7 @@ extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx);
 extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx);
 extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst,
                                             s16 idx);
+extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu);
 # endif
 
 #endif
diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h
index 6ac966103f34..638da6dd41c3 100644
--- a/arch/arm/mach-omap2/prm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-24xx.h
@@ -14,7 +14,7 @@
  * published by the Free Software Foundation.
  */
 
-#include "prm2xxx_3xxx.h"
+#include "prm2xxx.h"
 
 /* Bits shared between registers */
 
@@ -209,9 +209,13 @@
 
 /* RM_RSTST_WKUP specific bits */
 /* 2430 calls EXTWMPU_RST "EXTWARM_RST" and GLOBALWMPU_RST "GLOBALWARM_RST" */
+#define OMAP24XX_EXTWMPU_RST_SHIFT                      6
 #define OMAP24XX_EXTWMPU_RST_MASK                       (1 << 6)
+#define OMAP24XX_SECU_WD_RST_SHIFT                      5
 #define OMAP24XX_SECU_WD_RST_MASK                       (1 << 5)
+#define OMAP24XX_MPU_WD_RST_SHIFT                       4
 #define OMAP24XX_MPU_WD_RST_MASK                        (1 << 4)
+#define OMAP24XX_SECU_VIOL_RST_SHIFT                    3
 #define OMAP24XX_SECU_VIOL_RST_MASK                     (1 << 3)
 
 /* PM_WKEN_WKUP specific bits */
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 64c087af6a8b..838b594d4e13 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -14,7 +14,7 @@
 #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_34XX_H
 
 
-#include "prm2xxx_3xxx.h"
+#include "prm3xxx.h"
 
 /* Shared register bits */
 
@@ -509,15 +509,25 @@
 #define OMAP3430_RSTTIME1_MASK                          (0xff << 0)
 
 /* PRM_RSTST */
+#define OMAP3430_ICECRUSHER_RST_SHIFT                   10
 #define OMAP3430_ICECRUSHER_RST_MASK                    (1 << 10)
+#define OMAP3430_ICEPICK_RST_SHIFT                      9
 #define OMAP3430_ICEPICK_RST_MASK                       (1 << 9)
+#define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT         8
 #define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_MASK          (1 << 8)
+#define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT         7
 #define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_MASK          (1 << 7)
+#define OMAP3430_EXTERNAL_WARM_RST_SHIFT                6
 #define OMAP3430_EXTERNAL_WARM_RST_MASK                 (1 << 6)
+#define OMAP3430_SECURE_WD_RST_SHIFT                    5
 #define OMAP3430_SECURE_WD_RST_MASK                     (1 << 5)
+#define OMAP3430_MPU_WD_RST_SHIFT                       4
 #define OMAP3430_MPU_WD_RST_MASK                        (1 << 4)
+#define OMAP3430_SECURITY_VIOL_RST_SHIFT                3
 #define OMAP3430_SECURITY_VIOL_RST_MASK                 (1 << 3)
+#define OMAP3430_GLOBAL_SW_RST_SHIFT                    1
 #define OMAP3430_GLOBAL_SW_RST_MASK                     (1 << 1)
+#define OMAP3430_GLOBAL_COLD_RST_SHIFT                  0
 #define OMAP3430_GLOBAL_COLD_RST_MASK                   (1 << 0)
 
 /* PRM_VOLTCTRL */
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 39d562169d18..a1a266ce90da 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -1,7 +1,7 @@
 /*
  * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions
  *
- * Copyright (C) 2007-2009 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
  * Copyright (C) 2010 Nokia Corporation
  *
  * Paul Walmsley
@@ -15,6 +15,28 @@
 
 #include "prcm-common.h"
 
+# ifndef __ASSEMBLER__
+extern void __iomem *prm_base;
+extern void omap2_set_globals_prm(void __iomem *prm);
+# endif
+
+
+/*
+ * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
+ * module to softreset
+ */
+#define MAX_MODULE_SOFTRESET_WAIT               10000
+
+/*
+ * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
+ * submodule to exit hardreset
+ */
+#define MAX_MODULE_HARDRESET_WAIT               10000
+
+/*
+ * Register bitfields
+ */
+
 /*
  * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP
  *
@@ -52,5 +74,58 @@
 #define OMAP_POWERSTATE_SHIFT                           0
 #define OMAP_POWERSTATE_MASK                            (0x3 << 0)
 
+/*
+ * Standardized OMAP reset source bits
+ *
+ * To the extent these happen to match the hardware register bit
+ * shifts, it's purely coincidental.  Used by omap-wdt.c.
+ * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever
+ * there are any bits remaining in the global PRM_RSTST register that
+ * haven't been identified, or when the PRM code for the current SoC
+ * doesn't know how to interpret the register.
+ */
+#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT                       0
+#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT                       1
+#define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT                         2
+#define OMAP_MPU_WD_RST_SRC_ID_SHIFT                            3
+#define OMAP_SECU_WD_RST_SRC_ID_SHIFT                           4
+#define OMAP_EXTWARM_RST_SRC_ID_SHIFT                           5
+#define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT                        6
+#define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT                        7
+#define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT                       8
+#define OMAP_ICEPICK_RST_SRC_ID_SHIFT                           9
+#define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT                        10
+#define OMAP_C2C_RST_SRC_ID_SHIFT                               11
+#define OMAP_UNKNOWN_RST_SRC_ID_SHIFT                           12
+
+#ifndef __ASSEMBLER__
+
+/**
+ * struct prm_reset_src_map - map register bitshifts to standard bitshifts
+ * @reg_shift: bitshift in the PRM reset source register
+ * @std_shift: bitshift equivalent in the standard reset source list
+ *
+ * The fields are signed because -1 is used as a terminator.
+ */
+struct prm_reset_src_map {
+        s8 reg_shift;
+        s8 std_shift;
+};
+
+/**
+ * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations
+ * @read_reset_sources: ptr to the Soc PRM-specific get_reset_source impl
+ */
+struct prm_ll_data {
+        u32 (*read_reset_sources)(void);
+};
+
+extern int prm_register(struct prm_ll_data *pld);
+extern int prm_unregister(struct prm_ll_data *pld);
+
+extern u32 prm_read_reset_sources(void);
+
+#endif
+
 
 #endif
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
new file mode 100644
index 000000000000..bf24fc47603b
--- /dev/null
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -0,0 +1,139 @@
+/*
+ * OMAP2xxx PRM module functions
+ *
+ * Copyright (C) 2010-2012 Texas Instruments, Inc.
+ * Copyright (C) 2010 Nokia Corporation
+ * Benoît Cousson
+ * Paul Walmsley
+ * Rajendra Nayak <rnayak@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+
+#include "common.h"
+#include <plat/cpu.h>
+
+#include "vp.h"
+#include "powerdomain.h"
+#include "clockdomain.h"
+#include "prm2xxx.h"
+#include "cm2xxx_3xxx.h"
+#include "prm-regbits-24xx.h"
+
+/*
+ * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
+ *   hardware register (which are specific to the OMAP2xxx SoCs) to
+ *   reset source ID bit shifts (which is an OMAP SoC-independent
+ *   enumeration)
+ */
+static struct prm_reset_src_map omap2xxx_prm_reset_src_map[] = {
+        { OMAP_GLOBALCOLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
+        { OMAP_GLOBALWARM_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
+        { OMAP24XX_SECU_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
+        { OMAP24XX_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT },
+        { OMAP24XX_SECU_WD_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT },
+        { OMAP24XX_EXTWMPU_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT },
+        { -1, -1 },
+};
+
+/**
+ * omap2xxx_prm_read_reset_sources - return the last SoC reset source
+ *
+ * Return a u32 representing the last reset sources of the SoC.  The
+ * returned reset source bits are standardized across OMAP SoCs.
+ */
+static u32 omap2xxx_prm_read_reset_sources(void)
+{
+        struct prm_reset_src_map *p;
+        u32 r = 0;
+        u32 v;
+
+        v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST);
+
+        p = omap2xxx_prm_reset_src_map;
+        while (p->reg_shift >= 0 && p->std_shift >= 0) {
+                if (v & (1 << p->reg_shift))
+                        r |= 1 << p->std_shift;
+                p++;
+        }
+
+        return r;
+}
+
+/**
+ * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
+ *
+ * Set the DPLL reset bit, which should reboot the SoC.  This is the
+ * recommended way to restart the SoC.  No return value.
+ */
+void omap2xxx_prm_dpll_reset(void)
+{
+        omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
+                                   OMAP2_RM_RSTCTRL);
+        /* OCP barrier */
+        omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
+}
+
+int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
+{
+        omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
+                                   clkdm->pwrdm.ptr->prcm_offs,
+                                   OMAP2_PM_PWSTCTRL);
+        return 0;
+}
+
+int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
+{
+        omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
+                                     clkdm->pwrdm.ptr->prcm_offs,
+                                     OMAP2_PM_PWSTCTRL);
+        return 0;
+}
+
+struct pwrdm_ops omap2_pwrdm_operations = {
+        .pwrdm_set_next_pwrst   = omap2_pwrdm_set_next_pwrst,
+        .pwrdm_read_next_pwrst  = omap2_pwrdm_read_next_pwrst,
+        .pwrdm_read_pwrst       = omap2_pwrdm_read_pwrst,
+        .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
+        .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
+        .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,
+        .pwrdm_read_mem_pwrst   = omap2_pwrdm_read_mem_pwrst,
+        .pwrdm_read_mem_retst   = omap2_pwrdm_read_mem_retst,
+        .pwrdm_wait_transition  = omap2_pwrdm_wait_transition,
+};
+
+/*
+ *
+ */
+
+static struct prm_ll_data omap2xxx_prm_ll_data = {
+        .read_reset_sources = &omap2xxx_prm_read_reset_sources,
+};
+
+static int __init omap2xxx_prm_init(void)
+{
+        if (!cpu_is_omap24xx())
+                return 0;
+
+        return prm_register(&omap2xxx_prm_ll_data);
+}
+subsys_initcall(omap2xxx_prm_init);
+
+static void __exit omap2xxx_prm_exit(void)
+{
+        if (!cpu_is_omap24xx())
+                return;
+
+        /* Should never happen */
+        WARN(prm_unregister(&omap2xxx_prm_ll_data),
+             "%s: prm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap2xxx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
new file mode 100644
index 000000000000..fe8a14f190ab
--- /dev/null
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -0,0 +1,134 @@
+/*
+ * OMAP2xxx Power/Reset Management (PRM) register definitions
+ *
+ * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc.
+ * Copyright (C) 2008-2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * The PRM hardware modules on the OMAP2/3 are quite similar to each
+ * other.  The PRM on OMAP4 has a new register layout, and is handled
+ * in a separate file.
+ */
+#ifndef __ARCH_ARM_MACH_OMAP2_PRM2XXX_H
+#define __ARCH_ARM_MACH_OMAP2_PRM2XXX_H
+
+#include "prcm-common.h"
+#include "prm.h"
+#include "prm2xxx_3xxx.h"
+
+#define OMAP2420_PRM_REGADDR(module, reg)                               \
+                OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
+#define OMAP2430_PRM_REGADDR(module, reg)                               \
+                OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
+
+/*
+ * OMAP2-specific global PRM registers
+ * Use __raw_{read,write}l() with these registers.
+ *
+ * With a few exceptions, these are the register names beginning with
+ * PRCM_* on 24xx.  (The exceptions are the IRQSTATUS and IRQENABLE
+ * bits.)
+ *
+ */
+
+#define OMAP2_PRCM_REVISION_OFFSET      0x0000
+#define OMAP2420_PRCM_REVISION          OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000)
+#define OMAP2_PRCM_SYSCONFIG_OFFSET     0x0010
+#define OMAP2420_PRCM_SYSCONFIG         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010)
+
+#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018
+#define OMAP2420_PRCM_IRQSTATUS_MPU     OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018)
+#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c
+#define OMAP2420_PRCM_IRQENABLE_MPU     OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c)
+
+#define OMAP2_PRCM_VOLTCTRL_OFFSET      0x0050
+#define OMAP2420_PRCM_VOLTCTRL          OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050)
+#define OMAP2_PRCM_VOLTST_OFFSET        0x0054
+#define OMAP2420_PRCM_VOLTST            OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054)
+#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET   0x0060
+#define OMAP2420_PRCM_CLKSRC_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060)
+#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET   0x0070
+#define OMAP2420_PRCM_CLKOUT_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070)
+#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET  0x0078
+#define OMAP2420_PRCM_CLKEMUL_CTRL      OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078)
+#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET   0x0080
+#define OMAP2420_PRCM_CLKCFG_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080)
+#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084
+#define OMAP2420_PRCM_CLKCFG_STATUS     OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084)
+#define OMAP2_PRCM_VOLTSETUP_OFFSET     0x0090
+#define OMAP2420_PRCM_VOLTSETUP         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090)
+#define OMAP2_PRCM_CLKSSETUP_OFFSET     0x0094
+#define OMAP2420_PRCM_CLKSSETUP         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094)
+#define OMAP2_PRCM_POLCTRL_OFFSET       0x0098
+#define OMAP2420_PRCM_POLCTRL           OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098)
+
+#define OMAP2430_PRCM_REVISION          OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000)
+#define OMAP2430_PRCM_SYSCONFIG         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010)
+
+#define OMAP2430_PRCM_IRQSTATUS_MPU     OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018)
+#define OMAP2430_PRCM_IRQENABLE_MPU     OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c)
+
+#define OMAP2430_PRCM_VOLTCTRL          OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050)
+#define OMAP2430_PRCM_VOLTST            OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054)
+#define OMAP2430_PRCM_CLKSRC_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060)
+#define OMAP2430_PRCM_CLKOUT_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070)
+#define OMAP2430_PRCM_CLKEMUL_CTRL      OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078)
+#define OMAP2430_PRCM_CLKCFG_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080)
+#define OMAP2430_PRCM_CLKCFG_STATUS     OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084)
+#define OMAP2430_PRCM_VOLTSETUP         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090)
+#define OMAP2430_PRCM_CLKSSETUP         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094)
+#define OMAP2430_PRCM_POLCTRL           OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098)
+
+/*
+ * Module specific PRM register offsets from PRM_BASE + domain offset
+ *
+ * Use prm_{read,write}_mod_reg() with these registers.
+ *
+ * With a few exceptions, these are the register names beginning with
+ * {PM,RM}_* on both OMAP2/3 SoC families..  (The exceptions are the
+ * IRQSTATUS and IRQENABLE bits.)
+ */
+
+/* Register offsets appearing on both OMAP2 and OMAP3 */
+
+#define OMAP2_RM_RSTCTRL                                0x0050
+#define OMAP2_RM_RSTTIME                                0x0054
+#define OMAP2_RM_RSTST                                  0x0058
+#define OMAP2_PM_PWSTCTRL                               0x00e0
+#define OMAP2_PM_PWSTST                                 0x00e4
+
+#define PM_WKEN                                         0x00a0
+#define PM_WKEN1                                        PM_WKEN
+#define PM_WKST                                         0x00b0
+#define PM_WKST1                                        PM_WKST
+#define PM_WKDEP                                        0x00c8
+#define PM_EVGENCTRL                                    0x00d4
+#define PM_EVGENONTIM                                   0x00d8
+#define PM_EVGENOFFTIM                                  0x00dc
+
+/* OMAP2xxx specific register offsets */
+#define OMAP24XX_PM_WKEN2                               0x00a4
+#define OMAP24XX_PM_WKST2                               0x00b4
+
+#define OMAP24XX_PRCM_IRQSTATUS_DSP                     0x00f0  /* IVA mod */
+#define OMAP24XX_PRCM_IRQENABLE_DSP                     0x00f4  /* IVA mod */
+#define OMAP24XX_PRCM_IRQSTATUS_IVA                     0x00f8
+#define OMAP24XX_PRCM_IRQENABLE_IVA                     0x00fc
+
+#ifndef __ASSEMBLER__
+/* Function prototypes */
+extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
+extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
+
+extern void omap2xxx_prm_dpll_reset(void);
+
+extern int __init prm2xxx_init(void);
+extern int __exit prm2xxx_exit(void);
+
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 9529984d8d2b..30517f5af707 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -15,82 +15,12 @@
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/io.h>
-#include <linux/irq.h>
 
-#include <plat/prcm.h>
-
-#include "soc.h"
 #include "common.h"
-#include "vp.h"
-
+#include "powerdomain.h"
 #include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
-#include "prm-regbits-34xx.h"
-
-static const struct omap_prcm_irq omap3_prcm_irqs[] = {
-        OMAP_PRCM_IRQ("wkup",   0,      0),
-        OMAP_PRCM_IRQ("io",     9,      1),
-};
-
-static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
-        .ack                    = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
-        .mask                   = OMAP3_PRM_IRQENABLE_MPU_OFFSET,
-        .nr_regs                = 1,
-        .irqs                   = omap3_prcm_irqs,
-        .nr_irqs                = ARRAY_SIZE(omap3_prcm_irqs),
-        .irq                    = 11 + OMAP_INTC_START,
-        .read_pending_irqs      = &omap3xxx_prm_read_pending_irqs,
-        .ocp_barrier            = &omap3xxx_prm_ocp_barrier,
-        .save_and_clear_irqen   = &omap3xxx_prm_save_and_clear_irqen,
-        .restore_irqen          = &omap3xxx_prm_restore_irqen,
-};
-
-u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
-{
-        return __raw_readl(prm_base + module + idx);
-}
-
-void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
-{
-        __raw_writel(val, prm_base + module + idx);
-}
-
-/* Read-modify-write a register in a PRM module. Caller must lock */
-u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
-{
-        u32 v;
-
-        v = omap2_prm_read_mod_reg(module, idx);
-        v &= ~mask;
-        v |= bits;
-        omap2_prm_write_mod_reg(v, module, idx);
-
-        return v;
-}
-
-/* Read a PRM register, AND it, and shift the result down to bit 0 */
-u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
-{
-        u32 v;
-
-        v = omap2_prm_read_mod_reg(domain, idx);
-        v &= mask;
-        v >>= __ffs(mask);
-
-        return v;
-}
-
-u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
-{
-        return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx);
-}
-
-u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
-{
-        return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
-}
-
+#include "clockdomain.h"
 
 /**
  * omap2_prm_is_hardreset_asserted - read the HW reset line state of
@@ -104,9 +34,6 @@ u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
  */
 int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
 {
-        if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))
-                return -EINVAL;
-
         return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
                                        (1 << shift));
 }
@@ -127,9 +54,6 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
 {
         u32 mask;
 
-        if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))
-                return -EINVAL;
-
         mask = 1 << shift;
         omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);
 
@@ -156,9 +80,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
         u32 rst, st;
         int c;
 
-        if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))
-                return -EINVAL;
-
         rst = 1 << rst_shift;
         st = 1 << st_shift;
 
@@ -178,188 +99,155 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
         return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
 }
 
-/* PRM VP */
-
-/*
- * struct omap3_vp - OMAP3 VP register access description.
- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
- */
-struct omap3_vp {
-        u32 tranxdone_status;
-};
-
-static struct omap3_vp omap3_vp[] = {
-        [OMAP3_VP_VDD_MPU_ID] = {
-                .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
-        },
-        [OMAP3_VP_VDD_CORE_ID] = {
-                .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
-        },
-};
-
-#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
-
-u32 omap3_prm_vp_check_txdone(u8 vp_id)
-{
-        struct omap3_vp *vp = &omap3_vp[vp_id];
-        u32 irqstatus;
 
-        irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
-                                           OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-        return irqstatus & vp->tranxdone_status;
-}
+/* Powerdomain low-level functions */
 
-void omap3_prm_vp_clear_txdone(u8 vp_id)
+/* Common functions across OMAP2 and OMAP3 */
+int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
 {
-        struct omap3_vp *vp = &omap3_vp[vp_id];
-
-        omap2_prm_write_mod_reg(vp->tranxdone_status,
-                                OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+        omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+                                   (pwrst << OMAP_POWERSTATE_SHIFT),
+                                   pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+        return 0;
 }
 
-u32 omap3_prm_vcvp_read(u8 offset)
+int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
 {
-        return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset);
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                             OMAP2_PM_PWSTCTRL,
+                                             OMAP_POWERSTATE_MASK);
 }
 
-void omap3_prm_vcvp_write(u32 val, u8 offset)
+int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
 {
-        omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset);
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                             OMAP2_PM_PWSTST,
+                                             OMAP_POWERSTATEST_MASK);
 }
 
-u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
+                                                                u8 pwrst)
 {
-        return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
+        u32 m;
+
+        m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
+
+        omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
+                                   OMAP2_PM_PWSTCTRL);
+
+        return 0;
 }
 
-/**
- * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events
- * @events: ptr to a u32, preallocated by caller
- *
- * Read PRM_IRQSTATUS_MPU bits, AND'ed with the currently-enabled PRM
- * MPU IRQs, and store the result into the u32 pointed to by @events.
- * No return value.
- */
-void omap3xxx_prm_read_pending_irqs(unsigned long *events)
+int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
+                                                                u8 pwrst)
 {
-        u32 mask, st;
+        u32 m;
+
+        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
 
-        /* XXX Can the mask read be avoided (e.g., can it come from RAM?) */
-        mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
-        st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+        omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
+                                   OMAP2_PM_PWSTCTRL);
 
-        events[0] = mask & st;
+        return 0;
 }
 
-/**
- * omap3xxx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete
- *
- * Force any buffered writes to the PRM IP block to complete.  Needed
- * by the PRM IRQ handler, which reads and writes directly to the IP
- * block, to avoid race conditions after acknowledging or clearing IRQ
- * bits.  No return value.
- */
-void omap3xxx_prm_ocp_barrier(void)
+int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
 {
-        omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
+        u32 m;
+
+        m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
+
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST,
+                                             m);
 }
 
-/**
- * omap3xxx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU reg
- * @saved_mask: ptr to a u32 array to save IRQENABLE bits
- *
- * Save the PRM_IRQENABLE_MPU register to @saved_mask.  @saved_mask
- * must be allocated by the caller.  Intended to be used in the PRM
- * interrupt handler suspend callback.  The OCP barrier is needed to
- * ensure the write to disable PRM interrupts reaches the PRM before
- * returning; otherwise, spurious interrupts might occur.  No return
- * value.
- */
-void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
+int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
 {
-        saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD,
-                                               OMAP3_PRM_IRQENABLE_MPU_OFFSET);
-        omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
+        u32 m;
+
+        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
 
-        /* OCP barrier */
-        omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                             OMAP2_PM_PWSTCTRL, m);
 }
 
-/**
- * omap3xxx_prm_restore_irqen - set PRM_IRQENABLE_MPU register from args
- * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously
- *
- * Restore the PRM_IRQENABLE_MPU register from @saved_mask.  Intended
- * to be used in the PRM interrupt handler resume callback to restore
- * values saved by omap3xxx_prm_save_and_clear_irqen().  No OCP
- * barrier should be needed here; any pending PRM interrupts will fire
- * once the writes reach the PRM.  No return value.
- */
-void omap3xxx_prm_restore_irqen(u32 *saved_mask)
+int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
 {
-        omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD,
-                                OMAP3_PRM_IRQENABLE_MPU_OFFSET);
+        u32 v;
+
+        v = pwrst << __ffs(OMAP_LOGICRETSTATE_MASK);
+        omap2_prm_rmw_mod_reg_bits(OMAP_LOGICRETSTATE_MASK, v, pwrdm->prcm_offs,
+                                   OMAP2_PM_PWSTCTRL);
+
+        return 0;
 }
 
-/**
- * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
- *
- * Clear any previously-latched I/O wakeup events and ensure that the
- * I/O wakeup gates are aligned with the current mux settings.  Works
- * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then
- * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit.  No
- * return value.
- */
-void omap3xxx_prm_reconfigure_io_chain(void)
+int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm)
 {
-        int i = 0;
+        u32 c = 0;
 
-        omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
-                                   PM_WKEN);
+        /*
+         * REVISIT: pwrdm_wait_transition() may be better implemented
+         * via a callback and a periodic timer check -- how long do we expect
+         * powerdomain transitions to take?
+         */
 
-        omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) &
-                          OMAP3430_ST_IO_CHAIN_MASK,
-                          MAX_IOPAD_LATCH_TIME, i);
-        if (i == MAX_IOPAD_LATCH_TIME)
-                pr_warn("PRM: I/O chain clock line assertion timed out\n");
+        /* XXX Is this udelay() value meaningful? */
+        while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) &
+                OMAP_INTRANSITION_MASK) &&
+                (c++ < PWRDM_TRANSITION_BAILOUT))
+                        udelay(1);
 
-        omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
-                                     PM_WKEN);
+        if (c > PWRDM_TRANSITION_BAILOUT) {
+                pr_err("powerdomain: %s: waited too long to complete transition\n",
+                       pwrdm->name);
+                return -EAGAIN;
+        }
 
-        omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD,
-                                   PM_WKST);
+        pr_debug("powerdomain: completed transition in %d loops\n", c);
 
-        omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST);
+        return 0;
 }
 
-/**
- * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches
- *
- * Activates the I/O wakeup event latches and allows events logged by
- * those latches to signal a wakeup event to the PRCM.  For I/O
- * wakeups to occur, WAKEUPENABLE bits must be set in the pad mux
- * registers, and omap3xxx_prm_reconfigure_io_chain() must be called.
- * No return value.
- */
-static void __init omap3xxx_prm_enable_io_wakeup(void)
+int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1,
+                          struct clockdomain *clkdm2)
+{
+        omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit),
+                                   clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
+        return 0;
+}
+
+int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1,
+                          struct clockdomain *clkdm2)
+{
+        omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit),
+                                     clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
+        return 0;
+}
+
+int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
+                           struct clockdomain *clkdm2)
 {
-        if (omap3_has_io_wakeup())
-                omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
-                                           PM_WKEN);
+        return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs,
+                                             PM_WKDEP, (1 << clkdm2->dep_bit));
 }
 
-static int __init omap3xxx_prcm_init(void)
+int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
 {
-        int ret = 0;
-
-        if (cpu_is_omap34xx()) {
-                omap3xxx_prm_enable_io_wakeup();
-                ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
-                if (!ret)
-                        irq_set_status_flags(omap_prcm_event_to_irq("io"),
-                                             IRQ_NOAUTOEN);
+        struct clkdm_dep *cd;
+        u32 mask = 0;
+
+        for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
+                if (!cd->clkdm)
+                        continue; /* only happens if data is erroneous */
+
+                /* PRM accesses are slow, so minimize them */
+                mask |= 1 << cd->clkdm->dep_bit;
+                atomic_set(&cd->wkdep_usecount, 0);
         }
 
-        return ret;
+        omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs,
+                                     PM_WKDEP);
+        return 0;
 }
-subsys_initcall(omap3xxx_prcm_init);
+
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index c19d249b4816..78532d6fecd7 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -1,7 +1,7 @@
 /*
- * OMAP2/3 Power/Reset Management (PRM) register definitions
+ * OMAP2xxx/3xxx-common Power/Reset Management (PRM) register definitions
  *
- * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc.
+ * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc.
  * Copyright (C) 2008-2010 Nokia Corporation
  * Paul Walmsley
  *
@@ -19,160 +19,6 @@
 #include "prcm-common.h"
 #include "prm.h"
 
-#define OMAP2420_PRM_REGADDR(module, reg)                               \
-                OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
-#define OMAP2430_PRM_REGADDR(module, reg)                               \
-                OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
-#define OMAP34XX_PRM_REGADDR(module, reg)                               \
-                OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
-
-
-/*
- * OMAP2-specific global PRM registers
- * Use __raw_{read,write}l() with these registers.
- *
- * With a few exceptions, these are the register names beginning with
- * PRCM_* on 24xx.  (The exceptions are the IRQSTATUS and IRQENABLE
- * bits.)
- *
- */
-
-#define OMAP2_PRCM_REVISION_OFFSET      0x0000
-#define OMAP2420_PRCM_REVISION          OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000)
-#define OMAP2_PRCM_SYSCONFIG_OFFSET     0x0010
-#define OMAP2420_PRCM_SYSCONFIG         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010)
-
-#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018
-#define OMAP2420_PRCM_IRQSTATUS_MPU     OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018)
-#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c
-#define OMAP2420_PRCM_IRQENABLE_MPU     OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c)
-
-#define OMAP2_PRCM_VOLTCTRL_OFFSET      0x0050
-#define OMAP2420_PRCM_VOLTCTRL          OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050)
-#define OMAP2_PRCM_VOLTST_OFFSET        0x0054
-#define OMAP2420_PRCM_VOLTST            OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054)
-#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET   0x0060
-#define OMAP2420_PRCM_CLKSRC_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060)
-#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET   0x0070
-#define OMAP2420_PRCM_CLKOUT_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070)
-#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET  0x0078
-#define OMAP2420_PRCM_CLKEMUL_CTRL      OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078)
-#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET   0x0080
-#define OMAP2420_PRCM_CLKCFG_CTRL       OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080)
-#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084
-#define OMAP2420_PRCM_CLKCFG_STATUS     OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084)
-#define OMAP2_PRCM_VOLTSETUP_OFFSET     0x0090
-#define OMAP2420_PRCM_VOLTSETUP         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090)
-#define OMAP2_PRCM_CLKSSETUP_OFFSET     0x0094
-#define OMAP2420_PRCM_CLKSSETUP         OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094)
-#define OMAP2_PRCM_POLCTRL_OFFSET       0x0098
-#define OMAP2420_PRCM_POLCTRL           OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098)
-
-#define OMAP2430_PRCM_REVISION          OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000)
-#define OMAP2430_PRCM_SYSCONFIG         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010)
-
-#define OMAP2430_PRCM_IRQSTATUS_MPU     OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018)
-#define OMAP2430_PRCM_IRQENABLE_MPU     OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c)
-
-#define OMAP2430_PRCM_VOLTCTRL          OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050)
-#define OMAP2430_PRCM_VOLTST            OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054)
-#define OMAP2430_PRCM_CLKSRC_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060)
-#define OMAP2430_PRCM_CLKOUT_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070)
-#define OMAP2430_PRCM_CLKEMUL_CTRL      OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078)
-#define OMAP2430_PRCM_CLKCFG_CTRL       OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080)
-#define OMAP2430_PRCM_CLKCFG_STATUS     OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084)
-#define OMAP2430_PRCM_VOLTSETUP         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090)
-#define OMAP2430_PRCM_CLKSSETUP         OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094)
-#define OMAP2430_PRCM_POLCTRL           OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098)
-
-/*
- * OMAP3-specific global PRM registers
- * Use __raw_{read,write}l() with these registers.
- *
- * With a few exceptions, these are the register names beginning with
- * PRM_* on 34xx.  (The exceptions are the IRQSTATUS and IRQENABLE
- * bits.)
- */
-
-#define OMAP3_PRM_REVISION_OFFSET       0x0004
-#define OMAP3430_PRM_REVISION           OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004)
-#define OMAP3_PRM_SYSCONFIG_OFFSET      0x0014
-#define OMAP3430_PRM_SYSCONFIG          OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014)
-
-#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET  0x0018
-#define OMAP3430_PRM_IRQSTATUS_MPU      OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018)
-#define OMAP3_PRM_IRQENABLE_MPU_OFFSET  0x001c
-#define OMAP3430_PRM_IRQENABLE_MPU      OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c)
-
-
-#define OMAP3_PRM_VC_SMPS_SA_OFFSET     0x0020
-#define OMAP3430_PRM_VC_SMPS_SA         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020)
-#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024
-#define OMAP3430_PRM_VC_SMPS_VOL_RA     OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024)
-#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028
-#define OMAP3430_PRM_VC_SMPS_CMD_RA     OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028)
-#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET   0x002c
-#define OMAP3430_PRM_VC_CMD_VAL_0       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c)
-#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET   0x0030
-#define OMAP3430_PRM_VC_CMD_VAL_1       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030)
-#define OMAP3_PRM_VC_CH_CONF_OFFSET     0x0034
-#define OMAP3430_PRM_VC_CH_CONF         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034)
-#define OMAP3_PRM_VC_I2C_CFG_OFFSET     0x0038
-#define OMAP3430_PRM_VC_I2C_CFG         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038)
-#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET  0x003c
-#define OMAP3430_PRM_VC_BYPASS_VAL      OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c)
-#define OMAP3_PRM_RSTCTRL_OFFSET        0x0050
-#define OMAP3430_PRM_RSTCTRL            OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050)
-#define OMAP3_PRM_RSTTIME_OFFSET        0x0054
-#define OMAP3430_PRM_RSTTIME            OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054)
-#define OMAP3_PRM_RSTST_OFFSET  0x0058
-#define OMAP3430_PRM_RSTST              OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058)
-#define OMAP3_PRM_VOLTCTRL_OFFSET       0x0060
-#define OMAP3430_PRM_VOLTCTRL           OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060)
-#define OMAP3_PRM_SRAM_PCHARGE_OFFSET   0x0064
-#define OMAP3430_PRM_SRAM_PCHARGE       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064)
-#define OMAP3_PRM_CLKSRC_CTRL_OFFSET    0x0070
-#define OMAP3430_PRM_CLKSRC_CTRL        OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070)
-#define OMAP3_PRM_VOLTSETUP1_OFFSET     0x0090
-#define OMAP3430_PRM_VOLTSETUP1         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090)
-#define OMAP3_PRM_VOLTOFFSET_OFFSET     0x0094
-#define OMAP3430_PRM_VOLTOFFSET         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094)
-#define OMAP3_PRM_CLKSETUP_OFFSET       0x0098
-#define OMAP3430_PRM_CLKSETUP           OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098)
-#define OMAP3_PRM_POLCTRL_OFFSET        0x009c
-#define OMAP3430_PRM_POLCTRL            OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c)
-#define OMAP3_PRM_VOLTSETUP2_OFFSET     0x00a0
-#define OMAP3430_PRM_VOLTSETUP2         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0)
-#define OMAP3_PRM_VP1_CONFIG_OFFSET     0x00b0
-#define OMAP3430_PRM_VP1_CONFIG         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0)
-#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET   0x00b4
-#define OMAP3430_PRM_VP1_VSTEPMIN       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4)
-#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET   0x00b8
-#define OMAP3430_PRM_VP1_VSTEPMAX       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8)
-#define OMAP3_PRM_VP1_VLIMITTO_OFFSET   0x00bc
-#define OMAP3430_PRM_VP1_VLIMITTO       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc)
-#define OMAP3_PRM_VP1_VOLTAGE_OFFSET    0x00c0
-#define OMAP3430_PRM_VP1_VOLTAGE        OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0)
-#define OMAP3_PRM_VP1_STATUS_OFFSET     0x00c4
-#define OMAP3430_PRM_VP1_STATUS         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4)
-#define OMAP3_PRM_VP2_CONFIG_OFFSET     0x00d0
-#define OMAP3430_PRM_VP2_CONFIG         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0)
-#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET   0x00d4
-#define OMAP3430_PRM_VP2_VSTEPMIN       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4)
-#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET   0x00d8
-#define OMAP3430_PRM_VP2_VSTEPMAX       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8)
-#define OMAP3_PRM_VP2_VLIMITTO_OFFSET   0x00dc
-#define OMAP3430_PRM_VP2_VLIMITTO       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc)
-#define OMAP3_PRM_VP2_VOLTAGE_OFFSET    0x00e0
-#define OMAP3430_PRM_VP2_VOLTAGE        OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0)
-#define OMAP3_PRM_VP2_STATUS_OFFSET     0x00e4
-#define OMAP3430_PRM_VP2_STATUS         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4)
-
-#define OMAP3_PRM_CLKSEL_OFFSET 0x0040
-#define OMAP3430_PRM_CLKSEL             OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040)
-#define OMAP3_PRM_CLKOUT_CTRL_OFFSET    0x0070
-#define OMAP3430_PRM_CLKOUT_CTRL        OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
-
 /*
  * Module specific PRM register offsets from PRM_BASE + domain offset
  *
@@ -200,66 +46,83 @@
 #define PM_EVGENONTIM                                   0x00d8
 #define PM_EVGENOFFTIM                                  0x00dc
 
-/* OMAP2xxx specific register offsets */
-#define OMAP24XX_PM_WKEN2                               0x00a4
-#define OMAP24XX_PM_WKST2                               0x00b4
-
-#define OMAP24XX_PRCM_IRQSTATUS_DSP                     0x00f0  /* IVA mod */
-#define OMAP24XX_PRCM_IRQENABLE_DSP                     0x00f4  /* IVA mod */
-#define OMAP24XX_PRCM_IRQSTATUS_IVA                     0x00f8
-#define OMAP24XX_PRCM_IRQENABLE_IVA                     0x00fc
 
-/* OMAP3 specific register offsets */
-#define OMAP3430ES2_PM_WKEN3                            0x00f0
-#define OMAP3430ES2_PM_WKST3                            0x00b8
-
-#define OMAP3430_PM_MPUGRPSEL                           0x00a4
-#define OMAP3430_PM_MPUGRPSEL1                          OMAP3430_PM_MPUGRPSEL
-#define OMAP3430ES2_PM_MPUGRPSEL3                       0x00f8
-
-#define OMAP3430_PM_IVAGRPSEL                           0x00a8
-#define OMAP3430_PM_IVAGRPSEL1                          OMAP3430_PM_IVAGRPSEL
-#define OMAP3430ES2_PM_IVAGRPSEL3                       0x00f4
-
-#define OMAP3430_PM_PREPWSTST                           0x00e8
-
-#define OMAP3430_PRM_IRQSTATUS_IVA2                     0x00f8
-#define OMAP3430_PRM_IRQENABLE_IVA2                     0x00fc
+#ifndef __ASSEMBLER__
 
+#include <linux/io.h>
+#include "powerdomain.h"
 
-#ifndef __ASSEMBLER__
 /* Power/reset management domain register get/set */
-extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx);
-extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx);
-extern u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
-extern u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx);
-extern u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx);
-extern u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
+static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx)
+{
+        return __raw_readl(prm_base + module + idx);
+}
+
+static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
+{
+        __raw_writel(val, prm_base + module + idx);
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module,
+                                             s16 idx)
+{
+        u32 v;
+
+        v = omap2_prm_read_mod_reg(module, idx);
+        v &= ~mask;
+        v |= bits;
+        omap2_prm_write_mod_reg(v, module, idx);
+
+        return v;
+}
+
+/* Read a PRM register, AND it, and shift the result down to bit 0 */
+static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
+{
+        u32 v;
+
+        v = omap2_prm_read_mod_reg(domain, idx);
+        v &= mask;
+        v >>= __ffs(mask);
+
+        return v;
+}
+
+static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+        return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx);
+}
+
+static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+        return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+}
 
 /* These omap2_ PRM functions apply to both OMAP2 and 3 */
 extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
 extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
 extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 
-/* OMAP3-specific VP functions */
-u32 omap3_prm_vp_check_txdone(u8 vp_id);
-void omap3_prm_vp_clear_txdone(u8 vp_id);
-
-/*
- * OMAP3 access functions for voltage controller (VC) and
- * voltage proccessor (VP) in the PRM.
- */
-extern u32 omap3_prm_vcvp_read(u8 offset);
-extern void omap3_prm_vcvp_write(u32 val, u8 offset);
-extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
-
-extern void omap3xxx_prm_reconfigure_io_chain(void);
-
-/* PRM interrupt-related functions */
-extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
-extern void omap3xxx_prm_ocp_barrier(void);
-extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
-extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
+extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
+extern int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm);
+extern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
+                                    u8 pwrst);
+extern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
+                                     u8 pwrst);
+extern int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
+extern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
+extern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
+extern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm);
+
+extern int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1,
+                                 struct clockdomain *clkdm2);
+extern int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1,
+                                 struct clockdomain *clkdm2);
+extern int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1,
+                                  struct clockdomain *clkdm2);
+extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm);
 
 #endif /* __ASSEMBLER */
 
@@ -348,7 +211,9 @@ extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
  *
  * 3430: RM_RSTST_CORE, RM_RSTST_EMU
  */
+#define OMAP_GLOBALWARM_RST_SHIFT                       1
 #define OMAP_GLOBALWARM_RST_MASK                        (1 << 1)
+#define OMAP_GLOBALCOLD_RST_SHIFT                       0
 #define OMAP_GLOBALCOLD_RST_MASK                        (1 << 0)
 
 /*
@@ -376,11 +241,4 @@ extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
 #define OMAP_LOGICRETSTATE_MASK                         (1 << 2)
 
 
-/*
- * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
- * submodule to exit hardreset
- */
-#define MAX_MODULE_HARDRESET_WAIT               10000
-
-
 #endif
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index e7dbb6cf1255..1ac73883f891 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -19,9 +19,8 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/common.h>
-
 #include "common.h"
+#include "powerdomain.h"
 #include "prm33xx.h"
 #include "prm-regbits-33xx.h"
 
@@ -133,3 +132,204 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst,
 
         return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
 }
+
+static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+{
+        am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
+                                (pwrst << OMAP_POWERSTATE_SHIFT),
+                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+        return 0;
+}
+
+static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = am33xx_prm_read_reg(pwrdm->prcm_offs,  pwrdm->pwrstctrl_offs);
+        v &= OMAP_POWERSTATE_MASK;
+        v >>= OMAP_POWERSTATE_SHIFT;
+
+        return v;
+}
+
+static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+        v &= OMAP_POWERSTATEST_MASK;
+        v >>= OMAP_POWERSTATEST_SHIFT;
+
+        return v;
+}
+
+static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+        v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
+        v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
+
+        return v;
+}
+
+static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
+{
+        am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
+                                (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT),
+                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+        return 0;
+}
+
+static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
+{
+        am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK,
+                                AM33XX_LASTPOWERSTATEENTERED_MASK,
+                                pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+        return 0;
+}
+
+static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
+{
+        u32 m;
+
+        m = pwrdm->logicretstate_mask;
+        if (!m)
+                return -EINVAL;
+
+        am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
+                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+
+        return 0;
+}
+
+static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+        v &= AM33XX_LOGICSTATEST_MASK;
+        v >>= AM33XX_LOGICSTATEST_SHIFT;
+
+        return v;
+}
+
+static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
+{
+        u32 v, m;
+
+        m = pwrdm->logicretstate_mask;
+        if (!m)
+                return -EINVAL;
+
+        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+        v &= m;
+        v >>= __ffs(m);
+
+        return v;
+}
+
+static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
+                u8 pwrst)
+{
+        u32 m;
+
+        m = pwrdm->mem_on_mask[bank];
+        if (!m)
+                return -EINVAL;
+
+        am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
+                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+
+        return 0;
+}
+
+static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
+                                        u8 pwrst)
+{
+        u32 m;
+
+        m = pwrdm->mem_ret_mask[bank];
+        if (!m)
+                return -EINVAL;
+
+        am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
+                                pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+
+        return 0;
+}
+
+static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
+{
+        u32 m, v;
+
+        m = pwrdm->mem_pwrst_mask[bank];
+        if (!m)
+                return -EINVAL;
+
+        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+        v &= m;
+        v >>= __ffs(m);
+
+        return v;
+}
+
+static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
+{
+        u32 m, v;
+
+        m = pwrdm->mem_retst_mask[bank];
+        if (!m)
+                return -EINVAL;
+
+        v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+        v &= m;
+        v >>= __ffs(m);
+
+        return v;
+}
+
+static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
+{
+        u32 c = 0;
+
+        /*
+         * REVISIT: pwrdm_wait_transition() may be better implemented
+         * via a callback and a periodic timer check -- how long do we expect
+         * powerdomain transitions to take?
+         */
+
+        /* XXX Is this udelay() value meaningful? */
+        while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs)
+                        & OMAP_INTRANSITION_MASK) &&
+                        (c++ < PWRDM_TRANSITION_BAILOUT))
+                udelay(1);
+
+        if (c > PWRDM_TRANSITION_BAILOUT) {
+                pr_err("powerdomain: %s: waited too long to complete transition\n",
+                       pwrdm->name);
+                return -EAGAIN;
+        }
+
+        pr_debug("powerdomain: completed transition in %d loops\n", c);
+
+        return 0;
+}
+
+struct pwrdm_ops am33xx_pwrdm_operations = {
+        .pwrdm_set_next_pwrst           = am33xx_pwrdm_set_next_pwrst,
+        .pwrdm_read_next_pwrst          = am33xx_pwrdm_read_next_pwrst,
+        .pwrdm_read_pwrst               = am33xx_pwrdm_read_pwrst,
+        .pwrdm_read_prev_pwrst          = am33xx_pwrdm_read_prev_pwrst,
+        .pwrdm_set_logic_retst          = am33xx_pwrdm_set_logic_retst,
+        .pwrdm_read_logic_pwrst         = am33xx_pwrdm_read_logic_pwrst,
+        .pwrdm_read_logic_retst         = am33xx_pwrdm_read_logic_retst,
+        .pwrdm_clear_all_prev_pwrst     = am33xx_pwrdm_clear_all_prev_pwrst,
+        .pwrdm_set_lowpwrstchange       = am33xx_pwrdm_set_lowpwrstchange,
+        .pwrdm_read_mem_pwrst           = am33xx_pwrdm_read_mem_pwrst,
+        .pwrdm_read_mem_retst           = am33xx_pwrdm_read_mem_retst,
+        .pwrdm_set_mem_onst             = am33xx_pwrdm_set_mem_onst,
+        .pwrdm_set_mem_retst            = am33xx_pwrdm_set_mem_retst,
+        .pwrdm_wait_transition          = am33xx_pwrdm_wait_transition,
+};
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
new file mode 100644
index 000000000000..b86116cf0db9
--- /dev/null
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -0,0 +1,417 @@
+/*
+ * OMAP3xxx PRM module functions
+ *
+ * Copyright (C) 2010-2012 Texas Instruments, Inc.
+ * Copyright (C) 2010 Nokia Corporation
+ * Benoît Cousson
+ * Paul Walmsley
+ * Rajendra Nayak <rnayak@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+
+#include "common.h"
+#include <plat/cpu.h>
+
+#include "vp.h"
+#include "powerdomain.h"
+#include "prm3xxx.h"
+#include "prm2xxx_3xxx.h"
+#include "cm2xxx_3xxx.h"
+#include "prm-regbits-34xx.h"
+
+static const struct omap_prcm_irq omap3_prcm_irqs[] = {
+        OMAP_PRCM_IRQ("wkup",   0,      0),
+        OMAP_PRCM_IRQ("io",     9,      1),
+};
+
+static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
+        .ack                    = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
+        .mask                   = OMAP3_PRM_IRQENABLE_MPU_OFFSET,
+        .nr_regs                = 1,
+        .irqs                   = omap3_prcm_irqs,
+        .nr_irqs                = ARRAY_SIZE(omap3_prcm_irqs),
+        .irq                    = 11 + OMAP_INTC_START,
+        .read_pending_irqs      = &omap3xxx_prm_read_pending_irqs,
+        .ocp_barrier            = &omap3xxx_prm_ocp_barrier,
+        .save_and_clear_irqen   = &omap3xxx_prm_save_and_clear_irqen,
+        .restore_irqen          = &omap3xxx_prm_restore_irqen,
+};
+
+/*
+ * omap3_prm_reset_src_map - map from bits in the PRM_RSTST hardware
+ *   register (which are specific to OMAP3xxx SoCs) to reset source ID
+ *   bit shifts (which is an OMAP SoC-independent enumeration)
+ */
+static struct prm_reset_src_map omap3xxx_prm_reset_src_map[] = {
+        { OMAP3430_GLOBAL_COLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
+        { OMAP3430_GLOBAL_SW_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
+        { OMAP3430_SECURITY_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
+        { OMAP3430_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT },
+        { OMAP3430_SECURE_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT },
+        { OMAP3430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT },
+        { OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT,
+          OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT },
+        { OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT,
+          OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT },
+        { OMAP3430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT },
+        { OMAP3430_ICECRUSHER_RST_SHIFT, OMAP_ICECRUSHER_RST_SRC_ID_SHIFT },
+        { -1, -1 },
+};
+
+/* PRM VP */
+
+/*
+ * struct omap3_vp - OMAP3 VP register access description.
+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ */
+struct omap3_vp {
+        u32 tranxdone_status;
+};
+
+static struct omap3_vp omap3_vp[] = {
+        [OMAP3_VP_VDD_MPU_ID] = {
+                .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
+        },
+        [OMAP3_VP_VDD_CORE_ID] = {
+                .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
+        },
+};
+
+#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
+
+u32 omap3_prm_vp_check_txdone(u8 vp_id)
+{
+        struct omap3_vp *vp = &omap3_vp[vp_id];
+        u32 irqstatus;
+
+        irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
+                                           OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+        return irqstatus & vp->tranxdone_status;
+}
+
+void omap3_prm_vp_clear_txdone(u8 vp_id)
+{
+        struct omap3_vp *vp = &omap3_vp[vp_id];
+
+        omap2_prm_write_mod_reg(vp->tranxdone_status,
+                                OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+}
+
+u32 omap3_prm_vcvp_read(u8 offset)
+{
+        return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset);
+}
+
+void omap3_prm_vcvp_write(u32 val, u8 offset)
+{
+        omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset);
+}
+
+u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+        return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
+}
+
+/**
+ * omap3xxx_prm_dpll3_reset - use DPLL3 reset to reboot the OMAP SoC
+ *
+ * Set the DPLL3 reset bit, which should reboot the SoC.  This is the
+ * recommended way to restart the SoC, considering Errata i520.  No
+ * return value.
+ */
+void omap3xxx_prm_dpll3_reset(void)
+{
+        omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
+                                   OMAP2_RM_RSTCTRL);
+        /* OCP barrier */
+        omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL);
+}
+
+/**
+ * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events
+ * @events: ptr to a u32, preallocated by caller
+ *
+ * Read PRM_IRQSTATUS_MPU bits, AND'ed with the currently-enabled PRM
+ * MPU IRQs, and store the result into the u32 pointed to by @events.
+ * No return value.
+ */
+void omap3xxx_prm_read_pending_irqs(unsigned long *events)
+{
+        u32 mask, st;
+
+        /* XXX Can the mask read be avoided (e.g., can it come from RAM?) */
+        mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
+        st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+
+        events[0] = mask & st;
+}
+
+/**
+ * omap3xxx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete
+ *
+ * Force any buffered writes to the PRM IP block to complete.  Needed
+ * by the PRM IRQ handler, which reads and writes directly to the IP
+ * block, to avoid race conditions after acknowledging or clearing IRQ
+ * bits.  No return value.
+ */
+void omap3xxx_prm_ocp_barrier(void)
+{
+        omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
+}
+
+/**
+ * omap3xxx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU reg
+ * @saved_mask: ptr to a u32 array to save IRQENABLE bits
+ *
+ * Save the PRM_IRQENABLE_MPU register to @saved_mask.  @saved_mask
+ * must be allocated by the caller.  Intended to be used in the PRM
+ * interrupt handler suspend callback.  The OCP barrier is needed to
+ * ensure the write to disable PRM interrupts reaches the PRM before
+ * returning; otherwise, spurious interrupts might occur.  No return
+ * value.
+ */
+void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
+{
+        saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD,
+                                               OMAP3_PRM_IRQENABLE_MPU_OFFSET);
+        omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
+
+        /* OCP barrier */
+        omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
+}
+
+/**
+ * omap3xxx_prm_restore_irqen - set PRM_IRQENABLE_MPU register from args
+ * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously
+ *
+ * Restore the PRM_IRQENABLE_MPU register from @saved_mask.  Intended
+ * to be used in the PRM interrupt handler resume callback to restore
+ * values saved by omap3xxx_prm_save_and_clear_irqen().  No OCP
+ * barrier should be needed here; any pending PRM interrupts will fire
+ * once the writes reach the PRM.  No return value.
+ */
+void omap3xxx_prm_restore_irqen(u32 *saved_mask)
+{
+        omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD,
+                                OMAP3_PRM_IRQENABLE_MPU_OFFSET);
+}
+
+/**
+ * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
+ *
+ * Clear any previously-latched I/O wakeup events and ensure that the
+ * I/O wakeup gates are aligned with the current mux settings.  Works
+ * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then
+ * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit.  No
+ * return value.
+ */
+void omap3xxx_prm_reconfigure_io_chain(void)
+{
+        int i = 0;
+
+        omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+                                   PM_WKEN);
+
+        omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) &
+                          OMAP3430_ST_IO_CHAIN_MASK,
+                          MAX_IOPAD_LATCH_TIME, i);
+        if (i == MAX_IOPAD_LATCH_TIME)
+                pr_warn("PRM: I/O chain clock line assertion timed out\n");
+
+        omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+                                     PM_WKEN);
+
+        omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD,
+                                   PM_WKST);
+
+        omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST);
+}
+
+/**
+ * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches
+ *
+ * Activates the I/O wakeup event latches and allows events logged by
+ * those latches to signal a wakeup event to the PRCM.  For I/O
+ * wakeups to occur, WAKEUPENABLE bits must be set in the pad mux
+ * registers, and omap3xxx_prm_reconfigure_io_chain() must be called.
+ * No return value.
+ */
+static void __init omap3xxx_prm_enable_io_wakeup(void)
+{
+        if (omap3_has_io_wakeup())
+                omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
+                                           PM_WKEN);
+}
+
+/**
+ * omap3xxx_prm_read_reset_sources - return the last SoC reset source
+ *
+ * Return a u32 representing the last reset sources of the SoC.  The
+ * returned reset source bits are standardized across OMAP SoCs.
+ */
+static u32 omap3xxx_prm_read_reset_sources(void)
+{
+        struct prm_reset_src_map *p;
+        u32 r = 0;
+        u32 v;
+
+        v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST);
+
+        p = omap3xxx_prm_reset_src_map;
+        while (p->reg_shift >= 0 && p->std_shift >= 0) {
+                if (v & (1 << p->reg_shift))
+                        r |= 1 << p->std_shift;
+                p++;
+        }
+
+        return r;
+}
+
+/* Powerdomain low-level functions */
+
+/* Applicable only for OMAP3. Not supported on OMAP2 */
+static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
+{
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                             OMAP3430_PM_PREPWSTST,
+                                             OMAP3430_LASTPOWERSTATEENTERED_MASK);
+}
+
+static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
+{
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                             OMAP2_PM_PWSTST,
+                                             OMAP3430_LOGICSTATEST_MASK);
+}
+
+static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
+{
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                             OMAP2_PM_PWSTCTRL,
+                                             OMAP3430_LOGICSTATEST_MASK);
+}
+
+static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
+{
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                             OMAP3430_PM_PREPWSTST,
+                                             OMAP3430_LASTLOGICSTATEENTERED_MASK);
+}
+
+static int omap3_get_mem_bank_lastmemst_mask(u8 bank)
+{
+        switch (bank) {
+        case 0:
+                return OMAP3430_LASTMEM1STATEENTERED_MASK;
+        case 1:
+                return OMAP3430_LASTMEM2STATEENTERED_MASK;
+        case 2:
+                return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
+        case 3:
+                return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
+        default:
+                WARN_ON(1); /* should never happen */
+                return -EEXIST;
+        }
+        return 0;
+}
+
+static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
+{
+        u32 m;
+
+        m = omap3_get_mem_bank_lastmemst_mask(bank);
+
+        return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+                                OMAP3430_PM_PREPWSTST, m);
+}
+
+static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
+{
+        omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
+        return 0;
+}
+
+static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
+{
+        return omap2_prm_rmw_mod_reg_bits(0,
+                                          1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
+                                          pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+}
+
+static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
+{
+        return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
+                                          0, pwrdm->prcm_offs,
+                                          OMAP2_PM_PWSTCTRL);
+}
+
+struct pwrdm_ops omap3_pwrdm_operations = {
+        .pwrdm_set_next_pwrst   = omap2_pwrdm_set_next_pwrst,
+        .pwrdm_read_next_pwrst  = omap2_pwrdm_read_next_pwrst,
+        .pwrdm_read_pwrst       = omap2_pwrdm_read_pwrst,
+        .pwrdm_read_prev_pwrst  = omap3_pwrdm_read_prev_pwrst,
+        .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
+        .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
+        .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst,
+        .pwrdm_read_prev_logic_pwrst    = omap3_pwrdm_read_prev_logic_pwrst,
+        .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
+        .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,
+        .pwrdm_read_mem_pwrst   = omap2_pwrdm_read_mem_pwrst,
+        .pwrdm_read_mem_retst   = omap2_pwrdm_read_mem_retst,
+        .pwrdm_read_prev_mem_pwrst      = omap3_pwrdm_read_prev_mem_pwrst,
+        .pwrdm_clear_all_prev_pwrst     = omap3_pwrdm_clear_all_prev_pwrst,
+        .pwrdm_enable_hdwr_sar  = omap3_pwrdm_enable_hdwr_sar,
+        .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar,
+        .pwrdm_wait_transition  = omap2_pwrdm_wait_transition,
+};
+
+/*
+ *
+ */
+
+static struct prm_ll_data omap3xxx_prm_ll_data = {
+        .read_reset_sources = &omap3xxx_prm_read_reset_sources,
+};
+
+static int __init omap3xxx_prm_init(void)
+{
+        int ret;
+
+        if (!cpu_is_omap34xx())
+                return 0;
+
+        ret = prm_register(&omap3xxx_prm_ll_data);
+        if (ret)
+                return ret;
+
+        omap3xxx_prm_enable_io_wakeup();
+        ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
+        if (!ret)
+                irq_set_status_flags(omap_prcm_event_to_irq("io"),
+                                     IRQ_NOAUTOEN);
+
+
+        return ret;
+}
+subsys_initcall(omap3xxx_prm_init);
+
+static void __exit omap3xxx_prm_exit(void)
+{
+        if (!cpu_is_omap34xx())
+                return;
+
+        /* Should never happen */
+        WARN(prm_unregister(&omap3xxx_prm_ll_data),
+             "%s: prm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap3xxx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
new file mode 100644
index 000000000000..10cd41a8129e
--- /dev/null
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -0,0 +1,162 @@
+/*
+ * OMAP3xxx Power/Reset Management (PRM) register definitions
+ *
+ * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc.
+ * Copyright (C) 2008-2010 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * The PRM hardware modules on the OMAP2/3 are quite similar to each
+ * other.  The PRM on OMAP4 has a new register layout, and is handled
+ * in a separate file.
+ */
+#ifndef __ARCH_ARM_MACH_OMAP2_PRM3XXX_H
+#define __ARCH_ARM_MACH_OMAP2_PRM3XXX_H
+
+#include "prcm-common.h"
+#include "prm.h"
+#include "prm2xxx_3xxx.h"
+
+#define OMAP34XX_PRM_REGADDR(module, reg)                               \
+                OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
+
+
+/*
+ * OMAP3-specific global PRM registers
+ * Use __raw_{read,write}l() with these registers.
+ *
+ * With a few exceptions, these are the register names beginning with
+ * PRM_* on 34xx.  (The exceptions are the IRQSTATUS and IRQENABLE
+ * bits.)
+ */
+
+#define OMAP3_PRM_REVISION_OFFSET       0x0004
+#define OMAP3430_PRM_REVISION           OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004)
+#define OMAP3_PRM_SYSCONFIG_OFFSET      0x0014
+#define OMAP3430_PRM_SYSCONFIG          OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014)
+
+#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET  0x0018
+#define OMAP3430_PRM_IRQSTATUS_MPU      OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018)
+#define OMAP3_PRM_IRQENABLE_MPU_OFFSET  0x001c
+#define OMAP3430_PRM_IRQENABLE_MPU      OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c)
+
+
+#define OMAP3_PRM_VC_SMPS_SA_OFFSET     0x0020
+#define OMAP3430_PRM_VC_SMPS_SA         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020)
+#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024
+#define OMAP3430_PRM_VC_SMPS_VOL_RA     OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024)
+#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028
+#define OMAP3430_PRM_VC_SMPS_CMD_RA     OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028)
+#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET   0x002c
+#define OMAP3430_PRM_VC_CMD_VAL_0       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c)
+#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET   0x0030
+#define OMAP3430_PRM_VC_CMD_VAL_1       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030)
+#define OMAP3_PRM_VC_CH_CONF_OFFSET     0x0034
+#define OMAP3430_PRM_VC_CH_CONF         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034)
+#define OMAP3_PRM_VC_I2C_CFG_OFFSET     0x0038
+#define OMAP3430_PRM_VC_I2C_CFG         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038)
+#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET  0x003c
+#define OMAP3430_PRM_VC_BYPASS_VAL      OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c)
+#define OMAP3_PRM_RSTCTRL_OFFSET        0x0050
+#define OMAP3430_PRM_RSTCTRL            OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050)
+#define OMAP3_PRM_RSTTIME_OFFSET        0x0054
+#define OMAP3430_PRM_RSTTIME            OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054)
+#define OMAP3_PRM_RSTST_OFFSET  0x0058
+#define OMAP3430_PRM_RSTST              OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058)
+#define OMAP3_PRM_VOLTCTRL_OFFSET       0x0060
+#define OMAP3430_PRM_VOLTCTRL           OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060)
+#define OMAP3_PRM_SRAM_PCHARGE_OFFSET   0x0064
+#define OMAP3430_PRM_SRAM_PCHARGE       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064)
+#define OMAP3_PRM_CLKSRC_CTRL_OFFSET    0x0070
+#define OMAP3430_PRM_CLKSRC_CTRL        OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070)
+#define OMAP3_PRM_VOLTSETUP1_OFFSET     0x0090
+#define OMAP3430_PRM_VOLTSETUP1         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090)
+#define OMAP3_PRM_VOLTOFFSET_OFFSET     0x0094
+#define OMAP3430_PRM_VOLTOFFSET         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094)
+#define OMAP3_PRM_CLKSETUP_OFFSET       0x0098
+#define OMAP3430_PRM_CLKSETUP           OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098)
+#define OMAP3_PRM_POLCTRL_OFFSET        0x009c
+#define OMAP3430_PRM_POLCTRL            OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c)
+#define OMAP3_PRM_VOLTSETUP2_OFFSET     0x00a0
+#define OMAP3430_PRM_VOLTSETUP2         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0)
+#define OMAP3_PRM_VP1_CONFIG_OFFSET     0x00b0
+#define OMAP3430_PRM_VP1_CONFIG         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0)
+#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET   0x00b4
+#define OMAP3430_PRM_VP1_VSTEPMIN       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4)
+#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET   0x00b8
+#define OMAP3430_PRM_VP1_VSTEPMAX       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8)
+#define OMAP3_PRM_VP1_VLIMITTO_OFFSET   0x00bc
+#define OMAP3430_PRM_VP1_VLIMITTO       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc)
+#define OMAP3_PRM_VP1_VOLTAGE_OFFSET    0x00c0
+#define OMAP3430_PRM_VP1_VOLTAGE        OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0)
+#define OMAP3_PRM_VP1_STATUS_OFFSET     0x00c4
+#define OMAP3430_PRM_VP1_STATUS         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4)
+#define OMAP3_PRM_VP2_CONFIG_OFFSET     0x00d0
+#define OMAP3430_PRM_VP2_CONFIG         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0)
+#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET   0x00d4
+#define OMAP3430_PRM_VP2_VSTEPMIN       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4)
+#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET   0x00d8
+#define OMAP3430_PRM_VP2_VSTEPMAX       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8)
+#define OMAP3_PRM_VP2_VLIMITTO_OFFSET   0x00dc
+#define OMAP3430_PRM_VP2_VLIMITTO       OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc)
+#define OMAP3_PRM_VP2_VOLTAGE_OFFSET    0x00e0
+#define OMAP3430_PRM_VP2_VOLTAGE        OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0)
+#define OMAP3_PRM_VP2_STATUS_OFFSET     0x00e4
+#define OMAP3430_PRM_VP2_STATUS         OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4)
+
+#define OMAP3_PRM_CLKSEL_OFFSET 0x0040
+#define OMAP3430_PRM_CLKSEL             OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040)
+#define OMAP3_PRM_CLKOUT_CTRL_OFFSET    0x0070
+#define OMAP3430_PRM_CLKOUT_CTRL        OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070)
+
+/* OMAP3 specific register offsets */
+#define OMAP3430ES2_PM_WKEN3                            0x00f0
+#define OMAP3430ES2_PM_WKST3                            0x00b8
+
+#define OMAP3430_PM_MPUGRPSEL                           0x00a4
+#define OMAP3430_PM_MPUGRPSEL1                          OMAP3430_PM_MPUGRPSEL
+#define OMAP3430ES2_PM_MPUGRPSEL3                       0x00f8
+
+#define OMAP3430_PM_IVAGRPSEL                           0x00a8
+#define OMAP3430_PM_IVAGRPSEL1                          OMAP3430_PM_IVAGRPSEL
+#define OMAP3430ES2_PM_IVAGRPSEL3                       0x00f4
+
+#define OMAP3430_PM_PREPWSTST                           0x00e8
+
+#define OMAP3430_PRM_IRQSTATUS_IVA2                     0x00f8
+#define OMAP3430_PRM_IRQENABLE_IVA2                     0x00fc
+
+
+#ifndef __ASSEMBLER__
+
+/* OMAP3-specific VP functions */
+u32 omap3_prm_vp_check_txdone(u8 vp_id);
+void omap3_prm_vp_clear_txdone(u8 vp_id);
+
+/*
+ * OMAP3 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap3_prm_vcvp_read(u8 offset);
+extern void omap3_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
+
+extern void omap3xxx_prm_reconfigure_io_chain(void);
+
+/* PRM interrupt-related functions */
+extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
+extern void omap3xxx_prm_ocp_barrier(void);
+extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
+extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+
+extern void omap3xxx_prm_dpll3_reset(void);
+
+extern u32 omap3xxx_prm_get_reset_sources(void);
+
+#endif /* __ASSEMBLER */
+
+
+#endif
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index f0c4d5f4a174..6d3467af205d 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -1,10 +1,11 @@
 /*
  * OMAP4 PRM module functions
  *
- * Copyright (C) 2011 Texas Instruments, Inc.
+ * Copyright (C) 2011-2012 Texas Instruments, Inc.
  * Copyright (C) 2010 Nokia Corporation
  * Benoît Cousson
  * Paul Walmsley
+ * Rajendra Nayak <rnayak@ti.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -17,7 +18,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 
-#include <plat/prcm.h>
 
 #include "soc.h"
 #include "iomap.h"
@@ -27,6 +27,9 @@
 #include "prm-regbits-44xx.h"
 #include "prcm44xx.h"
 #include "prminst44xx.h"
+#include "powerdomain.h"
+
+/* Static data */
 
 static const struct omap_prcm_irq omap4_prcm_irqs[] = {
         OMAP_PRCM_IRQ("wkup",   0,      0),
@@ -46,6 +49,33 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
         .restore_irqen          = &omap44xx_prm_restore_irqen,
 };
 
+/*
+ * omap44xx_prm_reset_src_map - map from bits in the PRM_RSTST
+ *   hardware register (which are specific to OMAP44xx SoCs) to reset
+ *   source ID bit shifts (which is an OMAP SoC-independent
+ *   enumeration)
+ */
+static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
+        { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT,
+          OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
+        { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT,
+          OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
+        { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT,
+          OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
+        { OMAP4430_MPU_WDT_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT },
+        { OMAP4430_SECURE_WDT_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT },
+        { OMAP4430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT },
+        { OMAP4430_VDD_MPU_VOLT_MGR_RST_SHIFT,
+          OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT },
+        { OMAP4430_VDD_IVA_VOLT_MGR_RST_SHIFT,
+          OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT },
+        { OMAP4430_VDD_CORE_VOLT_MGR_RST_SHIFT,
+          OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT },
+        { OMAP4430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT },
+        { OMAP4430_C2C_RST_SHIFT, OMAP_C2C_RST_SRC_ID_SHIFT },
+        { -1, -1 },
+};
+
 /* PRM low-level functions */
 
 /* Read a register in a CM/PRM instance in the PRM module */
@@ -291,12 +321,324 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
                                     OMAP4_PRM_IO_PMCTRL_OFFSET);
 }
 
-static int __init omap4xxx_prcm_init(void)
+/**
+ * omap44xx_prm_read_reset_sources - return the last SoC reset source
+ *
+ * Return a u32 representing the last reset sources of the SoC.  The
+ * returned reset source bits are standardized across OMAP SoCs.
+ */
+static u32 omap44xx_prm_read_reset_sources(void)
+{
+        struct prm_reset_src_map *p;
+        u32 r = 0;
+        u32 v;
+
+        v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
+                                    OMAP4_RM_RSTST);
+
+        p = omap44xx_prm_reset_src_map;
+        while (p->reg_shift >= 0 && p->std_shift >= 0) {
+                if (v & (1 << p->reg_shift))
+                        r |= 1 << p->std_shift;
+                p++;
+        }
+
+        return r;
+}
+
+/* Powerdomain low-level functions */
+
+static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+{
+        omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK,
+                                        (pwrst << OMAP_POWERSTATE_SHIFT),
+                                        pwrdm->prcm_partition,
+                                        pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
+        return 0;
+}
+
+static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTCTRL);
+        v &= OMAP_POWERSTATE_MASK;
+        v >>= OMAP_POWERSTATE_SHIFT;
+
+        return v;
+}
+
+static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTST);
+        v &= OMAP_POWERSTATEST_MASK;
+        v >>= OMAP_POWERSTATEST_SHIFT;
+
+        return v;
+}
+
+static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTST);
+        v &= OMAP4430_LASTPOWERSTATEENTERED_MASK;
+        v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT;
+
+        return v;
+}
+
+static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
+{
+        omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
+                                        (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
+                                        pwrdm->prcm_partition,
+                                        pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
+        return 0;
+}
+
+static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
+{
+        omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
+                                        OMAP4430_LASTPOWERSTATEENTERED_MASK,
+                                        pwrdm->prcm_partition,
+                                        pwrdm->prcm_offs, OMAP4_PM_PWSTST);
+        return 0;
+}
+
+static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
+{
+        u32 v;
+
+        v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
+        omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
+                                        pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTCTRL);
+
+        return 0;
+}
+
+static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
+                                    u8 pwrst)
+{
+        u32 m;
+
+        m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
+
+        omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
+                                        pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTCTRL);
+
+        return 0;
+}
+
+static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
+                                     u8 pwrst)
+{
+        u32 m;
+
+        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
+
+        omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
+                                        pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTCTRL);
+
+        return 0;
+}
+
+static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
+{
+        u32 v;
+
+        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTST);
+        v &= OMAP4430_LOGICSTATEST_MASK;
+        v >>= OMAP4430_LOGICSTATEST_SHIFT;
+
+        return v;
+}
+
+static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
 {
-        if (cpu_is_omap44xx()) {
-                omap44xx_prm_enable_io_wakeup();
-                return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
+        u32 v;
+
+        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTCTRL);
+        v &= OMAP4430_LOGICRETSTATE_MASK;
+        v >>= OMAP4430_LOGICRETSTATE_SHIFT;
+
+        return v;
+}
+
+/**
+ * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate
+ * @pwrdm: struct powerdomain * to read the state for
+ *
+ * Reads the previous logic powerstate for a powerdomain. This
+ * function must determine the previous logic powerstate by first
+ * checking the previous powerstate for the domain. If that was OFF,
+ * then logic has been lost. If previous state was RETENTION, the
+ * function reads the setting for the next retention logic state to
+ * see the actual value.  In every other case, the logic is
+ * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET
+ * depending whether the logic was retained or not.
+ */
+static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
+{
+        int state;
+
+        state = omap4_pwrdm_read_prev_pwrst(pwrdm);
+
+        if (state == PWRDM_POWER_OFF)
+                return PWRDM_POWER_OFF;
+
+        if (state != PWRDM_POWER_RET)
+                return PWRDM_POWER_RET;
+
+        return omap4_pwrdm_read_logic_retst(pwrdm);
+}
+
+static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
+{
+        u32 m, v;
+
+        m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
+
+        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTST);
+        v &= m;
+        v >>= __ffs(m);
+
+        return v;
+}
+
+static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
+{
+        u32 m, v;
+
+        m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
+
+        v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
+                                        OMAP4_PM_PWSTCTRL);
+        v &= m;
+        v >>= __ffs(m);
+
+        return v;
+}
+
+/**
+ * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate
+ * @pwrdm: struct powerdomain * to read mem powerstate for
+ * @bank: memory bank index
+ *
+ * Reads the previous memory powerstate for a powerdomain. This
+ * function must determine the previous memory powerstate by first
+ * checking the previous powerstate for the domain. If that was OFF,
+ * then logic has been lost. If previous state was RETENTION, the
+ * function reads the setting for the next memory retention state to
+ * see the actual value.  In every other case, the logic is
+ * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET
+ * depending whether logic was retained or not.
+ */
+static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
+{
+        int state;
+
+        state = omap4_pwrdm_read_prev_pwrst(pwrdm);
+
+        if (state == PWRDM_POWER_OFF)
+                return PWRDM_POWER_OFF;
+
+        if (state != PWRDM_POWER_RET)
+                return PWRDM_POWER_RET;
+
+        return omap4_pwrdm_read_mem_retst(pwrdm, bank);
+}
+
+static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
+{
+        u32 c = 0;
+
+        /*
+         * REVISIT: pwrdm_wait_transition() may be better implemented
+         * via a callback and a periodic timer check -- how long do we expect
+         * powerdomain transitions to take?
+         */
+
+        /* XXX Is this udelay() value meaningful? */
+        while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition,
+                                            pwrdm->prcm_offs,
+                                            OMAP4_PM_PWSTST) &
+                OMAP_INTRANSITION_MASK) &&
+               (c++ < PWRDM_TRANSITION_BAILOUT))
+                udelay(1);
+
+        if (c > PWRDM_TRANSITION_BAILOUT) {
+                pr_err("powerdomain: %s: waited too long to complete transition\n",
+                       pwrdm->name);
+                return -EAGAIN;
         }
+
+        pr_debug("powerdomain: completed transition in %d loops\n", c);
+
         return 0;
 }
-subsys_initcall(omap4xxx_prcm_init);
+
+struct pwrdm_ops omap4_pwrdm_operations = {
+        .pwrdm_set_next_pwrst   = omap4_pwrdm_set_next_pwrst,
+        .pwrdm_read_next_pwrst  = omap4_pwrdm_read_next_pwrst,
+        .pwrdm_read_pwrst       = omap4_pwrdm_read_pwrst,
+        .pwrdm_read_prev_pwrst  = omap4_pwrdm_read_prev_pwrst,
+        .pwrdm_set_lowpwrstchange       = omap4_pwrdm_set_lowpwrstchange,
+        .pwrdm_clear_all_prev_pwrst     = omap4_pwrdm_clear_all_prev_pwrst,
+        .pwrdm_set_logic_retst  = omap4_pwrdm_set_logic_retst,
+        .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst,
+        .pwrdm_read_prev_logic_pwrst    = omap4_pwrdm_read_prev_logic_pwrst,
+        .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst,
+        .pwrdm_read_mem_pwrst   = omap4_pwrdm_read_mem_pwrst,
+        .pwrdm_read_mem_retst   = omap4_pwrdm_read_mem_retst,
+        .pwrdm_read_prev_mem_pwrst      = omap4_pwrdm_read_prev_mem_pwrst,
+        .pwrdm_set_mem_onst     = omap4_pwrdm_set_mem_onst,
+        .pwrdm_set_mem_retst    = omap4_pwrdm_set_mem_retst,
+        .pwrdm_wait_transition  = omap4_pwrdm_wait_transition,
+};
+
+/*
+ * XXX document
+ */
+static struct prm_ll_data omap44xx_prm_ll_data = {
+        .read_reset_sources = &omap44xx_prm_read_reset_sources,
+};
+
+static int __init omap44xx_prm_init(void)
+{
+        int ret;
+
+        if (!cpu_is_omap44xx())
+                return 0;
+
+        ret = prm_register(&omap44xx_prm_ll_data);
+        if (ret)
+                return ret;
+
+        omap44xx_prm_enable_io_wakeup();
+
+        return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
+}
+subsys_initcall(omap44xx_prm_init);
+
+static void __exit omap44xx_prm_exit(void)
+{
+        if (!cpu_is_omap44xx())
+                return;
+
+        /* Should never happen */
+        WARN(prm_unregister(&omap44xx_prm_ll_data),
+             "%s: prm_ll_data function pointer mismatch\n", __func__);
+}
+__exitcall(omap44xx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index ee72ae6bd8c9..c8e1accdc90e 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -771,6 +771,8 @@ extern void omap44xx_prm_ocp_barrier(void);
 extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
 extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
 
+extern u32 omap44xx_prm_get_reset_sources(void);
+
 # endif
 
 #endif
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 6b4d332be2f6..f596e1e91ffd 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -24,11 +24,11 @@
 #include <linux/interrupt.h>
 #include <linux/slab.h>
 
-#include <plat/common.h>
-#include <plat/prcm.h>
-
 #include "prm2xxx_3xxx.h"
+#include "prm2xxx.h"
+#include "prm3xxx.h"
 #include "prm44xx.h"
+#include "common.h"
 
 /*
  * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@ -53,6 +53,16 @@ static struct irq_chip_generic **prcm_irq_chips;
  */
 static struct omap_prcm_irq_setup *prcm_irq_setup;
 
+/* prm_base: base virtual address of the PRM IP block */
+void __iomem *prm_base;
+
+/*
+ * prm_ll_data: function pointers to SoC-specific implementations of
+ * common PRM functions
+ */
+static struct prm_ll_data null_prm_ll_data;
+static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
+
 /* Private functions */
 
 /*
@@ -319,64 +329,82 @@ err:
         return -ENOMEM;
 }
 
-/*
- * Stubbed functions so that common files continue to build when
- * custom builds are used
- * XXX These are temporary and should be removed at the earliest possible
- * opportunity
+/**
+ * omap2_set_globals_prm - set the PRM base address (for early use)
+ * @prm: PRM base virtual address
+ *
+ * XXX Will be replaced when the PRM/CM drivers are completed.
  */
-u32 __weak omap2_prm_read_mod_reg(s16 module, u16 idx)
+void __init omap2_set_globals_prm(void __iomem *prm)
 {
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
-        return 0;
+        prm_base = prm;
 }
 
-void __weak omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
+/**
+ * prm_read_reset_sources - return the sources of the SoC's last reset
+ *
+ * Return a u32 bitmask representing the reset sources that caused the
+ * SoC to reset.  The low-level per-SoC functions called by this
+ * function remap the SoC-specific reset source bits into an
+ * OMAP-common set of reset source bits, defined in
+ * arch/arm/mach-omap2/prm.h.  Returns the standardized reset source
+ * u32 bitmask from the hardware upon success, or returns (1 <<
+ * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
+ * function was registered.
+ */
+u32 prm_read_reset_sources(void)
 {
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
-}
+        u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT;
 
-u32 __weak omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits,
-                s16 module, s16 idx)
-{
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
-        return 0;
-}
+        if (prm_ll_data->read_reset_sources)
+                ret = prm_ll_data->read_reset_sources();
+        else
+                WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__);
 
-u32 __weak omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
-{
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
-        return 0;
+        return ret;
 }
 
-u32 __weak omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+/**
+ * prm_register - register per-SoC low-level data with the PRM
+ * @pld: low-level per-SoC OMAP PRM data & function pointers to register
+ *
+ * Register per-SoC low-level OMAP PRM data and function pointers with
+ * the OMAP PRM common interface.  The caller must keep the data
+ * pointed to by @pld valid until it calls prm_unregister() and
+ * it returns successfully.  Returns 0 upon success, -EINVAL if @pld
+ * is NULL, or -EEXIST if prm_register() has already been called
+ * without an intervening prm_unregister().
+ */
+int prm_register(struct prm_ll_data *pld)
 {
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
-        return 0;
-}
+        if (!pld)
+                return -EINVAL;
 
-u32 __weak omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
-{
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
-        return 0;
-}
+        if (prm_ll_data != &null_prm_ll_data)
+                return -EEXIST;
 
-int __weak omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
-{
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
-        return 0;
-}
+        prm_ll_data = pld;
 
-int __weak omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
-{
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
         return 0;
 }
 
-int __weak omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift,
-                                                u8 st_shift)
+/**
+ * prm_unregister - unregister per-SoC low-level data & function pointers
+ * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
+ *
+ * Unregister per-SoC low-level OMAP PRM data and function pointers
+ * that were previously registered with prm_register().  The
+ * caller may not destroy any of the data pointed to by @pld until
+ * this function returns successfully.  Returns 0 upon success, or
+ * -EINVAL if @pld is NULL or if @pld does not match the struct
+ * prm_ll_data * previously registered by prm_register().
+ */
+int prm_unregister(struct prm_ll_data *pld)
 {
-        WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
+        if (!pld || prm_ll_data != pld)
+                return -EINVAL;
+
+        prm_ll_data = &null_prm_ll_data;
+
         return 0;
 }
-
diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h
index 46f2efb36596..a2ede2d65481 100644
--- a/arch/arm/mach-omap2/prminst44xx.h
+++ b/arch/arm/mach-omap2/prminst44xx.h
@@ -30,4 +30,6 @@ extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
 extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst,
                                             u16 rstctrl_offs);
 
+extern void omap_prm_base_init(void);
+
 #endif
diff --git a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
index 8bfaf342a028..1ee58c281a31 100644
--- a/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
+++ b/arch/arm/mach-omap2/sdram-hynix-h8mbx00u0mer-0em.h
@@ -11,7 +11,7 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
 #define __ARCH_ARM_MACH_OMAP2_SDRAM_HYNIX_H8MBX00U0MER0EM
 
-#include <plat/sdrc.h>
+#include "sdrc.h"
 
 /* Hynix H8MBX00U0MER-0EM */
 static struct omap_sdrc_params h8mbx00u0mer0em_sdrc_params[] = {
diff --git a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
index a391b4939f74..85cccc004c06 100644
--- a/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
+++ b/arch/arm/mach-omap2/sdram-micron-mt46h32m32lf-6.h
@@ -14,7 +14,7 @@
 #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
 #define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_MT46H32M32LF
 
-#include <plat/sdrc.h>
+#include "sdrc.h"
 
 /* Micron MT46H32M32LF-6 */
 /* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c
index 845c4fd2b125..0fa7ffa9b5ed 100644
--- a/arch/arm/mach-omap2/sdram-nokia.c
+++ b/arch/arm/mach-omap2/sdram-nokia.c
@@ -18,10 +18,8 @@
 #include <linux/io.h>
 
 #include "common.h"
-#include <plat/clock.h>
-#include <plat/sdrc.h>
-
 #include "sdram-nokia.h"
+#include "sdrc.h"
 
 /* In picoseconds, except for tREF (ns), tXP, tCKE, tWTR (clks) */
 struct sdram_timings {
diff --git a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
index cd4352917022..003f7bf4e2e3 100644
--- a/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
+++ b/arch/arm/mach-omap2/sdram-numonyx-m65kxxxxam.h
@@ -11,7 +11,7 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
 #define __ARCH_ARM_MACH_OMAP2_SDRAM_NUMONYX_M65KXXXXAM
 
-#include <plat/sdrc.h>
+#include "sdrc.h"
 
 /* Numonyx  M65KXXXXAM */
 static struct omap_sdrc_params m65kxxxxam_sdrc_params[] = {
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
index 0e518a72831f..8dc3de5ebb5b 100644
--- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
+++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
@@ -14,7 +14,7 @@
 #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
 #define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
 
-#include <plat/sdrc.h>
+#include "sdrc.h"
 
 /* Qimonda HYB18M512160AF-6 */
 static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index e3d345f46409..dae7e4804a48 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -24,10 +24,7 @@
 #include <linux/io.h>
 
 #include "common.h"
-#include <plat/clock.h>
-#include <plat/sram.h>
-
-#include <plat/sdrc.h>
+#include "clock.h"
 #include "sdrc.h"
 
 static struct omap_sdrc_params *sdrc_init_params_cs0, *sdrc_init_params_cs1;
@@ -115,12 +112,10 @@ int omap2_sdrc_get_params(unsigned long r,
 }
 
 
-void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
+void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms)
 {
-        if (omap2_globals->sdrc)
-                omap2_sdrc_base = omap2_globals->sdrc;
-        if (omap2_globals->sms)
-                omap2_sms_base = omap2_globals->sms;
+        omap2_sdrc_base = sdrc;
+        omap2_sms_base = sms;
 }
 
 /**
@@ -160,19 +155,3 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
         sdrc_write_reg(l, SDRC_POWER);
         omap2_sms_save_context();
 }
-
-void omap2_sms_write_rot_control(u32 val, unsigned ctx)
-{
-        sms_write_reg(val, SMS_ROT_CONTROL(ctx));
-}
-
-void omap2_sms_write_rot_size(u32 val, unsigned ctx)
-{
-        sms_write_reg(val, SMS_ROT_SIZE(ctx));
-}
-
-void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx)
-{
-        sms_write_reg(val, SMS_ROT_PHYSICAL_BA(ctx));
-}
-
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index b3f83799e6cf..446aa13511fd 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -2,12 +2,14 @@
 #define __ARCH_ARM_MACH_OMAP2_SDRC_H
 
 /*
- * OMAP2 SDRC register definitions
+ * OMAP2/3 SDRC/SMS macros and prototypes
  *
- * Copyright (C) 2007 Texas Instruments, Inc.
- * Copyright (C) 2007 Nokia Corporation
+ * Copyright (C) 2007-2008, 2012 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
  *
- * Written by Paul Walmsley
+ * Paul Walmsley
+ * Tony Lindgren
+ * Richard Woodruff
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -15,8 +17,6 @@
  */
 #undef DEBUG
 
-#include <plat/sdrc.h>
-
 #ifndef __ASSEMBLER__
 
 #include <linux/io.h>
@@ -50,6 +50,60 @@ static inline u32 sms_read_reg(u16 reg)
 {
         return __raw_readl(OMAP_SMS_REGADDR(reg));
 }
+
+extern void omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms);
+
+
+/**
+ * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate
+ * @rate: SDRC clock rate (in Hz)
+ * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate
+ * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate
+ * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate
+ * @mr: Value to program to SDRC_MR for this rate
+ *
+ * This structure holds a pre-computed set of register values for the
+ * SDRC for a given SDRC clock rate and SDRAM chip.  These are
+ * intended to be pre-computed and specified in an array in the board-*.c
+ * files.  The structure is keyed off the 'rate' field.
+ */
+struct omap_sdrc_params {
+        unsigned long rate;
+        u32 actim_ctrla;
+        u32 actim_ctrlb;
+        u32 rfr_ctrl;
+        u32 mr;
+};
+
+#ifdef CONFIG_SOC_HAS_OMAP2_SDRC
+void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
+                            struct omap_sdrc_params *sdrc_cs1);
+#else
+static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
+                                          struct omap_sdrc_params *sdrc_cs1) {};
+#endif
+
+int omap2_sdrc_get_params(unsigned long r,
+                          struct omap_sdrc_params **sdrc_cs0,
+                          struct omap_sdrc_params **sdrc_cs1);
+void omap2_sms_save_context(void);
+void omap2_sms_restore_context(void);
+
+struct memory_timings {
+        u32 m_type;             /* ddr = 1, sdr = 0 */
+        u32 dll_mode;           /* use lock mode = 1, unlock mode = 0 */
+        u32 slow_dll_ctrl;      /* unlock mode, dll value for slow speed */
+        u32 fast_dll_ctrl;      /* unlock mode, dll value for fast speed */
+        u32 base_cs;            /* base chip select to use for calculations */
+};
+
+extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode);
+struct omap_sdrc_params *rx51_get_sdram_timings(void);
+
+u32 omap2xxx_sdrc_dll_is_unlocked(void);
+u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
+
+
 #else
 #define OMAP242X_SDRC_REGADDR(reg)                                      \
                         OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
@@ -57,6 +111,7 @@ static inline u32 sms_read_reg(u16 reg)
                         OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
 #define OMAP34XX_SDRC_REGADDR(reg)                                      \
                         OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
+
 #endif  /* __ASSEMBLER__ */
 
 /* Minimum frequency that the SDRC DLL can lock at */
@@ -74,4 +129,85 @@ static inline u32 sms_read_reg(u16 reg)
  */
 #define SDRC_MPURATE_LOOPS              96
 
+/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
+
+#define SDRC_SYSCONFIG          0x010
+#define SDRC_CS_CFG             0x040
+#define SDRC_SHARING            0x044
+#define SDRC_ERR_TYPE           0x04C
+#define SDRC_DLLA_CTRL          0x060
+#define SDRC_DLLA_STATUS        0x064
+#define SDRC_DLLB_CTRL          0x068
+#define SDRC_DLLB_STATUS        0x06C
+#define SDRC_POWER              0x070
+#define SDRC_MCFG_0             0x080
+#define SDRC_MR_0               0x084
+#define SDRC_EMR2_0             0x08c
+#define SDRC_ACTIM_CTRL_A_0     0x09c
+#define SDRC_ACTIM_CTRL_B_0     0x0a0
+#define SDRC_RFR_CTRL_0         0x0a4
+#define SDRC_MANUAL_0           0x0a8
+#define SDRC_MCFG_1             0x0B0
+#define SDRC_MR_1               0x0B4
+#define SDRC_EMR2_1             0x0BC
+#define SDRC_ACTIM_CTRL_A_1     0x0C4
+#define SDRC_ACTIM_CTRL_B_1     0x0C8
+#define SDRC_RFR_CTRL_1         0x0D4
+#define SDRC_MANUAL_1           0x0D8
+
+#define SDRC_POWER_AUTOCOUNT_SHIFT      8
+#define SDRC_POWER_AUTOCOUNT_MASK       (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT)
+#define SDRC_POWER_CLKCTRL_SHIFT        4
+#define SDRC_POWER_CLKCTRL_MASK         (0x3 << SDRC_POWER_CLKCTRL_SHIFT)
+#define SDRC_SELF_REFRESH_ON_AUTOCOUNT  (0x2 << SDRC_POWER_CLKCTRL_SHIFT)
+
+/*
+ * These values represent the number of memory clock cycles between
+ * autorefresh initiation.  They assume 1 refresh per 64 ms (JEDEC), 8192
+ * rows per device, and include a subtraction of a 50 cycle window in the
+ * event that the autorefresh command is delayed due to other SDRC activity.
+ * The '| 1' sets the ARE field to send one autorefresh when the autorefresh
+ * counter reaches 0.
+ *
+ * These represent optimal values for common parts, it won't work for all.
+ * As long as you scale down, most parameters are still work, they just
+ * become sub-optimal. The RFR value goes in the opposite direction. If you
+ * don't adjust it down as your clock period increases the refresh interval
+ * will not be met. Setting all parameters for complete worst case may work,
+ * but may cut memory performance by 2x. Due to errata the DLLs need to be
+ * unlocked and their value needs run time calibration. A dynamic call is
+ * need for that as no single right value exists acorss production samples.
+ *
+ * Only the FULL speed values are given. Current code is such that rate
+ * changes must be made at DPLLoutx2. The actual value adjustment for low
+ * frequency operation will be handled by omap_set_performance()
+ *
+ * By having the boot loader boot up in the fastest L4 speed available likely
+ * will result in something which you can switch between.
+ */
+#define SDRC_RFR_CTRL_165MHz    (0x00044c00 | 1)
+#define SDRC_RFR_CTRL_133MHz    (0x0003de00 | 1)
+#define SDRC_RFR_CTRL_100MHz    (0x0002da01 | 1)
+#define SDRC_RFR_CTRL_110MHz    (0x0002da01 | 1) /* Need to calc */
+#define SDRC_RFR_CTRL_BYPASS    (0x00005000 | 1) /* Need to calc */
+
+
+/*
+ * SMS register access
+ */
+
+#define OMAP242X_SMS_REGADDR(reg)                                       \
+                (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+#define OMAP243X_SMS_REGADDR(reg)                                       \
+                (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+#define OMAP343X_SMS_REGADDR(reg)                                       \
+                (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+
+/* SMS register offsets - read/write with sms_{read,write}_reg() */
+
+#define SMS_SYSCONFIG                   0x010
+/* REVISIT: fill in other SMS registers here */
+
+
+
 #endif
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 73e55e485329..907291714643 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -24,16 +24,13 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
-#include <plat/clock.h>
-#include <plat/sram.h>
-#include <plat/sdrc.h>
-
 #include "soc.h"
 #include "iomap.h"
 #include "common.h"
-#include "prm2xxx_3xxx.h"
+#include "prm2xxx.h"
 #include "clock.h"
 #include "sdrc.h"
+#include "sram.h"
 
 /* Memory timing, DLL mode flags */
 #define M_DDR           1
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index a507cd6cf4f1..aa30a3c20883 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -28,19 +28,20 @@
 #include <linux/console.h>
 
 #include <plat/omap-serial.h>
-#include "common.h"
-#include <plat/dma.h>
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
-#include <plat/omap-pm.h>
-#include <plat/serial.h>
+#include <plat-omap/dma-omap.h>
 
+#include "common.h"
+#include "omap_hwmod.h"
+#include "omap_device.h"
+#include "omap-pm.h"
+#include "soc.h"
 #include "prm2xxx_3xxx.h"
 #include "pm.h"
 #include "cm2xxx_3xxx.h"
 #include "prm-regbits-34xx.h"
 #include "control.h"
 #include "mux.h"
+#include "serial.h"
 
 /*
  * NOTE: By default the serial auto_suspend timeout is disabled as it causes
diff --git a/arch/arm/mach-omap2/serial.h b/arch/arm/mach-omap2/serial.h
new file mode 100644
index 000000000000..c4014f013df0
--- /dev/null
+++ b/arch/arm/mach-omap2/serial.h
@@ -0,0 +1 @@
+#include <mach/serial.h>
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 506987979c1c..d1dedc8195ed 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -26,13 +26,12 @@
 
 #include <asm/assembler.h>
 
-#include <plat/sram.h>
-
 #include "omap34xx.h"
 #include "iomap.h"
-#include "cm2xxx_3xxx.h"
-#include "prm2xxx_3xxx.h"
+#include "cm3xxx.h"
+#include "prm3xxx.h"
 #include "sdrc.h"
+#include "sram.h"
 #include "control.h"
 
 /*
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index fc9b96daf851..f31d90774de0 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -1,7 +1,469 @@
-#include <plat/cpu.h>
+/*
+ * OMAP cpu type detection
+ *
+ * Copyright (C) 2004, 2008 Nokia Corporation
+ *
+ * Copyright (C) 2009-11 Texas Instruments.
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
 #include "omap24xx.h"
 #include "omap34xx.h"
 #include "omap44xx.h"
 #include "ti81xx.h"
 #include "am33xx.h"
 #include "omap54xx.h"
+
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
+
+/*
+ * Test if multicore OMAP support is needed
+ */
+#undef MULTI_OMAP2
+#undef OMAP_NAME
+
+#ifdef CONFIG_SOC_OMAP2420
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME omap2420
+# endif
+#endif
+#ifdef CONFIG_SOC_OMAP2430
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME omap2430
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP3
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME omap3
+# endif
+#endif
+#ifdef CONFIG_ARCH_OMAP4
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME omap4
+# endif
+#endif
+
+#ifdef CONFIG_SOC_OMAP5
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME omap5
+# endif
+#endif
+
+#ifdef CONFIG_SOC_AM33XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME am33xx
+# endif
+#endif
+
+/*
+ * Omap device type i.e. EMU/HS/TST/GP/BAD
+ */
+#define OMAP2_DEVICE_TYPE_TEST          0
+#define OMAP2_DEVICE_TYPE_EMU           1
+#define OMAP2_DEVICE_TYPE_SEC           2
+#define OMAP2_DEVICE_TYPE_GP            3
+#define OMAP2_DEVICE_TYPE_BAD           4
+
+int omap_type(void);
+
+/*
+ * omap_rev bits:
+ * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
+ * CPU revision (See _REV_ defined in cpu.h)    [15:08]
+ * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
+ */
+unsigned int omap_rev(void);
+
+/*
+ * Get the CPU revision for OMAP devices
+ */
+#define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
+
+/*
+ * Macros to group OMAP into cpu classes.
+ * These can be used in most places.
+ * cpu_is_omap24xx():   True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
+ * cpu_is_omap242x():   True for OMAP2420, OMAP2422, OMAP2423
+ * cpu_is_omap243x():   True for OMAP2430
+ * cpu_is_omap343x():   True for OMAP3430
+ * cpu_is_omap443x():   True for OMAP4430
+ * cpu_is_omap446x():   True for OMAP4460
+ * cpu_is_omap447x():   True for OMAP4470
+ * soc_is_omap543x():   True for OMAP5430, OMAP5432
+ */
+#define GET_OMAP_CLASS  (omap_rev() & 0xff)
+
+#define IS_OMAP_CLASS(class, id)                        \
+static inline int is_omap ##class (void)                \
+{                                                       \
+        return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
+}
+
+#define GET_AM_CLASS    ((omap_rev() >> 24) & 0xff)
+
+#define IS_AM_CLASS(class, id)                          \
+static inline int is_am ##class (void)                  \
+{                                                       \
+        return (GET_AM_CLASS == (id)) ? 1 : 0;          \
+}
+
+#define GET_TI_CLASS    ((omap_rev() >> 24) & 0xff)
+
+#define IS_TI_CLASS(class, id)                  \
+static inline int is_ti ##class (void)          \
+{                                                       \
+        return (GET_TI_CLASS == (id)) ? 1 : 0;  \
+}
+
+#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
+
+#define IS_OMAP_SUBCLASS(subclass, id)                  \
+static inline int is_omap ##subclass (void)             \
+{                                                       \
+        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
+}
+
+#define IS_TI_SUBCLASS(subclass, id)                    \
+static inline int is_ti ##subclass (void)               \
+{                                                       \
+        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
+}
+
+#define IS_AM_SUBCLASS(subclass, id)                    \
+static inline int is_am ##subclass (void)               \
+{                                                       \
+        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
+}
+
+IS_OMAP_CLASS(24xx, 0x24)
+IS_OMAP_CLASS(34xx, 0x34)
+IS_OMAP_CLASS(44xx, 0x44)
+IS_AM_CLASS(35xx, 0x35)
+IS_OMAP_CLASS(54xx, 0x54)
+IS_AM_CLASS(33xx, 0x33)
+
+IS_TI_CLASS(81xx, 0x81)
+
+IS_OMAP_SUBCLASS(242x, 0x242)
+IS_OMAP_SUBCLASS(243x, 0x243)
+IS_OMAP_SUBCLASS(343x, 0x343)
+IS_OMAP_SUBCLASS(363x, 0x363)
+IS_OMAP_SUBCLASS(443x, 0x443)
+IS_OMAP_SUBCLASS(446x, 0x446)
+IS_OMAP_SUBCLASS(447x, 0x447)
+IS_OMAP_SUBCLASS(543x, 0x543)
+
+IS_TI_SUBCLASS(816x, 0x816)
+IS_TI_SUBCLASS(814x, 0x814)
+IS_AM_SUBCLASS(335x, 0x335)
+
+#define cpu_is_omap24xx()               0
+#define cpu_is_omap242x()               0
+#define cpu_is_omap243x()               0
+#define cpu_is_omap34xx()               0
+#define cpu_is_omap343x()               0
+#define cpu_is_ti81xx()                 0
+#define cpu_is_ti816x()                 0
+#define cpu_is_ti814x()                 0
+#define soc_is_am35xx()                 0
+#define soc_is_am33xx()                 0
+#define soc_is_am335x()                 0
+#define cpu_is_omap44xx()               0
+#define cpu_is_omap443x()               0
+#define cpu_is_omap446x()               0
+#define cpu_is_omap447x()               0
+#define soc_is_omap54xx()               0
+#define soc_is_omap543x()               0
+
+#if defined(MULTI_OMAP2)
+# if defined(CONFIG_ARCH_OMAP2)
+#  undef  cpu_is_omap24xx
+#  define cpu_is_omap24xx()             is_omap24xx()
+# endif
+# if defined (CONFIG_SOC_OMAP2420)
+#  undef  cpu_is_omap242x
+#  define cpu_is_omap242x()             is_omap242x()
+# endif
+# if defined (CONFIG_SOC_OMAP2430)
+#  undef  cpu_is_omap243x
+#  define cpu_is_omap243x()             is_omap243x()
+# endif
+# if defined(CONFIG_ARCH_OMAP3)
+#  undef  cpu_is_omap34xx
+#  undef  cpu_is_omap343x
+#  define cpu_is_omap34xx()             is_omap34xx()
+#  define cpu_is_omap343x()             is_omap343x()
+# endif
+#else
+# if defined(CONFIG_ARCH_OMAP2)
+#  undef  cpu_is_omap24xx
+#  define cpu_is_omap24xx()             1
+# endif
+# if defined(CONFIG_SOC_OMAP2420)
+#  undef  cpu_is_omap242x
+#  define cpu_is_omap242x()             1
+# endif
+# if defined(CONFIG_SOC_OMAP2430)
+#  undef  cpu_is_omap243x
+#  define cpu_is_omap243x()             1
+# endif
+# if defined(CONFIG_ARCH_OMAP3)
+#  undef  cpu_is_omap34xx
+#  define cpu_is_omap34xx()             1
+# endif
+# if defined(CONFIG_SOC_OMAP3430)
+#  undef  cpu_is_omap343x
+#  define cpu_is_omap343x()             1
+# endif
+#endif
+
+/*
+ * Macros to detect individual cpu types.
+ * These are only rarely needed.
+ * cpu_is_omap2420():   True for OMAP2420
+ * cpu_is_omap2422():   True for OMAP2422
+ * cpu_is_omap2423():   True for OMAP2423
+ * cpu_is_omap2430():   True for OMAP2430
+ * cpu_is_omap3430():   True for OMAP3430
+ */
+#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
+
+#define IS_OMAP_TYPE(type, id)                          \
+static inline int is_omap ##type (void)                 \
+{                                                       \
+        return (GET_OMAP_TYPE == (id)) ? 1 : 0;         \
+}
+
+IS_OMAP_TYPE(2420, 0x2420)
+IS_OMAP_TYPE(2422, 0x2422)
+IS_OMAP_TYPE(2423, 0x2423)
+IS_OMAP_TYPE(2430, 0x2430)
+IS_OMAP_TYPE(3430, 0x3430)
+
+#define cpu_is_omap2420()               0
+#define cpu_is_omap2422()               0
+#define cpu_is_omap2423()               0
+#define cpu_is_omap2430()               0
+#define cpu_is_omap3430()               0
+#define cpu_is_omap3630()               0
+#define soc_is_omap5430()               0
+
+/* These are needed for the common code */
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define cpu_is_omap7xx()                0
+#define cpu_is_omap15xx()               0
+#define cpu_is_omap16xx()               0
+#define cpu_is_omap1510()               0
+#define cpu_is_omap1610()               0
+#define cpu_is_omap1611()               0
+#define cpu_is_omap1621()               0
+#define cpu_is_omap1710()               0
+#define cpu_class_is_omap1()            0
+#define cpu_class_is_omap2()            1
+#endif
+
+#if defined(CONFIG_ARCH_OMAP2)
+# undef  cpu_is_omap2420
+# undef  cpu_is_omap2422
+# undef  cpu_is_omap2423
+# undef  cpu_is_omap2430
+# define cpu_is_omap2420()              is_omap2420()
+# define cpu_is_omap2422()              is_omap2422()
+# define cpu_is_omap2423()              is_omap2423()
+# define cpu_is_omap2430()              is_omap2430()
+#endif
+
+#if defined(CONFIG_ARCH_OMAP3)
+# undef cpu_is_omap3430
+# undef cpu_is_ti81xx
+# undef cpu_is_ti816x
+# undef cpu_is_ti814x
+# undef soc_is_am35xx
+# define cpu_is_omap3430()              is_omap3430()
+# undef cpu_is_omap3630
+# define cpu_is_omap3630()              is_omap363x()
+# define cpu_is_ti81xx()                is_ti81xx()
+# define cpu_is_ti816x()                is_ti816x()
+# define cpu_is_ti814x()                is_ti814x()
+# define soc_is_am35xx()                is_am35xx()
+#endif
+
+# if defined(CONFIG_SOC_AM33XX)
+# undef soc_is_am33xx
+# undef soc_is_am335x
+# define soc_is_am33xx()                is_am33xx()
+# define soc_is_am335x()                is_am335x()
+#endif
+
+# if defined(CONFIG_ARCH_OMAP4)
+# undef cpu_is_omap44xx
+# undef cpu_is_omap443x
+# undef cpu_is_omap446x
+# undef cpu_is_omap447x
+# define cpu_is_omap44xx()              is_omap44xx()
+# define cpu_is_omap443x()              is_omap443x()
+# define cpu_is_omap446x()              is_omap446x()
+# define cpu_is_omap447x()              is_omap447x()
+# endif
+
+# if defined(CONFIG_SOC_OMAP5)
+# undef soc_is_omap54xx
+# undef soc_is_omap543x
+# define soc_is_omap54xx()              is_omap54xx()
+# define soc_is_omap543x()              is_omap543x()
+#endif
+
+/* Various silicon revisions for omap2 */
+#define OMAP242X_CLASS          0x24200024
+#define OMAP2420_REV_ES1_0      OMAP242X_CLASS
+#define OMAP2420_REV_ES2_0      (OMAP242X_CLASS | (0x1 << 8))
+
+#define OMAP243X_CLASS          0x24300024
+#define OMAP2430_REV_ES1_0      OMAP243X_CLASS
+
+#define OMAP343X_CLASS          0x34300034
+#define OMAP3430_REV_ES1_0      OMAP343X_CLASS
+#define OMAP3430_REV_ES2_0      (OMAP343X_CLASS | (0x1 << 8))
+#define OMAP3430_REV_ES2_1      (OMAP343X_CLASS | (0x2 << 8))
+#define OMAP3430_REV_ES3_0      (OMAP343X_CLASS | (0x3 << 8))
+#define OMAP3430_REV_ES3_1      (OMAP343X_CLASS | (0x4 << 8))
+#define OMAP3430_REV_ES3_1_2    (OMAP343X_CLASS | (0x5 << 8))
+
+#define OMAP363X_CLASS          0x36300034
+#define OMAP3630_REV_ES1_0      OMAP363X_CLASS
+#define OMAP3630_REV_ES1_1      (OMAP363X_CLASS | (0x1 << 8))
+#define OMAP3630_REV_ES1_2      (OMAP363X_CLASS | (0x2 << 8))
+
+#define TI816X_CLASS            0x81600034
+#define TI8168_REV_ES1_0        TI816X_CLASS
+#define TI8168_REV_ES1_1        (TI816X_CLASS | (0x1 << 8))
+
+#define TI814X_CLASS            0x81400034
+#define TI8148_REV_ES1_0        TI814X_CLASS
+#define TI8148_REV_ES2_0        (TI814X_CLASS | (0x1 << 8))
+#define TI8148_REV_ES2_1        (TI814X_CLASS | (0x2 << 8))
+
+#define AM35XX_CLASS            0x35170034
+#define AM35XX_REV_ES1_0        AM35XX_CLASS
+#define AM35XX_REV_ES1_1        (AM35XX_CLASS | (0x1 << 8))
+
+#define AM335X_CLASS            0x33500033
+#define AM335X_REV_ES1_0        AM335X_CLASS
+
+#define OMAP443X_CLASS          0x44300044
+#define OMAP4430_REV_ES1_0      (OMAP443X_CLASS | (0x10 << 8))
+#define OMAP4430_REV_ES2_0      (OMAP443X_CLASS | (0x20 << 8))
+#define OMAP4430_REV_ES2_1      (OMAP443X_CLASS | (0x21 << 8))
+#define OMAP4430_REV_ES2_2      (OMAP443X_CLASS | (0x22 << 8))
+#define OMAP4430_REV_ES2_3      (OMAP443X_CLASS | (0x23 << 8))
+
+#define OMAP446X_CLASS          0x44600044
+#define OMAP4460_REV_ES1_0      (OMAP446X_CLASS | (0x10 << 8))
+#define OMAP4460_REV_ES1_1      (OMAP446X_CLASS | (0x11 << 8))
+
+#define OMAP447X_CLASS          0x44700044
+#define OMAP4470_REV_ES1_0      (OMAP447X_CLASS | (0x10 << 8))
+
+#define OMAP54XX_CLASS          0x54000054
+#define OMAP5430_REV_ES1_0      (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
+#define OMAP5432_REV_ES1_0      (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
+
+void omap2xxx_check_revision(void);
+void omap3xxx_check_revision(void);
+void omap4xxx_check_revision(void);
+void omap5xxx_check_revision(void);
+void omap3xxx_check_features(void);
+void ti81xx_check_features(void);
+void omap4xxx_check_features(void);
+
+/*
+ * Runtime detection of OMAP3 features
+ *
+ * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
+ *    family have OS-level control over the I/O chain clock.  This is
+ *    to avoid a window during which wakeups could potentially be lost
+ *    during powerdomain transitions.  If this bit is set, it
+ *    indicates that the chip does support OS-level control of this
+ *    feature.
+ */
+extern u32 omap_features;
+
+#define OMAP3_HAS_L2CACHE               BIT(0)
+#define OMAP3_HAS_IVA                   BIT(1)
+#define OMAP3_HAS_SGX                   BIT(2)
+#define OMAP3_HAS_NEON                  BIT(3)
+#define OMAP3_HAS_ISP                   BIT(4)
+#define OMAP3_HAS_192MHZ_CLK            BIT(5)
+#define OMAP3_HAS_IO_WAKEUP             BIT(6)
+#define OMAP3_HAS_SDRC                  BIT(7)
+#define OMAP3_HAS_IO_CHAIN_CTRL         BIT(8)
+#define OMAP4_HAS_PERF_SILICON          BIT(9)
+
+
+#define OMAP3_HAS_FEATURE(feat,flag)                    \
+static inline unsigned int omap3_has_ ##feat(void)      \
+{                                                       \
+        return omap_features & OMAP3_HAS_ ##flag;       \
+}                                                       \
+
+OMAP3_HAS_FEATURE(l2cache, L2CACHE)
+OMAP3_HAS_FEATURE(sgx, SGX)
+OMAP3_HAS_FEATURE(iva, IVA)
+OMAP3_HAS_FEATURE(neon, NEON)
+OMAP3_HAS_FEATURE(isp, ISP)
+OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
+OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
+OMAP3_HAS_FEATURE(sdrc, SDRC)
+OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
+
+/*
+ * Runtime detection of OMAP4 features
+ */
+#define OMAP4_HAS_FEATURE(feat, flag)                   \
+static inline unsigned int omap4_has_ ##feat(void)      \
+{                                                       \
+        return omap_features & OMAP4_HAS_ ##flag;       \
+}                                                       \
+
+OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
+
+#endif  /* __ASSEMBLY__ */
+
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index f8217a5a4a26..b0e77a407047 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -23,8 +23,8 @@
 #include <linux/slab.h>
 #include <linux/io.h>
 
-#include <plat/omap_device.h>
-
+#include "soc.h"
+#include "omap_device.h"
 #include "voltage.h"
 #include "control.h"
 #include "pm.h"
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
new file mode 100644
index 000000000000..0ff0f068bea8
--- /dev/null
+++ b/arch/arm/mach-omap2/sram.c
@@ -0,0 +1,305 @@
+/*
+ *
+ * OMAP SRAM detection and management
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * Copyright (C) 2009-2012 Texas Instruments
+ * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fncpy.h>
+#include <asm/tlb.h>
+#include <asm/cacheflush.h>
+
+#include <asm/mach/map.h>
+
+#include "soc.h"
+#include "iomap.h"
+#include "prm2xxx_3xxx.h"
+#include "sdrc.h"
+#include "sram.h"
+
+#define OMAP2_SRAM_PUB_PA       (OMAP2_SRAM_PA + 0xf800)
+#define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
+#ifdef CONFIG_OMAP4_ERRATA_I688
+#define OMAP4_SRAM_PUB_PA       OMAP4_SRAM_PA
+#else
+#define OMAP4_SRAM_PUB_PA       (OMAP4_SRAM_PA + 0x4000)
+#endif
+#define OMAP5_SRAM_PA           0x40300000
+
+#define SRAM_BOOTLOADER_SZ      0x00
+
+#define OMAP24XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_L3_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_L3_IO_ADDRESS(0x6C000048)
+
+#define GP_DEVICE               0x300
+
+#define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
+
+static unsigned long omap_sram_start;
+static unsigned long omap_sram_skip;
+static unsigned long omap_sram_size;
+
+/*
+ * Depending on the target RAMFS firewall setup, the public usable amount of
+ * SRAM varies.  The default accessible size for all device types is 2k. A GP
+ * device allows ARM11 but not other initiators for full size. This
+ * functionality seems ok until some nice security API happens.
+ */
+static int is_sram_locked(void)
+{
+        if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
+                /* RAMFW: R/W access to all initiators for all qualifier sets */
+                if (cpu_is_omap242x()) {
+                        __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
+                        __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
+                        __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
+                }
+                if (cpu_is_omap34xx()) {
+                        __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
+                        __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
+                        __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
+                        __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
+                        __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
+                }
+                return 0;
+        } else
+                return 1; /* assume locked with no PPA or security driver */
+}
+
+/*
+ * The amount of SRAM depends on the core type.
+ * Note that we cannot try to test for SRAM here because writes
+ * to secure SRAM will hang the system. Also the SRAM is not
+ * yet mapped at this point.
+ */
+static void __init omap_detect_sram(void)
+{
+        omap_sram_skip = SRAM_BOOTLOADER_SZ;
+        if (is_sram_locked()) {
+                if (cpu_is_omap34xx()) {
+                        omap_sram_start = OMAP3_SRAM_PUB_PA;
+                        if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
+                            (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
+                                omap_sram_size = 0x7000; /* 28K */
+                                omap_sram_skip += SZ_16K;
+                        } else {
+                                omap_sram_size = 0x8000; /* 32K */
+                        }
+                } else if (cpu_is_omap44xx()) {
+                        omap_sram_start = OMAP4_SRAM_PUB_PA;
+                        omap_sram_size = 0xa000; /* 40K */
+                } else if (soc_is_omap54xx()) {
+                        omap_sram_start = OMAP5_SRAM_PA;
+                        omap_sram_size = SZ_128K; /* 128KB */
+                } else {
+                        omap_sram_start = OMAP2_SRAM_PUB_PA;
+                        omap_sram_size = 0x800; /* 2K */
+                }
+        } else {
+                if (soc_is_am33xx()) {
+                        omap_sram_start = AM33XX_SRAM_PA;
+                        omap_sram_size = 0x10000; /* 64K */
+                } else if (cpu_is_omap34xx()) {
+                        omap_sram_start = OMAP3_SRAM_PA;
+                        omap_sram_size = 0x10000; /* 64K */
+                } else if (cpu_is_omap44xx()) {
+                        omap_sram_start = OMAP4_SRAM_PA;
+                        omap_sram_size = 0xe000; /* 56K */
+                } else if (soc_is_omap54xx()) {
+                        omap_sram_start = OMAP5_SRAM_PA;
+                        omap_sram_size = SZ_128K; /* 128KB */
+                } else {
+                        omap_sram_start = OMAP2_SRAM_PA;
+                        if (cpu_is_omap242x())
+                                omap_sram_size = 0xa0000; /* 640K */
+                        else if (cpu_is_omap243x())
+                                omap_sram_size = 0x10000; /* 64K */
+                }
+        }
+}
+
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+static void __init omap2_map_sram(void)
+{
+        int cached = 1;
+
+#ifdef CONFIG_OMAP4_ERRATA_I688
+        if (cpu_is_omap44xx()) {
+                omap_sram_start += PAGE_SIZE;
+                omap_sram_size -= SZ_16K;
+        }
+#endif
+        if (cpu_is_omap34xx()) {
+                /*
+                 * SRAM must be marked as non-cached on OMAP3 since the
+                 * CORE DPLL M2 divider change code (in SRAM) runs with the
+                 * SDRAM controller disabled, and if it is marked cached,
+                 * the ARM may attempt to write cache lines back to SDRAM
+                 * which will cause the system to hang.
+                 */
+                cached = 0;
+        }
+
+        omap_map_sram(omap_sram_start, omap_sram_size,
+                        omap_sram_skip, cached);
+}
+
+static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                              u32 base_cs, u32 force_unlock);
+
+void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                   u32 base_cs, u32 force_unlock)
+{
+        BUG_ON(!_omap2_sram_ddr_init);
+        _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
+                             base_cs, force_unlock);
+}
+
+static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
+                                          u32 mem_type);
+
+void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
+{
+        BUG_ON(!_omap2_sram_reprogram_sdrc);
+        _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
+}
+
+static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
+
+u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
+{
+        BUG_ON(!_omap2_set_prcm);
+        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
+}
+
+#ifdef CONFIG_SOC_OMAP2420
+static int __init omap242x_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
+                                        omap242x_sram_ddr_init_sz);
+
+        _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
+                                            omap242x_sram_reprogram_sdrc_sz);
+
+        _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
+                                         omap242x_sram_set_prcm_sz);
+
+        return 0;
+}
+#else
+static inline int omap242x_sram_init(void)
+{
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_SOC_OMAP2430
+static int __init omap243x_sram_init(void)
+{
+        _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
+                                        omap243x_sram_ddr_init_sz);
+
+        _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
+                                            omap243x_sram_reprogram_sdrc_sz);
+
+        _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
+                                         omap243x_sram_set_prcm_sz);
+
+        return 0;
+}
+#else
+static inline int omap243x_sram_init(void)
+{
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+
+static u32 (*_omap3_sram_configure_core_dpll)(
+                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
+
+u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
+{
+        BUG_ON(!_omap3_sram_configure_core_dpll);
+        return _omap3_sram_configure_core_dpll(
+                        m2, unlock_dll, f, inc,
+                        sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
+                        sdrc_actim_ctrl_b_0, sdrc_mr_0,
+                        sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
+                        sdrc_actim_ctrl_b_1, sdrc_mr_1);
+}
+
+void omap3_sram_restore_context(void)
+{
+        omap_sram_reset();
+
+        _omap3_sram_configure_core_dpll =
+                omap_sram_push(omap3_sram_configure_core_dpll,
+                               omap3_sram_configure_core_dpll_sz);
+        omap_push_sram_idle();
+}
+
+static inline int omap34xx_sram_init(void)
+{
+        omap3_sram_restore_context();
+        return 0;
+}
+#else
+static inline int omap34xx_sram_init(void)
+{
+        return 0;
+}
+#endif /* CONFIG_ARCH_OMAP3 */
+
+static inline int am33xx_sram_init(void)
+{
+        return 0;
+}
+
+int __init omap_sram_init(void)
+{
+        omap_detect_sram();
+        omap2_map_sram();
+
+        if (cpu_is_omap242x())
+                omap242x_sram_init();
+        else if (cpu_is_omap2430())
+                omap243x_sram_init();
+        else if (soc_is_am33xx())
+                am33xx_sram_init();
+        else if (cpu_is_omap34xx())
+                omap34xx_sram_init();
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
new file mode 100644
index 000000000000..ca7277c2a9ee
--- /dev/null
+++ b/arch/arm/mach-omap2/sram.h
@@ -0,0 +1,83 @@
+/*
+ * Interface for functions that need to be run in internal SRAM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASSEMBLY__
+#include <plat/sram.h>
+
+extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                                u32 base_cs, u32 force_unlock);
+extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
+                                      u32 mem_type);
+extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
+
+extern u32 omap3_configure_core_dpll(
+                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
+extern void omap3_sram_restore_context(void);
+
+/* Do not use these */
+extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
+extern unsigned long omap24xx_sram_reprogram_clock_sz;
+
+extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                                                u32 base_cs, u32 force_unlock);
+extern unsigned long omap242x_sram_ddr_init_sz;
+
+extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
+                                                int bypass);
+extern unsigned long omap242x_sram_set_prcm_sz;
+
+extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
+                                                u32 mem_type);
+extern unsigned long omap242x_sram_reprogram_sdrc_sz;
+
+
+extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
+                                                u32 base_cs, u32 force_unlock);
+extern unsigned long omap243x_sram_ddr_init_sz;
+
+extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
+                                                int bypass);
+extern unsigned long omap243x_sram_set_prcm_sz;
+
+extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
+                                                u32 mem_type);
+extern unsigned long omap243x_sram_reprogram_sdrc_sz;
+
+extern u32 omap3_sram_configure_core_dpll(
+                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
+                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
+                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
+                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
+                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
+extern unsigned long omap3_sram_configure_core_dpll_sz;
+
+#ifdef CONFIG_PM
+extern void omap_push_sram_idle(void);
+#else
+static inline void omap_push_sram_idle(void) {}
+#endif /* CONFIG_PM */
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * OMAP2+: define the SRAM PA addresses.
+ * Used by the SRAM management code and the idle sleep code.
+ */
+#define OMAP2_SRAM_PA           0x40200000
+#define OMAP3_SRAM_PA           0x40200000
+#ifdef CONFIG_OMAP4_ERRATA_I688
+#define OMAP4_SRAM_PA           0x40304000
+#define OMAP4_SRAM_VA           0xfe404000
+#else
+#define OMAP4_SRAM_PA           0x40300000
+#endif
+#define AM33XX_SRAM_PA          0x40300000
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index 8f7326cd435b..680a7c56cc3e 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -34,8 +34,8 @@
 
 #include "soc.h"
 #include "iomap.h"
-#include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "prm2xxx.h"
+#include "cm2xxx.h"
 #include "sdrc.h"
 
         .text
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index b140d6578529..a1e9edd673f4 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -34,8 +34,8 @@
 
 #include "soc.h"
 #include "iomap.h"
-#include "prm2xxx_3xxx.h"
-#include "cm2xxx_3xxx.h"
+#include "prm2xxx.h"
+#include "cm2xxx.h"
 #include "sdrc.h"
 
         .text
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index 2d0ceaa23fb8..1446331b576a 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -32,7 +32,7 @@
 #include "soc.h"
 #include "iomap.h"
 #include "sdrc.h"
-#include "cm2xxx_3xxx.h"
+#include "cm3xxx.h"
 
 /*
  * This file needs be built unconditionally as ARM to interoperate correctly
diff --git a/arch/arm/mach-omap2/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h
index 8f9843f78422..a1e6caf0dba6 100644
--- a/arch/arm/mach-omap2/ti81xx.h
+++ b/arch/arm/mach-omap2/ti81xx.h
@@ -22,6 +22,15 @@
 #define TI81XX_CTRL_BASE        TI81XX_SCM_BASE
 #define TI81XX_PRCM_BASE        0x48180000
 
+/*
+ * Adjust TAP register base such that omap3_check_revision accesses the correct
+ * TI81XX register for checking device ID (it adds 0x204 to tap base while
+ * TI81XX DEVICE ID register is at offset 0x600 from control base).
+ */
+#define TI81XX_TAP_BASE         (TI81XX_CTRL_BASE + \
+                                 TI81XX_CONTROL_DEVICE_ID - 0x204)
+
+
 #define TI81XX_ARM_INTC_BASE    0x48200000
 
 #endif /* __ASM_ARCH_TI81XX_H */
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 69e46631a7cd..b9cff72ceaec 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -37,16 +37,21 @@
 #include <linux/clockchips.h>
 #include <linux/slab.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 
 #include <asm/mach/time.h>
 #include <asm/smp_twd.h>
 #include <asm/sched_clock.h>
 
 #include <asm/arch_timer.h>
-#include <plat/omap_hwmod.h>
-#include <plat/omap_device.h>
+#include "omap_hwmod.h"
+#include "omap_device.h"
+#include <plat/counter-32k.h>
 #include <plat/dmtimer.h>
-#include <plat/omap-pm.h>
+#include "omap-pm.h"
 
 #include "soc.h"
 #include "common.h"
@@ -61,18 +66,6 @@
 #define OMAP3_32K_SOURCE        "omap_32k_fck"
 #define OMAP4_32K_SOURCE        "sys_32k_ck"
 
-#ifdef CONFIG_OMAP_32K_TIMER
-#define OMAP2_CLKEV_SOURCE      OMAP2_32K_SOURCE
-#define OMAP3_CLKEV_SOURCE      OMAP3_32K_SOURCE
-#define OMAP4_CLKEV_SOURCE      OMAP4_32K_SOURCE
-#define OMAP3_SECURE_TIMER      12
-#else
-#define OMAP2_CLKEV_SOURCE      OMAP2_MPU_SOURCE
-#define OMAP3_CLKEV_SOURCE      OMAP3_MPU_SOURCE
-#define OMAP4_CLKEV_SOURCE      OMAP4_MPU_SOURCE
-#define OMAP3_SECURE_TIMER      1
-#endif
-
 #define REALTIME_COUNTER_BASE                           0x48243200
 #define INCREMENTER_NUMERATOR_OFFSET                    0x10
 #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET           0x14
@@ -103,7 +96,7 @@ static int omap2_gp_timer_set_next_event(unsigned long cycles,
                                          struct clock_event_device *evt)
 {
         __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
-                                                0xffffffff - cycles, 1);
+                                   0xffffffff - cycles, OMAP_TIMER_POSTED);
 
         return 0;
 }
@@ -113,7 +106,7 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 {
         u32 period;
 
-        __omap_dm_timer_stop(&clkev, 1, clkev.rate);
+        __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
@@ -121,10 +114,10 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
                 period -= 1;
                 /* Looks like we need to first set the load value separately */
                 __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
-                                        0xffffffff - period, 1);
+                                      0xffffffff - period, OMAP_TIMER_POSTED);
                 __omap_dm_timer_load_start(&clkev,
                                         OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
-                                                0xffffffff - period, 1);
+                                        0xffffffff - period, OMAP_TIMER_POSTED);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 break;
@@ -144,36 +137,144 @@ static struct clock_event_device clockevent_gpt = {
         .set_mode       = omap2_gp_timer_set_mode,
 };
 
+static struct property device_disabled = {
+        .name = "status",
+        .length = sizeof("disabled"),
+        .value = "disabled",
+};
+
+static struct of_device_id omap_timer_match[] __initdata = {
+        { .compatible = "ti,omap2-timer", },
+        { }
+};
+
+/**
+ * omap_get_timer_dt - get a timer using device-tree
+ * @match       - device-tree match structure for matching a device type
+ * @property    - optional timer property to match
+ *
+ * Helper function to get a timer during early boot using device-tree for use
+ * as kernel system timer. Optionally, the property argument can be used to
+ * select a timer with a specific property. Once a timer is found then mark
+ * the timer node in device-tree as disabled, to prevent the kernel from
+ * registering this timer as a platform device and so no one else can use it.
+ */
+static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
+                                                     const char *property)
+{
+        struct device_node *np;
+
+        for_each_matching_node(np, match) {
+                if (!of_device_is_available(np)) {
+                        of_node_put(np);
+                        continue;
+                }
+
+                if (property && !of_get_property(np, property, NULL)) {
+                        of_node_put(np);
+                        continue;
+                }
+
+                prom_add_property(np, &device_disabled);
+                return np;
+        }
+
+        return NULL;
+}
+
+/**
+ * omap_dmtimer_init - initialisation function when device tree is used
+ *
+ * For secure OMAP3 devices, timers with device type "timer-secure" cannot
+ * be used by the kernel as they are reserved. Therefore, to prevent the
+ * kernel registering these devices remove them dynamically from the device
+ * tree on boot.
+ */
+void __init omap_dmtimer_init(void)
+{
+        struct device_node *np;
+
+        if (!cpu_is_omap34xx())
+                return;
+
+        /* If we are a secure device, remove any secure timer nodes */
+        if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) {
+                np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure");
+                if (np)
+                        of_node_put(np);
+        }
+}
+
+/**
+ * omap_dm_timer_get_errata - get errata flags for a timer
+ *
+ * Get the timer errata flags that are specific to the OMAP device being used.
+ */
+u32 __init omap_dm_timer_get_errata(void)
+{
+        if (cpu_is_omap24xx())
+                return 0;
+
+        return OMAP_TIMER_ERRATA_I103_I767;
+}
+
 static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
                                                 int gptimer_id,
-                                                const char *fck_source)
+                                                const char *fck_source,
+                                                const char *property,
+                                                int posted)
 {
         char name[10]; /* 10 = sizeof("gptXX_Xck0") */
+        const char *oh_name;
+        struct device_node *np;
         struct omap_hwmod *oh;
-        struct resource irq_rsrc, mem_rsrc;
-        size_t size;
-        int res = 0;
-        int r;
-
-        sprintf(name, "timer%d", gptimer_id);
-        omap_hwmod_setup_one(name);
-        oh = omap_hwmod_lookup(name);
+        struct resource irq, mem;
+        int r = 0;
+
+        if (of_have_populated_dt()) {
+                np = omap_get_timer_dt(omap_timer_match, NULL);
+                if (!np)
+                        return -ENODEV;
+
+                of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+                if (!oh_name)
+                        return -ENODEV;
+
+                timer->irq = irq_of_parse_and_map(np, 0);
+                if (!timer->irq)
+                        return -ENXIO;
+
+                timer->io_base = of_iomap(np, 0);
+
+                of_node_put(np);
+        } else {
+                if (omap_dm_timer_reserve_systimer(gptimer_id))
+                        return -ENODEV;
+
+                sprintf(name, "timer%d", gptimer_id);
+                oh_name = name;
+        }
+
+        oh = omap_hwmod_lookup(oh_name);
         if (!oh)
                 return -ENODEV;
 
-        r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL, &irq_rsrc);
-        if (r)
-                return -ENXIO;
-        timer->irq = irq_rsrc.start;
+        if (!of_have_populated_dt()) {
+                r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
+                                                   &irq);
+                if (r)
+                        return -ENXIO;
+                timer->irq = irq.start;
 
-        r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL, &mem_rsrc);
-        if (r)
-                return -ENXIO;
-        timer->phys_base = mem_rsrc.start;
-        size = mem_rsrc.end - mem_rsrc.start;
+                r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
+                                                   &mem);
+                if (r)
+                        return -ENXIO;
+
+                /* Static mapping, never released */
+                timer->io_base = ioremap(mem.start, mem.end - mem.start);
+        }
 
-        /* Static mapping, never released */
-        timer->io_base = ioremap(timer->phys_base, size);
         if (!timer->io_base)
                 return -ENXIO;
 
@@ -182,42 +283,56 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
         if (IS_ERR(timer->fclk))
                 return -ENODEV;
 
-        omap_hwmod_enable(oh);
-
-        if (omap_dm_timer_reserve_systimer(gptimer_id))
-                return -ENODEV;
-
+        /* FIXME: Need to remove hard-coded test on timer ID */
         if (gptimer_id != 12) {
                 struct clk *src;
 
                 src = clk_get(NULL, fck_source);
                 if (IS_ERR(src)) {
-                        res = -EINVAL;
+                        r = -EINVAL;
                 } else {
-                        res = __omap_dm_timer_set_source(timer->fclk, src);
-                        if (IS_ERR_VALUE(res))
-                                pr_warning("%s: timer%i cannot set source\n",
-                                                __func__, gptimer_id);
+                        r = clk_set_parent(timer->fclk, src);
+                        if (IS_ERR_VALUE(r))
+                                pr_warn("%s: %s cannot set source\n",
+                                        __func__, oh->name);
                         clk_put(src);
                 }
         }
+
+        omap_hwmod_setup_one(oh_name);
+        omap_hwmod_enable(oh);
         __omap_dm_timer_init_regs(timer);
-        __omap_dm_timer_reset(timer, 1, 1);
-        timer->posted = 1;
 
-        timer->rate = clk_get_rate(timer->fclk);
+        if (posted)
+                __omap_dm_timer_enable_posted(timer);
+
+        /* Check that the intended posted configuration matches the actual */
+        if (posted != timer->posted)
+                return -EINVAL;
 
+        timer->rate = clk_get_rate(timer->fclk);
         timer->reserved = 1;
 
-        return res;
+        return r;
 }
 
 static void __init omap2_gp_clockevent_init(int gptimer_id,
-                                                const char *fck_source)
+                                                const char *fck_source,
+                                                const char *property)
 {
         int res;
 
-        res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source);
+        clkev.errata = omap_dm_timer_get_errata();
+
+        /*
+         * For clock-event timers we never read the timer counter and
+         * so we are not impacted by errata i103 and i767. Therefore,
+         * we can safely ignore this errata for clock-event timers.
+         */
+        __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767);
+
+        res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source, property,
+                                     OMAP_TIMER_POSTED);
         BUG_ON(res);
 
         omap2_gp_timer_irq.dev_id = &clkev;
@@ -250,7 +365,8 @@ static bool use_gptimer_clksrc;
  */
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
-        return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
+        return (cycle_t)__omap_dm_timer_read_counter(&clksrc,
+                                                     OMAP_TIMER_NONPOSTED);
 }
 
 static struct clocksource clocksource_gpt = {
@@ -264,21 +380,41 @@ static struct clocksource clocksource_gpt = {
 static u32 notrace dmtimer_read_sched_clock(void)
 {
         if (clksrc.reserved)
-                return __omap_dm_timer_read_counter(&clksrc, 1);
+                return __omap_dm_timer_read_counter(&clksrc,
+                                                    OMAP_TIMER_NONPOSTED);
 
         return 0;
 }
 
-#ifdef CONFIG_OMAP_32K_TIMER
+static struct of_device_id omap_counter_match[] __initdata = {
+        { .compatible = "ti,omap-counter32k", },
+        { }
+};
+
 /* Setup free-running counter for clocksource */
 static int __init omap2_sync32k_clocksource_init(void)
 {
         int ret;
+        struct device_node *np = NULL;
         struct omap_hwmod *oh;
         void __iomem *vbase;
         const char *oh_name = "counter_32k";
 
         /*
+         * If device-tree is present, then search the DT blob
+         * to see if the 32kHz counter is supported.
+         */
+        if (of_have_populated_dt()) {
+                np = omap_get_timer_dt(omap_counter_match, NULL);
+                if (!np)
+                        return -ENODEV;
+
+                of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+                if (!oh_name)
+                        return -ENODEV;
+        }
+
+        /*
          * First check hwmod data is available for sync32k counter
          */
         oh = omap_hwmod_lookup(oh_name);
@@ -287,7 +423,13 @@ static int __init omap2_sync32k_clocksource_init(void)
 
         omap_hwmod_setup_one(oh_name);
 
-        vbase = omap_hwmod_get_mpu_rt_va(oh);
+        if (np) {
+                vbase = of_iomap(np, 0);
+                of_node_put(np);
+        } else {
+                vbase = omap_hwmod_get_mpu_rt_va(oh);
+        }
+
         if (!vbase) {
                 pr_warn("%s: failed to get counter_32k resource\n", __func__);
                 return -ENXIO;
@@ -309,23 +451,21 @@ static int __init omap2_sync32k_clocksource_init(void)
 
         return ret;
 }
-#else
-static inline int omap2_sync32k_clocksource_init(void)
-{
-        return -ENODEV;
-}
-#endif
 
 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                                                 const char *fck_source)
 {
         int res;
 
-        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source);
+        clksrc.errata = omap_dm_timer_get_errata();
+
+        res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source, NULL,
+                                     OMAP_TIMER_NONPOSTED);
         BUG_ON(res);
 
         __omap_dm_timer_load_start(&clksrc,
-                        OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
+                                   OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
+                                   OMAP_TIMER_NONPOSTED);
         setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
 
         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
@@ -336,25 +476,6 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                         gptimer_id, clksrc.rate);
 }
 
-static void __init omap2_clocksource_init(int gptimer_id,
-                                                const char *fck_source)
-{
-        /*
-         * First give preference to kernel parameter configuration
-         * by user (clocksource="gp_timer").
-         *
-         * In case of missing kernel parameter for clocksource,
-         * first check for availability for 32k-sync timer, in case
-         * of failure in finding 32k_counter module or registering
-         * it as clocksource, execution will fallback to gp-timer.
-         */
-        if (use_gptimer_clksrc == true)
-                omap2_gptimer_clocksource_init(gptimer_id, fck_source);
-        else if (omap2_sync32k_clocksource_init())
-                /* Fall back to gp-timer code */
-                omap2_gptimer_clocksource_init(gptimer_id, fck_source);
-}
-
 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 /*
  * The realtime counter also called master counter, is a free-running
@@ -433,48 +554,65 @@ static inline void __init realtime_counter_init(void)
 {}
 #endif
 
-#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src,                  \
+#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,   \
+                               clksrc_nr, clksrc_src)                   \
+static void __init omap##name##_gptimer_timer_init(void)                \
+{                                                                       \
+        omap_dmtimer_init();                                            \
+        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
+        omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);        \
+}
+
+#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,  \
                                 clksrc_nr, clksrc_src)                  \
-static void __init omap##name##_timer_init(void)                        \
+static void __init omap##name##_sync32k_timer_init(void)                \
 {                                                                       \
-        omap2_gp_clockevent_init((clkev_nr), clkev_src);                \
-        omap2_clocksource_init((clksrc_nr), clksrc_src);                \
+        omap_dmtimer_init();                                            \
+        omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);    \
+        /* Enable the use of clocksource="gp_timer" kernel parameter */ \
+        if (use_gptimer_clksrc)                                         \
+                omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src);\
+        else                                                            \
+                omap2_sync32k_clocksource_init();                       \
 }
 
-#define OMAP_SYS_TIMER(name)                                            \
+#define OMAP_SYS_TIMER(name, clksrc)                                    \
 struct sys_timer omap##name##_timer = {                                 \
-        .init   = omap##name##_timer_init,                              \
+        .init   = omap##name##_##clksrc##_timer_init,                   \
 };
 
 #ifdef CONFIG_ARCH_OMAP2
-OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE)
-OMAP_SYS_TIMER(2)
-#endif
+OMAP_SYS_32K_TIMER_INIT(2, 1, OMAP2_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP2_MPU_SOURCE);
+OMAP_SYS_TIMER(2, sync32k);
+#endif /* CONFIG_ARCH_OMAP2 */
 
 #ifdef CONFIG_ARCH_OMAP3
-OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE)
-OMAP_SYS_TIMER(3)
-OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
-                        2, OMAP3_MPU_SOURCE)
-OMAP_SYS_TIMER(3_secure)
-#endif
+OMAP_SYS_32K_TIMER_INIT(3, 1, OMAP3_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP3_MPU_SOURCE);
+OMAP_SYS_TIMER(3, sync32k);
+OMAP_SYS_32K_TIMER_INIT(3_secure, 12, OMAP3_32K_SOURCE, "ti,timer-secure",
+                        2, OMAP3_MPU_SOURCE);
+OMAP_SYS_TIMER(3_secure, sync32k);
+OMAP_SYS_GP_TIMER_INIT(3_gp, 1, OMAP3_MPU_SOURCE, "ti,timer-alwon",
+                       2, OMAP3_MPU_SOURCE);
+OMAP_SYS_TIMER(3_gp, gptimer);
+#endif /* CONFIG_ARCH_OMAP3 */
 
 #ifdef CONFIG_SOC_AM33XX
-OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE)
-OMAP_SYS_TIMER(3_am33xx)
-#endif
+OMAP_SYS_GP_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, "ti,timer-alwon",
+                       2, OMAP4_MPU_SOURCE);
+OMAP_SYS_TIMER(3_am33xx, gptimer);
+#endif /* CONFIG_SOC_AM33XX */
 
 #ifdef CONFIG_ARCH_OMAP4
+OMAP_SYS_32K_TIMER_INIT(4, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP4_MPU_SOURCE);
 #ifdef CONFIG_LOCAL_TIMERS
-static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
-                              OMAP44XX_LOCAL_TWD_BASE, 29);
-#endif
-
-static void __init omap4_timer_init(void)
+static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
+static void __init omap4_local_timer_init(void)
 {
-        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
-        omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
-#ifdef CONFIG_LOCAL_TIMERS
+        omap4_sync32k_timer_init();
         /* Local timers are not supprted on OMAP4430 ES1.0 */
         if (omap_rev() != OMAP4430_REV_ES1_0) {
                 int err;
@@ -488,26 +626,32 @@ static void __init omap4_timer_init(void)
                 if (err)
                         pr_err("twd_local_timer_register failed %d\n", err);
         }
-#endif
 }
-OMAP_SYS_TIMER(4)
-#endif
+#else /* CONFIG_LOCAL_TIMERS */
+static inline void omap4_local_timer_init(void)
+{
+        omap4_sync32_timer_init();
+}
+#endif /* CONFIG_LOCAL_TIMERS */
+OMAP_SYS_TIMER(4, local);
+#endif /* CONFIG_ARCH_OMAP4 */
 
 #ifdef CONFIG_SOC_OMAP5
-static void __init omap5_timer_init(void)
+OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
+                        2, OMAP4_MPU_SOURCE);
+static void __init omap5_realtime_timer_init(void)
 {
         int err;
 
-        omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
-        omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
+        omap5_sync32k_timer_init();
         realtime_counter_init();
 
         err = arch_timer_of_register();
         if (err)
                 pr_err("%s: arch_timer_register failed %d\n", __func__, err);
 }
-OMAP_SYS_TIMER(5)
-#endif
+OMAP_SYS_TIMER(5, realtime);
+#endif /* CONFIG_SOC_OMAP5 */
 
 /**
  * omap_timer_init - build and register timer device with an
@@ -559,6 +703,9 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
         if (timer_dev_attr)
                 pdata->timer_capability = timer_dev_attr->timer_capability;
 
+        pdata->timer_errata = omap_dm_timer_get_errata();
+        pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
+
         pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
                                  NULL, 0, 0);
 
@@ -583,6 +730,10 @@ static int __init omap2_dm_timer_init(void)
 {
         int ret;
 
+        /* If dtb is there, the devices will be created dynamically */
+        if (of_have_populated_dt())
+                return -ENODEV;
+
         ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
         if (unlikely(ret)) {
                 pr_err("%s: device registration failed.\n", __func__);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index a256135d8e48..e49b40b4c90a 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -26,9 +26,6 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/fixed.h>
 
-#include <plat/i2c.h>
-#include <plat/usb.h>
-
 #include "soc.h"
 #include "twl-common.h"
 #include "pm.h"
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 3c434498e12e..d1dbe125b34f 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -25,10 +25,10 @@
 
 #include <asm/io.h>
 
-#include <plat/usb.h>
-#include <plat/omap_device.h>
-
+#include "soc.h"
+#include "omap_device.h"
 #include "mux.h"
+#include "usb.h"
 
 #ifdef CONFIG_MFD_OMAP_USB_HOST
 
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 51da21cb78f1..7b33b375fe77 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -25,12 +25,10 @@
 #include <linux/io.h>
 #include <linux/usb/musb.h>
 
-#include <plat/usb.h>
-#include <plat/omap_device.h>
-
-#include "am35xx.h"
-
+#include "omap_device.h"
+#include "soc.h"
 #include "mux.h"
+#include "usb.h"
 
 static struct musb_hdrc_config musb_config = {
         .multipoint     = 1,
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 805bea6edf17..a8795ff19e6d 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -15,10 +15,11 @@
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
 #include <linux/export.h>
+#include <linux/platform_data/usb-omap.h>
 
 #include <linux/usb/musb.h>
 
-#include <plat/gpmc.h>
+#include "gpmc.h"
 
 #include "mux.h"
 
diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h
new file mode 100644
index 000000000000..9b986ead7c45
--- /dev/null
+++ b/arch/arm/mach-omap2/usb.h
@@ -0,0 +1,82 @@
+#include <linux/platform_data/usb-omap.h>
+
+/* AM35x */
+/* USB 2.0 PHY Control */
+#define CONF2_PHY_GPIOMODE      (1 << 23)
+#define CONF2_OTGMODE           (3 << 14)
+#define CONF2_NO_OVERRIDE       (0 << 14)
+#define CONF2_FORCE_HOST        (1 << 14)
+#define CONF2_FORCE_DEVICE      (2 << 14)
+#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
+#define CONF2_SESENDEN          (1 << 13)
+#define CONF2_VBDTCTEN          (1 << 12)
+#define CONF2_REFFREQ_24MHZ     (2 << 8)
+#define CONF2_REFFREQ_26MHZ     (7 << 8)
+#define CONF2_REFFREQ_13MHZ     (6 << 8)
+#define CONF2_REFFREQ           (0xf << 8)
+#define CONF2_PHYCLKGD          (1 << 7)
+#define CONF2_VBUSSENSE         (1 << 6)
+#define CONF2_PHY_PLLON         (1 << 5)
+#define CONF2_RESET             (1 << 4)
+#define CONF2_PHYPWRDN          (1 << 3)
+#define CONF2_OTGPWRDN          (1 << 2)
+#define CONF2_DATPOL            (1 << 1)
+
+/* TI81XX specific definitions */
+#define USBCTRL0        0x620
+#define USBSTAT0        0x624
+
+/* TI816X PHY controls bits */
+#define TI816X_USBPHY0_NORMAL_MODE      (1 << 0)
+#define TI816X_USBPHY_REFCLK_OSC        (1 << 8)
+
+/* TI814X PHY controls bits */
+#define USBPHY_CM_PWRDN         (1 << 0)
+#define USBPHY_OTG_PWRDN        (1 << 1)
+#define USBPHY_CHGDET_DIS       (1 << 2)
+#define USBPHY_CHGDET_RSTRT     (1 << 3)
+#define USBPHY_SRCONDM          (1 << 4)
+#define USBPHY_SINKONDP         (1 << 5)
+#define USBPHY_CHGISINK_EN      (1 << 6)
+#define USBPHY_CHGVSRC_EN       (1 << 7)
+#define USBPHY_DMPULLUP         (1 << 8)
+#define USBPHY_DPPULLUP         (1 << 9)
+#define USBPHY_CDET_EXTCTL      (1 << 10)
+#define USBPHY_GPIO_MODE        (1 << 12)
+#define USBPHY_DPOPBUFCTL       (1 << 13)
+#define USBPHY_DMOPBUFCTL       (1 << 14)
+#define USBPHY_DPINPUT          (1 << 15)
+#define USBPHY_DMINPUT          (1 << 16)
+#define USBPHY_DPGPIO_PD        (1 << 17)
+#define USBPHY_DMGPIO_PD        (1 << 18)
+#define USBPHY_OTGVDET_EN       (1 << 19)
+#define USBPHY_OTGSESSEND_EN    (1 << 20)
+#define USBPHY_DATA_POLARITY    (1 << 23)
+
+struct usbhs_omap_board_data {
+        enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
+
+        /* have to be valid if phy_reset is true and portx is in phy mode */
+        int     reset_gpio_port[OMAP3_HS_USB_PORTS];
+
+        /* Set this to true for ES2.x silicon */
+        unsigned                        es2_compatibility:1;
+
+        unsigned                        phy_reset:1;
+
+        /*
+         * Regulators for USB PHYs.
+         * Each PHY can have a separate regulator.
+         */
+        struct regulator                *regulator[OMAP3_HS_USB_PORTS];
+};
+
+extern void usb_musb_init(struct omap_musb_board_data *board_data);
+extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
+
+extern void am35x_musb_reset(void);
+extern void am35x_musb_phy_power(u8 on);
+extern void am35x_musb_clear_irq(void);
+extern void am35x_set_mode(u8 musb_mode);
+extern void ti81xx_musb_phy_power(u8 on);
+
diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c
index b2f1c67043a2..7c2b4ed38f02 100644
--- a/arch/arm/mach-omap2/wd_timer.c
+++ b/arch/arm/mach-omap2/wd_timer.c
@@ -1,6 +1,8 @@
 /*
  * OMAP2+ MPU WD_TIMER-specific code
  *
+ * Copyright (C) 2012 Texas Instruments, Inc.
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -11,10 +13,14 @@
 #include <linux/io.h>
 #include <linux/err.h>
 
-#include <plat/omap_hwmod.h>
+#include <linux/platform_data/omap-wd-timer.h>
 
+#include "omap_hwmod.h"
+#include "omap_device.h"
 #include "wd_timer.h"
 #include "common.h"
+#include "prm.h"
+#include "soc.h"
 
 /*
  * In order to avoid any assumptions from bootloader regarding WDT
@@ -26,9 +32,6 @@
 #define OMAP_WDT_WPS            0x34
 #define OMAP_WDT_SPR            0x48
 
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT       10000
-
 int omap2_wd_timer_disable(struct omap_hwmod *oh)
 {
         void __iomem *base;
@@ -99,3 +102,32 @@ int omap2_wd_timer_reset(struct omap_hwmod *oh)
         return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT :
                 omap2_wd_timer_disable(oh);
 }
+
+static int __init omap_init_wdt(void)
+{
+        int id = -1;
+        struct platform_device *pdev;
+        struct omap_hwmod *oh;
+        char *oh_name = "wd_timer2";
+        char *dev_name = "omap_wdt";
+        struct omap_wd_timer_platform_data pdata;
+
+        if (!cpu_class_is_omap2() || of_have_populated_dt())
+                return 0;
+
+        oh = omap_hwmod_lookup(oh_name);
+        if (!oh) {
+                pr_err("Could not look up wd_timer%d hwmod\n", id);
+                return -EINVAL;
+        }
+
+        pdata.read_reset_sources = prm_read_reset_sources;
+
+        pdev = omap_device_build(dev_name, id, oh, &pdata,
+                                 sizeof(struct omap_wd_timer_platform_data),
+                                 NULL, 0, 0);
+        WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
+             dev_name, oh->name);
+        return 0;
+}
+subsys_initcall(omap_init_wdt);
diff --git a/arch/arm/mach-omap2/wd_timer.h b/arch/arm/mach-omap2/wd_timer.h
index f6bbba73b535..a78f81034a9f 100644
--- a/arch/arm/mach-omap2/wd_timer.h
+++ b/arch/arm/mach-omap2/wd_timer.h
@@ -10,7 +10,7 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_WD_TIMER_H
 #define __ARCH_ARM_MACH_OMAP2_WD_TIMER_H
 
-#include <plat/omap_hwmod.h>
+#include "omap_hwmod.h"
 
 extern int omap2_wd_timer_disable(struct omap_hwmod *oh);
 extern int omap2_wd_timer_reset(struct omap_hwmod *oh);
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 11aa7399dc09..86eec4159cbc 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -2,27 +2,6 @@ if ARCH_PXA
 
 menu "Intel PXA2xx/PXA3xx Implementations"
 
-config ARCH_PXA_V7
-        bool "ARMv7 (PXA95x) based systems"
-
-if ARCH_PXA_V7
-comment "Marvell Dev Platforms (sorted by hardware release time)"
-config MACH_TAVOREVB3
-        bool "PXA95x Development Platform (aka TavorEVB III)"
-        select CPU_PXA955
-
-config MACH_SAARB
-        bool "PXA955 Handheld Platform (aka SAARB)"
-        select CPU_PXA955
-endif
-
-config PXA_V7_MACH_AUTO
-        def_bool y
-        depends on ARCH_PXA_V7
-        depends on !MACH_SAARB
-        select MACH_TAVOREVB3
-
-if !ARCH_PXA_V7
 comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
 
 config MACH_PXA3XX_DT
@@ -630,7 +609,6 @@ config MACH_ZIPIT2
         bool "Zipit Z2 Handheld"
         select HAVE_PWM
         select PXA27x
-endif
 endmenu
 
 config PXA25x
@@ -688,18 +666,6 @@ config CPU_PXA935
         help
           PXA935 (codename Tavor-P65)
 
-config PXA95x
-        bool
-        select CPU_PJ4
-        help
-          Select code specific to PXA95x variants
-
-config CPU_PXA955
-        bool
-        select PXA95x
-        help
-          PXA950 (codename MG1)
-
 config PXA_SHARP_C7xx
         bool
         select SHARPSL_PM
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index ee88d6eae648..12c500558387 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -19,7 +19,6 @@ endif
 obj-$(CONFIG_PXA25x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
 obj-$(CONFIG_PXA27x)            += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
-obj-$(CONFIG_PXA95x)            += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o
 obj-$(CONFIG_CPU_PXA300)        += pxa300.o
 obj-$(CONFIG_CPU_PXA320)        += pxa320.o
 obj-$(CONFIG_CPU_PXA930)        += pxa930.o
@@ -36,9 +35,7 @@ obj-$(CONFIG_MACH_ZYLONITE300)	+= zylonite.o zylonite_pxa300.o
 obj-$(CONFIG_MACH_ZYLONITE320)  += zylonite.o zylonite_pxa320.o
 obj-$(CONFIG_MACH_LITTLETON)    += littleton.o
 obj-$(CONFIG_MACH_TAVOREVB)     += tavorevb.o
-obj-$(CONFIG_MACH_TAVOREVB3)    += tavorevb3.o
 obj-$(CONFIG_MACH_SAAR)         += saar.o
-obj-$(CONFIG_MACH_SAARB)        += saarb.o
 
 # 3rd Party Dev Platforms
 obj-$(CONFIG_ARCH_PXA_IDP)      += idp.o
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 3a258b1bf1aa..1f65d32c8d5e 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -57,7 +57,7 @@ void clk_pxa2xx_cken_disable(struct clk *clk);
 
 extern struct syscore_ops pxa2xx_clock_syscore_ops;
 
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA3xx)
 #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay)   \
 struct clk clk_##_name = {                              \
                 .ops    = &clk_pxa3xx_cken_ops,         \
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index ddaa04de8e22..daa86d39ed9e 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -703,7 +703,7 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
 }
 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 static struct resource pxa27x_resource_keypad[] = {
         [0] = {
                 .start  = 0x41500000,
@@ -872,7 +872,7 @@ struct platform_device pxa27x_device_pwm1 = {
         .resource       = pxa27x_resource_pwm1,
         .num_resources  = ARRAY_SIZE(pxa27x_resource_pwm1),
 };
-#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
+#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 
 #ifdef CONFIG_PXA3xx
 static struct resource pxa3xx_resources_mci2[] = {
@@ -981,7 +981,7 @@ struct platform_device pxa3xx_device_gcu = {
 
 #endif /* CONFIG_PXA3xx */
 
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
+#if defined(CONFIG_PXA3xx)
 static struct resource pxa3xx_resources_i2c_power[] = {
         {
                 .start  = 0x40f500c0,
@@ -1082,7 +1082,7 @@ struct platform_device pxa3xx_device_ssp4 = {
         .resource       = pxa3xx_resource_ssp4,
         .num_resources  = ARRAY_SIZE(pxa3xx_resource_ssp4),
 };
-#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
+#endif /* CONFIG_PXA3xx */
 
 struct resource pxa_resource_gpio[] = {
         {
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 56d92e5cad85..ccb06e485520 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -194,17 +194,6 @@
 #define __cpu_is_pxa935(id)     (0)
 #endif
 
-#ifdef CONFIG_CPU_PXA955
-#define __cpu_is_pxa955(id)                             \
-        ({                                              \
-                unsigned int _id = (id) >> 4 & 0xfff;   \
-                _id == 0x581 || _id == 0xc08            \
-                        || _id == 0xb76;                \
-        })
-#else
-#define __cpu_is_pxa955(id)     (0)
-#endif
-
 #define cpu_is_pxa210()                                 \
         ({                                              \
                 __cpu_is_pxa210(read_cpuid_id());       \
@@ -255,10 +244,6 @@
                 __cpu_is_pxa935(read_cpuid_id());       \
          })
 
-#define cpu_is_pxa955()                                 \
-        ({                                              \
-                __cpu_is_pxa955(read_cpuid_id());       \
-        })
 
 
 /*
@@ -297,15 +282,6 @@
 #define __cpu_is_pxa93x(id)     (0)
 #endif
 
-#ifdef CONFIG_PXA95x
-#define __cpu_is_pxa95x(id)                             \
-        ({                                              \
-                __cpu_is_pxa955(id);                    \
-        })
-#else
-#define __cpu_is_pxa95x(id)     (0)
-#endif
-
 #define cpu_is_pxa2xx()                                 \
         ({                                              \
                 __cpu_is_pxa2xx(read_cpuid_id());       \
@@ -321,10 +297,6 @@
                 __cpu_is_pxa93x(read_cpuid_id());       \
          })
 
-#define cpu_is_pxa95x()                                 \
-        ({                                              \
-                __cpu_is_pxa95x(read_cpuid_id());       \
-        })
 
 /*
  * return current memory and LCD clock frequency in units of 10kHz
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 8765782dd955..48c2fd851686 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -84,7 +84,6 @@
 #define IRQ_PXA935_MMC0 PXA_IRQ(72)     /* MMC0 Controller (PXA935) */
 #define IRQ_PXA935_MMC1 PXA_IRQ(73)     /* MMC1 Controller (PXA935) */
 #define IRQ_PXA935_MMC2 PXA_IRQ(74)     /* MMC2 Controller (PXA935) */
-#define IRQ_PXA955_MMC3 PXA_IRQ(75)     /* MMC3 Controller (PXA955) */
 #define IRQ_U2P         PXA_IRQ(93)     /* USB PHY D+/D- Lines (PXA935) */
 
 #define PXA_GPIO_IRQ_BASE       PXA_IRQ(96)
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h
index cd3e57f42688..6dd7fa163e29 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h
@@ -7,7 +7,6 @@
 
 extern void __init pxa3xx_map_io(void);
 extern void __init pxa3xx_init_irq(void);
-extern void __init pxa95x_init_irq(void);
 
 #define pxa3xx_handle_irq       ichp_handle_irq
 
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h
deleted file mode 100644
index cbb097c4cb1f..000000000000
--- a/arch/arm/mach-pxa/include/mach/pxa95x.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_PXA95X_H
-#define __MACH_PXA95X_H
-
-#include <mach/pxa3xx.h>
-#include <mach/mfp-pxa930.h>
-
-#endif /* __MACH_PXA95X_H */
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c
index 7dbe3ccf1993..e329ccefd364 100644
--- a/arch/arm/mach-pxa/pxa3xx-ulpi.c
+++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c
@@ -384,18 +384,7 @@ static struct platform_driver pxa3xx_u2d_ulpi_driver = {
         .probe          = pxa3xx_u2d_probe,
         .remove         = pxa3xx_u2d_remove,
 };
-
-static int pxa3xx_u2d_ulpi_init(void)
-{
-        return platform_driver_register(&pxa3xx_u2d_ulpi_driver);
-}
-module_init(pxa3xx_u2d_ulpi_init);
-
-static void __exit pxa3xx_u2d_ulpi_exit(void)
-{
-        platform_driver_unregister(&pxa3xx_u2d_ulpi_driver);
-}
-module_exit(pxa3xx_u2d_ulpi_exit);
+module_platform_driver(pxa3xx_u2d_ulpi_driver);
 
 MODULE_DESCRIPTION("PXA3xx U2D ULPI driver");
 MODULE_AUTHOR("Igor Grinberg");
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
deleted file mode 100644
index 47601f80e6e7..000000000000
--- a/arch/arm/mach-pxa/pxa95x.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/pxa95x.c
- *
- * code specific to PXA95x aka MGx
- *
- * Copyright (C) 2009-2010 Marvell International Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/syscore_ops.h>
-
-#include <mach/hardware.h>
-#include <mach/pxa3xx-regs.h>
-#include <mach/pxa930.h>
-#include <mach/reset.h>
-#include <mach/pm.h>
-#include <mach/dma.h>
-
-#include "generic.h"
-#include "devices.h"
-#include "clock.h"
-
-static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = {
-
-        MFP_ADDR(GPIO0, 0x02e0),
-        MFP_ADDR(GPIO1, 0x02dc),
-        MFP_ADDR(GPIO2, 0x02e8),
-        MFP_ADDR(GPIO3, 0x02d8),
-        MFP_ADDR(GPIO4, 0x02e4),
-        MFP_ADDR(GPIO5, 0x02ec),
-        MFP_ADDR(GPIO6, 0x02f8),
-        MFP_ADDR(GPIO7, 0x02fc),
-        MFP_ADDR(GPIO8, 0x0300),
-        MFP_ADDR(GPIO9, 0x02d4),
-        MFP_ADDR(GPIO10, 0x02f4),
-        MFP_ADDR(GPIO11, 0x02f0),
-        MFP_ADDR(GPIO12, 0x0304),
-        MFP_ADDR(GPIO13, 0x0310),
-        MFP_ADDR(GPIO14, 0x0308),
-        MFP_ADDR(GPIO15, 0x030c),
-        MFP_ADDR(GPIO16, 0x04e8),
-        MFP_ADDR(GPIO17, 0x04f4),
-        MFP_ADDR(GPIO18, 0x04f8),
-        MFP_ADDR(GPIO19, 0x04fc),
-        MFP_ADDR(GPIO20, 0x0518),
-        MFP_ADDR(GPIO21, 0x051c),
-        MFP_ADDR(GPIO22, 0x04ec),
-        MFP_ADDR(GPIO23, 0x0500),
-        MFP_ADDR(GPIO24, 0x04f0),
-        MFP_ADDR(GPIO25, 0x0504),
-        MFP_ADDR(GPIO26, 0x0510),
-        MFP_ADDR(GPIO27, 0x0514),
-        MFP_ADDR(GPIO28, 0x0520),
-        MFP_ADDR(GPIO29, 0x0600),
-        MFP_ADDR(GPIO30, 0x0618),
-        MFP_ADDR(GPIO31, 0x0610),
-        MFP_ADDR(GPIO32, 0x060c),
-        MFP_ADDR(GPIO33, 0x061c),
-        MFP_ADDR(GPIO34, 0x0620),
-        MFP_ADDR(GPIO35, 0x0628),
-        MFP_ADDR(GPIO36, 0x062c),
-        MFP_ADDR(GPIO37, 0x0630),
-        MFP_ADDR(GPIO38, 0x0634),
-        MFP_ADDR(GPIO39, 0x0638),
-        MFP_ADDR(GPIO40, 0x063c),
-        MFP_ADDR(GPIO41, 0x0614),
-        MFP_ADDR(GPIO42, 0x0624),
-        MFP_ADDR(GPIO43, 0x0608),
-        MFP_ADDR(GPIO44, 0x0604),
-        MFP_ADDR(GPIO45, 0x050c),
-        MFP_ADDR(GPIO46, 0x0508),
-        MFP_ADDR(GPIO47, 0x02bc),
-        MFP_ADDR(GPIO48, 0x02b4),
-        MFP_ADDR(GPIO49, 0x02b8),
-        MFP_ADDR(GPIO50, 0x02c8),
-        MFP_ADDR(GPIO51, 0x02c0),
-        MFP_ADDR(GPIO52, 0x02c4),
-        MFP_ADDR(GPIO53, 0x02d0),
-        MFP_ADDR(GPIO54, 0x02cc),
-        MFP_ADDR(GPIO55, 0x029c),
-        MFP_ADDR(GPIO56, 0x02a0),
-        MFP_ADDR(GPIO57, 0x0294),
-        MFP_ADDR(GPIO58, 0x0298),
-        MFP_ADDR(GPIO59, 0x02a4),
-        MFP_ADDR(GPIO60, 0x02a8),
-        MFP_ADDR(GPIO61, 0x02b0),
-        MFP_ADDR(GPIO62, 0x02ac),
-        MFP_ADDR(GPIO63, 0x0640),
-        MFP_ADDR(GPIO64, 0x065c),
-        MFP_ADDR(GPIO65, 0x0648),
-        MFP_ADDR(GPIO66, 0x0644),
-        MFP_ADDR(GPIO67, 0x0674),
-        MFP_ADDR(GPIO68, 0x0658),
-        MFP_ADDR(GPIO69, 0x0654),
-        MFP_ADDR(GPIO70, 0x0660),
-        MFP_ADDR(GPIO71, 0x0668),
-        MFP_ADDR(GPIO72, 0x0664),
-        MFP_ADDR(GPIO73, 0x0650),
-        MFP_ADDR(GPIO74, 0x066c),
-        MFP_ADDR(GPIO75, 0x064c),
-        MFP_ADDR(GPIO76, 0x0670),
-        MFP_ADDR(GPIO77, 0x0678),
-        MFP_ADDR(GPIO78, 0x067c),
-        MFP_ADDR(GPIO79, 0x0694),
-        MFP_ADDR(GPIO80, 0x069c),
-        MFP_ADDR(GPIO81, 0x06a0),
-        MFP_ADDR(GPIO82, 0x06a4),
-        MFP_ADDR(GPIO83, 0x0698),
-        MFP_ADDR(GPIO84, 0x06bc),
-        MFP_ADDR(GPIO85, 0x06b4),
-        MFP_ADDR(GPIO86, 0x06b0),
-        MFP_ADDR(GPIO87, 0x06c0),
-        MFP_ADDR(GPIO88, 0x06c4),
-        MFP_ADDR(GPIO89, 0x06ac),
-        MFP_ADDR(GPIO90, 0x0680),
-        MFP_ADDR(GPIO91, 0x0684),
-        MFP_ADDR(GPIO92, 0x0688),
-        MFP_ADDR(GPIO93, 0x0690),
-        MFP_ADDR(GPIO94, 0x068c),
-        MFP_ADDR(GPIO95, 0x06a8),
-        MFP_ADDR(GPIO96, 0x06b8),
-        MFP_ADDR(GPIO97, 0x0410),
-        MFP_ADDR(GPIO98, 0x0418),
-        MFP_ADDR(GPIO99, 0x041c),
-        MFP_ADDR(GPIO100, 0x0414),
-        MFP_ADDR(GPIO101, 0x0408),
-        MFP_ADDR(GPIO102, 0x0324),
-        MFP_ADDR(GPIO103, 0x040c),
-        MFP_ADDR(GPIO104, 0x0400),
-        MFP_ADDR(GPIO105, 0x0328),
-        MFP_ADDR(GPIO106, 0x0404),
-
-        MFP_ADDR(GPIO159, 0x0524),
-        MFP_ADDR(GPIO163, 0x0534),
-        MFP_ADDR(GPIO167, 0x0544),
-        MFP_ADDR(GPIO168, 0x0548),
-        MFP_ADDR(GPIO169, 0x054c),
-        MFP_ADDR(GPIO170, 0x0550),
-        MFP_ADDR(GPIO171, 0x0554),
-        MFP_ADDR(GPIO172, 0x0558),
-        MFP_ADDR(GPIO173, 0x055c),
-
-        MFP_ADDR(nXCVREN, 0x0204),
-        MFP_ADDR(DF_CLE_nOE, 0x020c),
-        MFP_ADDR(DF_nADV1_ALE, 0x0218),
-        MFP_ADDR(DF_SCLK_E, 0x0214),
-        MFP_ADDR(DF_SCLK_S, 0x0210),
-        MFP_ADDR(nBE0, 0x021c),
-        MFP_ADDR(nBE1, 0x0220),
-        MFP_ADDR(DF_nADV2_ALE, 0x0224),
-        MFP_ADDR(DF_INT_RnB, 0x0228),
-        MFP_ADDR(DF_nCS0, 0x022c),
-        MFP_ADDR(DF_nCS1, 0x0230),
-        MFP_ADDR(nLUA, 0x0254),
-        MFP_ADDR(nLLA, 0x0258),
-        MFP_ADDR(DF_nWE, 0x0234),
-        MFP_ADDR(DF_nRE_nOE, 0x0238),
-        MFP_ADDR(DF_ADDR0, 0x024c),
-        MFP_ADDR(DF_ADDR1, 0x0250),
-        MFP_ADDR(DF_ADDR2, 0x025c),
-        MFP_ADDR(DF_ADDR3, 0x0260),
-        MFP_ADDR(DF_IO0, 0x023c),
-        MFP_ADDR(DF_IO1, 0x0240),
-        MFP_ADDR(DF_IO2, 0x0244),
-        MFP_ADDR(DF_IO3, 0x0248),
-        MFP_ADDR(DF_IO4, 0x0264),
-        MFP_ADDR(DF_IO5, 0x0268),
-        MFP_ADDR(DF_IO6, 0x026c),
-        MFP_ADDR(DF_IO7, 0x0270),
-        MFP_ADDR(DF_IO8, 0x0274),
-        MFP_ADDR(DF_IO9, 0x0278),
-        MFP_ADDR(DF_IO10, 0x027c),
-        MFP_ADDR(DF_IO11, 0x0280),
-        MFP_ADDR(DF_IO12, 0x0284),
-        MFP_ADDR(DF_IO13, 0x0288),
-        MFP_ADDR(DF_IO14, 0x028c),
-        MFP_ADDR(DF_IO15, 0x0290),
-
-        MFP_ADDR(GSIM_UIO, 0x0314),
-        MFP_ADDR(GSIM_UCLK, 0x0318),
-        MFP_ADDR(GSIM_UDET, 0x031c),
-        MFP_ADDR(GSIM_nURST, 0x0320),
-
-        MFP_ADDR(PMIC_INT, 0x06c8),
-
-        MFP_ADDR(RDY, 0x0200),
-
-        MFP_ADDR_END,
-};
-
-static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops);
-static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70);
-static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1);
-static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
-static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
-
-static struct clk_lookup pxa95x_clkregs[] = {
-        INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
-        /* Power I2C clock is always on */
-        INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
-        INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL),
-        INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"),
-        INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL),
-        INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
-        INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
-        INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
-        INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
-        INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
-};
-
-void __init pxa95x_init_irq(void)
-{
-        pxa_init_irq(96, NULL);
-}
-
-/*
- * device registration specific to PXA93x.
- */
-
-void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
-{
-        pxa_register_device(&pxa3xx_device_i2c_power, info);
-}
-
-static struct platform_device *devices[] __initdata = {
-        &pxa_device_gpio,
-        &sa1100_device_rtc,
-        &pxa_device_rtc,
-        &pxa27x_device_ssp1,
-        &pxa27x_device_ssp2,
-        &pxa27x_device_ssp3,
-        &pxa3xx_device_ssp4,
-        &pxa27x_device_pwm0,
-        &pxa27x_device_pwm1,
-};
-
-static int __init pxa95x_init(void)
-{
-        int ret = 0, i;
-
-        if (cpu_is_pxa95x()) {
-                mfp_init_base(io_p2v(MFPR_BASE));
-                mfp_init_addr(pxa95x_mfp_addr_map);
-
-                reset_status = ARSR;
-
-                /*
-                 * clear RDH bit every time after reset
-                 *
-                 * Note: the last 3 bits DxS are write-1-to-clear so carefully
-                 * preserve them here in case they will be referenced later
-                 */
-                ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
-
-                clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs));
-
-                if ((ret = pxa_init_dma(IRQ_DMA, 32)))
-                        return ret;
-
-                register_syscore_ops(&pxa_irq_syscore_ops);
-                register_syscore_ops(&pxa3xx_clock_syscore_ops);
-
-                ret = platform_add_devices(devices, ARRAY_SIZE(devices));
-        }
-
-        return ret;
-}
-
-postcore_initcall(pxa95x_init);
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
deleted file mode 100644
index 5aded5e6148f..000000000000
--- a/arch/arm/mach-pxa/saarb.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/saarb.c
- *
- *  Support for the Marvell Handheld Platform (aka SAARB)
- *
- *  Copyright (C) 2007-2010 Marvell International Ltd.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/mfd/88pm860x.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/irqs.h>
-#include <mach/hardware.h>
-#include <mach/mfp.h>
-#include <mach/mfp-pxa930.h>
-#include <mach/pxa95x.h>
-
-#include "generic.h"
-
-#define SAARB_NR_IRQS   (IRQ_BOARD_START + 40)
-
-static struct pm860x_touch_pdata saarb_touch = {
-        .gpadc_prebias  = 1,
-        .slot_cycle     = 1,
-        .tsi_prebias    = 6,
-        .pen_prebias    = 16,
-        .pen_prechg     = 2,
-        .res_x          = 300,
-};
-
-static struct pm860x_backlight_pdata saarb_backlight[] = {
-        {
-                .id     = PM8606_ID_BACKLIGHT,
-                .iset   = PM8606_WLED_CURRENT(24),
-                .flags  = PM8606_BACKLIGHT1,
-        },
-        {},
-};
-
-static struct pm860x_led_pdata saarb_led[] = {
-        {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_BLUE,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_BLUE,
-        },
-};
-
-static struct pm860x_platform_data saarb_pm8607_info = {
-        .touch          = &saarb_touch,
-        .backlight      = &saarb_backlight[0],
-        .led            = &saarb_led[0],
-        .companion_addr = 0x10,
-        .irq_mode       = 0,
-        .irq_base       = IRQ_BOARD_START,
-
-        .i2c_port       = GI2C_PORT,
-};
-
-static struct i2c_board_info saarb_i2c_info[] = {
-        {
-                .type           = "88PM860x",
-                .addr           = 0x34,
-                .platform_data  = &saarb_pm8607_info,
-                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
-        },
-};
-
-static void __init saarb_init(void)
-{
-        pxa_set_ffuart_info(NULL);
-        pxa_set_i2c_info(NULL);
-        i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info));
-}
-
-MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
-        .atag_offset    = 0x100,
-        .map_io         = pxa3xx_map_io,
-        .nr_irqs        = SAARB_NR_IRQS,
-        .init_irq       = pxa95x_init_irq,
-        .handle_irq     = pxa3xx_handle_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = saarb_init,
-        .restart        = pxa_restart,
-MACHINE_END
-
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
deleted file mode 100644
index f7d9305cfd77..000000000000
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/tavorevb3.c
- *
- *  Support for the Marvell EVB3 Development Platform.
- *
- *  Copyright:  (C) Copyright 2008-2010 Marvell International Ltd.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/i2c.h>
-#include <linux/i2c/pxa-i2c.h>
-#include <linux/gpio.h>
-#include <linux/mfd/88pm860x.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include <mach/pxa930.h>
-
-#include "devices.h"
-#include "generic.h"
-
-#define TAVOREVB3_NR_IRQS       (IRQ_BOARD_START + 24)
-
-static mfp_cfg_t evb3_mfp_cfg[] __initdata = {
-        /* UART */
-        GPIO53_UART1_TXD,
-        GPIO54_UART1_RXD,
-
-        /* PMIC */
-        PMIC_INT_GPIO83,
-};
-
-#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
-static struct pm860x_touch_pdata evb3_touch = {
-        .gpadc_prebias  = 1,
-        .slot_cycle     = 1,
-        .tsi_prebias    = 6,
-        .pen_prebias    = 16,
-        .pen_prechg     = 2,
-        .res_x          = 300,
-};
-
-static struct pm860x_backlight_pdata evb3_backlight[] = {
-        {
-                .id     = PM8606_ID_BACKLIGHT,
-                .iset   = PM8606_WLED_CURRENT(24),
-                .flags  = PM8606_BACKLIGHT1,
-        },
-        {},
-};
-
-static struct pm860x_led_pdata evb3_led[] = {
-        {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED1_BLUE,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_RED,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_GREEN,
-        }, {
-                .id     = PM8606_ID_LED,
-                .iset   = PM8606_LED_CURRENT(12),
-                .flags  = PM8606_LED2_BLUE,
-        },
-};
-
-static struct pm860x_platform_data evb3_pm8607_info = {
-        .touch                          = &evb3_touch,
-        .backlight                      = &evb3_backlight[0],
-        .led                            = &evb3_led[0],
-        .companion_addr                 = 0x10,
-        .irq_mode                       = 0,
-        .irq_base                       = IRQ_BOARD_START,
-
-        .i2c_port                       = GI2C_PORT,
-};
-
-static struct i2c_board_info evb3_i2c_info[] = {
-        {
-                .type           = "88PM860x",
-                .addr           = 0x34,
-                .platform_data  = &evb3_pm8607_info,
-                .irq            = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
-        },
-};
-
-static void __init evb3_init_i2c(void)
-{
-        pxa_set_i2c_info(NULL);
-        i2c_register_board_info(0, ARRAY_AND_SIZE(evb3_i2c_info));
-}
-#else
-static inline void evb3_init_i2c(void) {}
-#endif
-
-static void __init evb3_init(void)
-{
-        /* initialize MFP configurations */
-        pxa3xx_mfp_config(ARRAY_AND_SIZE(evb3_mfp_cfg));
-
-        pxa_set_ffuart_info(NULL);
-
-        evb3_init_i2c();
-}
-
-MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
-        .atag_offset    = 0x100,
-        .map_io         = pxa3xx_map_io,
-        .nr_irqs        = TAVOREVB3_NR_IRQS,
-        .init_irq       = pxa3xx_init_irq,
-        .handle_irq       = pxa3xx_handle_irq,
-        .timer          = &pxa_timer,
-        .init_machine   = evb3_init,
-        .restart        = pxa_restart,
-MACHINE_END
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 7f689ce1be61..bdaba59b42dc 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
                 .devname        = "s3c2410-spi.0",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
-                .ctrlbit        = S3C2443_PCLKCON_SPI0,
-        }, {
-                .name           = "spi",
-                .devname        = "s3c2410-spi.1",
-                .parent         = &clk_p,
-                .enable         = s3c2443_clkcon_enable_p,
                 .ctrlbit        = S3C2443_PCLKCON_SPI1,
         }
 };
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 28041e83dc82..1a6f85777449 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -138,11 +138,7 @@ static struct clk init_clocks_off[] = {
                 .ctrlbit        = S3C_CLKCON_PCLK_TSADC,
         }, {
                 .name           = "i2c",
-#ifdef CONFIG_S3C_DEV_I2C1
                 .devname        = "s3c2440-i2c.0",
-#else
-                .devname        = "s3c2440-i2c",
-#endif
                 .parent         = &clk_p,
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_IIC,
@@ -319,10 +315,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_MFC,
         }, {
-                .name           = "cam",
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_CAM,
-        }, {
                 .name           = "sclk_jpeg",
                 .enable         = s3c64xx_sclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_SCLK_JPEG,
@@ -681,15 +673,6 @@ static struct clksrc_sources clkset_audio2 = {
         .nr_sources     = ARRAY_SIZE(clkset_audio2_list),
 };
 
-static struct clk *clkset_camif_list[] = {
-        &clk_h2,
-};
-
-static struct clksrc_sources clkset_camif = {
-        .sources        = clkset_camif_list,
-        .nr_sources     = ARRAY_SIZE(clkset_camif_list),
-};
-
 static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
@@ -744,10 +727,9 @@ static struct clksrc_clk clksrcs[] = {
                         .name           = "camera",
                         .ctrlbit        = S3C_CLKCON_SCLK_CAM,
                         .enable         = s3c64xx_sclk_ctrl,
+                        .parent         = &clk_h2,
                 },
                 .reg_div        = { .reg = S3C_CLK_DIV0, .shift = 20, .size = 4  },
-                .reg_src        = { .reg = NULL, .shift = 0, .size = 0  },
-                .sources        = &clkset_camif,
         },
 };
 
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index be746e33e86c..aef303b8997e 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -155,7 +155,6 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
         /* initialise the io descriptors we need for initialisation */
         iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
         iotable_init(mach_desc, size);
-        init_consistent_dma_size(SZ_8M);
 
         /* detect cpu id */
         s3c64xx_init_cpu();
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 111e404a81fd..8ae5800e807f 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -187,7 +187,6 @@ void __init s5p6440_map_io(void)
         s5p6440_default_sdhci2();
 
         iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-        init_consistent_dma_size(SZ_8M);
 }
 
 void __init s5p6450_map_io(void)
@@ -202,7 +201,6 @@ void __init s5p6450_map_io(void)
         s5p6450_default_sdhci2();
 
         iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
-        init_consistent_dma_size(SZ_8M);
 }
 
 /*
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index a0c50efe8145..9dfe93e2624d 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -169,8 +169,6 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
 
 void __init s5pv210_map_io(void)
 {
-        init_consistent_dma_size(14 << 20);
-
         /* initialise device information early */
         s5pv210_default_sdhci0();
         s5pv210_default_sdhci1();
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 55e1dba4ffde..c72b31078c99 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -774,7 +774,6 @@ static void __init goni_pmic_init(void)
 /* MoviNAND */
 static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = {
         .max_width              = 4,
-        .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
 };
 
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 11bb1d984197..96f11394c7c0 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -66,12 +66,6 @@ static struct map_desc r8a7740_io_desc[] __initdata = {
 void __init r8a7740_map_io(void)
 {
         iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
-
-        /*
-         * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
-         * enough to allocate the frame buffer memory.
-         */
-        init_consistent_dma_size(12 << 20);
 }
 
 /* SCIFA0 */
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a07954fbcd22..be6f746c97fa 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -58,12 +58,6 @@ static struct map_desc sh7372_io_desc[] __initdata = {
 void __init sh7372_map_io(void)
 {
         iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
-
-        /*
-         * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
-         * enough to allocate the frame buffer memory.
-         */
-        init_consistent_dma_size(12 << 20);
 }
 
 /* SCIFA0 */
diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c
index b5015d0f1912..d091675ba376 100644
--- a/arch/arm/mach-tegra/apbio.c
+++ b/arch/arm/mach-tegra/apbio.c
@@ -15,7 +15,6 @@
 
 #include <linux/kernel.h>
 #include <linux/io.h>
-#include <mach/iomap.h>
 #include <linux/of.h>
 #include <linux/dmaengine.h>
 #include <linux/dma-mapping.h>
@@ -24,9 +23,8 @@
 #include <linux/sched.h>
 #include <linux/mutex.h>
 
-#include <mach/dma.h>
-
 #include "apbio.h"
+#include "iomap.h"
 
 #if defined(CONFIG_TEGRA20_APB_DMA)
 static DEFINE_MUTEX(tegra_apb_dma_lock);
@@ -71,7 +69,6 @@ bool tegra_apb_dma_init(void)
 
         dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
         dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-        dma_sconfig.slave_id = TEGRA_DMA_REQ_SEL_CNTR;
         dma_sconfig.src_maxburst = 1;
         dma_sconfig.dst_maxburst = 1;
 
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index aa5325cd1c42..71569c01afd2 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -40,12 +40,10 @@
 #include <asm/mach/time.h>
 #include <asm/setup.h>
 
-#include <mach/iomap.h>
-#include <mach/irqs.h>
-
 #include "board.h"
 #include "clock.h"
 #include "common.h"
+#include "iomap.h"
 
 struct tegra_ehci_platform_data tegra_ehci1_pdata = {
         .operating_mode = TEGRA_USB_OTG,
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
index 5e92a81f9a2e..e56170393a5b 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -33,11 +33,10 @@
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
 
-#include <mach/iomap.h>
-
 #include "board.h"
 #include "clock.h"
 #include "common.h"
+#include "iomap.h"
 
 struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index fd82085eca5d..867bf8bf5561 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -27,8 +27,6 @@
 #include <linux/seq_file.h>
 #include <linux/slab.h>
 
-#include <mach/clk.h>
-
 #include "board.h"
 #include "clock.h"
 #include "tegra_cpu_car.h"
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 0b0a5f556d34..f688daa74978 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -26,13 +26,13 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/hardware/gic.h>
 
-#include <mach/iomap.h>
 #include <mach/powergate.h>
 
 #include "board.h"
 #include "clock.h"
 #include "common.h"
 #include "fuse.h"
+#include "iomap.h"
 #include "pmc.h"
 #include "apbio.h"
 #include "sleep.h"
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 627bf0f4262e..a74d3c7d2e26 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -30,9 +30,6 @@
 #include <linux/io.h>
 #include <linux/suspend.h>
 
-
-#include <mach/clk.h>
-
 /* Frequency table index must be sequential starting at 0 */
 static struct cpufreq_frequency_table freq_table[] = {
         { 0, 216000 },
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index 566e2f88899b..9a6f051b382e 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -29,8 +29,6 @@
 
 #include <asm/proc-fns.h>
 
-#include <mach/iomap.h>
-
 static int tegra_idle_enter_lp3(struct cpuidle_device *dev,
                                 struct cpuidle_driver *drv, int index);
 
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
index f07488e0bd32..ffaa286a71e1 100644
--- a/arch/arm/mach-tegra/flowctrl.c
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -22,9 +22,8 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 
-#include <mach/iomap.h>
-
 #include "flowctrl.h"
+#include "iomap.h"
 
 u8 flowctrl_offset_halt_cpu[] = {
         FLOW_CTRL_HALT_CPU0_EVENTS,
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 0b7db174a5de..6c752e8f1f06 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -21,9 +21,8 @@
 #include <linux/io.h>
 #include <linux/export.h>
 
-#include <mach/iomap.h>
-
 #include "fuse.h"
+#include "iomap.h"
 #include "apbio.h"
 
 #define FUSE_UID_LOW            0x108
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
index 6addc78cb6b2..93f0370cc95b 100644
--- a/arch/arm/mach-tegra/headsmp.S
+++ b/arch/arm/mach-tegra/headsmp.S
@@ -3,9 +3,8 @@
 
 #include <asm/cache.h>
 
-#include <mach/iomap.h>
-
 #include "flowctrl.h"
+#include "iomap.h"
 #include "reset.h"
 #include "sleep.h"
 
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 8ce0661b8a3d..44ca7b1d8b8a 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -26,8 +26,8 @@
 
 #include <linux/serial_reg.h>
 
-#include <mach/iomap.h>
-#include <mach/irammap.h>
+#include "../../iomap.h"
+#include "../../irammap.h"
 
                 .macro  addruart, rp, rv, tmp
                 adr     \rp, 99f                @ actual addr of 99f
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h
deleted file mode 100644
index 3081cc6dda3b..000000000000
--- a/arch/arm/mach-tegra/include/mach/dma.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/dma.h
- *
- * Copyright (c) 2008-2009, NVIDIA Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
- */
-
-#ifndef __MACH_TEGRA_DMA_H
-#define __MACH_TEGRA_DMA_H
-
-#include <linux/list.h>
-
-#define TEGRA_DMA_REQ_SEL_CNTR                  0
-#define TEGRA_DMA_REQ_SEL_I2S_2                 1
-#define TEGRA_DMA_REQ_SEL_I2S_1                 2
-#define TEGRA_DMA_REQ_SEL_SPD_I                 3
-#define TEGRA_DMA_REQ_SEL_UI_I                  4
-#define TEGRA_DMA_REQ_SEL_MIPI                  5
-#define TEGRA_DMA_REQ_SEL_I2S2_2                6
-#define TEGRA_DMA_REQ_SEL_I2S2_1                7
-#define TEGRA_DMA_REQ_SEL_UARTA                 8
-#define TEGRA_DMA_REQ_SEL_UARTB                 9
-#define TEGRA_DMA_REQ_SEL_UARTC                 10
-#define TEGRA_DMA_REQ_SEL_SPI                   11
-#define TEGRA_DMA_REQ_SEL_AC97                  12
-#define TEGRA_DMA_REQ_SEL_ACMODEM               13
-#define TEGRA_DMA_REQ_SEL_SL4B                  14
-#define TEGRA_DMA_REQ_SEL_SL2B1                 15
-#define TEGRA_DMA_REQ_SEL_SL2B2                 16
-#define TEGRA_DMA_REQ_SEL_SL2B3                 17
-#define TEGRA_DMA_REQ_SEL_SL2B4                 18
-#define TEGRA_DMA_REQ_SEL_UARTD                 19
-#define TEGRA_DMA_REQ_SEL_UARTE                 20
-#define TEGRA_DMA_REQ_SEL_I2C                   21
-#define TEGRA_DMA_REQ_SEL_I2C2                  22
-#define TEGRA_DMA_REQ_SEL_I2C3                  23
-#define TEGRA_DMA_REQ_SEL_DVC_I2C               24
-#define TEGRA_DMA_REQ_SEL_OWR                   25
-#define TEGRA_DMA_REQ_SEL_INVALID               31
-
-#endif
diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h
index 4752b1a68f35..06763fe7529d 100644
--- a/arch/arm/mach-tegra/include/mach/powergate.h
+++ b/arch/arm/mach-tegra/include/mach/powergate.h
@@ -20,6 +20,8 @@
 #ifndef _MACH_TEGRA_POWERGATE_H_
 #define _MACH_TEGRA_POWERGATE_H_
 
+struct clk;
+
 #define TEGRA_POWERGATE_CPU     0
 #define TEGRA_POWERGATE_3D      1
 #define TEGRA_POWERGATE_VENC    2
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h
index 937c4c50219e..27725750ca3e 100644
--- a/arch/arm/mach-tegra/include/mach/uncompress.h
+++ b/arch/arm/mach-tegra/include/mach/uncompress.h
@@ -28,8 +28,8 @@
 #include <linux/types.h>
 #include <linux/serial_reg.h>
 
-#include <mach/iomap.h>
-#include <mach/irammap.h>
+#include "../../iomap.h"
+#include "../../irammap.h"
 
 #define BIT(x) (1 << (x))
 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 58b4baf9c483..7d09f301b3a1 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -26,9 +26,9 @@
 
 #include <asm/page.h>
 #include <asm/mach/map.h>
-#include <mach/iomap.h>
 
 #include "board.h"
+#include "iomap.h"
 
 static struct map_desc tegra_io_desc[] __initdata = {
         {
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/iomap.h
index fee3a94c4549..53151030a07d 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/mach-tegra/include/mach/iomap.h
- *
  * Copyright (C) 2010 Google, Inc.
  *
  * Author:
diff --git a/arch/arm/mach-tegra/include/mach/irammap.h b/arch/arm/mach-tegra/irammap.h
index 0cbe63261854..0cbe63261854 100644
--- a/arch/arm/mach-tegra/include/mach/irammap.h
+++ b/arch/arm/mach-tegra/irammap.h
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 2f5bd2db8e1f..b7886f183511 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -25,9 +25,8 @@
 
 #include <asm/hardware/gic.h>
 
-#include <mach/iomap.h>
-
 #include "board.h"
+#include "iomap.h"
 
 #define ICTLR_CPU_IEP_VFIQ      0x08
 #define ICTLR_CPU_IEP_FIR       0x14
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index a8dba6489c9b..f18fc3ab4e58 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -37,11 +37,11 @@
 #include <asm/sizes.h>
 #include <asm/mach/pci.h>
 
-#include <mach/iomap.h>
 #include <mach/clk.h>
 #include <mach/powergate.h>
 
 #include "board.h"
+#include "iomap.h"
 
 /* register definitions */
 #define AFI_OFFSET      0x3800
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 81cb26591acf..1b926df99c4b 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -24,8 +24,6 @@
 #include <asm/mach-types.h>
 #include <asm/smp_scu.h>
 
-#include <mach/clk.h>
-#include <mach/iomap.h>
 #include <mach/powergate.h>
 
 #include "fuse.h"
@@ -34,6 +32,7 @@
 #include "tegra_cpu_car.h"
 
 #include "common.h"
+#include "iomap.h"
 
 extern void tegra_secondary_startup(void);
 
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index 7af6a54404be..d4fdb5fcec20 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -19,7 +19,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 
-#include <mach/iomap.h>
+#include "iomap.h"
 
 #define PMC_CTRL                0x0
 #define PMC_CTRL_INTR_LOW       (1 << 17)
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index de0662de28a0..2cc1185d902e 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -28,10 +28,10 @@
 #include <linux/spinlock.h>
 
 #include <mach/clk.h>
-#include <mach/iomap.h>
 #include <mach/powergate.h>
 
 #include "fuse.h"
+#include "iomap.h"
 
 #define PWRGATE_TOGGLE          0x30
 #define  PWRGATE_TOGGLE_START   (1 << 8)
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 5beb7ebe2948..e05da7d10c3b 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -22,9 +22,8 @@
 #include <asm/cacheflush.h>
 #include <asm/hardware/cache-l2x0.h>
 
-#include <mach/iomap.h>
-#include <mach/irammap.h>
-
+#include "iomap.h"
+#include "irammap.h"
 #include "reset.h"
 #include "fuse.h"
 
diff --git a/arch/arm/mach-tegra/sleep-t20.S b/arch/arm/mach-tegra/sleep-t20.S
index a36ae413e2b8..72ce709799da 100644
--- a/arch/arm/mach-tegra/sleep-t20.S
+++ b/arch/arm/mach-tegra/sleep-t20.S
@@ -22,8 +22,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/iomap.h>
-
 #include "sleep.h"
 #include "flowctrl.h"
 
diff --git a/arch/arm/mach-tegra/sleep-t30.S b/arch/arm/mach-tegra/sleep-t30.S
index 777d9cee8b90..be7614b7c5cb 100644
--- a/arch/arm/mach-tegra/sleep-t30.S
+++ b/arch/arm/mach-tegra/sleep-t30.S
@@ -18,8 +18,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/iomap.h>
-
 #include "sleep.h"
 #include "flowctrl.h"
 
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
index ea81554c4833..08e9481c049e 100644
--- a/arch/arm/mach-tegra/sleep.S
+++ b/arch/arm/mach-tegra/sleep.S
@@ -26,7 +26,7 @@
 
 #include <asm/assembler.h>
 
-#include <mach/iomap.h>
+#include "iomap.h"
 
 #include "flowctrl.h"
 #include "sleep.h"
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h
index e25a7cd703d9..4889b281c5f9 100644
--- a/arch/arm/mach-tegra/sleep.h
+++ b/arch/arm/mach-tegra/sleep.h
@@ -17,7 +17,7 @@
 #ifndef __MACH_TEGRA_SLEEP_H
 #define __MACH_TEGRA_SLEEP_H
 
-#include <mach/iomap.h>
+#include "iomap.h"
 
 #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS \
                                         + IO_CPU_VIRT)
diff --git a/arch/arm/mach-tegra/tegra20_clocks.c b/arch/arm/mach-tegra/tegra20_clocks.c
index deb873fb12b6..4eb6bc81a87b 100644
--- a/arch/arm/mach-tegra/tegra20_clocks.c
+++ b/arch/arm/mach-tegra/tegra20_clocks.c
@@ -27,10 +27,9 @@
 #include <linux/clkdev.h>
 #include <linux/clk.h>
 
-#include <mach/iomap.h>
-
 #include "clock.h"
 #include "fuse.h"
+#include "iomap.h"
 #include "tegra2_emc.h"
 #include "tegra_cpu_car.h"
 
diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c b/arch/arm/mach-tegra/tegra20_clocks_data.c
index 8d398a33adf7..9615ee39c353 100644
--- a/arch/arm/mach-tegra/tegra20_clocks_data.c
+++ b/arch/arm/mach-tegra/tegra20_clocks_data.c
@@ -27,8 +27,6 @@
 #include <linux/io.h>
 #include <linux/clk.h>
 
-#include <mach/iomap.h>
-
 #include "clock.h"
 #include "fuse.h"
 #include "tegra2_emc.h"
diff --git a/arch/arm/mach-tegra/tegra2_emc.c b/arch/arm/mach-tegra/tegra2_emc.c
index 5070d833bdd1..837c7b9ea63b 100644
--- a/arch/arm/mach-tegra/tegra2_emc.c
+++ b/arch/arm/mach-tegra/tegra2_emc.c
@@ -25,8 +25,6 @@
 #include <linux/platform_device.h>
 #include <linux/platform_data/tegra_emc.h>
 
-#include <mach/iomap.h>
-
 #include "tegra2_emc.h"
 #include "fuse.h"
 
diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c
index e9de5dfd94ec..000239d68393 100644
--- a/arch/arm/mach-tegra/tegra30_clocks.c
+++ b/arch/arm/mach-tegra/tegra30_clocks.c
@@ -31,10 +31,9 @@
 
 #include <asm/clkdev.h>
 
-#include <mach/iomap.h>
-
 #include "clock.h"
 #include "fuse.h"
+#include "iomap.h"
 #include "tegra_cpu_car.h"
 
 #define USE_PLL_LOCK_BITS 0
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index d3b8c8e7368f..6ff503536512 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -31,11 +31,11 @@
 #include <asm/smp_twd.h>
 #include <asm/sched_clock.h>
 
-#include <mach/iomap.h>
 #include <mach/irqs.h>
 
 #include "board.h"
 #include "clock.h"
+#include "iomap.h"
 
 #define RTC_SECONDS            0x08
 #define RTC_SHADOW_SECONDS     0x0c
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b8efac4daed8..d8632ebb1eaf 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -82,8 +82,6 @@ static struct map_desc u300_io_desc[] __initdata = {
 static void __init u300_map_io(void)
 {
         iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc));
-        /* We enable a real big DMA buffer if need be. */
-        init_consistent_dma_size(SZ_4M);
 }
 
 /*
diff --git a/arch/arm/mach-vt8500/include/mach/hardware.h b/arch/arm/mach-vt8500/include/mach/hardware.h
deleted file mode 100644
index db4163f72c39..000000000000
--- a/arch/arm/mach-vt8500/include/mach/hardware.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* arch/arm/mach-vt8500/include/mach/hardware.h
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
diff --git a/arch/arm/mach-vt8500/include/mach/i8042.h b/arch/arm/mach-vt8500/include/mach/i8042.h
deleted file mode 100644
index cd7143cad6f3..000000000000
--- a/arch/arm/mach-vt8500/include/mach/i8042.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-vt8500/include/mach/i8042.h
- *
- * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-extern unsigned long wmt_i8042_base __initdata;
-extern int wmt_i8042_kbd_irq;
-extern int wmt_i8042_aux_irq;
diff --git a/arch/arm/mach-vt8500/include/mach/restart.h b/arch/arm/mach-vt8500/include/mach/restart.h
deleted file mode 100644
index 738979518acb..000000000000
--- a/arch/arm/mach-vt8500/include/mach/restart.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-vt8500/restart.h
- *
- * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-void vt8500_setup_restart(void);
-void vt8500_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c
index 050e1833f2d0..3dd21a47881f 100644
--- a/arch/arm/mach-vt8500/timer.c
+++ b/arch/arm/mach-vt8500/timer.c
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-vt8500/timer_dt.c
+ *  arch/arm/mach-vt8500/timer.c
  *
  *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
  *  Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 8d3871f110a5..a5bd28692b06 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -31,8 +31,6 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 
-#include <mach/restart.h>
-
 #include "common.h"
 
 #define LEGACY_GPIO_BASE        0xD8110000
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index ab5cfddc0d7b..ba8d14f78d4d 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -31,7 +31,6 @@
 #include <asm/hardware/cache-l2x0.h>
 
 #include <mach/zynq_soc.h>
-#include <mach/clkdev.h>
 #include "common.h"
 
 static struct of_device_id zynq_of_bus_ids[] __initdata = {
@@ -45,22 +44,25 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = {
  */
 static void __init xilinx_init_machine(void)
 {
-#ifdef CONFIG_CACHE_L2X0
         /*
          * 64KB way size, 8-way associativity, parity disabled
          */
-        l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF);
-#endif
+        l2x0_of_init(0x02060000, 0xF0F0FFFF);
 
         of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
 }
 
+static struct of_device_id irq_match[] __initdata = {
+        { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+        { }
+};
+
 /**
  * xilinx_irq_init() - Interrupt controller initialization for the GIC.
  */
 static void __init xilinx_irq_init(void)
 {
-        gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE);
+        of_irq_init(irq_match);
 }
 
 /* The minimum devices needed to be mapped before the VM system is up and
@@ -71,17 +73,12 @@ static struct map_desc io_desc[] __initdata = {
         {
                 .virtual        = TTC0_VIRT,
                 .pfn            = __phys_to_pfn(TTC0_PHYS),
-                .length         = SZ_4K,
+                .length         = TTC0_SIZE,
                 .type           = MT_DEVICE,
         }, {
                 .virtual        = SCU_PERIPH_VIRT,
                 .pfn            = __phys_to_pfn(SCU_PERIPH_PHYS),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = PL310_L2CC_VIRT,
-                .pfn            = __phys_to_pfn(PL310_L2CC_PHYS),
-                .length         = SZ_4K,
+                .length         = SCU_PERIPH_SIZE,
                 .type           = MT_DEVICE,
         },
 
@@ -89,7 +86,7 @@ static struct map_desc io_desc[] __initdata = {
         {
                 .virtual        = UART0_VIRT,
                 .pfn            = __phys_to_pfn(UART0_PHYS),
-                .length         = SZ_4K,
+                .length         = UART0_SIZE,
                 .type           = MT_DEVICE,
         },
 #endif
diff --git a/arch/arm/mach-zynq/include/mach/clkdev.h b/arch/arm/mach-zynq/include/mach/clkdev.h
deleted file mode 100644
index c6e73d81a459..000000000000
--- a/arch/arm/mach-zynq/include/mach/clkdev.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/mach-zynq/include/mach/clkdev.h
- *
- *  Copyright (C) 2011 Xilinx, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#include <plat/clock.h>
-
-struct clk {
-        unsigned long           rate;
-        const struct clk_ops    *ops;
-        const struct icst_params *params;
-        void __iomem            *vcoreg;
-};
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do { } while (0)
-
-#endif
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index d0d3f8fb06dd..1b8bf0ecbcb0 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -15,33 +15,32 @@
 #ifndef __MACH_XILINX_SOC_H__
 #define __MACH_XILINX_SOC_H__
 
+#include <asm/pgtable.h>
+
 #define PERIPHERAL_CLOCK_RATE           2500000
 
-/* For now, all mappings are flat (physical = virtual)
+/* Static peripheral mappings are mapped at the top of the vmalloc region.  The
+ * early uart mapping causes intermediate problems/failure at certain
+ * addresses, including the very top of the vmalloc region.  Map it at an
+ * address that is known to work.
  */
-#define UART0_PHYS                      0xE0000000
-#define UART0_VIRT                      UART0_PHYS
-
-#define TTC0_PHYS                       0xF8001000
-#define TTC0_VIRT                       TTC0_PHYS
+#define UART0_PHYS              0xE0000000
+#define UART0_SIZE              SZ_4K
+#define UART0_VIRT              0xF0001000
 
-#define PL310_L2CC_PHYS                 0xF8F02000
-#define PL310_L2CC_VIRT                 PL310_L2CC_PHYS
+#define TTC0_PHYS               0xF8001000
+#define TTC0_SIZE               SZ_4K
+#define TTC0_VIRT               (VMALLOC_END - TTC0_SIZE)
 
-#define SCU_PERIPH_PHYS                 0xF8F00000
-#define SCU_PERIPH_VIRT                 SCU_PERIPH_PHYS
+#define SCU_PERIPH_PHYS         0xF8F00000
+#define SCU_PERIPH_SIZE         SZ_8K
+#define SCU_PERIPH_VIRT         (TTC0_VIRT - SCU_PERIPH_SIZE)
 
 /* The following are intended for the devices that are mapped early */
 
 #define TTC0_BASE                       IOMEM(TTC0_VIRT)
 #define SCU_PERIPH_BASE                 IOMEM(SCU_PERIPH_VIRT)
-#define SCU_GIC_CPU_BASE                (SCU_PERIPH_BASE + 0x100)
-#define SCU_GIC_DIST_BASE               (SCU_PERIPH_BASE + 0x1000)
-#define PL310_L2CC_BASE                 IOMEM(PL310_L2CC_VIRT)
 
-/*
- * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
- */
 #define LL_UART_PADDR   UART0_PHYS
 #define LL_UART_VADDR   UART0_VIRT
 
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
deleted file mode 100644
index 88e1e2e7a20d..000000000000
--- a/arch/arm/plat-mxc/Kconfig
+++ /dev/null
@@ -1,89 +0,0 @@
-if ARCH_MXC
-
-source "arch/arm/plat-mxc/devices/Kconfig"
-
-menu "Freescale MXC Implementations"
-
-choice
-        prompt "Freescale CPU family:"
-        default ARCH_IMX_V6_V7
-
-config ARCH_IMX_V4_V5
-        bool "i.MX1, i.MX21, i.MX25, i.MX27"
-        select ARM_PATCH_PHYS_VIRT
-        select AUTO_ZRELADDR if !ZBOOT_ROM
-        help
-          This enables support for systems based on the Freescale i.MX ARMv4
-          and ARMv5 SoCs
-
-config ARCH_IMX_V6_V7
-        bool "i.MX3, i.MX5, i.MX6"
-        select ARM_PATCH_PHYS_VIRT
-        select AUTO_ZRELADDR if !ZBOOT_ROM
-        select MIGHT_HAVE_CACHE_L2X0
-        help
-          This enables support for systems based on the Freescale i.MX3, i.MX5
-          and i.MX6 family.
-
-endchoice
-
-source "arch/arm/mach-imx/Kconfig"
-
-endmenu
-
-config MXC_IRQ_PRIOR
-        bool "Use IRQ priority"
-        help
-          Select this if you want to use prioritized IRQ handling.
-          This feature prevents higher priority ISR to be interrupted
-          by lower priority IRQ even IRQF_DISABLED flag is not set.
-          This may be useful in embedded applications, where are strong
-          requirements for timing.
-          Say N here, unless you have a specialized requirement.
-
-config MXC_TZIC
-        bool
-
-config MXC_AVIC
-        bool
-
-config MXC_DEBUG_BOARD
-        bool "Enable MXC debug board(for 3-stack)"
-        help
-          The debug board is an integral part of the MXC 3-stack(PDK)
-          platforms, it can be attached or removed from the peripheral
-          board. On debug board, several debug devices(ethernet, UART,
-          buttons, LEDs and JTAG) are implemented. Between the MCU and
-          these devices, a CPLD is added as a bridge which performs
-          data/address de-multiplexing and decode, signal level shift,
-          interrupt control and various board functions.
-
-config HAVE_EPIT
-        bool
-
-config MXC_USE_EPIT
-        bool "Use EPIT instead of GPT"
-        depends on HAVE_EPIT
-        help
-          Use EPIT as the system timer on systems that have it. Normally you
-          don't have a reason to do so as the EPIT has the same features and
-          uses the same clocks as the GPT. Anyway, on some systems the GPT
-          may be in use for other purposes.
-
-config MXC_ULPI
-        bool
-
-config ARCH_HAS_RNGA
-        bool
-
-config IMX_HAVE_IOMUX_V1
-        bool
-
-config ARCH_MXC_IOMUX_V3
-        bool
-
-config IRAM_ALLOC
-        bool
-        select GENERIC_ALLOCATOR
-
-endif
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile
deleted file mode 100644
index 149237e24850..000000000000
--- a/arch/arm/plat-mxc/Makefile
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Common support
-obj-y := time.o devices.o cpu.o system.o irq-common.o
-
-obj-$(CONFIG_MXC_TZIC) += tzic.o
-obj-$(CONFIG_MXC_AVIC) += avic.o
-
-obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
-obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
-obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
-obj-$(CONFIG_MXC_ULPI) += ulpi.o
-obj-$(CONFIG_MXC_USE_EPIT) += epit.o
-obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
-obj-$(CONFIG_CPU_FREQ_IMX)    += cpufreq.o
-obj-$(CONFIG_CPU_IDLE) += cpuidle.o
-ifdef CONFIG_SND_IMX_SOC
-obj-y += ssi-fiq.o
-obj-y += ssi-fiq-ksym.o
-endif
-
-obj-y += devices/
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
deleted file mode 100644
index d73f5e8ea9cb..000000000000
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_IRQS_H__
-#define __ASM_ARCH_MXC_IRQS_H__
-
-extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);
-
-/* all normal IRQs can be FIQs */
-#define FIQ_START       0
-/* switch between IRQ and FIQ */
-extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
-
-#endif /* __ASM_ARCH_MXC_IRQS_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h
deleted file mode 100644
index 10343d1f87e1..000000000000
--- a/arch/arm/plat-mxc/include/mach/timex.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright (C) 1999 ARM Limited
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MXC_TIMEX_H__
-#define __ASM_ARCH_MXC_TIMEX_H__
-
-/* Bogus value */
-#define CLOCK_TICK_RATE 12345678
-
-#endif                          /* __ASM_ARCH_MXC_TIMEX_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
deleted file mode 100644
index 477971b00930..000000000000
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- *  arch/arm/plat-mxc/include/mach/uncompress.h
- *
- *  Copyright (C) 1999 ARM Limited
- *  Copyright (C) Shane Nay (shane@minirl.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
-#define __ASM_ARCH_MXC_UNCOMPRESS_H__
-
-#define __MXC_BOOT_UNCOMPRESS
-
-#include <asm/mach-types.h>
-
-unsigned long uart_base;
-
-#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
-
-#define USR2 0x98
-#define USR2_TXFE (1<<14)
-#define TXR  0x40
-#define UCR1 0x80
-#define UCR1_UARTEN 1
-
-/*
- * The following code assumes the serial port has already been
- * initialized by the bootloader.  We search for the first enabled
- * port in the most probable order.  If you didn't setup a port in
- * your bootloader then nothing will appear (which might be desired).
- *
- * This does not append a newline
- */
-
-static void putc(int ch)
-{
-        if (!uart_base)
-                return;
-        if (!(UART(UCR1) & UCR1_UARTEN))
-                return;
-
-        while (!(UART(USR2) & USR2_TXFE))
-                barrier();
-
-        UART(TXR) = ch;
-}
-
-static inline void flush(void)
-{
-}
-
-#define MX1_UART1_BASE_ADDR     0x00206000
-#define MX25_UART1_BASE_ADDR    0x43f90000
-#define MX2X_UART1_BASE_ADDR    0x1000a000
-#define MX3X_UART1_BASE_ADDR    0x43F90000
-#define MX3X_UART2_BASE_ADDR    0x43F94000
-#define MX3X_UART5_BASE_ADDR    0x43FB4000
-#define MX51_UART1_BASE_ADDR    0x73fbc000
-#define MX50_UART1_BASE_ADDR    0x53fbc000
-#define MX53_UART1_BASE_ADDR    0x53fbc000
-
-static __inline__ void __arch_decomp_setup(unsigned long arch_id)
-{
-        switch (arch_id) {
-        case MACH_TYPE_MX1ADS:
-        case MACH_TYPE_SCB9328:
-                uart_base = MX1_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX25_3DS:
-                uart_base = MX25_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_IMX27LITE:
-        case MACH_TYPE_MX27_3DS:
-        case MACH_TYPE_MX27ADS:
-        case MACH_TYPE_PCM038:
-        case MACH_TYPE_MX21ADS:
-        case MACH_TYPE_PCA100:
-        case MACH_TYPE_MXT_TD60:
-        case MACH_TYPE_IMX27IPCAM:
-                uart_base = MX2X_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX31LITE:
-        case MACH_TYPE_ARMADILLO5X0:
-        case MACH_TYPE_MX31MOBOARD:
-        case MACH_TYPE_QONG:
-        case MACH_TYPE_MX31_3DS:
-        case MACH_TYPE_PCM037:
-        case MACH_TYPE_MX31ADS:
-        case MACH_TYPE_MX35_3DS:
-        case MACH_TYPE_PCM043:
-        case MACH_TYPE_LILLY1131:
-        case MACH_TYPE_VPR200:
-        case MACH_TYPE_EUKREA_CPUIMX35SD:
-                uart_base = MX3X_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MAGX_ZN5:
-                uart_base = MX3X_UART2_BASE_ADDR;
-                break;
-        case MACH_TYPE_BUG:
-                uart_base = MX3X_UART5_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX51_BABBAGE:
-        case MACH_TYPE_EUKREA_CPUIMX51SD:
-        case MACH_TYPE_MX51_3DS:
-                uart_base = MX51_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX50_RDP:
-                uart_base = MX50_UART1_BASE_ADDR;
-                break;
-        case MACH_TYPE_MX53_EVK:
-        case MACH_TYPE_MX53_LOCO:
-        case MACH_TYPE_MX53_SMD:
-        case MACH_TYPE_MX53_ARD:
-                uart_base = MX53_UART1_BASE_ADDR;
-                break;
-        default:
-                break;
-        }
-}
-
-#define arch_decomp_setup()     __arch_decomp_setup(arch_id)
-#define arch_decomp_wdog()
-
-#endif                          /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 82fcb206b5b2..665870dce3c8 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -154,6 +154,12 @@ config OMAP_32K_TIMER
           intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
           currently only available for OMAP16XX, 24XX, 34XX and OMAP4/5.
 
+          On OMAP2PLUS this value is only used for CONFIG_HZ and
+          CLOCK_TICK_RATE compile time calculation.
+          The actual timer selection is done in the board file
+          through the (DT_)MACHINE_START structure.
+
+
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
         bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
         depends on ARCH_OMAP3 && PM
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index dacaee009a4e..8d885848600a 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,13 +3,12 @@
 #
 
 # Common support
-obj-y := common.o sram.o clock.o dma.o fb.o counter_32k.o
+obj-y := sram.o dma.o fb.o counter_32k.o
 obj-m :=
 obj-n :=
 obj-  :=
 
 # omap_device support (OMAP2+ only at the moment)
-obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_device.o
 
 obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
 obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
@@ -20,4 +19,3 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
 # OMAP mailbox framework
 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
 
-obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
deleted file mode 100644
index 9d7ac20ef8f9..000000000000
--- a/arch/arm/plat-omap/clock.c
+++ /dev/null
@@ -1,544 +0,0 @@
-/*
- *  linux/arch/arm/plat-omap/clock.c
- *
- *  Copyright (C) 2004 - 2008 Nokia corporation
- *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- *
- *  Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/export.h>
-#include <linux/err.h>
-#include <linux/string.h>
-#include <linux/clk.h>
-#include <linux/mutex.h>
-#include <linux/cpufreq.h>
-#include <linux/io.h>
-
-#include <plat/clock.h>
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clockfw_lock);
-
-static struct clk_functions *arch_clock;
-
-/*
- * Standard clock functions defined in include/linux/clk.h
- */
-
-int clk_enable(struct clk *clk)
-{
-        unsigned long flags;
-        int ret;
-
-        if (clk == NULL || IS_ERR(clk))
-                return -EINVAL;
-
-        if (!arch_clock || !arch_clock->clk_enable)
-                return -EINVAL;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-        ret = arch_clock->clk_enable(clk);
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-        unsigned long flags;
-
-        if (clk == NULL || IS_ERR(clk))
-                return;
-
-        if (!arch_clock || !arch_clock->clk_disable)
-                return;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-        if (clk->usecount == 0) {
-                pr_err("Trying disable clock %s with 0 usecount\n",
-                       clk->name);
-                WARN_ON(1);
-                goto out;
-        }
-
-        arch_clock->clk_disable(clk);
-
-out:
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-        unsigned long flags;
-        unsigned long ret;
-
-        if (clk == NULL || IS_ERR(clk))
-                return 0;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-        ret = clk->rate;
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-/*
- * Optional clock functions defined in include/linux/clk.h
- */
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned long flags;
-        long ret;
-
-        if (clk == NULL || IS_ERR(clk))
-                return 0;
-
-        if (!arch_clock || !arch_clock->clk_round_rate)
-                return 0;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-        ret = arch_clock->clk_round_rate(clk, rate);
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned long flags;
-        int ret = -EINVAL;
-
-        if (clk == NULL || IS_ERR(clk))
-                return ret;
-
-        if (!arch_clock || !arch_clock->clk_set_rate)
-                return ret;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-        ret = arch_clock->clk_set_rate(clk, rate);
-        if (ret == 0)
-                propagate_rate(clk);
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
-        unsigned long flags;
-        int ret = -EINVAL;
-
-        if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
-                return ret;
-
-        if (!arch_clock || !arch_clock->clk_set_parent)
-                return ret;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-        if (clk->usecount == 0) {
-                ret = arch_clock->clk_set_parent(clk, parent);
-                if (ret == 0)
-                        propagate_rate(clk);
-        } else
-                ret = -EBUSY;
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(clk_set_parent);
-
-struct clk *clk_get_parent(struct clk *clk)
-{
-        return clk->parent;
-}
-EXPORT_SYMBOL(clk_get_parent);
-
-/*
- * OMAP specific clock functions shared between omap1 and omap2
- */
-
-int __initdata mpurate;
-
-/*
- * By default we use the rate set by the bootloader.
- * You can override this with mpurate= cmdline option.
- */
-static int __init omap_clk_setup(char *str)
-{
-        get_option(&str, &mpurate);
-
-        if (!mpurate)
-                return 1;
-
-        if (mpurate < 1000)
-                mpurate *= 1000000;
-
-        return 1;
-}
-__setup("mpurate=", omap_clk_setup);
-
-/* Used for clocks that always have same value as the parent clock */
-unsigned long followparent_recalc(struct clk *clk)
-{
-        return clk->parent->rate;
-}
-
-/*
- * Used for clocks that have the same value as the parent clock,
- * divided by some factor
- */
-unsigned long omap_fixed_divisor_recalc(struct clk *clk)
-{
-        WARN_ON(!clk->fixed_div);
-
-        return clk->parent->rate / clk->fixed_div;
-}
-
-void clk_reparent(struct clk *child, struct clk *parent)
-{
-        list_del_init(&child->sibling);
-        if (parent)
-                list_add(&child->sibling, &parent->children);
-        child->parent = parent;
-
-        /* now do the debugfs renaming to reattach the child
-           to the proper parent */
-}
-
-/* Propagate rate to children */
-void propagate_rate(struct clk *tclk)
-{
-        struct clk *clkp;
-
-        list_for_each_entry(clkp, &tclk->children, sibling) {
-                if (clkp->recalc)
-                        clkp->rate = clkp->recalc(clkp);
-                propagate_rate(clkp);
-        }
-}
-
-static LIST_HEAD(root_clks);
-
-/**
- * recalculate_root_clocks - recalculate and propagate all root clocks
- *
- * Recalculates all root clocks (clocks with no parent), which if the
- * clock's .recalc is set correctly, should also propagate their rates.
- * Called at init.
- */
-void recalculate_root_clocks(void)
-{
-        struct clk *clkp;
-
-        list_for_each_entry(clkp, &root_clks, sibling) {
-                if (clkp->recalc)
-                        clkp->rate = clkp->recalc(clkp);
-                propagate_rate(clkp);
-        }
-}
-
-/**
- * clk_preinit - initialize any fields in the struct clk before clk init
- * @clk: struct clk * to initialize
- *
- * Initialize any struct clk fields needed before normal clk initialization
- * can run.  No return value.
- */
-void clk_preinit(struct clk *clk)
-{
-        INIT_LIST_HEAD(&clk->children);
-}
-
-int clk_register(struct clk *clk)
-{
-        if (clk == NULL || IS_ERR(clk))
-                return -EINVAL;
-
-        /*
-         * trap out already registered clocks
-         */
-        if (clk->node.next || clk->node.prev)
-                return 0;
-
-        mutex_lock(&clocks_mutex);
-        if (clk->parent)
-                list_add(&clk->sibling, &clk->parent->children);
-        else
-                list_add(&clk->sibling, &root_clks);
-
-        list_add(&clk->node, &clocks);
-        if (clk->init)
-                clk->init(clk);
-        mutex_unlock(&clocks_mutex);
-
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        if (clk == NULL || IS_ERR(clk))
-                return;
-
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->sibling);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-void clk_enable_init_clocks(void)
-{
-        struct clk *clkp;
-
-        list_for_each_entry(clkp, &clocks, node) {
-                if (clkp->flags & ENABLE_ON_INIT)
-                        clk_enable(clkp);
-        }
-}
-
-int omap_clk_enable_autoidle_all(void)
-{
-        struct clk *c;
-        unsigned long flags;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-
-        list_for_each_entry(c, &clocks, node)
-                if (c->ops->allow_idle)
-                        c->ops->allow_idle(c);
-
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return 0;
-}
-
-int omap_clk_disable_autoidle_all(void)
-{
-        struct clk *c;
-        unsigned long flags;
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-
-        list_for_each_entry(c, &clocks, node)
-                if (c->ops->deny_idle)
-                        c->ops->deny_idle(c);
-
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return 0;
-}
-
-/*
- * Low level helpers
- */
-static int clkll_enable_null(struct clk *clk)
-{
-        return 0;
-}
-
-static void clkll_disable_null(struct clk *clk)
-{
-}
-
-const struct clkops clkops_null = {
-        .enable         = clkll_enable_null,
-        .disable        = clkll_disable_null,
-};
-
-/*
- * Dummy clock
- *
- * Used for clock aliases that are needed on some OMAPs, but not others
- */
-struct clk dummy_ck = {
-        .name   = "dummy",
-        .ops    = &clkops_null,
-};
-
-/*
- *
- */
-
-#ifdef CONFIG_OMAP_RESET_CLOCKS
-/*
- * Disable any unused clocks left on by the bootloader
- */
-static int __init clk_disable_unused(void)
-{
-        struct clk *ck;
-        unsigned long flags;
-
-        if (!arch_clock || !arch_clock->clk_disable_unused)
-                return 0;
-
-        pr_info("clock: disabling unused clocks to save power\n");
-
-        spin_lock_irqsave(&clockfw_lock, flags);
-        list_for_each_entry(ck, &clocks, node) {
-                if (ck->ops == &clkops_null)
-                        continue;
-
-                if (ck->usecount > 0 || !ck->enable_reg)
-                        continue;
-
-                arch_clock->clk_disable_unused(ck);
-        }
-        spin_unlock_irqrestore(&clockfw_lock, flags);
-
-        return 0;
-}
-late_initcall(clk_disable_unused);
-late_initcall(omap_clk_enable_autoidle_all);
-#endif
-
-int __init clk_init(struct clk_functions * custom_clocks)
-{
-        if (!custom_clocks) {
-                pr_err("No custom clock functions registered\n");
-                BUG();
-        }
-
-        arch_clock = custom_clocks;
-
-        return 0;
-}
-
-#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
-/*
- *      debugfs support to trace clock tree hierarchy and attributes
- */
-
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-
-static struct dentry *clk_debugfs_root;
-
-static int clk_dbg_show_summary(struct seq_file *s, void *unused)
-{
-        struct clk *c;
-        struct clk *pa;
-
-        mutex_lock(&clocks_mutex);
-        seq_printf(s, "%-30s %-30s %-10s %s\n",
-                "clock-name", "parent-name", "rate", "use-count");
-
-        list_for_each_entry(c, &clocks, node) {
-                pa = c->parent;
-                seq_printf(s, "%-30s %-30s %-10lu %d\n",
-                        c->name, pa ? pa->name : "none", c->rate, c->usecount);
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return 0;
-}
-
-static int clk_dbg_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, clk_dbg_show_summary, inode->i_private);
-}
-
-static const struct file_operations debug_clock_fops = {
-        .open           = clk_dbg_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
-
-static int clk_debugfs_register_one(struct clk *c)
-{
-        int err;
-        struct dentry *d;
-        struct clk *pa = c->parent;
-
-        d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root);
-        if (!d)
-                return -ENOMEM;
-        c->dent = d;
-
-        d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
-        if (!d) {
-                err = -ENOMEM;
-                goto err_out;
-        }
-        d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
-        if (!d) {
-                err = -ENOMEM;
-                goto err_out;
-        }
-        d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
-        if (!d) {
-                err = -ENOMEM;
-                goto err_out;
-        }
-        return 0;
-
-err_out:
-        debugfs_remove_recursive(c->dent);
-        return err;
-}
-
-static int clk_debugfs_register(struct clk *c)
-{
-        int err;
-        struct clk *pa = c->parent;
-
-        if (pa && !pa->dent) {
-                err = clk_debugfs_register(pa);
-                if (err)
-                        return err;
-        }
-
-        if (!c->dent) {
-                err = clk_debugfs_register_one(c);
-                if (err)
-                        return err;
-        }
-        return 0;
-}
-
-static int __init clk_debugfs_init(void)
-{
-        struct clk *c;
-        struct dentry *d;
-        int err;
-
-        d = debugfs_create_dir("clock", NULL);
-        if (!d)
-                return -ENOMEM;
-        clk_debugfs_root = d;
-
-        list_for_each_entry(c, &clocks, node) {
-                err = clk_debugfs_register(c);
-                if (err)
-                        goto err_out;
-        }
-
-        d = debugfs_create_file("summary", S_IRUGO,
-                d, NULL, &debug_clock_fops);
-        if (!d)
-                return -ENOMEM;
-
-        return 0;
-err_out:
-        debugfs_remove_recursive(clk_debugfs_root);
-        return err;
-}
-late_initcall(clk_debugfs_init);
-
-#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
deleted file mode 100644
index 111315a69354..000000000000
--- a/arch/arm/plat-omap/common.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * linux/arch/arm/plat-omap/common.c
- *
- * Code common to all OMAP machines.
- * The file is created by Tony Lindgren <tony@atomide.com>
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/dma-mapping.h>
-
-#include <plat/common.h>
-#include <plat/vram.h>
-#include <linux/platform_data/dsp-omap.h>
-#include <plat/dma.h>
-
-#include <plat/omap-secure.h>
-
-void __init omap_reserve(void)
-{
-        omap_vram_reserve_sdram_memblock();
-        omap_dsp_reserve_sdram_memblock();
-        omap_secure_ram_reserve_memblock();
-        omap_barrier_reserve_memblock();
-}
-
-void __init omap_init_consistent_dma_size(void)
-{
-#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
-        init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
-#endif
-}
-
-/*
- * Stub function for OMAP2 so that common files
- * continue to build when custom builds are used
- */
-int __weak omap_secure_ram_reserve_memblock(void)
-{
-        return 0;
-}
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 87ba8dd0d791..f3771cdb9838 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,9 +22,6 @@
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 
-#include <plat/common.h>
-#include <plat/clock.h>
-
 /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
 #define OMAP2_32KSYNCNT_REV_OFF         0x0
 #define OMAP2_32KSYNCNT_REV_SCHEME      (0x3 << 30)
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index 5a4678edd65a..a609e2161817 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -15,8 +15,7 @@
 #include <linux/io.h>
 #include <linux/smc91x.h>
 
-#include <mach/hardware.h>
-#include "../mach-omap2/debug-devices.h"
+#include <plat/debug-devices.h>
 
 /* Many OMAP development platforms reuse the same "debug board"; these
  * platforms include H2, H3, H4, and Perseus2.
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index ea29bbe8e5cf..aa7ebc6bcd65 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -17,16 +17,33 @@
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/slab.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 
-#include <plat/fpga.h>
-
 /* Many OMAP development platforms reuse the same "debug board"; these
  * platforms include H2, H3, H4, and Perseus2.  There are 16 LEDs on the
  * debug board (all green), accessed through FPGA registers.
  */
 
+/* NOTE:  most boards don't have a static mapping for the FPGA ... */
+struct h2p2_dbg_fpga {
+        /* offset 0x00 */
+        u16             smc91x[8];
+        /* offset 0x10 */
+        u16             fpga_rev;
+        u16             board_rev;
+        u16             gpio_outputs;
+        u16             leds;
+        /* offset 0x18 */
+        u16             misc_inputs;
+        u16             lan_status;
+        u16             lan_reset;
+        u16             reserved0;
+        /* offset 0x20 */
+        u16             ps2_data;
+        u16             ps2_ctrl;
+        /* plus also 4 rs232 ports ... */
+};
+
 static struct h2p2_dbg_fpga __iomem *fpga;
 
 static u16 fpga_led_state;
@@ -94,7 +111,7 @@ static int fpga_probe(struct platform_device *pdev)
         if (!iomem)
                 return -ENODEV;
 
-        fpga = ioremap(iomem->start, H2P2_DBG_FPGA_SIZE);
+        fpga = ioremap(iomem->start, resource_size(iomem));
         __raw_writew(0xff, &fpga->leds);
 
         for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c76ed8bff838..c288b76f8e6c 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -36,9 +36,7 @@
 #include <linux/slab.h>
 #include <linux/delay.h>
 
-#include <plat/cpu.h>
-#include <plat/dma.h>
-#include <plat/tc.h>
+#include <plat-omap/dma-omap.h>
 
 /*
  * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
@@ -175,12 +173,13 @@ static inline void set_gdma_dev(int req, int dev)
 #define omap_writel(val, reg)   do {} while (0)
 #endif
 
+#ifdef CONFIG_ARCH_OMAP1
 void omap_set_dma_priority(int lch, int dst_port, int priority)
 {
         unsigned long reg;
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 switch (dst_port) {
                 case OMAP_DMA_PORT_OCP_T1:      /* FFFECC00 */
                         reg = OMAP_TC_OCPT1_PRIOR;
@@ -203,18 +202,22 @@ void omap_set_dma_priority(int lch, int dst_port, int priority)
                 l |= (priority & 0xf) << 8;
                 omap_writel(l, reg);
         }
+}
+#endif
 
-        if (cpu_class_is_omap2()) {
-                u32 ccr;
+#ifdef CONFIG_ARCH_OMAP2PLUS
+void omap_set_dma_priority(int lch, int dst_port, int priority)
+{
+        u32 ccr;
 
-                ccr = p->dma_read(CCR, lch);
-                if (priority)
-                        ccr |= (1 << 6);
-                else
-                        ccr &= ~(1 << 6);
-                p->dma_write(ccr, CCR, lch);
-        }
+        ccr = p->dma_read(CCR, lch);
+        if (priority)
+                ccr |= (1 << 6);
+        else
+                ccr &= ~(1 << 6);
+        p->dma_write(ccr, CCR, lch);
 }
+#endif
 EXPORT_SYMBOL(omap_set_dma_priority);
 
 void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
@@ -228,7 +231,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
         l |= data_type;
         p->dma_write(l, CSDP, lch);
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 ccr;
 
                 ccr = p->dma_read(CCR, lch);
@@ -244,7 +247,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
                 p->dma_write(ccr, CCR2, lch);
         }
 
-        if (cpu_class_is_omap2() && dma_trigger) {
+        if (dma_omap2plus() && dma_trigger) {
                 u32 val;
 
                 val = p->dma_read(CCR, lch);
@@ -284,7 +287,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
 {
         BUG_ON(omap_dma_in_1510_mode());
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 w;
 
                 w = p->dma_read(CCR2, lch);
@@ -314,7 +317,7 @@ void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
                 p->dma_write(w, LCH_CTRL, lch);
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 u32 val;
 
                 val = p->dma_read(CCR, lch);
@@ -342,7 +345,7 @@ EXPORT_SYMBOL(omap_set_dma_color_mode);
 
 void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode)
 {
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 u32 csdp;
 
                 csdp = p->dma_read(CSDP, lch);
@@ -355,7 +358,7 @@ EXPORT_SYMBOL(omap_set_dma_write_mode);
 
 void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode)
 {
-        if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
+        if (dma_omap1() && !dma_omap15xx()) {
                 u32 l;
 
                 l = p->dma_read(LCH_CTRL, lch);
@@ -373,7 +376,7 @@ void omap_set_dma_src_params(int lch, int src_port, int src_amode,
 {
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 u16 w;
 
                 w = p->dma_read(CSDP, lch);
@@ -415,7 +418,7 @@ EXPORT_SYMBOL(omap_set_dma_params);
 
 void omap_set_dma_src_index(int lch, int eidx, int fidx)
 {
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 return;
 
         p->dma_write(eidx, CSEI, lch);
@@ -447,13 +450,13 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
         case OMAP_DMA_DATA_BURST_DIS:
                 break;
         case OMAP_DMA_DATA_BURST_4:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x1;
                 else
                         burst = 0x2;
                 break;
         case OMAP_DMA_DATA_BURST_8:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x2;
                         break;
                 }
@@ -463,7 +466,7 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
                  * fall through
                  */
         case OMAP_DMA_DATA_BURST_16:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x3;
                         break;
                 }
@@ -487,7 +490,7 @@ void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
 {
         u32 l;
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 l = p->dma_read(CSDP, lch);
                 l &= ~(0x1f << 9);
                 l |= dest_port << 9;
@@ -508,7 +511,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_params);
 
 void omap_set_dma_dest_index(int lch, int eidx, int fidx)
 {
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 return;
 
         p->dma_write(eidx, CDEI, lch);
@@ -540,19 +543,19 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode)
         case OMAP_DMA_DATA_BURST_DIS:
                 break;
         case OMAP_DMA_DATA_BURST_4:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x1;
                 else
                         burst = 0x2;
                 break;
         case OMAP_DMA_DATA_BURST_8:
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         burst = 0x2;
                 else
                         burst = 0x3;
                 break;
         case OMAP_DMA_DATA_BURST_16:
-                if (cpu_class_is_omap2()) {
+                if (dma_omap2plus()) {
                         burst = 0x3;
                         break;
                 }
@@ -573,7 +576,7 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
 static inline void omap_enable_channel_irq(int lch)
 {
         /* Clear CSR */
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 p->dma_read(CSR, lch);
         else
                 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -587,7 +590,7 @@ static inline void omap_disable_channel_irq(int lch)
         /* disable channel interrupts */
         p->dma_write(0, CICR, lch);
         /* Clear CSR */
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 p->dma_read(CSR, lch);
         else
                 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
@@ -611,7 +614,7 @@ static inline void enable_lnk(int lch)
 
         l = p->dma_read(CLNK_CTRL, lch);
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 l &= ~(1 << 14);
 
         /* Set the ENABLE_LNK bits */
@@ -619,7 +622,7 @@ static inline void enable_lnk(int lch)
                 l = dma_chan[lch].next_lch | (1 << 15);
 
 #ifndef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 if (dma_chan[lch].next_linked_ch != -1)
                         l = dma_chan[lch].next_linked_ch | (1 << 15);
 #endif
@@ -636,12 +639,12 @@ static inline void disable_lnk(int lch)
         /* Disable interrupts */
         omap_disable_channel_irq(lch);
 
-        if (cpu_class_is_omap1()) {
+        if (dma_omap1()) {
                 /* Set the STOP_LNK bit */
                 l |= 1 << 14;
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 /* Clear the ENABLE_LNK bit */
                 l &= ~(1 << 15);
         }
@@ -655,7 +658,7 @@ static inline void omap2_enable_irq_lch(int lch)
         u32 val;
         unsigned long flags;
 
-        if (!cpu_class_is_omap2())
+        if (dma_omap1())
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -673,7 +676,7 @@ static inline void omap2_disable_irq_lch(int lch)
         u32 val;
         unsigned long flags;
 
-        if (!cpu_class_is_omap2())
+        if (dma_omap1())
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -712,7 +715,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
         if (p->clear_lch_regs)
                 p->clear_lch_regs(free_ch);
 
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap_clear_dma(free_ch);
 
         spin_unlock_irqrestore(&dma_chan_lock, flags);
@@ -723,7 +726,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
         chan->flags = 0;
 
 #ifndef CONFIG_ARCH_OMAP1
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 chan->chain_id = -1;
                 chan->next_linked_ch = -1;
         }
@@ -731,13 +734,13 @@ int omap_request_dma(int dev_id, const char *dev_name,
 
         chan->enabled_irqs = OMAP_DMA_DROP_IRQ | OMAP_DMA_BLOCK_IRQ;
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 chan->enabled_irqs |= OMAP1_DMA_TOUT_IRQ;
-        else if (cpu_class_is_omap2())
+        else if (dma_omap2plus())
                 chan->enabled_irqs |= OMAP2_DMA_MISALIGNED_ERR_IRQ |
                         OMAP2_DMA_TRANS_ERR_IRQ;
 
-        if (cpu_is_omap16xx()) {
+        if (dma_omap16xx()) {
                 /* If the sync device is set, configure it dynamically. */
                 if (dev_id != 0) {
                         set_gdma_dev(free_ch + 1, dev_id);
@@ -748,11 +751,11 @@ int omap_request_dma(int dev_id, const char *dev_name,
                  * id.
                  */
                 p->dma_write(dev_id | (1 << 10), CCR, free_ch);
-        } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
+        } else if (dma_omap1()) {
                 p->dma_write(dev_id, CCR, free_ch);
         }
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 omap_enable_channel_irq(free_ch);
                 omap2_enable_irq_lch(free_ch);
         }
@@ -774,7 +777,7 @@ void omap_free_dma(int lch)
         }
 
         /* Disable interrupt for logical channel */
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap2_disable_irq_lch(lch);
 
         /* Disable all DMA interrupts for the channel. */
@@ -784,7 +787,7 @@ void omap_free_dma(int lch)
         p->dma_write(0, CCR, lch);
 
         /* Clear registers */
-        if (cpu_class_is_omap2())
+        if (dma_omap2plus())
                 omap_clear_dma(lch);
 
         spin_lock_irqsave(&dma_chan_lock, flags);
@@ -810,7 +813,7 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
 {
         u32 reg;
 
-        if (!cpu_class_is_omap2()) {
+        if (dma_omap1()) {
                 printk(KERN_ERR "FIXME: no %s on 15xx/16xx\n", __func__);
                 return;
         }
@@ -849,7 +852,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
         }
         l = p->dma_read(CCR, lch);
         l &= ~((1 << 6) | (1 << 26));
-        if (cpu_class_is_omap2() && !cpu_is_omap242x())
+        if (d->dev_caps & IS_RW_PRIORITY)
                 l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
         else
                 l |= ((read_prio & 0x1) << 6);
@@ -882,7 +885,7 @@ void omap_start_dma(int lch)
          * The CPC/CDAC register needs to be initialized to zero
          * before starting dma transfer.
          */
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 p->dma_write(0, CPC, lch);
         else
                 p->dma_write(0, CDAC, lch);
@@ -1045,7 +1048,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
 {
         dma_addr_t offset = 0;
 
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 offset = p->dma_read(CPC, lch);
         else
                 offset = p->dma_read(CSAC, lch);
@@ -1053,7 +1056,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
         if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
                 offset = p->dma_read(CSAC, lch);
 
-        if (!cpu_is_omap15xx()) {
+        if (!dma_omap15xx()) {
                 /*
                  * CDAC == 0 indicates that the DMA transfer on the channel has
                  * not been started (no data has been transferred so far).
@@ -1065,7 +1068,7 @@ dma_addr_t omap_get_dma_src_pos(int lch)
                         offset = p->dma_read(CSSA, lch);
         }
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
 
         return offset;
@@ -1084,7 +1087,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
 {
         dma_addr_t offset = 0;
 
-        if (cpu_is_omap15xx())
+        if (dma_omap15xx())
                 offset = p->dma_read(CPC, lch);
         else
                 offset = p->dma_read(CDAC, lch);
@@ -1093,7 +1096,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
          * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
          * read before the DMA controller finished disabling the channel.
          */
-        if (!cpu_is_omap15xx() && offset == 0) {
+        if (!dma_omap15xx() && offset == 0) {
                 offset = p->dma_read(CDAC, lch);
                 /*
                  * CDAC == 0 indicates that the DMA transfer on the channel has
@@ -1104,7 +1107,7 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
                         offset = p->dma_read(CDSA, lch);
         }
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
 
         return offset;
@@ -1121,7 +1124,7 @@ int omap_dma_running(void)
 {
         int lch;
 
-        if (cpu_class_is_omap1())
+        if (dma_omap1())
                 if (omap_lcd_dma_running())
                         return 1;
 
@@ -2024,7 +2027,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
         dma_chan                = d->chan;
         enable_1510_mode        = d->dev_caps & ENABLE_1510_MODE;
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
                                                 dma_lch_count, GFP_KERNEL);
                 if (!dma_linked_lch) {
@@ -2036,7 +2039,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
         spin_lock_init(&dma_chan_lock);
         for (ch = 0; ch < dma_chan_count; ch++) {
                 omap_clear_dma(ch);
-                if (cpu_class_is_omap2())
+                if (dma_omap2plus())
                         omap2_disable_irq_lch(ch);
 
                 dma_chan[ch].dev_id = -1;
@@ -2045,7 +2048,7 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 if (ch >= 6 && enable_1510_mode)
                         continue;
 
-                if (cpu_class_is_omap1()) {
+                if (dma_omap1()) {
                         /*
                          * request_irq() doesn't like dev_id (ie. ch) being
                          * zero, so we have to kludge around this.
@@ -2070,11 +2073,11 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 }
         }
 
-        if (cpu_class_is_omap2() && !cpu_is_omap242x())
+        if (d->dev_caps & IS_RW_PRIORITY)
                 omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
                                 DMA_DEFAULT_FIFO_DEPTH, 0);
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 strcpy(irq_name, "0");
                 dma_irq = platform_get_irq_byname(pdev, irq_name);
                 if (dma_irq < 0) {
@@ -2089,9 +2092,8 @@ static int __devinit omap_system_dma_probe(struct platform_device *pdev)
                 }
         }
 
-        /* reserve dma channels 0 and 1 in high security devices */
-        if (cpu_is_omap34xx() &&
-                (omap_type() != OMAP2_DEVICE_TYPE_GP)) {
+        /* reserve dma channels 0 and 1 in high security devices on 34xx */
+        if (d->dev_caps & HS_CHANNELS_RESERVED) {
                 pr_info("Reserving DMA channels 0 and 1 for HS ROM code\n");
                 dma_chan[0].dev_id = 0;
                 dma_chan[1].dev_id = 1;
@@ -2118,7 +2120,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev)
 {
         int dma_irq;
 
-        if (cpu_class_is_omap2()) {
+        if (dma_omap2plus()) {
                 char irq_name[4];
                 strcpy(irq_name, "0");
                 dma_irq = platform_get_irq_byname(pdev, irq_name);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 938b50a33439..89585c293554 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -35,16 +35,18 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+#include <linux/clk.h>
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/device.h>
 #include <linux/err.h>
 #include <linux/pm_runtime.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/dmtimer-omap.h>
 
 #include <plat/dmtimer.h>
-#include <plat/omap-pm.h>
-
-#include <mach/hardware.h>
 
 static u32 omap_reserved_systimers;
 static LIST_HEAD(omap_timer_list);
@@ -84,10 +86,6 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
 
 static void omap_timer_restore_context(struct omap_dm_timer *timer)
 {
-        if (timer->revision == 1)
-                __raw_writel(timer->context.tistat, timer->sys_stat);
-
-        __raw_writel(timer->context.tisr, timer->irq_stat);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
                                 timer->context.twer);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
@@ -103,39 +101,38 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer)
                                 timer->context.tclr);
 }
 
-static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
+static int omap_dm_timer_reset(struct omap_dm_timer *timer)
 {
-        int c;
+        u32 l, timeout = 100000;
 
-        if (!timer->sys_stat)
-                return;
+        if (timer->revision != 1)
+                return -EINVAL;
 
-        c = 0;
-        while (!(__raw_readl(timer->sys_stat) & 1)) {
-                c++;
-                if (c > 100000) {
-                        printk(KERN_ERR "Timer failed to reset\n");
-                        return;
-                }
-        }
-}
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
 
-static void omap_dm_timer_reset(struct omap_dm_timer *timer)
-{
-        omap_dm_timer_enable(timer);
-        if (timer->pdev->id != 1) {
-                omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
-                omap_dm_timer_wait_for_reset(timer);
+        do {
+                l = __omap_dm_timer_read(timer,
+                                         OMAP_TIMER_V1_SYS_STAT_OFFSET, 0);
+        } while (!l && timeout--);
+
+        if (!timeout) {
+                dev_err(&timer->pdev->dev, "Timer failed to reset\n");
+                return -ETIMEDOUT;
         }
 
-        __omap_dm_timer_reset(timer, 0, 0);
-        omap_dm_timer_disable(timer);
-        timer->posted = 1;
+        /* Configure timer for smart-idle mode */
+        l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0);
+        l |= 0x2 << 0x3;
+        __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0);
+
+        timer->posted = 0;
+
+        return 0;
 }
 
-int omap_dm_timer_prepare(struct omap_dm_timer *timer)
+static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 {
-        int ret;
+        int rc;
 
         /*
          * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
@@ -150,13 +147,20 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer)
                 }
         }
 
-        if (timer->capability & OMAP_TIMER_NEEDS_RESET)
-                omap_dm_timer_reset(timer);
+        omap_dm_timer_enable(timer);
 
-        ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
+        if (timer->capability & OMAP_TIMER_NEEDS_RESET) {
+                rc = omap_dm_timer_reset(timer);
+                if (rc) {
+                        omap_dm_timer_disable(timer);
+                        return rc;
+                }
+        }
 
-        timer->posted = 1;
-        return ret;
+        __omap_dm_timer_enable_posted(timer);
+        omap_dm_timer_disable(timer);
+
+        return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 }
 
 static inline u32 omap_dm_timer_reserved_systimer(int id)
@@ -212,6 +216,13 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
         unsigned long flags;
         int ret = 0;
 
+        /* Requesting timer by ID is not supported when device tree is used */
+        if (of_have_populated_dt()) {
+                pr_warn("%s: Please use omap_dm_timer_request_by_cap()\n",
+                        __func__);
+                return NULL;
+        }
+
         spin_lock_irqsave(&dm_timer_lock, flags);
         list_for_each_entry(t, &omap_timer_list, node) {
                 if (t->pdev->id == id && !t->reserved) {
@@ -237,6 +248,58 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
 
+/**
+ * omap_dm_timer_request_by_cap - Request a timer by capability
+ * @cap:        Bit mask of capabilities to match
+ *
+ * Find a timer based upon capabilities bit mask. Callers of this function
+ * should use the definitions found in the plat/dmtimer.h file under the
+ * comment "timer capabilities used in hwmod database". Returns pointer to
+ * timer handle on success and a NULL pointer on failure.
+ */
+struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap)
+{
+        struct omap_dm_timer *timer = NULL, *t;
+        unsigned long flags;
+
+        if (!cap)
+                return NULL;
+
+        spin_lock_irqsave(&dm_timer_lock, flags);
+        list_for_each_entry(t, &omap_timer_list, node) {
+                if ((!t->reserved) && ((t->capability & cap) == cap)) {
+                        /*
+                         * If timer is not NULL, we have already found one timer
+                         * but it was not an exact match because it had more
+                         * capabilites that what was required. Therefore,
+                         * unreserve the last timer found and see if this one
+                         * is a better match.
+                         */
+                        if (timer)
+                                timer->reserved = 0;
+
+                        timer = t;
+                        timer->reserved = 1;
+
+                        /* Exit loop early if we find an exact match */
+                        if (t->capability == cap)
+                                break;
+                }
+        }
+        spin_unlock_irqrestore(&dm_timer_lock, flags);
+
+        if (timer && omap_dm_timer_prepare(timer)) {
+                timer->reserved = 0;
+                timer = NULL;
+        }
+
+        if (!timer)
+                pr_debug("%s: timer request failed!\n", __func__);
+
+        return timer;
+}
+EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_cap);
+
 int omap_dm_timer_free(struct omap_dm_timer *timer)
 {
         if (unlikely(!timer))
@@ -271,7 +334,7 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
 
 #if defined(CONFIG_ARCH_OMAP1)
-
+#include <mach/hardware.h>
 /**
  * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
  * @inputmask: current value of idlect mask
@@ -348,7 +411,8 @@ int omap_dm_timer_start(struct omap_dm_timer *timer)
         omap_dm_timer_enable(timer);
 
         if (!(timer->capability & OMAP_TIMER_ALWON)) {
-                if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+                if (timer->get_context_loss_count &&
+                        timer->get_context_loss_count(&timer->pdev->dev) !=
                                 timer->ctx_loss_count)
                         omap_timer_restore_context(timer);
         }
@@ -377,9 +441,11 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
 
         __omap_dm_timer_stop(timer, timer->posted, rate);
 
-        if (!(timer->capability & OMAP_TIMER_ALWON))
-                timer->ctx_loss_count =
-                        omap_pm_get_dev_context_loss_count(&timer->pdev->dev);
+        if (!(timer->capability & OMAP_TIMER_ALWON)) {
+                if (timer->get_context_loss_count)
+                        timer->ctx_loss_count =
+                                timer->get_context_loss_count(&timer->pdev->dev);
+        }
 
         /*
          * Since the register values are computed and written within
@@ -388,7 +454,6 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
          */
         timer->context.tclr =
                         omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
-        timer->context.tisr = __raw_readl(timer->irq_stat);
         omap_dm_timer_disable(timer);
         return 0;
 }
@@ -398,7 +463,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 {
         int ret;
         char *parent_name = NULL;
-        struct clk *fclk, *parent;
+        struct clk *parent;
         struct dmtimer_platform_data *pdata;
 
         if (unlikely(!timer))
@@ -414,14 +479,11 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
          * use the clock framework to set the parent clock. To be removed
          * once OMAP1 migrated to using clock framework for dmtimers
          */
-        if (pdata->set_timer_src)
+        if (pdata && pdata->set_timer_src)
                 return pdata->set_timer_src(timer->pdev, source);
 
-        fclk = clk_get(&timer->pdev->dev, "fck");
-        if (IS_ERR_OR_NULL(fclk)) {
-                pr_err("%s: fck not found\n", __func__);
+        if (!timer->fclk)
                 return -EINVAL;
-        }
 
         switch (source) {
         case OMAP_TIMER_SRC_SYS_CLK:
@@ -440,18 +502,15 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
         parent = clk_get(&timer->pdev->dev, parent_name);
         if (IS_ERR_OR_NULL(parent)) {
                 pr_err("%s: %s not found\n", __func__, parent_name);
-                ret = -EINVAL;
-                goto out;
+                return -EINVAL;
         }
 
-        ret = clk_set_parent(fclk, parent);
+        ret = clk_set_parent(timer->fclk, parent);
         if (IS_ERR_VALUE(ret))
                 pr_err("%s: failed to set %s as parent\n", __func__,
                         parent_name);
 
         clk_put(parent);
-out:
-        clk_put(fclk);
 
         return ret;
 }
@@ -495,7 +554,8 @@ int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
         omap_dm_timer_enable(timer);
 
         if (!(timer->capability & OMAP_TIMER_ALWON)) {
-                if (omap_pm_get_dev_context_loss_count(&timer->pdev->dev) !=
+                if (timer->get_context_loss_count &&
+                        timer->get_context_loss_count(&timer->pdev->dev) !=
                                 timer->ctx_loss_count)
                         omap_timer_restore_context(timer);
         }
@@ -533,8 +593,8 @@ int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
                 l |= OMAP_TIMER_CTRL_CE;
         else
                 l &= ~OMAP_TIMER_CTRL_CE;
-        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 
         /* Save the context */
         timer->context.tclr = l;
@@ -610,6 +670,37 @@ int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
 
+/**
+ * omap_dm_timer_set_int_disable - disable timer interrupts
+ * @timer:      pointer to timer handle
+ * @mask:       bit mask of interrupts to be disabled
+ *
+ * Disables the specified timer interrupts for a timer.
+ */
+int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
+{
+        u32 l = mask;
+
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
+
+        if (timer->revision == 1)
+                l = __raw_readl(timer->irq_ena) & ~mask;
+
+        __raw_writel(l, timer->irq_dis);
+        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask;
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l);
+
+        /* Save the context */
+        timer->context.tier &= ~mask;
+        timer->context.twer &= ~mask;
+        omap_dm_timer_disable(timer);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_disable);
+
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
 {
         unsigned int l;
@@ -631,8 +722,7 @@ int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
                 return -EINVAL;
 
         __omap_dm_timer_write_status(timer, value);
-        /* Save the context */
-        timer->context.tisr = value;
+
         return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
@@ -695,7 +785,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
         struct device *dev = &pdev->dev;
         struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
 
-        if (!pdata) {
+        if (!pdata && !dev->of_node) {
                 dev_err(dev, "%s: no platform data.\n", __func__);
                 return -ENODEV;
         }
@@ -724,11 +814,25 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
                 return -ENOMEM;
         }
 
-        timer->id = pdev->id;
+        if (dev->of_node) {
+                if (of_find_property(dev->of_node, "ti,timer-alwon", NULL))
+                        timer->capability |= OMAP_TIMER_ALWON;
+                if (of_find_property(dev->of_node, "ti,timer-dsp", NULL))
+                        timer->capability |= OMAP_TIMER_HAS_DSP_IRQ;
+                if (of_find_property(dev->of_node, "ti,timer-pwm", NULL))
+                        timer->capability |= OMAP_TIMER_HAS_PWM;
+                if (of_find_property(dev->of_node, "ti,timer-secure", NULL))
+                        timer->capability |= OMAP_TIMER_SECURE;
+        } else {
+                timer->id = pdev->id;
+                timer->errata = pdata->timer_errata;
+                timer->capability = pdata->timer_capability;
+                timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
+                timer->get_context_loss_count = pdata->get_context_loss_count;
+        }
+
         timer->irq = irq->start;
-        timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
         timer->pdev = pdev;
-        timer->capability = pdata->timer_capability;
 
         /* Skip pm_runtime_enable for OMAP1 */
         if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
@@ -768,7 +872,8 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
 
         spin_lock_irqsave(&dm_timer_lock, flags);
         list_for_each_entry(timer, &omap_timer_list, node)
-                if (timer->pdev->id == pdev->id) {
+                if (!strcmp(dev_name(&timer->pdev->dev),
+                            dev_name(&pdev->dev))) {
                         list_del(&timer->node);
                         ret = 0;
                         break;
@@ -778,11 +883,18 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
         return ret;
 }
 
+static const struct of_device_id omap_timer_match[] = {
+        { .compatible = "ti,omap2-timer", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, omap_timer_match);
+
 static struct platform_driver omap_dm_timer_driver = {
         .probe  = omap_dm_timer_probe,
         .remove = __devexit_p(omap_dm_timer_remove),
         .driver = {
                 .name   = "omap_timer",
+                .of_match_table = of_match_ptr(omap_timer_match),
         },
 };
 
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index bcbb9d5dc293..3a77b30f53d4 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -30,9 +30,69 @@
 #include <linux/io.h>
 #include <linux/omapfb.h>
 
-#include <mach/hardware.h>
 #include <asm/mach/map.h>
 
+#include <plat/cpu.h>
+
+#ifdef CONFIG_OMAP2_VRFB
+
+/*
+ * The first memory resource is the register region for VRFB,
+ * the rest are VRFB virtual memory areas for each VRFB context.
+ */
+
+static const struct resource omap2_vrfb_resources[] = {
+        DEFINE_RES_MEM_NAMED(0x68008000u, 0x40, "vrfb-regs"),
+        DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"),
+        DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"),
+        DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"),
+        DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"),
+};
+
+static const struct resource omap3_vrfb_resources[] = {
+        DEFINE_RES_MEM_NAMED(0x6C000180u, 0xc0, "vrfb-regs"),
+        DEFINE_RES_MEM_NAMED(0x70000000u, 0x4000000, "vrfb-area-0"),
+        DEFINE_RES_MEM_NAMED(0x74000000u, 0x4000000, "vrfb-area-1"),
+        DEFINE_RES_MEM_NAMED(0x78000000u, 0x4000000, "vrfb-area-2"),
+        DEFINE_RES_MEM_NAMED(0x7c000000u, 0x4000000, "vrfb-area-3"),
+        DEFINE_RES_MEM_NAMED(0xe0000000u, 0x4000000, "vrfb-area-4"),
+        DEFINE_RES_MEM_NAMED(0xe4000000u, 0x4000000, "vrfb-area-5"),
+        DEFINE_RES_MEM_NAMED(0xe8000000u, 0x4000000, "vrfb-area-6"),
+        DEFINE_RES_MEM_NAMED(0xec000000u, 0x4000000, "vrfb-area-7"),
+        DEFINE_RES_MEM_NAMED(0xf0000000u, 0x4000000, "vrfb-area-8"),
+        DEFINE_RES_MEM_NAMED(0xf4000000u, 0x4000000, "vrfb-area-9"),
+        DEFINE_RES_MEM_NAMED(0xf8000000u, 0x4000000, "vrfb-area-10"),
+        DEFINE_RES_MEM_NAMED(0xfc000000u, 0x4000000, "vrfb-area-11"),
+};
+
+static int __init omap_init_vrfb(void)
+{
+        struct platform_device *pdev;
+        const struct resource *res;
+        unsigned int num_res;
+
+        if (cpu_is_omap24xx()) {
+                res = omap2_vrfb_resources;
+                num_res = ARRAY_SIZE(omap2_vrfb_resources);
+        } else if (cpu_is_omap34xx()) {
+                res = omap3_vrfb_resources;
+                num_res = ARRAY_SIZE(omap3_vrfb_resources);
+        } else {
+                return 0;
+        }
+
+        pdev = platform_device_register_resndata(NULL, "omapvrfb", -1,
+                        res, num_res, NULL, 0);
+
+        if (IS_ERR(pdev))
+                return PTR_ERR(pdev);
+        else
+                return 0;
+}
+
+arch_initcall(omap_init_vrfb);
+#endif
+
 #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE)
 
 static bool omapfb_lcd_configured;
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 6013831a043e..f9df624d108c 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -31,176 +31,13 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 
-#include <mach/irqs.h>
 #include <plat/i2c.h>
-#include <plat/omap-pm.h>
-#include <plat/omap_device.h>
 
-#define OMAP_I2C_SIZE           0x3f
-#define OMAP1_I2C_BASE          0xfffb3800
-#define OMAP1_INT_I2C           (32 + 4)
-
-static const char name[] = "omap_i2c";
-
-#define I2C_RESOURCE_BUILDER(base, irq)                 \
-        {                                               \
-                .start  = (base),                       \
-                .end    = (base) + OMAP_I2C_SIZE,       \
-                .flags  = IORESOURCE_MEM,               \
-        },                                              \
-        {                                               \
-                .start  = (irq),                        \
-                .flags  = IORESOURCE_IRQ,               \
-        },
-
-static struct resource i2c_resources[][2] = {
-        { I2C_RESOURCE_BUILDER(0, 0) },
-};
-
-#define I2C_DEV_BUILDER(bus_id, res, data)              \
-        {                                               \
-                .id     = (bus_id),                     \
-                .name   = name,                         \
-                .num_resources  = ARRAY_SIZE(res),      \
-                .resource       = (res),                \
-                .dev            = {                     \
-                        .platform_data  = (data),       \
-                },                                      \
-        }
-
-#define MAX_OMAP_I2C_HWMOD_NAME_LEN     16
 #define OMAP_I2C_MAX_CONTROLLERS 4
 static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
-static struct platform_device omap_i2c_devices[] = {
-        I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
-};
 
 #define OMAP_I2C_CMDLINE_SETUP  (BIT(31))
 
-static int __init omap_i2c_nr_ports(void)
-{
-        int ports = 0;
-
-        if (cpu_class_is_omap1())
-                ports = 1;
-        else if (cpu_is_omap24xx())
-                ports = 2;
-        else if (cpu_is_omap34xx())
-                ports = 3;
-        else if (cpu_is_omap44xx())
-                ports = 4;
-
-        return ports;
-}
-
-static inline int omap1_i2c_add_bus(int bus_id)
-{
-        struct platform_device *pdev;
-        struct omap_i2c_bus_platform_data *pdata;
-        struct resource *res;
-
-        omap1_i2c_mux_pins(bus_id);
-
-        pdev = &omap_i2c_devices[bus_id - 1];
-        res = pdev->resource;
-        res[0].start = OMAP1_I2C_BASE;
-        res[0].end = res[0].start + OMAP_I2C_SIZE;
-        res[1].start = OMAP1_INT_I2C;
-        pdata = &i2c_pdata[bus_id - 1];
-
-        /* all OMAP1 have IP version 1 register set */
-        pdata->rev = OMAP_I2C_IP_VERSION_1;
-
-        /* all OMAP1 I2C are implemented like this */
-        pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
-                       OMAP_I2C_FLAG_SIMPLE_CLOCK |
-                       OMAP_I2C_FLAG_16BIT_DATA_REG |
-                       OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
-
-        /* how the cpu bus is wired up differs for 7xx only */
-
-        if (cpu_is_omap7xx())
-                pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
-        else
-                pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
-
-        return platform_device_register(pdev);
-}
-
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-/*
- * XXX This function is a temporary compatibility wrapper - only
- * needed until the I2C driver can be converted to call
- * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
- */
-static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
-{
-        omap_pm_set_max_mpu_wakeup_lat(dev, t);
-}
-
-static inline int omap2_i2c_add_bus(int bus_id)
-{
-        int l;
-        struct omap_hwmod *oh;
-        struct platform_device *pdev;
-        char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
-        struct omap_i2c_bus_platform_data *pdata;
-        struct omap_i2c_dev_attr *dev_attr;
-
-        omap2_i2c_mux_pins(bus_id);
-
-        l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
-        WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
-                "String buffer overflow in I2C%d device setup\n", bus_id);
-        oh = omap_hwmod_lookup(oh_name);
-        if (!oh) {
-                        pr_err("Could not look up %s\n", oh_name);
-                        return -EEXIST;
-        }
-
-        pdata = &i2c_pdata[bus_id - 1];
-        /*
-         * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
-         * use, and functionality implementation flags, up to the OMAP I2C
-         * driver via platform data
-         */
-        pdata->rev = oh->class->rev;
-
-        dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
-        pdata->flags = dev_attr->flags;
-
-        /*
-         * When waiting for completion of a i2c transfer, we need to
-         * set a wake up latency constraint for the MPU. This is to
-         * ensure quick enough wakeup from idle, when transfer
-         * completes.
-         * Only omap3 has support for constraints
-         */
-        if (cpu_is_omap34xx())
-                pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
-        pdev = omap_device_build(name, bus_id, oh, pdata,
-                        sizeof(struct omap_i2c_bus_platform_data),
-                        NULL, 0, 0);
-        WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
-
-        return PTR_RET(pdev);
-}
-#else
-static inline int omap2_i2c_add_bus(int bus_id)
-{
-        return 0;
-}
-#endif
-
-static int __init omap_i2c_add_bus(int bus_id)
-{
-        if (cpu_class_is_omap1())
-                return omap1_i2c_add_bus(bus_id);
-        else
-                return omap2_i2c_add_bus(bus_id);
-}
-
 /**
  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
  * @str: String of options
@@ -214,12 +51,11 @@ static int __init omap_i2c_add_bus(int bus_id)
  */
 static int __init omap_i2c_bus_setup(char *str)
 {
-        int ports;
         int ints[3];
 
-        ports = omap_i2c_nr_ports();
         get_options(str, 3, ints);
-        if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
+        if (ints[0] < 2 || ints[1] < 1 ||
+                        ints[1] > OMAP_I2C_MAX_CONTROLLERS)
                 return 0;
         i2c_pdata[ints[1] - 1].clkrate = ints[2];
         i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
@@ -239,7 +75,7 @@ static int __init omap_register_i2c_bus_cmdline(void)
         for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
                 if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
                         i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
-                        err = omap_i2c_add_bus(i + 1);
+                        err = omap_i2c_add_bus(&i2c_pdata[i], i + 1);
                         if (err)
                                 goto out;
                 }
@@ -264,7 +100,7 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 {
         int err;
 
-        BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
+        BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
 
         if (info) {
                 err = i2c_register_board_info(bus_id, info, len);
@@ -277,5 +113,5 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 
         i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 
-        return omap_i2c_add_bus(bus_id);
+        return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id);
 }
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
index 0a87b052f8f7..6f506ba9e453 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat-omap/dma-omap.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/plat-omap/include/mach/dma.h
+ *  OMAP DMA handling defines and function
  *
  *  Copyright (C) 2003 Nokia Corporation
  *  Author: Juha Yrjölä <juha.yrjola@nokia.com>
@@ -23,187 +23,8 @@
 
 #include <linux/platform_device.h>
 
-/*
- * TODO: These dma channel defines should go away once all
- * the omap drivers hwmod adapted.
- */
-
-/* Move omap4 specific defines to dma-44xx.h */
-#include "dma-44xx.h"
-
 #define INT_DMA_LCD                     25
 
-/* DMA channels for omap1 */
-#define OMAP_DMA_NO_DEVICE              0
-#define OMAP_DMA_MCSI1_TX               1
-#define OMAP_DMA_MCSI1_RX               2
-#define OMAP_DMA_I2C_RX                 3
-#define OMAP_DMA_I2C_TX                 4
-#define OMAP_DMA_EXT_NDMA_REQ           5
-#define OMAP_DMA_EXT_NDMA_REQ2          6
-#define OMAP_DMA_UWIRE_TX               7
-#define OMAP_DMA_MCBSP1_TX              8
-#define OMAP_DMA_MCBSP1_RX              9
-#define OMAP_DMA_MCBSP3_TX              10
-#define OMAP_DMA_MCBSP3_RX              11
-#define OMAP_DMA_UART1_TX               12
-#define OMAP_DMA_UART1_RX               13
-#define OMAP_DMA_UART2_TX               14
-#define OMAP_DMA_UART2_RX               15
-#define OMAP_DMA_MCBSP2_TX              16
-#define OMAP_DMA_MCBSP2_RX              17
-#define OMAP_DMA_UART3_TX               18
-#define OMAP_DMA_UART3_RX               19
-#define OMAP_DMA_CAMERA_IF_RX           20
-#define OMAP_DMA_MMC_TX                 21
-#define OMAP_DMA_MMC_RX                 22
-#define OMAP_DMA_NAND                   23
-#define OMAP_DMA_IRQ_LCD_LINE           24
-#define OMAP_DMA_MEMORY_STICK           25
-#define OMAP_DMA_USB_W2FC_RX0           26
-#define OMAP_DMA_USB_W2FC_RX1           27
-#define OMAP_DMA_USB_W2FC_RX2           28
-#define OMAP_DMA_USB_W2FC_TX0           29
-#define OMAP_DMA_USB_W2FC_TX1           30
-#define OMAP_DMA_USB_W2FC_TX2           31
-
-/* These are only for 1610 */
-#define OMAP_DMA_CRYPTO_DES_IN          32
-#define OMAP_DMA_SPI_TX                 33
-#define OMAP_DMA_SPI_RX                 34
-#define OMAP_DMA_CRYPTO_HASH            35
-#define OMAP_DMA_CCP_ATTN               36
-#define OMAP_DMA_CCP_FIFO_NOT_EMPTY     37
-#define OMAP_DMA_CMT_APE_TX_CHAN_0      38
-#define OMAP_DMA_CMT_APE_RV_CHAN_0      39
-#define OMAP_DMA_CMT_APE_TX_CHAN_1      40
-#define OMAP_DMA_CMT_APE_RV_CHAN_1      41
-#define OMAP_DMA_CMT_APE_TX_CHAN_2      42
-#define OMAP_DMA_CMT_APE_RV_CHAN_2      43
-#define OMAP_DMA_CMT_APE_TX_CHAN_3      44
-#define OMAP_DMA_CMT_APE_RV_CHAN_3      45
-#define OMAP_DMA_CMT_APE_TX_CHAN_4      46
-#define OMAP_DMA_CMT_APE_RV_CHAN_4      47
-#define OMAP_DMA_CMT_APE_TX_CHAN_5      48
-#define OMAP_DMA_CMT_APE_RV_CHAN_5      49
-#define OMAP_DMA_CMT_APE_TX_CHAN_6      50
-#define OMAP_DMA_CMT_APE_RV_CHAN_6      51
-#define OMAP_DMA_CMT_APE_TX_CHAN_7      52
-#define OMAP_DMA_CMT_APE_RV_CHAN_7      53
-#define OMAP_DMA_MMC2_TX                54
-#define OMAP_DMA_MMC2_RX                55
-#define OMAP_DMA_CRYPTO_DES_OUT         56
-
-/* DMA channels for 24xx */
-#define OMAP24XX_DMA_NO_DEVICE          0
-#define OMAP24XX_DMA_XTI_DMA            1       /* S_DMA_0 */
-#define OMAP24XX_DMA_EXT_DMAREQ0        2       /* S_DMA_1 */
-#define OMAP24XX_DMA_EXT_DMAREQ1        3       /* S_DMA_2 */
-#define OMAP24XX_DMA_GPMC               4       /* S_DMA_3 */
-#define OMAP24XX_DMA_GFX                5       /* S_DMA_4 */
-#define OMAP24XX_DMA_DSS                6       /* S_DMA_5 */
-#define OMAP242X_DMA_VLYNQ_TX           7       /* S_DMA_6 */
-#define OMAP24XX_DMA_EXT_DMAREQ2        7       /* S_DMA_6 */
-#define OMAP24XX_DMA_CWT                8       /* S_DMA_7 */
-#define OMAP24XX_DMA_AES_TX             9       /* S_DMA_8 */
-#define OMAP24XX_DMA_AES_RX             10      /* S_DMA_9 */
-#define OMAP24XX_DMA_DES_TX             11      /* S_DMA_10 */
-#define OMAP24XX_DMA_DES_RX             12      /* S_DMA_11 */
-#define OMAP24XX_DMA_SHA1MD5_RX         13      /* S_DMA_12 */
-#define OMAP34XX_DMA_SHA2MD5_RX         13      /* S_DMA_12 */
-#define OMAP242X_DMA_EXT_DMAREQ2        14      /* S_DMA_13 */
-#define OMAP242X_DMA_EXT_DMAREQ3        15      /* S_DMA_14 */
-#define OMAP242X_DMA_EXT_DMAREQ4        16      /* S_DMA_15 */
-#define OMAP242X_DMA_EAC_AC_RD          17      /* S_DMA_16 */
-#define OMAP242X_DMA_EAC_AC_WR          18      /* S_DMA_17 */
-#define OMAP242X_DMA_EAC_MD_UL_RD       19      /* S_DMA_18 */
-#define OMAP242X_DMA_EAC_MD_UL_WR       20      /* S_DMA_19 */
-#define OMAP242X_DMA_EAC_MD_DL_RD       21      /* S_DMA_20 */
-#define OMAP242X_DMA_EAC_MD_DL_WR       22      /* S_DMA_21 */
-#define OMAP242X_DMA_EAC_BT_UL_RD       23      /* S_DMA_22 */
-#define OMAP242X_DMA_EAC_BT_UL_WR       24      /* S_DMA_23 */
-#define OMAP242X_DMA_EAC_BT_DL_RD       25      /* S_DMA_24 */
-#define OMAP242X_DMA_EAC_BT_DL_WR       26      /* S_DMA_25 */
-#define OMAP243X_DMA_EXT_DMAREQ3        14      /* S_DMA_13 */
-#define OMAP24XX_DMA_SPI3_TX0           15      /* S_DMA_14 */
-#define OMAP24XX_DMA_SPI3_RX0           16      /* S_DMA_15 */
-#define OMAP24XX_DMA_MCBSP3_TX          17      /* S_DMA_16 */
-#define OMAP24XX_DMA_MCBSP3_RX          18      /* S_DMA_17 */
-#define OMAP24XX_DMA_MCBSP4_TX          19      /* S_DMA_18 */
-#define OMAP24XX_DMA_MCBSP4_RX          20      /* S_DMA_19 */
-#define OMAP24XX_DMA_MCBSP5_TX          21      /* S_DMA_20 */
-#define OMAP24XX_DMA_MCBSP5_RX          22      /* S_DMA_21 */
-#define OMAP24XX_DMA_SPI3_TX1           23      /* S_DMA_22 */
-#define OMAP24XX_DMA_SPI3_RX1           24      /* S_DMA_23 */
-#define OMAP243X_DMA_EXT_DMAREQ4        25      /* S_DMA_24 */
-#define OMAP243X_DMA_EXT_DMAREQ5        26      /* S_DMA_25 */
-#define OMAP34XX_DMA_I2C3_TX            25      /* S_DMA_24 */
-#define OMAP34XX_DMA_I2C3_RX            26      /* S_DMA_25 */
-#define OMAP24XX_DMA_I2C1_TX            27      /* S_DMA_26 */
-#define OMAP24XX_DMA_I2C1_RX            28      /* S_DMA_27 */
-#define OMAP24XX_DMA_I2C2_TX            29      /* S_DMA_28 */
-#define OMAP24XX_DMA_I2C2_RX            30      /* S_DMA_29 */
-#define OMAP24XX_DMA_MCBSP1_TX          31      /* S_DMA_30 */
-#define OMAP24XX_DMA_MCBSP1_RX          32      /* S_DMA_31 */
-#define OMAP24XX_DMA_MCBSP2_TX          33      /* S_DMA_32 */
-#define OMAP24XX_DMA_MCBSP2_RX          34      /* S_DMA_33 */
-#define OMAP24XX_DMA_SPI1_TX0           35      /* S_DMA_34 */
-#define OMAP24XX_DMA_SPI1_RX0           36      /* S_DMA_35 */
-#define OMAP24XX_DMA_SPI1_TX1           37      /* S_DMA_36 */
-#define OMAP24XX_DMA_SPI1_RX1           38      /* S_DMA_37 */
-#define OMAP24XX_DMA_SPI1_TX2           39      /* S_DMA_38 */
-#define OMAP24XX_DMA_SPI1_RX2           40      /* S_DMA_39 */
-#define OMAP24XX_DMA_SPI1_TX3           41      /* S_DMA_40 */
-#define OMAP24XX_DMA_SPI1_RX3           42      /* S_DMA_41 */
-#define OMAP24XX_DMA_SPI2_TX0           43      /* S_DMA_42 */
-#define OMAP24XX_DMA_SPI2_RX0           44      /* S_DMA_43 */
-#define OMAP24XX_DMA_SPI2_TX1           45      /* S_DMA_44 */
-#define OMAP24XX_DMA_SPI2_RX1           46      /* S_DMA_45 */
-#define OMAP24XX_DMA_MMC2_TX            47      /* S_DMA_46 */
-#define OMAP24XX_DMA_MMC2_RX            48      /* S_DMA_47 */
-#define OMAP24XX_DMA_UART1_TX           49      /* S_DMA_48 */
-#define OMAP24XX_DMA_UART1_RX           50      /* S_DMA_49 */
-#define OMAP24XX_DMA_UART2_TX           51      /* S_DMA_50 */
-#define OMAP24XX_DMA_UART2_RX           52      /* S_DMA_51 */
-#define OMAP24XX_DMA_UART3_TX           53      /* S_DMA_52 */
-#define OMAP24XX_DMA_UART3_RX           54      /* S_DMA_53 */
-#define OMAP24XX_DMA_USB_W2FC_TX0       55      /* S_DMA_54 */
-#define OMAP24XX_DMA_USB_W2FC_RX0       56      /* S_DMA_55 */
-#define OMAP24XX_DMA_USB_W2FC_TX1       57      /* S_DMA_56 */
-#define OMAP24XX_DMA_USB_W2FC_RX1       58      /* S_DMA_57 */
-#define OMAP24XX_DMA_USB_W2FC_TX2       59      /* S_DMA_58 */
-#define OMAP24XX_DMA_USB_W2FC_RX2       60      /* S_DMA_59 */
-#define OMAP24XX_DMA_MMC1_TX            61      /* S_DMA_60 */
-#define OMAP24XX_DMA_MMC1_RX            62      /* S_DMA_61 */
-#define OMAP24XX_DMA_MS                 63      /* S_DMA_62 */
-#define OMAP242X_DMA_EXT_DMAREQ5        64      /* S_DMA_63 */
-#define OMAP243X_DMA_EXT_DMAREQ6        64      /* S_DMA_63 */
-#define OMAP34XX_DMA_EXT_DMAREQ3        64      /* S_DMA_63 */
-#define OMAP34XX_DMA_AES2_TX            65      /* S_DMA_64 */
-#define OMAP34XX_DMA_AES2_RX            66      /* S_DMA_65 */
-#define OMAP34XX_DMA_DES2_TX            67      /* S_DMA_66 */
-#define OMAP34XX_DMA_DES2_RX            68      /* S_DMA_67 */
-#define OMAP34XX_DMA_SHA1MD5_RX         69      /* S_DMA_68 */
-#define OMAP34XX_DMA_SPI4_TX0           70      /* S_DMA_69 */
-#define OMAP34XX_DMA_SPI4_RX0           71      /* S_DMA_70 */
-#define OMAP34XX_DSS_DMA0               72      /* S_DMA_71 */
-#define OMAP34XX_DSS_DMA1               73      /* S_DMA_72 */
-#define OMAP34XX_DSS_DMA2               74      /* S_DMA_73 */
-#define OMAP34XX_DSS_DMA3               75      /* S_DMA_74 */
-#define OMAP34XX_DMA_MMC3_TX            77      /* S_DMA_76 */
-#define OMAP34XX_DMA_MMC3_RX            78      /* S_DMA_77 */
-#define OMAP34XX_DMA_USIM_TX            79      /* S_DMA_78 */
-#define OMAP34XX_DMA_USIM_RX            80      /* S_DMA_79 */
-
-#define OMAP36XX_DMA_UART4_TX           81      /* S_DMA_80 */
-#define OMAP36XX_DMA_UART4_RX           82      /* S_DMA_81 */
-
-/* Only for AM35xx */
-#define AM35XX_DMA_UART4_TX             54
-#define AM35XX_DMA_UART4_RX             55
-
-/*----------------------------------------------------------------------------*/
-
 #define OMAP1_DMA_TOUT_IRQ              (1 << 0)
 #define OMAP_DMA_DROP_IRQ               (1 << 1)
 #define OMAP_DMA_HALF_IRQ               (1 << 2)
@@ -309,10 +130,12 @@
 #define SRC_PORT                        BIT(0x7)
 #define DST_PORT                        BIT(0x8)
 #define SRC_INDEX                       BIT(0x9)
-#define DST_INDEX                       BIT(0xA)
-#define IS_BURST_ONLY4                  BIT(0xB)
-#define CLEAR_CSR_ON_READ               BIT(0xC)
-#define IS_WORD_16                      BIT(0xD)
+#define DST_INDEX                       BIT(0xa)
+#define IS_BURST_ONLY4                  BIT(0xb)
+#define CLEAR_CSR_ON_READ               BIT(0xc)
+#define IS_WORD_16                      BIT(0xd)
+#define ENABLE_16XX_MODE                BIT(0xe)
+#define HS_CHANNELS_RESERVED            BIT(0xf)
 
 /* Defines for DMA Capabilities */
 #define DMA_HAS_TRANSPARENT_CAPS        (0x1 << 18)
@@ -449,7 +272,15 @@ struct omap_system_dma_plat_info {
         u32 (*dma_read)(int reg, int lch);
 };
 
-extern void __init omap_init_consistent_dma_size(void);
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#define dma_omap2plus() 1
+#else
+#define dma_omap2plus() 0
+#endif
+#define dma_omap1()     (!dma_omap2plus())
+#define dma_omap15xx()  ((dma_omap1() && (d->dev_caps & ENABLE_1510_MODE)))
+#define dma_omap16xx()  ((dma_omap1() && (d->dev_caps & ENABLE_16XX_MODE)))
+
 extern void omap_set_dma_priority(int lch, int dst_port, int priority);
 extern int omap_request_dma(int dev_id, const char *dev_name,
                         void (*callback)(int lch, u16 ch_status, void *data),
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
deleted file mode 100644
index 025d85a3ee86..000000000000
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * clkdev <-> OMAP integration
- *
- * Russell King <linux@arm.linux.org.uk>
- *
- */
-
-#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H
-#define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H
-
-#include <linux/clkdev.h>
-
-struct omap_clk {
-        u16                             cpu;
-        struct clk_lookup               lk;
-};
-
-#define CLK(dev, con, ck, cp)           \
-        {                               \
-                 .cpu = cp,             \
-                .lk = {                 \
-                        .dev_id = dev,  \
-                        .con_id = con,  \
-                        .clk = ck,      \
-                },                      \
-        }
-
-/* Platform flags for the clkdev-OMAP integration code */
-#define CK_310          (1 << 0)
-#define CK_7XX          (1 << 1)        /* 7xx, 850 */
-#define CK_1510         (1 << 2)
-#define CK_16XX         (1 << 3)        /* 16xx, 17xx, 5912 */
-#define CK_242X         (1 << 4)
-#define CK_243X         (1 << 5)        /* 243x, 253x */
-#define CK_3430ES1      (1 << 6)        /* 34xxES1 only */
-#define CK_3430ES2PLUS  (1 << 7)        /* 34xxES2, ES3, non-Sitara 35xx only */
-#define CK_AM35XX       (1 << 9)        /* Sitara AM35xx */
-#define CK_36XX         (1 << 10)       /* 36xx/37xx-specific clocks */
-#define CK_443X         (1 << 11)
-#define CK_TI816X       (1 << 12)
-#define CK_446X         (1 << 13)
-#define CK_AM33XX       (1 << 14)       /* AM33xx specific clocks */
-#define CK_1710         (1 << 15)       /* 1710 extra for rate selection */
-
-
-#define CK_34XX         (CK_3430ES1 | CK_3430ES2PLUS)
-#define CK_3XXX         (CK_34XX | CK_AM35XX | CK_36XX)
-
-
-#endif
-
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
deleted file mode 100644
index e2e2d045e428..000000000000
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * OMAP clock: data structure definitions, function prototypes, shared macros
- *
- * Copyright (C) 2004-2005, 2008-2010 Nokia Corporation
- * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_OMAP_CLOCK_H
-#define __ARCH_ARM_OMAP_CLOCK_H
-
-#include <linux/list.h>
-
-struct module;
-struct clk;
-struct clockdomain;
-
-/* Temporary, needed during the common clock framework conversion */
-#define __clk_get_name(clk)     (clk->name)
-#define __clk_get_parent(clk)   (clk->parent)
-#define __clk_get_rate(clk)     (clk->rate)
-
-/**
- * struct clkops - some clock function pointers
- * @enable: fn ptr that enables the current clock in hardware
- * @disable: fn ptr that enables the current clock in hardware
- * @find_idlest: function returning the IDLEST register for the clock's IP blk
- * @find_companion: function returning the "companion" clk reg for the clock
- * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
- * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
- *
- * A "companion" clk is an accompanying clock to the one being queried
- * that must be enabled for the IP module connected to the clock to
- * become accessible by the hardware.  Neither @find_idlest nor
- * @find_companion should be needed; that information is IP
- * block-specific; the hwmod code has been created to handle this, but
- * until hwmod data is ready and drivers have been converted to use PM
- * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
- * @find_companion must, unfortunately, remain.
- */
-struct clkops {
-        int                     (*enable)(struct clk *);
-        void                    (*disable)(struct clk *);
-        void                    (*find_idlest)(struct clk *, void __iomem **,
-                                               u8 *, u8 *);
-        void                    (*find_companion)(struct clk *, void __iomem **,
-                                                  u8 *);
-        void                    (*allow_idle)(struct clk *);
-        void                    (*deny_idle)(struct clk *);
-};
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-
-/* struct clksel_rate.flags possibilities */
-#define RATE_IN_242X            (1 << 0)
-#define RATE_IN_243X            (1 << 1)
-#define RATE_IN_3430ES1         (1 << 2)        /* 3430ES1 rates only */
-#define RATE_IN_3430ES2PLUS     (1 << 3)        /* 3430 ES >= 2 rates only */
-#define RATE_IN_36XX            (1 << 4)
-#define RATE_IN_4430            (1 << 5)
-#define RATE_IN_TI816X          (1 << 6)
-#define RATE_IN_4460            (1 << 7)
-#define RATE_IN_AM33XX          (1 << 8)
-#define RATE_IN_TI814X          (1 << 9)
-
-#define RATE_IN_24XX            (RATE_IN_242X | RATE_IN_243X)
-#define RATE_IN_34XX            (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
-#define RATE_IN_3XXX            (RATE_IN_34XX | RATE_IN_36XX)
-#define RATE_IN_44XX            (RATE_IN_4430 | RATE_IN_4460)
-
-/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
-#define RATE_IN_3430ES2PLUS_36XX        (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
-
-
-/**
- * struct clksel_rate - register bitfield values corresponding to clk divisors
- * @val: register bitfield value (shifted to bit 0)
- * @div: clock divisor corresponding to @val
- * @flags: (see "struct clksel_rate.flags possibilities" above)
- *
- * @val should match the value of a read from struct clk.clksel_reg
- * AND'ed with struct clk.clksel_mask, shifted right to bit 0.
- *
- * @div is the divisor that should be applied to the parent clock's rate
- * to produce the current clock's rate.
- */
-struct clksel_rate {
-        u32                     val;
-        u8                      div;
-        u16                     flags;
-};
-
-/**
- * struct clksel - available parent clocks, and a pointer to their divisors
- * @parent: struct clk * to a possible parent clock
- * @rates: available divisors for this parent clock
- *
- * A struct clksel is always associated with one or more struct clks
- * and one or more struct clksel_rates.
- */
-struct clksel {
-        struct clk               *parent;
-        const struct clksel_rate *rates;
-};
-
-/**
- * struct dpll_data - DPLL registers and integration data
- * @mult_div1_reg: register containing the DPLL M and N bitfields
- * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
- * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
- * @clk_bypass: struct clk pointer to the clock's bypass clock input
- * @clk_ref: struct clk pointer to the clock's reference clock input
- * @control_reg: register containing the DPLL mode bitfield
- * @enable_mask: mask of the DPLL mode bitfield in @control_reg
- * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate()
- * @last_rounded_m: cache of the last M result of omap2_dpll_round_rate()
- * @max_multiplier: maximum valid non-bypass multiplier value (actual)
- * @last_rounded_n: cache of the last N result of omap2_dpll_round_rate()
- * @min_divider: minimum valid non-bypass divider value (actual)
- * @max_divider: maximum valid non-bypass divider value (actual)
- * @modes: possible values of @enable_mask
- * @autoidle_reg: register containing the DPLL autoidle mode bitfield
- * @idlest_reg: register containing the DPLL idle status bitfield
- * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
- * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
- * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
- * @auto_recal_bit: bitshift of the driftguard enable bit in @control_reg
- * @recal_en_bit: bitshift of the PRM_IRQENABLE_* bit for recalibration IRQs
- * @recal_st_bit: bitshift of the PRM_IRQSTATUS_* bit for recalibration IRQs
- * @flags: DPLL type/features (see below)
- *
- * Possible values for @flags:
- * DPLL_J_TYPE: "J-type DPLL" (only some 36xx, 4xxx DPLLs)
- *
- * @freqsel_mask is only used on the OMAP34xx family and AM35xx.
- *
- * XXX Some DPLLs have multiple bypass inputs, so it's not technically
- * correct to only have one @clk_bypass pointer.
- *
- * XXX The runtime-variable fields (@last_rounded_rate, @last_rounded_m,
- * @last_rounded_n) should be separated from the runtime-fixed fields
- * and placed into a different structure, so that the runtime-fixed data
- * can be placed into read-only space.
- */
-struct dpll_data {
-        void __iomem            *mult_div1_reg;
-        u32                     mult_mask;
-        u32                     div1_mask;
-        struct clk              *clk_bypass;
-        struct clk              *clk_ref;
-        void __iomem            *control_reg;
-        u32                     enable_mask;
-        unsigned long           last_rounded_rate;
-        u16                     last_rounded_m;
-        u16                     max_multiplier;
-        u8                      last_rounded_n;
-        u8                      min_divider;
-        u16                     max_divider;
-        u8                      modes;
-        void __iomem            *autoidle_reg;
-        void __iomem            *idlest_reg;
-        u32                     autoidle_mask;
-        u32                     freqsel_mask;
-        u32                     idlest_mask;
-        u32                     dco_mask;
-        u32                     sddiv_mask;
-        u8                      auto_recal_bit;
-        u8                      recal_en_bit;
-        u8                      recal_st_bit;
-        u8                      flags;
-};
-
-#endif
-
-/*
- * struct clk.flags possibilities
- *
- * XXX document the rest of the clock flags here
- *
- * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
- *     bits share the same register.  This flag allows the
- *     omap4_dpllmx*() code to determine which GATE_CTRL bit field
- *     should be used.  This is a temporary solution - a better approach
- *     would be to associate clock type-specific data with the clock,
- *     similar to the struct dpll_data approach.
- */
-#define ENABLE_REG_32BIT        (1 << 0)        /* Use 32-bit access */
-#define CLOCK_IDLE_CONTROL      (1 << 1)
-#define CLOCK_NO_IDLE_PARENT    (1 << 2)
-#define ENABLE_ON_INIT          (1 << 3)        /* Enable upon framework init */
-#define INVERT_ENABLE           (1 << 4)        /* 0 enables, 1 disables */
-#define CLOCK_CLKOUTX2          (1 << 5)
-
-/**
- * struct clk - OMAP struct clk
- * @node: list_head connecting this clock into the full clock list
- * @ops: struct clkops * for this clock
- * @name: the name of the clock in the hardware (used in hwmod data and debug)
- * @parent: pointer to this clock's parent struct clk
- * @children: list_head connecting to the child clks' @sibling list_heads
- * @sibling: list_head connecting this clk to its parent clk's @children
- * @rate: current clock rate
- * @enable_reg: register to write to enable the clock (see @enable_bit)
- * @recalc: fn ptr that returns the clock's current rate
- * @set_rate: fn ptr that can change the clock's current rate
- * @round_rate: fn ptr that can round the clock's current rate
- * @init: fn ptr to do clock-specific initialization
- * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
- * @usecount: number of users that have requested this clock to be enabled
- * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
- * @flags: see "struct clk.flags possibilities" above
- * @clksel_reg: for clksel clks, register va containing src/divisor select
- * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector
- * @clksel: for clksel clks, pointer to struct clksel for this clock
- * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock
- * @clkdm_name: clockdomain name that this clock is contained in
- * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime
- * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
- * @src_offset: bitshift for source selection bitfield (OMAP1 only)
- *
- * XXX @rate_offset, @src_offset should probably be removed and OMAP1
- * clock code converted to use clksel.
- *
- * XXX @usecount is poorly named.  It should be "enable_count" or
- * something similar.  "users" in the description refers to kernel
- * code (core code or drivers) that have called clk_enable() and not
- * yet called clk_disable(); the usecount of parent clocks is also
- * incremented by the clock code when clk_enable() is called on child
- * clocks and decremented by the clock code when clk_disable() is
- * called on child clocks.
- *
- * XXX @clkdm, @usecount, @children, @sibling should be marked for
- * internal use only.
- *
- * @children and @sibling are used to optimize parent-to-child clock
- * tree traversals.  (child-to-parent traversals use @parent.)
- *
- * XXX The notion of the clock's current rate probably needs to be
- * separated from the clock's target rate.
- */
-struct clk {
-        struct list_head        node;
-        const struct clkops     *ops;
-        const char              *name;
-        struct clk              *parent;
-        struct list_head        children;
-        struct list_head        sibling;        /* node for children */
-        unsigned long           rate;
-        void __iomem            *enable_reg;
-        unsigned long           (*recalc)(struct clk *);
-        int                     (*set_rate)(struct clk *, unsigned long);
-        long                    (*round_rate)(struct clk *, unsigned long);
-        void                    (*init)(struct clk *);
-        u8                      enable_bit;
-        s8                      usecount;
-        u8                      fixed_div;
-        u8                      flags;
-#ifdef CONFIG_ARCH_OMAP2PLUS
-        void __iomem            *clksel_reg;
-        u32                     clksel_mask;
-        const struct clksel     *clksel;
-        struct dpll_data        *dpll_data;
-        const char              *clkdm_name;
-        struct clockdomain      *clkdm;
-#else
-        u8                      rate_offset;
-        u8                      src_offset;
-#endif
-#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
-        struct dentry           *dent;  /* For visible tree hierarchy */
-#endif
-};
-
-struct clk_functions {
-        int             (*clk_enable)(struct clk *clk);
-        void            (*clk_disable)(struct clk *clk);
-        long            (*clk_round_rate)(struct clk *clk, unsigned long rate);
-        int             (*clk_set_rate)(struct clk *clk, unsigned long rate);
-        int             (*clk_set_parent)(struct clk *clk, struct clk *parent);
-        void            (*clk_allow_idle)(struct clk *clk);
-        void            (*clk_deny_idle)(struct clk *clk);
-        void            (*clk_disable_unused)(struct clk *clk);
-};
-
-extern int mpurate;
-
-extern int clk_init(struct clk_functions *custom_clocks);
-extern void clk_preinit(struct clk *clk);
-extern int clk_register(struct clk *clk);
-extern void clk_reparent(struct clk *child, struct clk *parent);
-extern void clk_unregister(struct clk *clk);
-extern void propagate_rate(struct clk *clk);
-extern void recalculate_root_clocks(void);
-extern unsigned long followparent_recalc(struct clk *clk);
-extern void clk_enable_init_clocks(void);
-unsigned long omap_fixed_divisor_recalc(struct clk *clk);
-extern struct clk *omap_clk_get_by_name(const char *name);
-extern int omap_clk_enable_autoidle_all(void);
-extern int omap_clk_disable_autoidle_all(void);
-
-extern const struct clkops clkops_null;
-
-extern struct clk dummy_ck;
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
deleted file mode 100644
index d1cb6f527b7e..000000000000
--- a/arch/arm/plat-omap/include/plat/common.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/common.h
- *
- * Header for code common to all OMAP machines.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the  GNU General Public License along
- * with this program; if not, write  to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
-#define __ARCH_ARM_MACH_OMAP_COMMON_H
-
-#include <plat/i2c.h>
-#include <plat/omap_hwmod.h>
-
-extern int __init omap_init_clocksource_32k(void __iomem *vbase);
-
-extern void __init omap_check_revision(void);
-
-extern void omap_reserve(void);
-extern int omap_dss_reset(struct omap_hwmod *);
-
-void omap_sram_init(void);
-
-#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/arch/arm/plat-omap/include/plat/counter-32k.h b/arch/arm/plat-omap/include/plat/counter-32k.h
new file mode 100644
index 000000000000..da000d482ff2
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/counter-32k.h
@@ -0,0 +1 @@
+int omap_init_clocksource_32k(void __iomem *vbase);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 67da857783ce..b4516aba67ed 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/plat-omap/include/mach/cpu.h
- *
  * OMAP cpu type detection
  *
  * Copyright (C) 2004, 2008 Nokia Corporation
@@ -30,470 +28,12 @@
 #ifndef __ASM_ARCH_OMAP_CPU_H
 #define __ASM_ARCH_OMAP_CPU_H
 
-#ifndef __ASSEMBLY__
-
-#include <linux/bitops.h>
-#include <plat/multi.h>
-
-/*
- * Omap device type i.e. EMU/HS/TST/GP/BAD
- */
-#define OMAP2_DEVICE_TYPE_TEST          0
-#define OMAP2_DEVICE_TYPE_EMU           1
-#define OMAP2_DEVICE_TYPE_SEC           2
-#define OMAP2_DEVICE_TYPE_GP            3
-#define OMAP2_DEVICE_TYPE_BAD           4
-
-int omap_type(void);
-
-/*
- * omap_rev bits:
- * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
- * CPU revision (See _REV_ defined in cpu.h)    [15:08]
- * CPU class bits (15xx, 16xx, 24xx, 34xx...)   [07:00]
- */
-unsigned int omap_rev(void);
-
-/*
- * Get the CPU revision for OMAP devices
- */
-#define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
-
-/*
- * Macros to group OMAP into cpu classes.
- * These can be used in most places.
- * cpu_is_omap7xx():    True for OMAP730, OMAP850
- * cpu_is_omap15xx():   True for OMAP1510, OMAP5910 and OMAP310
- * cpu_is_omap16xx():   True for OMAP1610, OMAP5912 and OMAP1710
- * cpu_is_omap24xx():   True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
- * cpu_is_omap242x():   True for OMAP2420, OMAP2422, OMAP2423
- * cpu_is_omap243x():   True for OMAP2430
- * cpu_is_omap343x():   True for OMAP3430
- * cpu_is_omap443x():   True for OMAP4430
- * cpu_is_omap446x():   True for OMAP4460
- * cpu_is_omap447x():   True for OMAP4470
- * soc_is_omap543x():   True for OMAP5430, OMAP5432
- */
-#define GET_OMAP_CLASS  (omap_rev() & 0xff)
-
-#define IS_OMAP_CLASS(class, id)                        \
-static inline int is_omap ##class (void)                \
-{                                                       \
-        return (GET_OMAP_CLASS == (id)) ? 1 : 0;        \
-}
-
-#define GET_AM_CLASS    ((omap_rev() >> 24) & 0xff)
-
-#define IS_AM_CLASS(class, id)                          \
-static inline int is_am ##class (void)                  \
-{                                                       \
-        return (GET_AM_CLASS == (id)) ? 1 : 0;          \
-}
-
-#define GET_TI_CLASS    ((omap_rev() >> 24) & 0xff)
-
-#define IS_TI_CLASS(class, id)                  \
-static inline int is_ti ##class (void)          \
-{                                                       \
-        return (GET_TI_CLASS == (id)) ? 1 : 0;  \
-}
-
-#define GET_OMAP_SUBCLASS       ((omap_rev() >> 20) & 0x0fff)
-
-#define IS_OMAP_SUBCLASS(subclass, id)                  \
-static inline int is_omap ##subclass (void)             \
-{                                                       \
-        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
-}
-
-#define IS_TI_SUBCLASS(subclass, id)                    \
-static inline int is_ti ##subclass (void)               \
-{                                                       \
-        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
-}
-
-#define IS_AM_SUBCLASS(subclass, id)                    \
-static inline int is_am ##subclass (void)               \
-{                                                       \
-        return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;     \
-}
-
-IS_OMAP_CLASS(7xx, 0x07)
-IS_OMAP_CLASS(15xx, 0x15)
-IS_OMAP_CLASS(16xx, 0x16)
-IS_OMAP_CLASS(24xx, 0x24)
-IS_OMAP_CLASS(34xx, 0x34)
-IS_OMAP_CLASS(44xx, 0x44)
-IS_AM_CLASS(35xx, 0x35)
-IS_OMAP_CLASS(54xx, 0x54)
-IS_AM_CLASS(33xx, 0x33)
-
-IS_TI_CLASS(81xx, 0x81)
-
-IS_OMAP_SUBCLASS(242x, 0x242)
-IS_OMAP_SUBCLASS(243x, 0x243)
-IS_OMAP_SUBCLASS(343x, 0x343)
-IS_OMAP_SUBCLASS(363x, 0x363)
-IS_OMAP_SUBCLASS(443x, 0x443)
-IS_OMAP_SUBCLASS(446x, 0x446)
-IS_OMAP_SUBCLASS(447x, 0x447)
-IS_OMAP_SUBCLASS(543x, 0x543)
-
-IS_TI_SUBCLASS(816x, 0x816)
-IS_TI_SUBCLASS(814x, 0x814)
-IS_AM_SUBCLASS(335x, 0x335)
-
-#define cpu_is_omap7xx()                0
-#define cpu_is_omap15xx()               0
-#define cpu_is_omap16xx()               0
-#define cpu_is_omap24xx()               0
-#define cpu_is_omap242x()               0
-#define cpu_is_omap243x()               0
-#define cpu_is_omap34xx()               0
-#define cpu_is_omap343x()               0
-#define cpu_is_ti81xx()                 0
-#define cpu_is_ti816x()                 0
-#define cpu_is_ti814x()                 0
-#define soc_is_am35xx()                 0
-#define soc_is_am33xx()                 0
-#define soc_is_am335x()                 0
-#define cpu_is_omap44xx()               0
-#define cpu_is_omap443x()               0
-#define cpu_is_omap446x()               0
-#define cpu_is_omap447x()               0
-#define soc_is_omap54xx()               0
-#define soc_is_omap543x()               0
-
-#if defined(MULTI_OMAP1)
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              is_omap7xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-#  undef  cpu_is_omap15xx
-#  define cpu_is_omap15xx()             is_omap15xx()
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-#  undef  cpu_is_omap16xx
-#  define cpu_is_omap16xx()             is_omap16xx()
-# endif
-#else
-# if defined(CONFIG_ARCH_OMAP730)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              1
-# endif
-# if defined(CONFIG_ARCH_OMAP850)
-#  undef  cpu_is_omap7xx
-#  define cpu_is_omap7xx()              1
-# endif
-# if defined(CONFIG_ARCH_OMAP15XX)
-#  undef  cpu_is_omap15xx
-#  define cpu_is_omap15xx()             1
-# endif
-# if defined(CONFIG_ARCH_OMAP16XX)
-#  undef  cpu_is_omap16xx
-#  define cpu_is_omap16xx()             1
-# endif
-#endif
-
-#if defined(MULTI_OMAP2)
-# if defined(CONFIG_ARCH_OMAP2)
-#  undef  cpu_is_omap24xx
-#  define cpu_is_omap24xx()             is_omap24xx()
-# endif
-# if defined (CONFIG_SOC_OMAP2420)
-#  undef  cpu_is_omap242x
-#  define cpu_is_omap242x()             is_omap242x()
-# endif
-# if defined (CONFIG_SOC_OMAP2430)
-#  undef  cpu_is_omap243x
-#  define cpu_is_omap243x()             is_omap243x()
-# endif
-# if defined(CONFIG_ARCH_OMAP3)
-#  undef  cpu_is_omap34xx
-#  undef  cpu_is_omap343x
-#  define cpu_is_omap34xx()             is_omap34xx()
-#  define cpu_is_omap343x()             is_omap343x()
-# endif
-#else
-# if defined(CONFIG_ARCH_OMAP2)
-#  undef  cpu_is_omap24xx
-#  define cpu_is_omap24xx()             1
-# endif
-# if defined(CONFIG_SOC_OMAP2420)
-#  undef  cpu_is_omap242x
-#  define cpu_is_omap242x()             1
-# endif
-# if defined(CONFIG_SOC_OMAP2430)
-#  undef  cpu_is_omap243x
-#  define cpu_is_omap243x()             1
-# endif
-# if defined(CONFIG_ARCH_OMAP3)
-#  undef  cpu_is_omap34xx
-#  define cpu_is_omap34xx()             1
-# endif
-# if defined(CONFIG_SOC_OMAP3430)
-#  undef  cpu_is_omap343x
-#  define cpu_is_omap343x()             1
-# endif
-#endif
-
-/*
- * Macros to detect individual cpu types.
- * These are only rarely needed.
- * cpu_is_omap310():    True for OMAP310
- * cpu_is_omap1510():   True for OMAP1510
- * cpu_is_omap1610():   True for OMAP1610
- * cpu_is_omap1611():   True for OMAP1611
- * cpu_is_omap5912():   True for OMAP5912
- * cpu_is_omap1621():   True for OMAP1621
- * cpu_is_omap1710():   True for OMAP1710
- * cpu_is_omap2420():   True for OMAP2420
- * cpu_is_omap2422():   True for OMAP2422
- * cpu_is_omap2423():   True for OMAP2423
- * cpu_is_omap2430():   True for OMAP2430
- * cpu_is_omap3430():   True for OMAP3430
- */
-#define GET_OMAP_TYPE   ((omap_rev() >> 16) & 0xffff)
-
-#define IS_OMAP_TYPE(type, id)                          \
-static inline int is_omap ##type (void)                 \
-{                                                       \
-        return (GET_OMAP_TYPE == (id)) ? 1 : 0;         \
-}
-
-IS_OMAP_TYPE(310, 0x0310)
-IS_OMAP_TYPE(1510, 0x1510)
-IS_OMAP_TYPE(1610, 0x1610)
-IS_OMAP_TYPE(1611, 0x1611)
-IS_OMAP_TYPE(5912, 0x1611)
-IS_OMAP_TYPE(1621, 0x1621)
-IS_OMAP_TYPE(1710, 0x1710)
-IS_OMAP_TYPE(2420, 0x2420)
-IS_OMAP_TYPE(2422, 0x2422)
-IS_OMAP_TYPE(2423, 0x2423)
-IS_OMAP_TYPE(2430, 0x2430)
-IS_OMAP_TYPE(3430, 0x3430)
-
-#define cpu_is_omap310()                0
-#define cpu_is_omap1510()               0
-#define cpu_is_omap1610()               0
-#define cpu_is_omap5912()               0
-#define cpu_is_omap1611()               0
-#define cpu_is_omap1621()               0
-#define cpu_is_omap1710()               0
-#define cpu_is_omap2420()               0
-#define cpu_is_omap2422()               0
-#define cpu_is_omap2423()               0
-#define cpu_is_omap2430()               0
-#define cpu_is_omap3430()               0
-#define cpu_is_omap3630()               0
-#define soc_is_omap5430()               0
-
-/*
- * Whether we have MULTI_OMAP1 or not, we still need to distinguish
- * between 310 vs. 1510 and 1611B/5912 vs. 1710.
- */
-
-#if defined(CONFIG_ARCH_OMAP15XX)
-# undef  cpu_is_omap310
-# undef  cpu_is_omap1510
-# define cpu_is_omap310()               is_omap310()
-# define cpu_is_omap1510()              is_omap1510()
-#endif
-
-#if defined(CONFIG_ARCH_OMAP16XX)
-# undef  cpu_is_omap1610
-# undef  cpu_is_omap1611
-# undef  cpu_is_omap5912
-# undef  cpu_is_omap1621
-# undef  cpu_is_omap1710
-# define cpu_is_omap1610()              is_omap1610()
-# define cpu_is_omap1611()              is_omap1611()
-# define cpu_is_omap5912()              is_omap5912()
-# define cpu_is_omap1621()              is_omap1621()
-# define cpu_is_omap1710()              is_omap1710()
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2)
-# undef  cpu_is_omap2420
-# undef  cpu_is_omap2422
-# undef  cpu_is_omap2423
-# undef  cpu_is_omap2430
-# define cpu_is_omap2420()              is_omap2420()
-# define cpu_is_omap2422()              is_omap2422()
-# define cpu_is_omap2423()              is_omap2423()
-# define cpu_is_omap2430()              is_omap2430()
-#endif
-
-#if defined(CONFIG_ARCH_OMAP3)
-# undef cpu_is_omap3430
-# undef cpu_is_ti81xx
-# undef cpu_is_ti816x
-# undef cpu_is_ti814x
-# undef soc_is_am35xx
-# define cpu_is_omap3430()              is_omap3430()
-# undef cpu_is_omap3630
-# define cpu_is_omap3630()              is_omap363x()
-# define cpu_is_ti81xx()                is_ti81xx()
-# define cpu_is_ti816x()                is_ti816x()
-# define cpu_is_ti814x()                is_ti814x()
-# define soc_is_am35xx()                is_am35xx()
+#ifdef CONFIG_ARCH_OMAP1
+#include <mach/soc.h>
 #endif
 
-# if defined(CONFIG_SOC_AM33XX)
-# undef soc_is_am33xx
-# undef soc_is_am335x
-# define soc_is_am33xx()                is_am33xx()
-# define soc_is_am335x()                is_am335x()
+#ifdef CONFIG_ARCH_OMAP2PLUS
+#include "../../mach-omap2/soc.h"
 #endif
 
-# if defined(CONFIG_ARCH_OMAP4)
-# undef cpu_is_omap44xx
-# undef cpu_is_omap443x
-# undef cpu_is_omap446x
-# undef cpu_is_omap447x
-# define cpu_is_omap44xx()              is_omap44xx()
-# define cpu_is_omap443x()              is_omap443x()
-# define cpu_is_omap446x()              is_omap446x()
-# define cpu_is_omap447x()              is_omap447x()
-# endif
-
-# if defined(CONFIG_SOC_OMAP5)
-# undef soc_is_omap54xx
-# undef soc_is_omap543x
-# define soc_is_omap54xx()              is_omap54xx()
-# define soc_is_omap543x()              is_omap543x()
-#endif
-
-/* Macros to detect if we have OMAP1 or OMAP2 */
-#define cpu_class_is_omap1()    (cpu_is_omap7xx() || cpu_is_omap15xx() || \
-                                cpu_is_omap16xx())
-#define cpu_class_is_omap2()    (cpu_is_omap24xx() || cpu_is_omap34xx() || \
-                                cpu_is_omap44xx() || soc_is_omap54xx() || \
-                                soc_is_am33xx())
-
-/* Various silicon revisions for omap2 */
-#define OMAP242X_CLASS          0x24200024
-#define OMAP2420_REV_ES1_0      OMAP242X_CLASS
-#define OMAP2420_REV_ES2_0      (OMAP242X_CLASS | (0x1 << 8))
-
-#define OMAP243X_CLASS          0x24300024
-#define OMAP2430_REV_ES1_0      OMAP243X_CLASS
-
-#define OMAP343X_CLASS          0x34300034
-#define OMAP3430_REV_ES1_0      OMAP343X_CLASS
-#define OMAP3430_REV_ES2_0      (OMAP343X_CLASS | (0x1 << 8))
-#define OMAP3430_REV_ES2_1      (OMAP343X_CLASS | (0x2 << 8))
-#define OMAP3430_REV_ES3_0      (OMAP343X_CLASS | (0x3 << 8))
-#define OMAP3430_REV_ES3_1      (OMAP343X_CLASS | (0x4 << 8))
-#define OMAP3430_REV_ES3_1_2    (OMAP343X_CLASS | (0x5 << 8))
-
-#define OMAP363X_CLASS          0x36300034
-#define OMAP3630_REV_ES1_0      OMAP363X_CLASS
-#define OMAP3630_REV_ES1_1      (OMAP363X_CLASS | (0x1 << 8))
-#define OMAP3630_REV_ES1_2      (OMAP363X_CLASS | (0x2 << 8))
-
-#define TI816X_CLASS            0x81600034
-#define TI8168_REV_ES1_0        TI816X_CLASS
-#define TI8168_REV_ES1_1        (TI816X_CLASS | (0x1 << 8))
-
-#define TI814X_CLASS            0x81400034
-#define TI8148_REV_ES1_0        TI814X_CLASS
-#define TI8148_REV_ES2_0        (TI814X_CLASS | (0x1 << 8))
-#define TI8148_REV_ES2_1        (TI814X_CLASS | (0x2 << 8))
-
-#define AM35XX_CLASS            0x35170034
-#define AM35XX_REV_ES1_0        AM35XX_CLASS
-#define AM35XX_REV_ES1_1        (AM35XX_CLASS | (0x1 << 8))
-
-#define AM335X_CLASS            0x33500033
-#define AM335X_REV_ES1_0        AM335X_CLASS
-
-#define OMAP443X_CLASS          0x44300044
-#define OMAP4430_REV_ES1_0      (OMAP443X_CLASS | (0x10 << 8))
-#define OMAP4430_REV_ES2_0      (OMAP443X_CLASS | (0x20 << 8))
-#define OMAP4430_REV_ES2_1      (OMAP443X_CLASS | (0x21 << 8))
-#define OMAP4430_REV_ES2_2      (OMAP443X_CLASS | (0x22 << 8))
-#define OMAP4430_REV_ES2_3      (OMAP443X_CLASS | (0x23 << 8))
-
-#define OMAP446X_CLASS          0x44600044
-#define OMAP4460_REV_ES1_0      (OMAP446X_CLASS | (0x10 << 8))
-#define OMAP4460_REV_ES1_1      (OMAP446X_CLASS | (0x11 << 8))
-
-#define OMAP447X_CLASS          0x44700044
-#define OMAP4470_REV_ES1_0      (OMAP447X_CLASS | (0x10 << 8))
-
-#define OMAP54XX_CLASS          0x54000054
-#define OMAP5430_REV_ES1_0      (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
-#define OMAP5432_REV_ES1_0      (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
-
-void omap2xxx_check_revision(void);
-void omap3xxx_check_revision(void);
-void omap4xxx_check_revision(void);
-void omap5xxx_check_revision(void);
-void omap3xxx_check_features(void);
-void ti81xx_check_features(void);
-void omap4xxx_check_features(void);
-
-/*
- * Runtime detection of OMAP3 features
- *
- * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
- *    family have OS-level control over the I/O chain clock.  This is
- *    to avoid a window during which wakeups could potentially be lost
- *    during powerdomain transitions.  If this bit is set, it
- *    indicates that the chip does support OS-level control of this
- *    feature.
- */
-extern u32 omap_features;
-
-#define OMAP3_HAS_L2CACHE               BIT(0)
-#define OMAP3_HAS_IVA                   BIT(1)
-#define OMAP3_HAS_SGX                   BIT(2)
-#define OMAP3_HAS_NEON                  BIT(3)
-#define OMAP3_HAS_ISP                   BIT(4)
-#define OMAP3_HAS_192MHZ_CLK            BIT(5)
-#define OMAP3_HAS_IO_WAKEUP             BIT(6)
-#define OMAP3_HAS_SDRC                  BIT(7)
-#define OMAP3_HAS_IO_CHAIN_CTRL         BIT(8)
-#define OMAP4_HAS_MPU_1GHZ              BIT(9)
-#define OMAP4_HAS_MPU_1_2GHZ            BIT(10)
-#define OMAP4_HAS_MPU_1_5GHZ            BIT(11)
-
-
-#define OMAP3_HAS_FEATURE(feat,flag)                    \
-static inline unsigned int omap3_has_ ##feat(void)      \
-{                                                       \
-        return omap_features & OMAP3_HAS_ ##flag;       \
-}                                                       \
-
-OMAP3_HAS_FEATURE(l2cache, L2CACHE)
-OMAP3_HAS_FEATURE(sgx, SGX)
-OMAP3_HAS_FEATURE(iva, IVA)
-OMAP3_HAS_FEATURE(neon, NEON)
-OMAP3_HAS_FEATURE(isp, ISP)
-OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
-OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
-OMAP3_HAS_FEATURE(sdrc, SDRC)
-OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
-
-/*
- * Runtime detection of OMAP4 features
- */
-#define OMAP4_HAS_FEATURE(feat, flag)                   \
-static inline unsigned int omap4_has_ ##feat(void)      \
-{                                                       \
-        return omap_features & OMAP4_HAS_ ##flag;       \
-}                                                       \
-
-OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
-OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
-OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
-
-#endif  /* __ASSEMBLY__ */
 #endif
diff --git a/arch/arm/mach-omap2/debug-devices.h b/arch/arm/plat-omap/include/plat/debug-devices.h
index a4edbd2f7484..8fc4287222dd 100644
--- a/arch/arm/mach-omap2/debug-devices.h
+++ b/arch/arm/plat-omap/include/plat/debug-devices.h
@@ -1,9 +1,2 @@
-#ifndef _OMAP_DEBUG_DEVICES_H
-#define _OMAP_DEBUG_DEVICES_H
-
-#include <linux/types.h>
-
 /* for TI reference platforms sharing the same debug card */
 extern int debug_card_init(u32 addr, unsigned gpio);
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/dma-44xx.h b/arch/arm/plat-omap/include/plat/dma-44xx.h
deleted file mode 100644
index 1f767cb2f38a..000000000000
--- a/arch/arm/plat-omap/include/plat/dma-44xx.h
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * OMAP4 SDMA channel definitions
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- * Copyright (C) 2009-2010 Nokia Corporation
- *
- * Santosh Shilimkar (santosh.shilimkar@ti.com)
- * Benoit Cousson (b-cousson@ti.com)
- * Paul Walmsley (paul@pwsan.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
-#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
-
-#define OMAP44XX_DMA_SYS_REQ0                   2
-#define OMAP44XX_DMA_SYS_REQ1                   3
-#define OMAP44XX_DMA_GPMC                       4
-#define OMAP44XX_DMA_DSS_DISPC_REQ              6
-#define OMAP44XX_DMA_SYS_REQ2                   7
-#define OMAP44XX_DMA_MCASP1_AXEVT               8
-#define OMAP44XX_DMA_ISS_REQ1                   9
-#define OMAP44XX_DMA_ISS_REQ2                   10
-#define OMAP44XX_DMA_MCASP1_AREVT               11
-#define OMAP44XX_DMA_ISS_REQ3                   12
-#define OMAP44XX_DMA_ISS_REQ4                   13
-#define OMAP44XX_DMA_DSS_RFBI_REQ               14
-#define OMAP44XX_DMA_SPI3_TX0                   15
-#define OMAP44XX_DMA_SPI3_RX0                   16
-#define OMAP44XX_DMA_MCBSP2_TX                  17
-#define OMAP44XX_DMA_MCBSP2_RX                  18
-#define OMAP44XX_DMA_MCBSP3_TX                  19
-#define OMAP44XX_DMA_MCBSP3_RX                  20
-#define OMAP44XX_DMA_C2C_SSCM_GPO0              21
-#define OMAP44XX_DMA_C2C_SSCM_GPO1              22
-#define OMAP44XX_DMA_SPI3_TX1                   23
-#define OMAP44XX_DMA_SPI3_RX1                   24
-#define OMAP44XX_DMA_I2C3_TX                    25
-#define OMAP44XX_DMA_I2C3_RX                    26
-#define OMAP44XX_DMA_I2C1_TX                    27
-#define OMAP44XX_DMA_I2C1_RX                    28
-#define OMAP44XX_DMA_I2C2_TX                    29
-#define OMAP44XX_DMA_I2C2_RX                    30
-#define OMAP44XX_DMA_MCBSP4_TX                  31
-#define OMAP44XX_DMA_MCBSP4_RX                  32
-#define OMAP44XX_DMA_MCBSP1_TX                  33
-#define OMAP44XX_DMA_MCBSP1_RX                  34
-#define OMAP44XX_DMA_SPI1_TX0                   35
-#define OMAP44XX_DMA_SPI1_RX0                   36
-#define OMAP44XX_DMA_SPI1_TX1                   37
-#define OMAP44XX_DMA_SPI1_RX1                   38
-#define OMAP44XX_DMA_SPI1_TX2                   39
-#define OMAP44XX_DMA_SPI1_RX2                   40
-#define OMAP44XX_DMA_SPI1_TX3                   41
-#define OMAP44XX_DMA_SPI1_RX3                   42
-#define OMAP44XX_DMA_SPI2_TX0                   43
-#define OMAP44XX_DMA_SPI2_RX0                   44
-#define OMAP44XX_DMA_SPI2_TX1                   45
-#define OMAP44XX_DMA_SPI2_RX1                   46
-#define OMAP44XX_DMA_MMC2_TX                    47
-#define OMAP44XX_DMA_MMC2_RX                    48
-#define OMAP44XX_DMA_UART1_TX                   49
-#define OMAP44XX_DMA_UART1_RX                   50
-#define OMAP44XX_DMA_UART2_TX                   51
-#define OMAP44XX_DMA_UART2_RX                   52
-#define OMAP44XX_DMA_UART3_TX                   53
-#define OMAP44XX_DMA_UART3_RX                   54
-#define OMAP44XX_DMA_UART4_TX                   55
-#define OMAP44XX_DMA_UART4_RX                   56
-#define OMAP44XX_DMA_MMC4_TX                    57
-#define OMAP44XX_DMA_MMC4_RX                    58
-#define OMAP44XX_DMA_MMC5_TX                    59
-#define OMAP44XX_DMA_MMC5_RX                    60
-#define OMAP44XX_DMA_MMC1_TX                    61
-#define OMAP44XX_DMA_MMC1_RX                    62
-#define OMAP44XX_DMA_SYS_REQ3                   64
-#define OMAP44XX_DMA_MCPDM_UP                   65
-#define OMAP44XX_DMA_MCPDM_DL                   66
-#define OMAP44XX_DMA_DMIC_REQ                   67
-#define OMAP44XX_DMA_C2C_SSCM_GPO2              68
-#define OMAP44XX_DMA_C2C_SSCM_GPO3              69
-#define OMAP44XX_DMA_SPI4_TX0                   70
-#define OMAP44XX_DMA_SPI4_RX0                   71
-#define OMAP44XX_DMA_DSS_DSI1_REQ0              72
-#define OMAP44XX_DMA_DSS_DSI1_REQ1              73
-#define OMAP44XX_DMA_DSS_DSI1_REQ2              74
-#define OMAP44XX_DMA_DSS_DSI1_REQ3              75
-#define OMAP44XX_DMA_DSS_HDMI_REQ               76
-#define OMAP44XX_DMA_MMC3_TX                    77
-#define OMAP44XX_DMA_MMC3_RX                    78
-#define OMAP44XX_DMA_USIM_TX                    79
-#define OMAP44XX_DMA_USIM_RX                    80
-#define OMAP44XX_DMA_DSS_DSI2_REQ0              81
-#define OMAP44XX_DMA_DSS_DSI2_REQ1              82
-#define OMAP44XX_DMA_DSS_DSI2_REQ2              83
-#define OMAP44XX_DMA_DSS_DSI2_REQ3              84
-#define OMAP44XX_DMA_SLIMBUS1_TX0               85
-#define OMAP44XX_DMA_SLIMBUS1_TX1               86
-#define OMAP44XX_DMA_SLIMBUS1_TX2               87
-#define OMAP44XX_DMA_SLIMBUS1_TX3               88
-#define OMAP44XX_DMA_SLIMBUS1_RX0               89
-#define OMAP44XX_DMA_SLIMBUS1_RX1               90
-#define OMAP44XX_DMA_SLIMBUS1_RX2               91
-#define OMAP44XX_DMA_SLIMBUS1_RX3               92
-#define OMAP44XX_DMA_SLIMBUS2_TX0               93
-#define OMAP44XX_DMA_SLIMBUS2_TX1               94
-#define OMAP44XX_DMA_SLIMBUS2_TX2               95
-#define OMAP44XX_DMA_SLIMBUS2_TX3               96
-#define OMAP44XX_DMA_SLIMBUS2_RX0               97
-#define OMAP44XX_DMA_SLIMBUS2_RX1               98
-#define OMAP44XX_DMA_SLIMBUS2_RX2               99
-#define OMAP44XX_DMA_SLIMBUS2_RX3               100
-#define OMAP44XX_DMA_ABE_REQ_0                  101
-#define OMAP44XX_DMA_ABE_REQ_1                  102
-#define OMAP44XX_DMA_ABE_REQ_2                  103
-#define OMAP44XX_DMA_ABE_REQ_3                  104
-#define OMAP44XX_DMA_ABE_REQ_4                  105
-#define OMAP44XX_DMA_ABE_REQ_5                  106
-#define OMAP44XX_DMA_ABE_REQ_6                  107
-#define OMAP44XX_DMA_ABE_REQ_7                  108
-#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ          109
-#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ         110
-#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ        111
-#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ          112
-#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ         113
-#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ        114
-#define OMAP44XX_DMA_DES_P_CTX_IN_REQ           115
-#define OMAP44XX_DMA_DES_P_DATA_IN_REQ          116
-#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ         117
-#define OMAP44XX_DMA_SHA2_CTXIN_P               118
-#define OMAP44XX_DMA_SHA2_DIN_P                 119
-#define OMAP44XX_DMA_SHA2_CTXOUT_P              120
-#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ     121
-#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ     122
-#define OMAP44XX_DMA_I2C4_TX                    124
-#define OMAP44XX_DMA_I2C4_RX                    125
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 85868e98c11c..a3fbc48c332e 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -32,7 +32,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>
@@ -55,6 +54,10 @@
 #define OMAP_TIMER_TRIGGER_OVERFLOW             0x01
 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
 
+/* posted mode types */
+#define OMAP_TIMER_NONPOSTED                    0x00
+#define OMAP_TIMER_POSTED                       0x01
+
 /* timer capabilities used in hwmod database */
 #define OMAP_TIMER_SECURE                               0x80000000
 #define OMAP_TIMER_ALWON                                0x40000000
@@ -62,16 +65,22 @@
 #define OMAP_TIMER_NEEDS_RESET                          0x10000000
 #define OMAP_TIMER_HAS_DSP_IRQ                          0x08000000
 
+/*
+ * timer errata flags
+ *
+ * Errata i103/i767 impacts all OMAP3/4/5 devices including AM33xx. This
+ * errata prevents us from using posted mode on these devices, unless the
+ * timer counter register is never read. For more details please refer to
+ * the OMAP3/4/5 errata documents.
+ */
+#define OMAP_TIMER_ERRATA_I103_I767                     0x80000000
+
 struct omap_timer_capability_dev_attr {
         u32 timer_capability;
 };
 
-struct omap_dm_timer;
-
 struct timer_regs {
         u32 tidr;
-        u32 tistat;
-        u32 tisr;
         u32 tier;
         u32 twer;
         u32 tclr;
@@ -90,15 +99,35 @@ struct timer_regs {
         u32 towr;
 };
 
-struct dmtimer_platform_data {
-        /* set_timer_src - Only used for OMAP1 devices */
-        int (*set_timer_src)(struct platform_device *pdev, int source);
-        u32 timer_capability;
+struct omap_dm_timer {
+        int id;
+        int irq;
+        struct clk *fclk;
+
+        void __iomem    *io_base;
+        void __iomem    *irq_stat;      /* TISR/IRQSTATUS interrupt status */
+        void __iomem    *irq_ena;       /* irq enable */
+        void __iomem    *irq_dis;       /* irq disable, only on v2 ip */
+        void __iomem    *pend;          /* write pending */
+        void __iomem    *func_base;     /* function register base */
+
+        unsigned long rate;
+        unsigned reserved:1;
+        unsigned posted:1;
+        struct timer_regs context;
+        int (*get_context_loss_count)(struct device *);
+        int ctx_loss_count;
+        int revision;
+        u32 capability;
+        u32 errata;
+        struct platform_device *pdev;
+        struct list_head node;
 };
 
 int omap_dm_timer_reserve_systimer(int id);
 struct omap_dm_timer *omap_dm_timer_request(void);
 struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
+struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap);
 int omap_dm_timer_free(struct omap_dm_timer *timer);
 void omap_dm_timer_enable(struct omap_dm_timer *timer);
 void omap_dm_timer_disable(struct omap_dm_timer *timer);
@@ -120,6 +149,7 @@ int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, i
 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
 
 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask);
 
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
@@ -245,33 +275,6 @@ int omap_dm_timers_active(void);
 #define OMAP_TIMER_TICK_INT_MASK_COUNT_REG                              \
                 (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT))
 
-struct omap_dm_timer {
-        unsigned long phys_base;
-        int id;
-        int irq;
-        struct clk *fclk;
-
-        void __iomem    *io_base;
-        void __iomem    *sys_stat;      /* TISTAT timer status */
-        void __iomem    *irq_stat;      /* TISR/IRQSTATUS interrupt status */
-        void __iomem    *irq_ena;       /* irq enable */
-        void __iomem    *irq_dis;       /* irq disable, only on v2 ip */
-        void __iomem    *pend;          /* write pending */
-        void __iomem    *func_base;     /* function register base */
-
-        unsigned long rate;
-        unsigned reserved:1;
-        unsigned posted:1;
-        struct timer_regs context;
-        int ctx_loss_count;
-        int revision;
-        u32 capability;
-        struct platform_device *pdev;
-        struct list_head node;
-};
-
-int omap_dm_timer_prepare(struct omap_dm_timer *timer);
-
 static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
                                                 int posted)
 {
@@ -300,16 +303,13 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
         tidr = __raw_readl(timer->io_base);
         if (!(tidr >> 16)) {
                 timer->revision = 1;
-                timer->sys_stat = timer->io_base +
-                                OMAP_TIMER_V1_SYS_STAT_OFFSET;
                 timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;
                 timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
-                timer->irq_dis = NULL;
+                timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
                 timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;
                 timer->func_base = timer->io_base;
         } else {
                 timer->revision = 2;
-                timer->sys_stat = NULL;
                 timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS;
                 timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET;
                 timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR;
@@ -320,45 +320,44 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
         }
 }
 
-/* Assumes the source clock has been set by caller */
-static inline void __omap_dm_timer_reset(struct omap_dm_timer *timer,
-                                        int autoidle, int wakeup)
+/*
+ * __omap_dm_timer_enable_posted - enables write posted mode
+ * @timer:      pointer to timer instance handle
+ *
+ * Enables the write posted mode for the timer. When posted mode is enabled
+ * writes to certain timer registers are immediately acknowledged by the
+ * internal bus and hence prevents stalling the CPU waiting for the write to
+ * complete. Enabling this feature can improve performance for writing to the
+ * timer registers.
+ */
+static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
 {
-        u32 l;
+        if (timer->posted)
+                return;
 
-        l = __raw_readl(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
-        l |= 0x02 << 3;  /* Set to smart-idle mode */
-        l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
+        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767)
+                return;
 
-        if (autoidle)
-                l |= 0x1 << 0;
-
-        if (wakeup)
-                l |= 1 << 2;
-
-        __raw_writel(l, timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
-
-        /* Match hardware reset default of posted mode */
         __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
-                                        OMAP_TIMER_CTRL_POSTED, 0);
+                              OMAP_TIMER_CTRL_POSTED, 0);
+        timer->context.tsicr = OMAP_TIMER_CTRL_POSTED;
+        timer->posted = OMAP_TIMER_POSTED;
 }
 
-static inline int __omap_dm_timer_set_source(struct clk *timer_fck,
-                                                struct clk *parent)
+/**
+ * __omap_dm_timer_override_errata - override errata flags for a timer
+ * @timer:      pointer to timer handle
+ * @errata:     errata flags to be ignored
+ *
+ * For a given timer, override a timer errata by clearing the flags
+ * specified by the errata argument. A specific erratum should only be
+ * overridden for a timer if the timer is used in such a way the erratum
+ * has no impact.
+ */
+static inline void __omap_dm_timer_override_errata(struct omap_dm_timer *timer,
+                                                   u32 errata)
 {
-        int ret;
-
-        clk_disable(timer_fck);
-        ret = clk_set_parent(timer_fck, parent);
-        clk_enable(timer_fck);
-
-        /*
-         * When the functional clock disappears, too quick writes seem
-         * to cause an abort. XXX Is this still necessary?
-         */
-        __delay(300000);
-
-        return ret;
+        timer->errata &= ~errata;
 }
 
 static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
diff --git a/arch/arm/plat-omap/include/plat/fpga.h b/arch/arm/plat-omap/include/plat/fpga.h
deleted file mode 100644
index bd3c6324ae1f..000000000000
--- a/arch/arm/plat-omap/include/plat/fpga.h
+++ /dev/null
@@ -1,193 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/fpga.h
- *
- * Interrupt handler for OMAP-1510 FPGA
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * Copyright (C) 2002 MontaVista Software, Inc.
- *
- * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
- * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_OMAP_FPGA_H
-#define __ASM_ARCH_OMAP_FPGA_H
-
-extern void omap1510_fpga_init_irq(void);
-
-#define fpga_read(reg)                  __raw_readb(reg)
-#define fpga_write(val, reg)            __raw_writeb(val, reg)
-
-/*
- * ---------------------------------------------------------------------------
- *  H2/P2 Debug board FPGA
- * ---------------------------------------------------------------------------
- */
-/* maps in the FPGA registers and the ETHR registers */
-#define H2P2_DBG_FPGA_BASE              0xE8000000              /* VA */
-#define H2P2_DBG_FPGA_SIZE              SZ_4K                   /* SIZE */
-#define H2P2_DBG_FPGA_START             0x04000000              /* PA */
-
-#define H2P2_DBG_FPGA_ETHR_START        (H2P2_DBG_FPGA_START + 0x300)
-#define H2P2_DBG_FPGA_FPGA_REV          IOMEM(H2P2_DBG_FPGA_BASE + 0x10)        /* FPGA Revision */
-#define H2P2_DBG_FPGA_BOARD_REV         IOMEM(H2P2_DBG_FPGA_BASE + 0x12)        /* Board Revision */
-#define H2P2_DBG_FPGA_GPIO              IOMEM(H2P2_DBG_FPGA_BASE + 0x14)        /* GPIO outputs */
-#define H2P2_DBG_FPGA_LEDS              IOMEM(H2P2_DBG_FPGA_BASE + 0x16)        /* LEDs outputs */
-#define H2P2_DBG_FPGA_MISC_INPUTS       IOMEM(H2P2_DBG_FPGA_BASE + 0x18)        /* Misc inputs */
-#define H2P2_DBG_FPGA_LAN_STATUS        IOMEM(H2P2_DBG_FPGA_BASE + 0x1A)        /* LAN Status line */
-#define H2P2_DBG_FPGA_LAN_RESET         IOMEM(H2P2_DBG_FPGA_BASE + 0x1C)        /* LAN Reset line */
-
-/* NOTE:  most boards don't have a static mapping for the FPGA ... */
-struct h2p2_dbg_fpga {
-        /* offset 0x00 */
-        u16             smc91x[8];
-        /* offset 0x10 */
-        u16             fpga_rev;
-        u16             board_rev;
-        u16             gpio_outputs;
-        u16             leds;
-        /* offset 0x18 */
-        u16             misc_inputs;
-        u16             lan_status;
-        u16             lan_reset;
-        u16             reserved0;
-        /* offset 0x20 */
-        u16             ps2_data;
-        u16             ps2_ctrl;
-        /* plus also 4 rs232 ports ... */
-};
-
-/* LEDs definition on debug board (16 LEDs, all physically green) */
-#define H2P2_DBG_FPGA_LED_GREEN         (1 << 15)
-#define H2P2_DBG_FPGA_LED_AMBER         (1 << 14)
-#define H2P2_DBG_FPGA_LED_RED           (1 << 13)
-#define H2P2_DBG_FPGA_LED_BLUE          (1 << 12)
-/*  cpu0 load-meter LEDs */
-#define H2P2_DBG_FPGA_LOAD_METER        (1 << 0)        // A bit of fun on our board ...
-#define H2P2_DBG_FPGA_LOAD_METER_SIZE   11
-#define H2P2_DBG_FPGA_LOAD_METER_MASK   ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
-
-#define H2P2_DBG_FPGA_P2_LED_TIMER              (1 << 0)
-#define H2P2_DBG_FPGA_P2_LED_IDLE               (1 << 1)
-
-/*
- * ---------------------------------------------------------------------------
- *  OMAP-1510 FPGA
- * ---------------------------------------------------------------------------
- */
-#define OMAP1510_FPGA_BASE              0xE8000000              /* VA */
-#define OMAP1510_FPGA_SIZE              SZ_4K
-#define OMAP1510_FPGA_START             0x08000000              /* PA */
-
-/* Revision */
-#define OMAP1510_FPGA_REV_LOW                   IOMEM(OMAP1510_FPGA_BASE + 0x0)
-#define OMAP1510_FPGA_REV_HIGH                  IOMEM(OMAP1510_FPGA_BASE + 0x1)
-
-#define OMAP1510_FPGA_LCD_PANEL_CONTROL         IOMEM(OMAP1510_FPGA_BASE + 0x2)
-#define OMAP1510_FPGA_LED_DIGIT                 IOMEM(OMAP1510_FPGA_BASE + 0x3)
-#define INNOVATOR_FPGA_HID_SPI                  IOMEM(OMAP1510_FPGA_BASE + 0x4)
-#define OMAP1510_FPGA_POWER                     IOMEM(OMAP1510_FPGA_BASE + 0x5)
-
-/* Interrupt status */
-#define OMAP1510_FPGA_ISR_LO                    IOMEM(OMAP1510_FPGA_BASE + 0x6)
-#define OMAP1510_FPGA_ISR_HI                    IOMEM(OMAP1510_FPGA_BASE + 0x7)
-
-/* Interrupt mask */
-#define OMAP1510_FPGA_IMR_LO                    IOMEM(OMAP1510_FPGA_BASE + 0x8)
-#define OMAP1510_FPGA_IMR_HI                    IOMEM(OMAP1510_FPGA_BASE + 0x9)
-
-/* Reset registers */
-#define OMAP1510_FPGA_HOST_RESET                IOMEM(OMAP1510_FPGA_BASE + 0xa)
-#define OMAP1510_FPGA_RST                       IOMEM(OMAP1510_FPGA_BASE + 0xb)
-
-#define OMAP1510_FPGA_AUDIO                     IOMEM(OMAP1510_FPGA_BASE + 0xc)
-#define OMAP1510_FPGA_DIP                       IOMEM(OMAP1510_FPGA_BASE + 0xe)
-#define OMAP1510_FPGA_FPGA_IO                   IOMEM(OMAP1510_FPGA_BASE + 0xf)
-#define OMAP1510_FPGA_UART1                     IOMEM(OMAP1510_FPGA_BASE + 0x14)
-#define OMAP1510_FPGA_UART2                     IOMEM(OMAP1510_FPGA_BASE + 0x15)
-#define OMAP1510_FPGA_OMAP1510_STATUS           IOMEM(OMAP1510_FPGA_BASE + 0x16)
-#define OMAP1510_FPGA_BOARD_REV                 IOMEM(OMAP1510_FPGA_BASE + 0x18)
-#define OMAP1510P1_PPT_DATA                     IOMEM(OMAP1510_FPGA_BASE + 0x100)
-#define OMAP1510P1_PPT_STATUS                   IOMEM(OMAP1510_FPGA_BASE + 0x101)
-#define OMAP1510P1_PPT_CONTROL                  IOMEM(OMAP1510_FPGA_BASE + 0x102)
-
-#define OMAP1510_FPGA_TOUCHSCREEN               IOMEM(OMAP1510_FPGA_BASE + 0x204)
-
-#define INNOVATOR_FPGA_INFO                     IOMEM(OMAP1510_FPGA_BASE + 0x205)
-#define INNOVATOR_FPGA_LCD_BRIGHT_LO            IOMEM(OMAP1510_FPGA_BASE + 0x206)
-#define INNOVATOR_FPGA_LCD_BRIGHT_HI            IOMEM(OMAP1510_FPGA_BASE + 0x207)
-#define INNOVATOR_FPGA_LED_GRN_LO               IOMEM(OMAP1510_FPGA_BASE + 0x208)
-#define INNOVATOR_FPGA_LED_GRN_HI               IOMEM(OMAP1510_FPGA_BASE + 0x209)
-#define INNOVATOR_FPGA_LED_RED_LO               IOMEM(OMAP1510_FPGA_BASE + 0x20a)
-#define INNOVATOR_FPGA_LED_RED_HI               IOMEM(OMAP1510_FPGA_BASE + 0x20b)
-#define INNOVATOR_FPGA_CAM_USB_CONTROL          IOMEM(OMAP1510_FPGA_BASE + 0x20c)
-#define INNOVATOR_FPGA_EXP_CONTROL              IOMEM(OMAP1510_FPGA_BASE + 0x20d)
-#define INNOVATOR_FPGA_ISR2                     IOMEM(OMAP1510_FPGA_BASE + 0x20e)
-#define INNOVATOR_FPGA_IMR2                     IOMEM(OMAP1510_FPGA_BASE + 0x210)
-
-#define OMAP1510_FPGA_ETHR_START                (OMAP1510_FPGA_START + 0x300)
-
-/*
- * Power up Giga UART driver, turn on HID clock.
- * Turn off BT power, since we're not using it and it
- * draws power.
- */
-#define OMAP1510_FPGA_RESET_VALUE               0x42
-
-#define OMAP1510_FPGA_PCR_IF_PD0                (1 << 7)
-#define OMAP1510_FPGA_PCR_COM2_EN               (1 << 6)
-#define OMAP1510_FPGA_PCR_COM1_EN               (1 << 5)
-#define OMAP1510_FPGA_PCR_EXP_PD0               (1 << 4)
-#define OMAP1510_FPGA_PCR_EXP_PD1               (1 << 3)
-#define OMAP1510_FPGA_PCR_48MHZ_CLK             (1 << 2)
-#define OMAP1510_FPGA_PCR_4MHZ_CLK              (1 << 1)
-#define OMAP1510_FPGA_PCR_RSRVD_BIT0            (1 << 0)
-
-/*
- * Innovator/OMAP1510 FPGA HID register bit definitions
- */
-#define OMAP1510_FPGA_HID_SCLK  (1<<0)  /* output */
-#define OMAP1510_FPGA_HID_MOSI  (1<<1)  /* output */
-#define OMAP1510_FPGA_HID_nSS   (1<<2)  /* output 0/1 chip idle/select */
-#define OMAP1510_FPGA_HID_nHSUS (1<<3)  /* output 0/1 host active/suspended */
-#define OMAP1510_FPGA_HID_MISO  (1<<4)  /* input */
-#define OMAP1510_FPGA_HID_ATN   (1<<5)  /* input  0/1 chip idle/ATN */
-#define OMAP1510_FPGA_HID_rsrvd (1<<6)
-#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */
-
-/* The FPGA IRQ is cascaded through GPIO_13 */
-#define OMAP1510_INT_FPGA               (IH_GPIO_BASE + 13)
-
-/* IRQ Numbers for interrupts muxed through the FPGA */
-#define OMAP1510_INT_FPGA_ATN           (OMAP_FPGA_IRQ_BASE + 0)
-#define OMAP1510_INT_FPGA_ACK           (OMAP_FPGA_IRQ_BASE + 1)
-#define OMAP1510_INT_FPGA2              (OMAP_FPGA_IRQ_BASE + 2)
-#define OMAP1510_INT_FPGA3              (OMAP_FPGA_IRQ_BASE + 3)
-#define OMAP1510_INT_FPGA4              (OMAP_FPGA_IRQ_BASE + 4)
-#define OMAP1510_INT_FPGA5              (OMAP_FPGA_IRQ_BASE + 5)
-#define OMAP1510_INT_FPGA6              (OMAP_FPGA_IRQ_BASE + 6)
-#define OMAP1510_INT_FPGA7              (OMAP_FPGA_IRQ_BASE + 7)
-#define OMAP1510_INT_FPGA8              (OMAP_FPGA_IRQ_BASE + 8)
-#define OMAP1510_INT_FPGA9              (OMAP_FPGA_IRQ_BASE + 9)
-#define OMAP1510_INT_FPGA10             (OMAP_FPGA_IRQ_BASE + 10)
-#define OMAP1510_INT_FPGA11             (OMAP_FPGA_IRQ_BASE + 11)
-#define OMAP1510_INT_FPGA12             (OMAP_FPGA_IRQ_BASE + 12)
-#define OMAP1510_INT_ETHER              (OMAP_FPGA_IRQ_BASE + 13)
-#define OMAP1510_INT_FPGAUART1          (OMAP_FPGA_IRQ_BASE + 14)
-#define OMAP1510_INT_FPGAUART2          (OMAP_FPGA_IRQ_BASE + 15)
-#define OMAP1510_INT_FPGA_TS            (OMAP_FPGA_IRQ_BASE + 16)
-#define OMAP1510_INT_FPGA17             (OMAP_FPGA_IRQ_BASE + 17)
-#define OMAP1510_INT_FPGA_CAM           (OMAP_FPGA_IRQ_BASE + 18)
-#define OMAP1510_INT_FPGA_RTC_A         (OMAP_FPGA_IRQ_BASE + 19)
-#define OMAP1510_INT_FPGA_RTC_B         (OMAP_FPGA_IRQ_BASE + 20)
-#define OMAP1510_INT_FPGA_CD            (OMAP_FPGA_IRQ_BASE + 21)
-#define OMAP1510_INT_FPGA22             (OMAP_FPGA_IRQ_BASE + 22)
-#define OMAP1510_INT_FPGA23             (OMAP_FPGA_IRQ_BASE + 23)
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h
index 7c22b9e10dc3..7a9028cb5a75 100644
--- a/arch/arm/plat-omap/include/plat/i2c.h
+++ b/arch/arm/plat-omap/include/plat/i2c.h
@@ -18,11 +18,15 @@
  * 02110-1301 USA
  *
  */
-#ifndef __ASM__ARCH_OMAP_I2C_H
-#define __ASM__ARCH_OMAP_I2C_H
 
-#include <linux/i2c.h>
-#include <linux/i2c-omap.h>
+#ifndef __PLAT_OMAP_I2C_H
+#define __PLAT_OMAP_I2C_H
+
+struct i2c_board_info;
+struct omap_i2c_bus_platform_data;
+
+int omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
+                        int bus_id);
 
 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
@@ -37,23 +41,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
 }
 #endif
 
-/**
- * i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
- * @fifo_depth: total controller FIFO size (in bytes)
- * @flags: differences in hardware support capability
- *
- * @fifo_depth represents what exists on the hardware, not what is
- * actually configured at runtime by the device driver.
- */
-struct omap_i2c_dev_attr {
-        u8      fifo_depth;
-        u32     flags;
-};
-
-void __init omap1_i2c_mux_pins(int bus_id);
-void __init omap2_i2c_mux_pins(int bus_id);
-
 struct omap_hwmod;
 int omap_i2c_reset(struct omap_hwmod *oh);
 
-#endif /* __ASM__ARCH_OMAP_I2C_H */
+#endif /* __PLAT_OMAP_I2C_H */
diff --git a/arch/arm/plat-omap/include/plat/multi.h b/arch/arm/plat-omap/include/plat/multi.h
deleted file mode 100644
index 324d31b14852..000000000000
--- a/arch/arm/plat-omap/include/plat/multi.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Support for compiling in multiple OMAP processors
- *
- * Copyright (C) 2010 Nokia Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#ifndef __PLAT_OMAP_MULTI_H
-#define __PLAT_OMAP_MULTI_H
-
-/*
- * Test if multicore OMAP support is needed
- */
-#undef MULTI_OMAP1
-#undef MULTI_OMAP2
-#undef OMAP_NAME
-
-#ifdef CONFIG_ARCH_OMAP730
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap730
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP850
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap850
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap1510
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP1
-#  define MULTI_OMAP1
-# else
-#  define OMAP_NAME omap16xx
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
-# if (defined(OMAP_NAME) || defined(MULTI_OMAP1))
-#  error "OMAP1 and OMAP2PLUS can't be selected at the same time"
-# endif
-#endif
-#ifdef CONFIG_SOC_OMAP2420
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP2
-#  define MULTI_OMAP2
-# else
-#  define OMAP_NAME omap2420
-# endif
-#endif
-#ifdef CONFIG_SOC_OMAP2430
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP2
-#  define MULTI_OMAP2
-# else
-#  define OMAP_NAME omap2430
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP3
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP2
-#  define MULTI_OMAP2
-# else
-#  define OMAP_NAME omap3
-# endif
-#endif
-#ifdef CONFIG_ARCH_OMAP4
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP2
-#  define MULTI_OMAP2
-# else
-#  define OMAP_NAME omap4
-# endif
-#endif
-
-#ifdef CONFIG_SOC_OMAP5
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP2
-#  define MULTI_OMAP2
-# else
-#  define OMAP_NAME omap5
-# endif
-#endif
-
-#ifdef CONFIG_SOC_AM33XX
-# ifdef OMAP_NAME
-#  undef  MULTI_OMAP2
-#  define MULTI_OMAP2
-# else
-#  define OMAP_NAME am33xx
-# endif
-#endif
-
-#endif  /* __PLAT_OMAP_MULTI_H */
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
deleted file mode 100644
index 0e4acd2d2deb..000000000000
--- a/arch/arm/plat-omap/include/plat/omap-secure.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __OMAP_SECURE_H__
-#define __OMAP_SECURE_H__
-
-#include <linux/types.h>
-
-extern int omap_secure_ram_reserve_memblock(void);
-
-#ifdef CONFIG_OMAP4_ERRATA_I688
-extern int omap_barrier_reserve_memblock(void);
-#else
-static inline void omap_barrier_reserve_memblock(void)
-{ }
-#endif
-#endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h
deleted file mode 100644
index 267f43bb2a4e..000000000000
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/prcm.h
- *
- * Access definations for use in OMAP24XX clock and power management
- *
- * Copyright (C) 2005 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * XXX This file is deprecated.  The PRCM is an OMAP2+-only subsystem,
- * so this file doesn't belong in plat-omap/include/plat.  Please
- * do not add anything new to this file.
- */
-
-#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H
-#define __ASM_ARM_ARCH_OMAP_PRCM_H
-
-u32 omap_prcm_get_reset_sources(void);
-int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
-                         const char *name);
-
-#endif
-
-
-
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
deleted file mode 100644
index 36d6a7666216..000000000000
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ /dev/null
@@ -1,164 +0,0 @@
-#ifndef ____ASM_ARCH_SDRC_H
-#define ____ASM_ARCH_SDRC_H
-
-/*
- * OMAP2/3 SDRC/SMS register definitions
- *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
- * Copyright (C) 2007-2008 Nokia Corporation
- *
- * Tony Lindgren
- * Paul Walmsley
- * Richard Woodruff
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-
-/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
-
-#define SDRC_SYSCONFIG          0x010
-#define SDRC_CS_CFG             0x040
-#define SDRC_SHARING            0x044
-#define SDRC_ERR_TYPE           0x04C
-#define SDRC_DLLA_CTRL          0x060
-#define SDRC_DLLA_STATUS        0x064
-#define SDRC_DLLB_CTRL          0x068
-#define SDRC_DLLB_STATUS        0x06C
-#define SDRC_POWER              0x070
-#define SDRC_MCFG_0             0x080
-#define SDRC_MR_0               0x084
-#define SDRC_EMR2_0             0x08c
-#define SDRC_ACTIM_CTRL_A_0     0x09c
-#define SDRC_ACTIM_CTRL_B_0     0x0a0
-#define SDRC_RFR_CTRL_0         0x0a4
-#define SDRC_MANUAL_0           0x0a8
-#define SDRC_MCFG_1             0x0B0
-#define SDRC_MR_1               0x0B4
-#define SDRC_EMR2_1             0x0BC
-#define SDRC_ACTIM_CTRL_A_1     0x0C4
-#define SDRC_ACTIM_CTRL_B_1     0x0C8
-#define SDRC_RFR_CTRL_1         0x0D4
-#define SDRC_MANUAL_1           0x0D8
-
-#define SDRC_POWER_AUTOCOUNT_SHIFT      8
-#define SDRC_POWER_AUTOCOUNT_MASK       (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT)
-#define SDRC_POWER_CLKCTRL_SHIFT        4
-#define SDRC_POWER_CLKCTRL_MASK         (0x3 << SDRC_POWER_CLKCTRL_SHIFT)
-#define SDRC_SELF_REFRESH_ON_AUTOCOUNT  (0x2 << SDRC_POWER_CLKCTRL_SHIFT)
-
-/*
- * These values represent the number of memory clock cycles between
- * autorefresh initiation.  They assume 1 refresh per 64 ms (JEDEC), 8192
- * rows per device, and include a subtraction of a 50 cycle window in the
- * event that the autorefresh command is delayed due to other SDRC activity.
- * The '| 1' sets the ARE field to send one autorefresh when the autorefresh
- * counter reaches 0.
- *
- * These represent optimal values for common parts, it won't work for all.
- * As long as you scale down, most parameters are still work, they just
- * become sub-optimal. The RFR value goes in the opposite direction. If you
- * don't adjust it down as your clock period increases the refresh interval
- * will not be met. Setting all parameters for complete worst case may work,
- * but may cut memory performance by 2x. Due to errata the DLLs need to be
- * unlocked and their value needs run time calibration. A dynamic call is
- * need for that as no single right value exists acorss production samples.
- *
- * Only the FULL speed values are given. Current code is such that rate
- * changes must be made at DPLLoutx2. The actual value adjustment for low
- * frequency operation will be handled by omap_set_performance()
- *
- * By having the boot loader boot up in the fastest L4 speed available likely
- * will result in something which you can switch between.
- */
-#define SDRC_RFR_CTRL_165MHz    (0x00044c00 | 1)
-#define SDRC_RFR_CTRL_133MHz    (0x0003de00 | 1)
-#define SDRC_RFR_CTRL_100MHz    (0x0002da01 | 1)
-#define SDRC_RFR_CTRL_110MHz    (0x0002da01 | 1) /* Need to calc */
-#define SDRC_RFR_CTRL_BYPASS    (0x00005000 | 1) /* Need to calc */
-
-
-/*
- * SMS register access
- */
-
-#define OMAP242X_SMS_REGADDR(reg)                                       \
-                (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
-#define OMAP243X_SMS_REGADDR(reg)                                       \
-                (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
-#define OMAP343X_SMS_REGADDR(reg)                                       \
-                (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
-
-/* SMS register offsets - read/write with sms_{read,write}_reg() */
-
-#define SMS_SYSCONFIG                   0x010
-#define SMS_ROT_CONTROL(context)        (0x180 + 0x10 * context)
-#define SMS_ROT_SIZE(context)           (0x184 + 0x10 * context)
-#define SMS_ROT_PHYSICAL_BA(context)    (0x188 + 0x10 * context)
-/* REVISIT: fill in other SMS registers here */
-
-
-#ifndef __ASSEMBLER__
-
-/**
- * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate
- * @rate: SDRC clock rate (in Hz)
- * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate
- * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate
- * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate
- * @mr: Value to program to SDRC_MR for this rate
- *
- * This structure holds a pre-computed set of register values for the
- * SDRC for a given SDRC clock rate and SDRAM chip.  These are
- * intended to be pre-computed and specified in an array in the board-*.c
- * files.  The structure is keyed off the 'rate' field.
- */
-struct omap_sdrc_params {
-        unsigned long rate;
-        u32 actim_ctrla;
-        u32 actim_ctrlb;
-        u32 rfr_ctrl;
-        u32 mr;
-};
-
-#ifdef CONFIG_SOC_HAS_OMAP2_SDRC
-void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
-                            struct omap_sdrc_params *sdrc_cs1);
-#else
-static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
-                                          struct omap_sdrc_params *sdrc_cs1) {};
-#endif
-
-int omap2_sdrc_get_params(unsigned long r,
-                          struct omap_sdrc_params **sdrc_cs0,
-                          struct omap_sdrc_params **sdrc_cs1);
-void omap2_sms_save_context(void);
-void omap2_sms_restore_context(void);
-
-void omap2_sms_write_rot_control(u32 val, unsigned ctx);
-void omap2_sms_write_rot_size(u32 val, unsigned ctx);
-void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx);
-
-#ifdef CONFIG_ARCH_OMAP2
-
-struct memory_timings {
-        u32 m_type;             /* ddr = 1, sdr = 0 */
-        u32 dll_mode;           /* use lock mode = 1, unlock mode = 0 */
-        u32 slow_dll_ctrl;      /* unlock mode, dll value for slow speed */
-        u32 fast_dll_ctrl;      /* unlock mode, dll value for fast speed */
-        u32 base_cs;            /* base chip select to use for calculations */
-};
-
-extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode);
-struct omap_sdrc_params *rx51_get_sdram_timings(void);
-
-u32 omap2xxx_sdrc_dll_is_unlocked(void);
-u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
-
-#endif  /* CONFIG_ARCH_OMAP2 */
-
-#endif  /* __ASSEMBLER__ */
-
-#endif
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index 227ae2657554..ba4525059a99 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -1,18 +1,8 @@
-/*
- * arch/arm/plat-omap/include/mach/sram.h
- *
- * Interface for functions that need to be run in internal SRAM
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
+int omap_sram_init(void);
 
-#ifndef __ARCH_ARM_OMAP_SRAM_H
-#define __ARCH_ARM_OMAP_SRAM_H
-
-#ifndef __ASSEMBLY__
-#include <asm/fncpy.h>
+void omap_map_sram(unsigned long start, unsigned long size,
+                        unsigned long skip, int cached);
+void omap_sram_reset(void);
 
 extern void *omap_sram_push_address(unsigned long size);
 
@@ -24,82 +14,3 @@ extern void *omap_sram_push_address(unsigned long size);
                 _res = fncpy(_sram_address, &(funcp), size);    \
         _res;                                                   \
 })
-
-extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
-
-extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                                u32 base_cs, u32 force_unlock);
-extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
-                                      u32 mem_type);
-extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
-
-extern u32 omap3_configure_core_dpll(
-                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
-extern void omap3_sram_restore_context(void);
-
-/* Do not use these */
-extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
-extern unsigned long omap1_sram_reprogram_clock_sz;
-
-extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
-extern unsigned long omap24xx_sram_reprogram_clock_sz;
-
-extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                                                u32 base_cs, u32 force_unlock);
-extern unsigned long omap242x_sram_ddr_init_sz;
-
-extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
-                                                int bypass);
-extern unsigned long omap242x_sram_set_prcm_sz;
-
-extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
-                                                u32 mem_type);
-extern unsigned long omap242x_sram_reprogram_sdrc_sz;
-
-
-extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                                                u32 base_cs, u32 force_unlock);
-extern unsigned long omap243x_sram_ddr_init_sz;
-
-extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
-                                                int bypass);
-extern unsigned long omap243x_sram_set_prcm_sz;
-
-extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
-                                                u32 mem_type);
-extern unsigned long omap243x_sram_reprogram_sdrc_sz;
-
-extern u32 omap3_sram_configure_core_dpll(
-                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
-extern unsigned long omap3_sram_configure_core_dpll_sz;
-
-#ifdef CONFIG_PM
-extern void omap_push_sram_idle(void);
-#else
-static inline void omap_push_sram_idle(void) {}
-#endif /* CONFIG_PM */
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * OMAP2+: define the SRAM PA addresses.
- * Used by the SRAM management code and the idle sleep code.
- */
-#define OMAP2_SRAM_PA           0x40200000
-#define OMAP3_SRAM_PA           0x40200000
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PA           0x40304000
-#define OMAP4_SRAM_VA           0xfe404000
-#else
-#define OMAP4_SRAM_PA           0x40300000
-#endif
-#define AM33XX_SRAM_PA          0x40300000
-#endif
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
deleted file mode 100644
index 7f7b112acccb..000000000000
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/uncompress.h
- *
- * Serial port stubs for kernel decompress status messages
- *
- * Initially based on:
- * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * Rewritten by:
- * Author: <source@mvista.com>
- * 2004 (c) MontaVista Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/types.h>
-#include <linux/serial_reg.h>
-
-#include <asm/memory.h>
-#include <asm/mach-types.h>
-
-#include <plat/serial.h>
-
-#define MDR1_MODE_MASK                  0x07
-
-volatile u8 *uart_base;
-int uart_shift;
-
-/*
- * Store the DEBUG_LL uart number into memory.
- * See also debug-macro.S, and serial.c for related code.
- */
-static void set_omap_uart_info(unsigned char port)
-{
-        /*
-         * Get address of some.bss variable and round it down
-         * a la CONFIG_AUTO_ZRELADDR.
-         */
-        u32 ram_start = (u32)&uart_shift & 0xf8000000;
-        u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
-        *uart_info = port;
-}
-
-static void putc(int c)
-{
-        if (!uart_base)
-                return;
-
-        /* Check for UART 16x mode */
-        if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
-                return;
-
-        while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
-                barrier();
-        uart_base[UART_TX << uart_shift] = c;
-}
-
-static inline void flush(void)
-{
-}
-
-/*
- * Macros to configure UART1 and debug UART
- */
-#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id)               \
-        if (machine_is_##mach()) {                                      \
-                uart_base = (volatile u8 *)(dbg_uart);                  \
-                uart_shift = (dbg_shft);                                \
-                port = (dbg_id);                                        \
-                set_omap_uart_info(port);                               \
-                break;                                                  \
-        }
-
-#define DEBUG_LL_OMAP7XX(p, mach)                                       \
-        _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP7XX_PORT_SHIFT, \
-                OMAP1UART##p)
-
-#define DEBUG_LL_OMAP1(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP1_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP1UART##p)
-
-#define DEBUG_LL_OMAP2(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP2UART##p)
-
-#define DEBUG_LL_OMAP3(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP3UART##p)
-
-#define DEBUG_LL_OMAP4(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP4UART##p)
-
-#define DEBUG_LL_OMAP5(p, mach)                                         \
-        _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT,    \
-                OMAP5UART##p)
-/* Zoom2/3 shift is different for UART1 and external port */
-#define DEBUG_LL_ZOOM(mach)                                             \
-        _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
-
-#define DEBUG_LL_TI81XX(p, mach)                                        \
-        _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT,   \
-                TI81XXUART##p)
-
-#define DEBUG_LL_AM33XX(p, mach)                                        \
-        _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT,   \
-                AM33XXUART##p)
-
-static inline void arch_decomp_setup(void)
-{
-        int port = 0;
-
-        /*
-         * Initialize the port based on the machine ID from the bootloader.
-         * Note that we're using macros here instead of switch statement
-         * as machine_is functions are optimized out for the boards that
-         * are not selected.
-         */
-        do {
-                /* omap7xx/8xx based boards using UART1 with shift 0 */
-                DEBUG_LL_OMAP7XX(1, herald);
-                DEBUG_LL_OMAP7XX(1, omap_perseus2);
-
-                /* omap15xx/16xx based boards using UART1 */
-                DEBUG_LL_OMAP1(1, ams_delta);
-                DEBUG_LL_OMAP1(1, nokia770);
-                DEBUG_LL_OMAP1(1, omap_h2);
-                DEBUG_LL_OMAP1(1, omap_h3);
-                DEBUG_LL_OMAP1(1, omap_innovator);
-                DEBUG_LL_OMAP1(1, omap_osk);
-                DEBUG_LL_OMAP1(1, omap_palmte);
-                DEBUG_LL_OMAP1(1, omap_palmz71);
-
-                /* omap15xx/16xx based boards using UART2 */
-                DEBUG_LL_OMAP1(2, omap_palmtt);
-
-                /* omap15xx/16xx based boards using UART3 */
-                DEBUG_LL_OMAP1(3, sx1);
-
-                /* omap2 based boards using UART1 */
-                DEBUG_LL_OMAP2(1, omap_2430sdp);
-                DEBUG_LL_OMAP2(1, omap_apollon);
-                DEBUG_LL_OMAP2(1, omap_h4);
-
-                /* omap2 based boards using UART3 */
-                DEBUG_LL_OMAP2(3, nokia_n800);
-                DEBUG_LL_OMAP2(3, nokia_n810);
-                DEBUG_LL_OMAP2(3, nokia_n810_wimax);
-
-                /* omap3 based boards using UART1 */
-                DEBUG_LL_OMAP2(1, omap3evm);
-                DEBUG_LL_OMAP3(1, omap_3430sdp);
-                DEBUG_LL_OMAP3(1, omap_3630sdp);
-                DEBUG_LL_OMAP3(1, omap3530_lv_som);
-                DEBUG_LL_OMAP3(1, omap3_torpedo);
-
-                /* omap3 based boards using UART3 */
-                DEBUG_LL_OMAP3(3, cm_t35);
-                DEBUG_LL_OMAP3(3, cm_t3517);
-                DEBUG_LL_OMAP3(3, cm_t3730);
-                DEBUG_LL_OMAP3(3, craneboard);
-                DEBUG_LL_OMAP3(3, devkit8000);
-                DEBUG_LL_OMAP3(3, igep0020);
-                DEBUG_LL_OMAP3(3, igep0030);
-                DEBUG_LL_OMAP3(3, nokia_rm680);
-                DEBUG_LL_OMAP3(3, nokia_rm696);
-                DEBUG_LL_OMAP3(3, nokia_rx51);
-                DEBUG_LL_OMAP3(3, omap3517evm);
-                DEBUG_LL_OMAP3(3, omap3_beagle);
-                DEBUG_LL_OMAP3(3, omap3_pandora);
-                DEBUG_LL_OMAP3(3, omap_ldp);
-                DEBUG_LL_OMAP3(3, overo);
-                DEBUG_LL_OMAP3(3, touchbook);
-
-                /* omap4 based boards using UART3 */
-                DEBUG_LL_OMAP4(3, omap_4430sdp);
-                DEBUG_LL_OMAP4(3, omap4_panda);
-
-                /* omap5 based boards using UART3 */
-                DEBUG_LL_OMAP5(3, omap5_sevm);
-
-                /* zoom2/3 external uart */
-                DEBUG_LL_ZOOM(omap_zoom2);
-                DEBUG_LL_ZOOM(omap_zoom3);
-
-                /* TI8168 base boards using UART3 */
-                DEBUG_LL_TI81XX(3, ti8168evm);
-
-                /* TI8148 base boards using UART1 */
-                DEBUG_LL_TI81XX(1, ti8148evm);
-
-                /* AM33XX base boards using UART1 */
-                DEBUG_LL_AM33XX(1, am335xevm);
-        } while (0);
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_wdog()
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
deleted file mode 100644
index 87ee140fefaa..000000000000
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ /dev/null
@@ -1,179 +0,0 @@
-// include/asm-arm/mach-omap/usb.h
-
-#ifndef __ASM_ARCH_OMAP_USB_H
-#define __ASM_ARCH_OMAP_USB_H
-
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <linux/usb/musb.h>
-
-#define OMAP3_HS_USB_PORTS      3
-
-enum usbhs_omap_port_mode {
-        OMAP_USBHS_PORT_MODE_UNUSED,
-        OMAP_EHCI_PORT_MODE_PHY,
-        OMAP_EHCI_PORT_MODE_TLL,
-        OMAP_EHCI_PORT_MODE_HSIC,
-        OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0,
-        OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM,
-        OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0,
-        OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM,
-        OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0,
-        OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM,
-        OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0,
-        OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM,
-        OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0,
-        OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM
-};
-
-struct usbhs_omap_board_data {
-        enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
-
-        /* have to be valid if phy_reset is true and portx is in phy mode */
-        int     reset_gpio_port[OMAP3_HS_USB_PORTS];
-
-        /* Set this to true for ES2.x silicon */
-        unsigned                        es2_compatibility:1;
-
-        unsigned                        phy_reset:1;
-
-        /*
-         * Regulators for USB PHYs.
-         * Each PHY can have a separate regulator.
-         */
-        struct regulator                *regulator[OMAP3_HS_USB_PORTS];
-};
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-
-struct ehci_hcd_omap_platform_data {
-        enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
-        int                             reset_gpio_port[OMAP3_HS_USB_PORTS];
-        struct regulator                *regulator[OMAP3_HS_USB_PORTS];
-        unsigned                        phy_reset:1;
-};
-
-struct ohci_hcd_omap_platform_data {
-        enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
-        unsigned                        es2_compatibility:1;
-};
-
-struct usbhs_omap_platform_data {
-        enum usbhs_omap_port_mode               port_mode[OMAP3_HS_USB_PORTS];
-
-        struct ehci_hcd_omap_platform_data      *ehci_data;
-        struct ohci_hcd_omap_platform_data      *ohci_data;
-};
-
-struct usbtll_omap_platform_data {
-        enum usbhs_omap_port_mode               port_mode[OMAP3_HS_USB_PORTS];
-};
-/*-------------------------------------------------------------------------*/
-
-struct omap_musb_board_data {
-        u8      interface_type;
-        u8      mode;
-        u16     power;
-        unsigned extvbus:1;
-        void    (*set_phy_power)(u8 on);
-        void    (*clear_irq)(void);
-        void    (*set_mode)(u8 mode);
-        void    (*reset)(void);
-};
-
-enum musb_interface    {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};
-
-extern void usb_musb_init(struct omap_musb_board_data *board_data);
-
-extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
-extern int omap_tll_enable(void);
-extern int omap_tll_disable(void);
-
-extern int omap4430_phy_power(struct device *dev, int ID, int on);
-extern int omap4430_phy_set_clk(struct device *dev, int on);
-extern int omap4430_phy_init(struct device *dev);
-extern int omap4430_phy_exit(struct device *dev);
-extern int omap4430_phy_suspend(struct device *dev, int suspend);
-
-#endif
-
-extern void am35x_musb_reset(void);
-extern void am35x_musb_phy_power(u8 on);
-extern void am35x_musb_clear_irq(void);
-extern void am35x_set_mode(u8 musb_mode);
-extern void ti81xx_musb_phy_power(u8 on);
-
-/* AM35x */
-/* USB 2.0 PHY Control */
-#define CONF2_PHY_GPIOMODE      (1 << 23)
-#define CONF2_OTGMODE           (3 << 14)
-#define CONF2_NO_OVERRIDE       (0 << 14)
-#define CONF2_FORCE_HOST        (1 << 14)
-#define CONF2_FORCE_DEVICE      (2 << 14)
-#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
-#define CONF2_SESENDEN          (1 << 13)
-#define CONF2_VBDTCTEN          (1 << 12)
-#define CONF2_REFFREQ_24MHZ     (2 << 8)
-#define CONF2_REFFREQ_26MHZ     (7 << 8)
-#define CONF2_REFFREQ_13MHZ     (6 << 8)
-#define CONF2_REFFREQ           (0xf << 8)
-#define CONF2_PHYCLKGD          (1 << 7)
-#define CONF2_VBUSSENSE         (1 << 6)
-#define CONF2_PHY_PLLON         (1 << 5)
-#define CONF2_RESET             (1 << 4)
-#define CONF2_PHYPWRDN          (1 << 3)
-#define CONF2_OTGPWRDN          (1 << 2)
-#define CONF2_DATPOL            (1 << 1)
-
-/* TI81XX specific definitions */
-#define USBCTRL0        0x620
-#define USBSTAT0        0x624
-
-/* TI816X PHY controls bits */
-#define TI816X_USBPHY0_NORMAL_MODE      (1 << 0)
-#define TI816X_USBPHY_REFCLK_OSC        (1 << 8)
-
-/* TI814X PHY controls bits */
-#define USBPHY_CM_PWRDN         (1 << 0)
-#define USBPHY_OTG_PWRDN        (1 << 1)
-#define USBPHY_CHGDET_DIS       (1 << 2)
-#define USBPHY_CHGDET_RSTRT     (1 << 3)
-#define USBPHY_SRCONDM          (1 << 4)
-#define USBPHY_SINKONDP         (1 << 5)
-#define USBPHY_CHGISINK_EN      (1 << 6)
-#define USBPHY_CHGVSRC_EN       (1 << 7)
-#define USBPHY_DMPULLUP         (1 << 8)
-#define USBPHY_DPPULLUP         (1 << 9)
-#define USBPHY_CDET_EXTCTL      (1 << 10)
-#define USBPHY_GPIO_MODE        (1 << 12)
-#define USBPHY_DPOPBUFCTL       (1 << 13)
-#define USBPHY_DMOPBUFCTL       (1 << 14)
-#define USBPHY_DPINPUT          (1 << 15)
-#define USBPHY_DMINPUT          (1 << 16)
-#define USBPHY_DPGPIO_PD        (1 << 17)
-#define USBPHY_DMGPIO_PD        (1 << 18)
-#define USBPHY_OTGVDET_EN       (1 << 19)
-#define USBPHY_OTGSESSEND_EN    (1 << 20)
-#define USBPHY_DATA_POLARITY    (1 << 23)
-
-#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
-u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
-u32 omap1_usb1_init(unsigned nwires);
-u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup);
-#else
-static inline u32 omap1_usb0_init(unsigned nwires, unsigned is_device)
-{
-        return 0;
-}
-static inline u32 omap1_usb1_init(unsigned nwires)
-{
-        return 0;
-
-}
-static inline u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
-{
-        return 0;
-}
-#endif
-
-#endif  /* __ASM_ARCH_OMAP_USB_H */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 28acb383e7df..743fc2836f7a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -20,198 +20,20 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
+#include <asm/fncpy.h>
 #include <asm/tlb.h>
 #include <asm/cacheflush.h>
 
 #include <asm/mach/map.h>
 
-#include <plat/sram.h>
-#include <plat/cpu.h>
-
-#include "sram.h"
-
-/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
-#include "../mach-omap2/iomap.h"
-#include "../mach-omap2/prm2xxx_3xxx.h"
-#include "../mach-omap2/sdrc.h"
-
-#define OMAP1_SRAM_PA           0x20000000
-#define OMAP2_SRAM_PUB_PA       (OMAP2_SRAM_PA + 0xf800)
-#define OMAP3_SRAM_PUB_PA       (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA       OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA       (OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA           0x40300000
-
-#if defined(CONFIG_ARCH_OMAP2PLUS)
-#define SRAM_BOOTLOADER_SZ      0x00
-#else
-#define SRAM_BOOTLOADER_SZ      0x80
-#endif
-
-#define OMAP24XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0        OMAP2_L3_IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0           OMAP2_L3_IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0          OMAP2_L3_IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_L3_IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_L3_IO_ADDRESS(0x6C000048)
-
-#define GP_DEVICE               0x300
-
 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
 
-static unsigned long omap_sram_start;
 static void __iomem *omap_sram_base;
 static unsigned long omap_sram_skip;
 static unsigned long omap_sram_size;
 static void __iomem *omap_sram_ceil;
 
 /*
- * Depending on the target RAMFS firewall setup, the public usable amount of
- * SRAM varies.  The default accessible size for all device types is 2k. A GP
- * device allows ARM11 but not other initiators for full size. This
- * functionality seems ok until some nice security API happens.
- */
-static int is_sram_locked(void)
-{
-        if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
-                /* RAMFW: R/W access to all initiators for all qualifier sets */
-                if (cpu_is_omap242x()) {
-                        __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
-                }
-                if (cpu_is_omap34xx()) {
-                        __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
-                        __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
-                        __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
-                        __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
-                }
-                return 0;
-        } else
-                return 1; /* assume locked with no PPA or security driver */
-}
-
-/*
- * The amount of SRAM depends on the core type.
- * Note that we cannot try to test for SRAM here because writes
- * to secure SRAM will hang the system. Also the SRAM is not
- * yet mapped at this point.
- */
-static void __init omap_detect_sram(void)
-{
-        omap_sram_skip = SRAM_BOOTLOADER_SZ;
-        if (cpu_class_is_omap2()) {
-                if (is_sram_locked()) {
-                        if (cpu_is_omap34xx()) {
-                                omap_sram_start = OMAP3_SRAM_PUB_PA;
-                                if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
-                                    (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
-                                        omap_sram_size = 0x7000; /* 28K */
-                                        omap_sram_skip += SZ_16K;
-                                } else {
-                                        omap_sram_size = 0x8000; /* 32K */
-                                }
-                        } else if (cpu_is_omap44xx()) {
-                                omap_sram_start = OMAP4_SRAM_PUB_PA;
-                                omap_sram_size = 0xa000; /* 40K */
-                        } else if (soc_is_omap54xx()) {
-                                omap_sram_start = OMAP5_SRAM_PA;
-                                omap_sram_size = SZ_128K; /* 128KB */
-                        } else {
-                                omap_sram_start = OMAP2_SRAM_PUB_PA;
-                                omap_sram_size = 0x800; /* 2K */
-                        }
-                } else {
-                        if (soc_is_am33xx()) {
-                                omap_sram_start = AM33XX_SRAM_PA;
-                                omap_sram_size = 0x10000; /* 64K */
-                        } else if (cpu_is_omap34xx()) {
-                                omap_sram_start = OMAP3_SRAM_PA;
-                                omap_sram_size = 0x10000; /* 64K */
-                        } else if (cpu_is_omap44xx()) {
-                                omap_sram_start = OMAP4_SRAM_PA;
-                                omap_sram_size = 0xe000; /* 56K */
-                        } else if (soc_is_omap54xx()) {
-                                omap_sram_start = OMAP5_SRAM_PA;
-                                omap_sram_size = SZ_128K; /* 128KB */
-                        } else {
-                                omap_sram_start = OMAP2_SRAM_PA;
-                                if (cpu_is_omap242x())
-                                        omap_sram_size = 0xa0000; /* 640K */
-                                else if (cpu_is_omap243x())
-                                        omap_sram_size = 0x10000; /* 64K */
-                        }
-                }
-        } else {
-                omap_sram_start = OMAP1_SRAM_PA;
-
-                if (cpu_is_omap7xx())
-                        omap_sram_size = 0x32000;       /* 200K */
-                else if (cpu_is_omap15xx())
-                        omap_sram_size = 0x30000;       /* 192K */
-                else if (cpu_is_omap1610() || cpu_is_omap1611() ||
-                                cpu_is_omap1621() || cpu_is_omap1710())
-                        omap_sram_size = 0x4000;        /* 16K */
-                else {
-                        pr_err("Could not detect SRAM size\n");
-                        omap_sram_size = 0x4000;
-                }
-        }
-}
-
-/*
- * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
- */
-static void __init omap_map_sram(void)
-{
-        int cached = 1;
-
-        if (omap_sram_size == 0)
-                return;
-
-#ifdef CONFIG_OMAP4_ERRATA_I688
-        if (cpu_is_omap44xx()) {
-                omap_sram_start += PAGE_SIZE;
-                omap_sram_size -= SZ_16K;
-        }
-#endif
-        if (cpu_is_omap34xx()) {
-                /*
-                 * SRAM must be marked as non-cached on OMAP3 since the
-                 * CORE DPLL M2 divider change code (in SRAM) runs with the
-                 * SDRAM controller disabled, and if it is marked cached,
-                 * the ARM may attempt to write cache lines back to SDRAM
-                 * which will cause the system to hang.
-                 */
-                cached = 0;
-        }
-
-        omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE);
-        omap_sram_base = __arm_ioremap_exec(omap_sram_start, omap_sram_size,
-                                                cached);
-        if (!omap_sram_base) {
-                pr_err("SRAM: Could not map\n");
-                return;
-        }
-
-        omap_sram_ceil = omap_sram_base + omap_sram_size;
-
-        /*
-         * Looks like we need to preserve some bootloader code at the
-         * beginning of SRAM for jumping to flash for reboot to work...
-         */
-        memset_io(omap_sram_base + omap_sram_skip, 0,
-                  omap_sram_size - omap_sram_skip);
-}
-
-/*
  * Memory allocator for SRAM: calculates the new ceiling address
  * for pushing a function using the fncpy API.
  *
@@ -236,171 +58,39 @@ void *omap_sram_push_address(unsigned long size)
         return (void *)omap_sram_ceil;
 }
 
-#ifdef CONFIG_ARCH_OMAP1
-
-static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
-
-void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
-{
-        BUG_ON(!_omap_sram_reprogram_clock);
-        /* On 730, bit 13 must always be 1 */
-        if (cpu_is_omap7xx())
-                ckctl |= 0x2000;
-        _omap_sram_reprogram_clock(dpllctl, ckctl);
-}
-
-static int __init omap1_sram_init(void)
-{
-        _omap_sram_reprogram_clock =
-                        omap_sram_push(omap1_sram_reprogram_clock,
-                                        omap1_sram_reprogram_clock_sz);
-
-        return 0;
-}
-
-#else
-#define omap1_sram_init()       do {} while (0)
-#endif
-
-#if defined(CONFIG_ARCH_OMAP2)
-
-static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                              u32 base_cs, u32 force_unlock);
-
-void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
-                   u32 base_cs, u32 force_unlock)
-{
-        BUG_ON(!_omap2_sram_ddr_init);
-        _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
-                             base_cs, force_unlock);
-}
-
-static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
-                                          u32 mem_type);
-
-void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
-{
-        BUG_ON(!_omap2_sram_reprogram_sdrc);
-        _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
-}
-
-static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
-
-u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
-{
-        BUG_ON(!_omap2_set_prcm);
-        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2420
-static int __init omap242x_sram_init(void)
-{
-        _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
-                                        omap242x_sram_ddr_init_sz);
-
-        _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
-                                            omap242x_sram_reprogram_sdrc_sz);
-
-        _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
-                                         omap242x_sram_set_prcm_sz);
-
-        return 0;
-}
-#else
-static inline int omap242x_sram_init(void)
-{
-        return 0;
-}
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-static int __init omap243x_sram_init(void)
-{
-        _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
-                                        omap243x_sram_ddr_init_sz);
-
-        _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
-                                            omap243x_sram_reprogram_sdrc_sz);
-
-        _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
-                                         omap243x_sram_set_prcm_sz);
-
-        return 0;
-}
-#else
-static inline int omap243x_sram_init(void)
-{
-        return 0;
-}
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-
-static u32 (*_omap3_sram_configure_core_dpll)(
-                        u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1);
-
-u32 omap3_configure_core_dpll(u32 m2, u32 unlock_dll, u32 f, u32 inc,
-                        u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0,
-                        u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0,
-                        u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1,
-                        u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1)
-{
-        BUG_ON(!_omap3_sram_configure_core_dpll);
-        return _omap3_sram_configure_core_dpll(
-                        m2, unlock_dll, f, inc,
-                        sdrc_rfr_ctrl_0, sdrc_actim_ctrl_a_0,
-                        sdrc_actim_ctrl_b_0, sdrc_mr_0,
-                        sdrc_rfr_ctrl_1, sdrc_actim_ctrl_a_1,
-                        sdrc_actim_ctrl_b_1, sdrc_mr_1);
-}
-
-void omap3_sram_restore_context(void)
+/*
+ * The SRAM context is lost during off-idle and stack
+ * needs to be reset.
+ */
+void omap_sram_reset(void)
 {
         omap_sram_ceil = omap_sram_base + omap_sram_size;
-
-        _omap3_sram_configure_core_dpll =
-                omap_sram_push(omap3_sram_configure_core_dpll,
-                               omap3_sram_configure_core_dpll_sz);
-        omap_push_sram_idle();
 }
 
-static inline int omap34xx_sram_init(void)
-{
-        omap3_sram_restore_context();
-        return 0;
-}
-#else
-static inline int omap34xx_sram_init(void)
-{
-        return 0;
-}
-#endif /* CONFIG_ARCH_OMAP3 */
-
-static inline int am33xx_sram_init(void)
+/*
+ * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
+ */
+void __init omap_map_sram(unsigned long start, unsigned long size,
+                                 unsigned long skip, int cached)
 {
-        return 0;
-}
+        if (size == 0)
+                return;
 
-int __init omap_sram_init(void)
-{
-        omap_detect_sram();
-        omap_map_sram();
+        start = ROUND_DOWN(start, PAGE_SIZE);
+        omap_sram_size = size;
+        omap_sram_skip = skip;
+        omap_sram_base = __arm_ioremap_exec(start, size, cached);
+        if (!omap_sram_base) {
+                pr_err("SRAM: Could not map\n");
+                return;
+        }
 
-        if (!(cpu_class_is_omap2()))
-                omap1_sram_init();
-        else if (cpu_is_omap242x())
-                omap242x_sram_init();
-        else if (cpu_is_omap2430())
-                omap243x_sram_init();
-        else if (soc_is_am33xx())
-                am33xx_sram_init();
-        else if (cpu_is_omap34xx())
-                omap34xx_sram_init();
+        omap_sram_reset();
 
-        return 0;
+        /*
+         * Looks like we need to preserve some bootloader code at the
+         * beginning of SRAM for jumping to flash for reboot to work...
+         */
+        memset_io(omap_sram_base + omap_sram_skip, 0,
+                  omap_sram_size - omap_sram_skip);
 }
diff --git a/arch/arm/plat-omap/sram.h b/arch/arm/plat-omap/sram.h
deleted file mode 100644
index 29b43ef97f20..000000000000
--- a/arch/arm/plat-omap/sram.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __PLAT_OMAP_SRAM_H__
-#define __PLAT_OMAP_SRAM_H__
-
-extern int __init omap_sram_init(void);
-
-#endif /* __PLAT_OMAP_SRAM_H__ */
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index af8e484001e5..1fc941944912 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -5,7 +5,6 @@
 obj-y   := dma.o
 
 obj-$(CONFIG_PXA3xx)            += mfp.o
-obj-$(CONFIG_PXA95x)            += mfp.o
 obj-$(CONFIG_ARCH_MMP)          += mfp.o
 
 obj-$(CONFIG_PXA_SSP)           += ssp.o
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 5c79c29f2833..10bc4f3757d1 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t;
         ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
          (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
 
-#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP)
+#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP)
 /*
  * each MFP pin will have a MFPR register, since the offset of the
  * register varies between processors, the processor specific code
@@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val);
 void mfp_config(unsigned long *mfp_cfgs, int num);
 void mfp_config_run(void);
 void mfp_config_lpm(void);
-#endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */
+#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */
 
 #endif /* __ASM_PLAT_MFP_H */
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index b1e05ccff3ac..37542c2689a2 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -344,7 +344,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
         int ret;
         unsigned tmp;
 
-        adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
+        adc = devm_kzalloc(dev, sizeof(struct adc_device), GFP_KERNEL);
         if (adc == NULL) {
                 dev_err(dev, "failed to allocate adc_device\n");
                 return -ENOMEM;
@@ -355,50 +355,46 @@ static int s3c_adc_probe(struct platform_device *pdev)
         adc->pdev = pdev;
         adc->prescale = S3C2410_ADCCON_PRSCVL(49);
 
-        adc->vdd = regulator_get(dev, "vdd");
+        adc->vdd = devm_regulator_get(dev, "vdd");
         if (IS_ERR(adc->vdd)) {
                 dev_err(dev, "operating without regulator \"vdd\" .\n");
-                ret = PTR_ERR(adc->vdd);
-                goto err_alloc;
+                return PTR_ERR(adc->vdd);
         }
 
         adc->irq = platform_get_irq(pdev, 1);
         if (adc->irq <= 0) {
                 dev_err(dev, "failed to get adc irq\n");
-                ret = -ENOENT;
-                goto err_reg;
+                return -ENOENT;
         }
 
-        ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc);
+        ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev),
+                                adc);
         if (ret < 0) {
                 dev_err(dev, "failed to attach adc irq\n");
-                goto err_reg;
+                return ret;
         }
 
-        adc->clk = clk_get(dev, "adc");
+        adc->clk = devm_clk_get(dev, "adc");
         if (IS_ERR(adc->clk)) {
                 dev_err(dev, "failed to get adc clock\n");
-                ret = PTR_ERR(adc->clk);
-                goto err_irq;
+                return PTR_ERR(adc->clk);
         }
 
         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (!regs) {
                 dev_err(dev, "failed to find registers\n");
-                ret = -ENXIO;
-                goto err_clk;
+                return -ENXIO;
         }
 
-        adc->regs = ioremap(regs->start, resource_size(regs));
+        adc->regs = devm_request_and_ioremap(dev, regs);
         if (!adc->regs) {
                 dev_err(dev, "failed to map registers\n");
-                ret = -ENXIO;
-                goto err_clk;
+                return -ENXIO;
         }
 
         ret = regulator_enable(adc->vdd);
         if (ret)
-                goto err_ioremap;
+                return ret;
 
         clk_enable(adc->clk);
 
@@ -418,32 +414,14 @@ static int s3c_adc_probe(struct platform_device *pdev)
         adc_dev = adc;
 
         return 0;
-
- err_ioremap:
-        iounmap(adc->regs);
- err_clk:
-        clk_put(adc->clk);
-
- err_irq:
-        free_irq(adc->irq, adc);
- err_reg:
-        regulator_put(adc->vdd);
- err_alloc:
-        kfree(adc);
-        return ret;
 }
 
 static int __devexit s3c_adc_remove(struct platform_device *pdev)
 {
         struct adc_device *adc = platform_get_drvdata(pdev);
 
-        iounmap(adc->regs);
-        free_irq(adc->irq, adc);
         clk_disable(adc->clk);
         regulator_disable(adc->vdd);
-        regulator_put(adc->vdd);
-        clk_put(adc->clk);
-        kfree(adc);
 
         return 0;
 }
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 03f654d55eff..a17d7b3e3725 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -486,11 +486,7 @@ static struct resource s3c_i2c0_resource[] = {
 
 struct platform_device s3c_device_i2c0 = {
         .name           = "s3c2410-i2c",
-#ifdef CONFIG_S3C_DEV_I2C1
         .id             = 0,
-#else
-        .id             = -1,
-#endif
         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
         .resource       = s3c_i2c0_resource,
 };
diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c
index 0b6f0b28a487..bd5de08ad6fd 100644
--- a/drivers/amba/tegra-ahb.c
+++ b/drivers/amba/tegra-ahb.c
@@ -24,6 +24,7 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/tegra-ahb.h>
 
 #define DRV_NAME "tegra-ahb"
 
diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index c8abce3d2d9c..ed0fade46aed 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -270,15 +270,10 @@ static int hci_uart_send_frame(struct sk_buff *skb)
  */
 static int hci_uart_tty_open(struct tty_struct *tty)
 {
-        struct hci_uart *hu = (void *) tty->disc_data;
+        struct hci_uart *hu;
 
         BT_DBG("tty %p", tty);
 
-        /* FIXME: This btw is bogus, nothing requires the old ldisc to clear
-           the pointer */
-        if (hu)
-                return -EEXIST;
-
         /* Error if the tty has no write op instead of leaving an exploitable
            hole */
         if (tty->ops->write == NULL)
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index a5effd813abd..45e467dcc8c8 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -27,8 +27,6 @@
 
 #include <asm/io.h>
 
-#include <plat/cpu.h>
-
 #define RNG_OUT_REG             0x00            /* Output register */
 #define RNG_STAT_REG            0x04            /* Status register
                                                         [0] = STAT_BUSY */
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
index 67ad16b20b81..59e0fd8016bf 100644
--- a/drivers/clk/clk-bcm2835.c
+++ b/drivers/clk/clk-bcm2835.c
@@ -55,5 +55,5 @@ void __init bcm2835_init_clocks(void)
                 pr_err("uart1_pclk not registered\n");
         ret = clk_register_clkdev(clk, NULL, "20215000.uart");
         if (ret)
-                pr_err("uart0_pclk alias not registered\n");
+                pr_err("uart1_pclk alias not registered\n");
 }
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 093a8af59cbe..649a146e1382 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -29,8 +29,7 @@
 #include <crypto/scatterwalk.h>
 #include <crypto/aes.h>
 
-#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
    number. For example 7:0 */
@@ -941,11 +940,6 @@ static int __init omap_aes_mod_init(void)
 {
         pr_info("loading %s driver\n", "omap-aes");
 
-        if (!cpu_class_is_omap2() || omap_type() != OMAP2_DEVICE_TYPE_SEC) {
-                pr_err("Unsupported cpu\n");
-                return -ENODEV;
-        }
-
         return  platform_driver_register(&omap_aes_driver);
 }
 
diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c
index a3fd6fc504b1..d76fe06b9417 100644
--- a/drivers/crypto/omap-sham.c
+++ b/drivers/crypto/omap-sham.c
@@ -37,8 +37,7 @@
 #include <crypto/hash.h>
 #include <crypto/internal/hash.h>
 
-#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <mach/irqs.h>
 
 #define SHA_REG_DIGEST(x)               (0x00 + ((x) * 0x04))
@@ -1289,13 +1288,6 @@ static int __init omap_sham_mod_init(void)
 {
         pr_info("loading %s driver\n", "omap-sham");
 
-        if (!cpu_class_is_omap2() ||
-                (omap_type() != OMAP2_DEVICE_TYPE_SEC &&
-                        omap_type() != OMAP2_DEVICE_TYPE_EMU)) {
-                pr_err("Unsupported cpu\n");
-                return -ENODEV;
-        }
-
         return platform_driver_register(&omap_sham_driver);
 }
 
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c
index 37185e6630cd..e69f3bc473be 100644
--- a/drivers/crypto/tegra-aes.c
+++ b/drivers/crypto/tegra-aes.c
@@ -41,8 +41,6 @@
 #include <linux/completion.h>
 #include <linux/workqueue.h>
 
-#include <mach/clk.h>
-
 #include <crypto/scatterwalk.h>
 #include <crypto/aes.h>
 #include <crypto/internal/rng.h>
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index 7d9554cc4976..dbf0e6f8de8a 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -29,7 +29,6 @@
 
 #include <asm/irq.h>
 #include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
 
 #include "dmaengine.h"
 #define IMXDMA_MAX_CHAN_DESCRIPTORS     16
@@ -167,6 +166,12 @@ struct imxdma_channel {
         int                             slot_2d;
 };
 
+enum imx_dma_type {
+        IMX1_DMA,
+        IMX21_DMA,
+        IMX27_DMA,
+};
+
 struct imxdma_engine {
         struct device                   *dev;
         struct device_dma_parameters    dma_parms;
@@ -177,7 +182,39 @@ struct imxdma_engine {
         spinlock_t                      lock;
         struct imx_dma_2d_config        slots_2d[IMX_DMA_2D_SLOTS];
         struct imxdma_channel           channel[IMX_DMA_CHANNELS];
+        enum imx_dma_type               devtype;
+};
+
+static struct platform_device_id imx_dma_devtype[] = {
+        {
+                .name = "imx1-dma",
+                .driver_data = IMX1_DMA,
+        }, {
+                .name = "imx21-dma",
+                .driver_data = IMX21_DMA,
+        }, {
+                .name = "imx27-dma",
+                .driver_data = IMX27_DMA,
+        }, {
+                /* sentinel */
+        }
 };
+MODULE_DEVICE_TABLE(platform, imx_dma_devtype);
+
+static inline int is_imx1_dma(struct imxdma_engine *imxdma)
+{
+        return imxdma->devtype == IMX1_DMA;
+}
+
+static inline int is_imx21_dma(struct imxdma_engine *imxdma)
+{
+        return imxdma->devtype == IMX21_DMA;
+}
+
+static inline int is_imx27_dma(struct imxdma_engine *imxdma)
+{
+        return imxdma->devtype == IMX27_DMA;
+}
 
 static struct imxdma_channel *to_imxdma_chan(struct dma_chan *chan)
 {
@@ -212,7 +249,9 @@ static unsigned imx_dmav1_readl(struct imxdma_engine *imxdma, unsigned offset)
 
 static int imxdma_hw_chain(struct imxdma_channel *imxdmac)
 {
-        if (cpu_is_mx27())
+        struct imxdma_engine *imxdma = imxdmac->imxdma;
+
+        if (is_imx27_dma(imxdma))
                 return imxdmac->hw_chaining;
         else
                 return 0;
@@ -267,7 +306,7 @@ static void imxdma_enable_hw(struct imxdma_desc *d)
         imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) |
                          CCR_CEN | CCR_ACRPT, DMA_CCR(channel));
 
-        if ((cpu_is_mx21() || cpu_is_mx27()) &&
+        if (!is_imx1_dma(imxdma) &&
                         d->sg && imxdma_hw_chain(imxdmac)) {
                 d->sg = sg_next(d->sg);
                 if (d->sg) {
@@ -436,7 +475,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
         struct imxdma_engine *imxdma = dev_id;
         int i, disr;
 
-        if (cpu_is_mx21() || cpu_is_mx27())
+        if (!is_imx1_dma(imxdma))
                 imxdma_err_handler(irq, dev_id);
 
         disr = imx_dmav1_readl(imxdma, DMA_DISR);
@@ -961,35 +1000,32 @@ static void imxdma_issue_pending(struct dma_chan *chan)
 static int __init imxdma_probe(struct platform_device *pdev)
         {
         struct imxdma_engine *imxdma;
+        struct resource *res;
         int ret, i;
+        int irq, irq_err;
 
-
-        imxdma = kzalloc(sizeof(*imxdma), GFP_KERNEL);
+        imxdma = devm_kzalloc(&pdev->dev, sizeof(*imxdma), GFP_KERNEL);
         if (!imxdma)
                 return -ENOMEM;
 
-        if (cpu_is_mx1()) {
-                imxdma->base = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
-        } else if (cpu_is_mx21()) {
-                imxdma->base = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
-        } else if (cpu_is_mx27()) {
-                imxdma->base = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
-        } else {
-                kfree(imxdma);
-                return 0;
-        }
+        imxdma->devtype = pdev->id_entry->driver_data;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        imxdma->base = devm_request_and_ioremap(&pdev->dev, res);
+        if (!imxdma->base)
+                return -EADDRNOTAVAIL;
+
+        irq = platform_get_irq(pdev, 0);
+        if (irq < 0)
+                return irq;
 
         imxdma->dma_ipg = devm_clk_get(&pdev->dev, "ipg");
-        if (IS_ERR(imxdma->dma_ipg)) {
-                ret = PTR_ERR(imxdma->dma_ipg);
-                goto err_clk;
-        }
+        if (IS_ERR(imxdma->dma_ipg))
+                return PTR_ERR(imxdma->dma_ipg);
 
         imxdma->dma_ahb = devm_clk_get(&pdev->dev, "ahb");
-        if (IS_ERR(imxdma->dma_ahb)) {
-                ret = PTR_ERR(imxdma->dma_ahb);
-                goto err_clk;
-        }
+        if (IS_ERR(imxdma->dma_ahb))
+                return PTR_ERR(imxdma->dma_ahb);
 
         clk_prepare_enable(imxdma->dma_ipg);
         clk_prepare_enable(imxdma->dma_ahb);
@@ -997,18 +1033,25 @@ static int __init imxdma_probe(struct platform_device *pdev)
         /* reset DMA module */
         imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);
 
-        if (cpu_is_mx1()) {
-                ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma);
+        if (is_imx1_dma(imxdma)) {
+                ret = devm_request_irq(&pdev->dev, irq,
+                                       dma_irq_handler, 0, "DMA", imxdma);
                 if (ret) {
                         dev_warn(imxdma->dev, "Can't register IRQ for DMA\n");
-                        goto err_enable;
+                        goto err;
+                }
+
+                irq_err = platform_get_irq(pdev, 1);
+                if (irq_err < 0) {
+                        ret = irq_err;
+                        goto err;
                 }
 
-                ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma);
+                ret = devm_request_irq(&pdev->dev, irq_err,
+                                       imxdma_err_handler, 0, "DMA", imxdma);
                 if (ret) {
                         dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n");
-                        free_irq(MX1_DMA_INT, NULL);
-                        goto err_enable;
+                        goto err;
                 }
         }
 
@@ -1038,14 +1081,14 @@ static int __init imxdma_probe(struct platform_device *pdev)
         for (i = 0; i < IMX_DMA_CHANNELS; i++) {
                 struct imxdma_channel *imxdmac = &imxdma->channel[i];
 
-                if (cpu_is_mx21() || cpu_is_mx27()) {
-                        ret = request_irq(MX2x_INT_DMACH0 + i,
+                if (!is_imx1_dma(imxdma)) {
+                        ret = devm_request_irq(&pdev->dev, irq + i,
                                         dma_irq_handler, 0, "DMA", imxdma);
                         if (ret) {
                                 dev_warn(imxdma->dev, "Can't register IRQ %d "
                                          "for DMA channel %d\n",
-                                         MX2x_INT_DMACH0 + i, i);
-                                goto err_init;
+                                         irq + i, i);
+                                goto err;
                         }
                         init_timer(&imxdmac->watchdog);
                         imxdmac->watchdog.function = &imxdma_watchdog;
@@ -1091,46 +1134,25 @@ static int __init imxdma_probe(struct platform_device *pdev)
         ret = dma_async_device_register(&imxdma->dma_device);
         if (ret) {
                 dev_err(&pdev->dev, "unable to register\n");
-                goto err_init;
+                goto err;
         }
 
         return 0;
 
-err_init:
-
-        if (cpu_is_mx21() || cpu_is_mx27()) {
-                while (--i >= 0)
-                        free_irq(MX2x_INT_DMACH0 + i, NULL);
-        } else if cpu_is_mx1() {
-                free_irq(MX1_DMA_INT, NULL);
-                free_irq(MX1_DMA_ERR, NULL);
-        }
-err_enable:
+err:
         clk_disable_unprepare(imxdma->dma_ipg);
         clk_disable_unprepare(imxdma->dma_ahb);
-err_clk:
-        kfree(imxdma);
         return ret;
 }
 
 static int __exit imxdma_remove(struct platform_device *pdev)
 {
         struct imxdma_engine *imxdma = platform_get_drvdata(pdev);
-        int i;
 
         dma_async_device_unregister(&imxdma->dma_device);
 
-        if (cpu_is_mx21() || cpu_is_mx27()) {
-                for (i = 0; i < IMX_DMA_CHANNELS; i++)
-                        free_irq(MX2x_INT_DMACH0 + i, NULL);
-        } else if cpu_is_mx1() {
-                free_irq(MX1_DMA_INT, NULL);
-                free_irq(MX1_DMA_ERR, NULL);
-        }
-
         clk_disable_unprepare(imxdma->dma_ipg);
         clk_disable_unprepare(imxdma->dma_ahb);
-        kfree(imxdma);
 
         return 0;
 }
@@ -1139,6 +1161,7 @@ static struct platform_driver imxdma_driver = {
         .driver         = {
                 .name   = "imx-dma",
         },
+        .id_table       = imx_dma_devtype,
         .remove         = __exit_p(imxdma_remove),
 };
 
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index c099ca0846f4..f082aa3a918c 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -40,7 +40,6 @@
 #include <asm/irq.h>
 #include <linux/platform_data/dma-imx-sdma.h>
 #include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
 
 #include "dmaengine.h"
 
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index c7573e50aa14..65855373cee6 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -22,8 +22,7 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/module.h>
-
-#include <mach/ipu.h>
+#include <linux/dma/ipu-dma.h>
 
 #include "../dmaengine.h"
 #include "ipu_intern.h"
diff --git a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c
index fa95bcc3de1f..a5ee37d5320f 100644
--- a/drivers/dma/ipu/ipu_irq.c
+++ b/drivers/dma/ipu/ipu_irq.c
@@ -15,8 +15,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/module.h>
-
-#include <mach/ipu.h>
+#include <linux/dma/ipu-dma.h>
 
 #include "ipu_intern.h"
 
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index bb2d8e7029eb..7d35c237fbf1 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -19,8 +19,7 @@
 
 #include "virt-dma.h"
 
-#include <plat/cpu.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 struct omap_dmadev {
         struct dma_device ddev;
@@ -438,7 +437,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
                 omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
         }
 
-        if (!cpu_class_is_omap1()) {
+        if (dma_omap2plus()) {
                 omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
                 omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
         }
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 98d52cb3fd1a..6ab8afbc4697 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -448,7 +448,7 @@ static int pxa_gpio_nums(void)
         } else if (cpu_is_pxa27x()) {
                 count = 120;
                 gpio_type = PXA27X_GPIO;
-        } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) {
+        } else if (cpu_is_pxa93x()) {
                 count = 191;
                 gpio_type = PXA93X_GPIO;
         } else if (cpu_is_pxa3xx()) {
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 2ef162d148cb..b9734747d610 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -52,8 +52,6 @@
 #include <linux/of_device.h>
 #include <linux/of_i2c.h>
 #include <linux/pinctrl/consumer.h>
-
-#include <mach/hardware.h>
 #include <linux/platform_data/i2c-imx.h>
 
 /** Defines ********************************************************************
@@ -115,6 +113,11 @@ static u16 __initdata i2c_clk_div[50][2] = {
         { 3072, 0x1E }, { 3840, 0x1F }
 };
 
+enum imx_i2c_type {
+        IMX1_I2C,
+        IMX21_I2C,
+};
+
 struct imx_i2c_struct {
         struct i2c_adapter      adapter;
         struct clk              *clk;
@@ -124,13 +127,33 @@ struct imx_i2c_struct {
         unsigned int            disable_delay;
         int                     stopped;
         unsigned int            ifdr; /* IMX_I2C_IFDR */
+        enum imx_i2c_type       devtype;
+};
+
+static struct platform_device_id imx_i2c_devtype[] = {
+        {
+                .name = "imx1-i2c",
+                .driver_data = IMX1_I2C,
+        }, {
+                .name = "imx21-i2c",
+                .driver_data = IMX21_I2C,
+        }, {
+                /* sentinel */
+        }
 };
+MODULE_DEVICE_TABLE(platform, imx_i2c_devtype);
 
 static const struct of_device_id i2c_imx_dt_ids[] = {
-        { .compatible = "fsl,imx1-i2c", },
+        { .compatible = "fsl,imx1-i2c", .data = &imx_i2c_devtype[IMX1_I2C], },
+        { .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], },
         { /* sentinel */ }
 };
 
+static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
+{
+        return i2c_imx->devtype == IMX1_I2C;
+}
+
 /** Functions for IMX I2C adapter driver ***************************************
 *******************************************************************************/
 
@@ -223,7 +246,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
                 temp &= ~(I2CR_MSTA | I2CR_MTX);
                 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
         }
-        if (cpu_is_mx1()) {
+        if (is_imx1_i2c(i2c_imx)) {
                 /*
                  * This delay caused by an i.MXL hardware bug.
                  * If no (or too short) delay, no "STOP" bit will be generated.
@@ -465,6 +488,8 @@ static struct i2c_algorithm i2c_imx_algo = {
 
 static int __init i2c_imx_probe(struct platform_device *pdev)
 {
+        const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
+                                                           &pdev->dev);
         struct imx_i2c_struct *i2c_imx;
         struct resource *res;
         struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
@@ -497,6 +522,10 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
                 return -ENOMEM;
         }
 
+        if (of_id)
+                pdev->id_entry = of_id->data;
+        i2c_imx->devtype = pdev->id_entry->driver_data;
+
         /* Setup i2c_imx driver structure */
         strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name));
         i2c_imx->adapter.owner          = THIS_MODULE;
@@ -593,7 +622,8 @@ static struct platform_driver i2c_imx_driver = {
                 .name   = DRIVER_NAME,
                 .owner  = THIS_MODULE,
                 .of_match_table = i2c_imx_dt_ids,
-        }
+        },
+        .id_table       = imx_i2c_devtype,
 };
 
 static int __init i2c_adap_imx_init(void)
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c
index c0f7a4266263..4252d743963d 100644
--- a/drivers/iommu/tegra-smmu.c
+++ b/drivers/iommu/tegra-smmu.c
@@ -34,13 +34,11 @@
 #include <linux/of_iommu.h>
 #include <linux/debugfs.h>
 #include <linux/seq_file.h>
+#include <linux/tegra-ahb.h>
 
 #include <asm/page.h>
 #include <asm/cacheflush.h>
 
-#include <mach/iomap.h>
-#include <mach/tegra-ahb.h>
-
 enum smmu_hwgrp {
         HWGRP_AFI,
         HWGRP_AVPC,
diff --git a/drivers/media/platform/omap/omap_vout.c b/drivers/media/platform/omap/omap_vout.c
index a3b1a34c896d..4b1becc86e54 100644
--- a/drivers/media/platform/omap/omap_vout.c
+++ b/drivers/media/platform/omap/omap_vout.c
@@ -45,8 +45,8 @@
 #include <media/v4l2-ioctl.h>
 
 #include <plat/cpu.h>
-#include <plat/dma.h>
-#include <plat/vrfb.h>
+#include <plat-omap/dma-omap.h>
+#include <video/omapvrfb.h>
 #include <video/omapdss.h>
 
 #include "omap_voutlib.h"
diff --git a/drivers/media/platform/omap/omap_vout_vrfb.c b/drivers/media/platform/omap/omap_vout_vrfb.c
index 4be26abf6cea..8340445a0ee5 100644
--- a/drivers/media/platform/omap/omap_vout_vrfb.c
+++ b/drivers/media/platform/omap/omap_vout_vrfb.c
@@ -16,12 +16,14 @@
 #include <media/videobuf-dma-contig.h>
 #include <media/v4l2-device.h>
 
-#include <plat/dma.h>
-#include <plat/vrfb.h>
+#include <plat-omap/dma-omap.h>
+#include <video/omapvrfb.h>
 
 #include "omap_voutdef.h"
 #include "omap_voutlib.h"
 
+#define OMAP_DMA_NO_DEVICE      0
+
 /*
  * Function for allocating video buffers
  */
diff --git a/drivers/media/platform/omap/omap_voutdef.h b/drivers/media/platform/omap/omap_voutdef.h
index 27a95d23b913..9ccfe1f475a4 100644
--- a/drivers/media/platform/omap/omap_voutdef.h
+++ b/drivers/media/platform/omap/omap_voutdef.h
@@ -12,7 +12,7 @@
 #define OMAP_VOUTDEF_H
 
 #include <video/omapdss.h>
-#include <plat/vrfb.h>
+#include <video/omapvrfb.h>
 
 #define YUYV_BPP        2
 #define RGB565_BPP      2
diff --git a/drivers/media/platform/omap3isp/isphist.c b/drivers/media/platform/omap3isp/isphist.c
index d1a8dee5e1ca..e7f9c4292cc6 100644
--- a/drivers/media/platform/omap3isp/isphist.c
+++ b/drivers/media/platform/omap3isp/isphist.c
@@ -34,6 +34,8 @@
 #include "ispreg.h"
 #include "isphist.h"
 
+#define OMAP24XX_DMA_NO_DEVICE          0
+
 #define HIST_CONFIG_DMA 1
 
 #define HIST_USING_DMA(hist) ((hist)->dma_ch >= 0)
diff --git a/drivers/media/platform/omap3isp/ispstat.h b/drivers/media/platform/omap3isp/ispstat.h
index a6fe653eb237..40f87cdd7994 100644
--- a/drivers/media/platform/omap3isp/ispstat.h
+++ b/drivers/media/platform/omap3isp/ispstat.h
@@ -30,7 +30,7 @@
 
 #include <linux/types.h>
 #include <linux/omap3isp.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 #include <media/v4l2-event.h>
 
 #include "isp.h"
diff --git a/drivers/media/platform/omap3isp/ispvideo.c b/drivers/media/platform/omap3isp/ispvideo.c
index a0b737fecf13..5bd40e6870cc 100644
--- a/drivers/media/platform/omap3isp/ispvideo.c
+++ b/drivers/media/platform/omap3isp/ispvideo.c
@@ -36,7 +36,6 @@
 #include <media/v4l2-ioctl.h>
 #include <plat/iommu.h>
 #include <plat/iovmm.h>
-#include <plat/omap-pm.h>
 
 #include "ispvideo.h"
 #include "isp.h"
diff --git a/drivers/media/platform/soc_camera/mx2_camera.c b/drivers/media/platform/soc_camera/mx2_camera.c
index 9fd9d1c5b218..e575ae82771d 100644
--- a/drivers/media/platform/soc_camera/mx2_camera.c
+++ b/drivers/media/platform/soc_camera/mx2_camera.c
@@ -41,7 +41,6 @@
 #include <linux/videodev2.h>
 
 #include <linux/platform_data/camera-mx2.h>
-#include <mach/hardware.h>
 
 #include <asm/dma.h>
 
@@ -121,11 +120,13 @@
 
 #define CSICR1                  0x00
 #define CSICR2                  0x04
-#define CSISR                   (cpu_is_mx27() ? 0x08 : 0x18)
+#define CSISR_IMX25             0x18
+#define CSISR_IMX27             0x08
 #define CSISTATFIFO             0x0c
 #define CSIRFIFO                0x10
 #define CSIRXCNT                0x14
-#define CSICR3                  (cpu_is_mx27() ? 0x1C : 0x08)
+#define CSICR3_IMX25            0x08
+#define CSICR3_IMX27            0x1c
 #define CSIDMASA_STATFIFO       0x20
 #define CSIDMATA_STATFIFO       0x24
 #define CSIDMASA_FB1            0x28
@@ -268,6 +269,11 @@ struct mx2_buffer {
         struct mx2_buf_internal         internal;
 };
 
+enum mx2_camera_type {
+        IMX25_CAMERA,
+        IMX27_CAMERA,
+};
+
 struct mx2_camera_dev {
         struct device           *dev;
         struct soc_camera_host  soc_host;
@@ -291,6 +297,9 @@ struct mx2_camera_dev {
         struct mx2_buffer       *fb2_active;
 
         u32                     csicr1;
+        u32                     reg_csisr;
+        u32                     reg_csicr3;
+        enum mx2_camera_type    devtype;
 
         struct mx2_buf_internal buf_discard[2];
         void                    *discard_buffer;
@@ -303,6 +312,29 @@ struct mx2_camera_dev {
         struct vb2_alloc_ctx    *alloc_ctx;
 };
 
+static struct platform_device_id mx2_camera_devtype[] = {
+        {
+                .name = "imx25-camera",
+                .driver_data = IMX25_CAMERA,
+        }, {
+                .name = "imx27-camera",
+                .driver_data = IMX27_CAMERA,
+        }, {
+                /* sentinel */
+        }
+};
+MODULE_DEVICE_TABLE(platform, mx2_camera_devtype);
+
+static inline int is_imx25_camera(struct mx2_camera_dev *pcdev)
+{
+        return pcdev->devtype == IMX25_CAMERA;
+}
+
+static inline int is_imx27_camera(struct mx2_camera_dev *pcdev)
+{
+        return pcdev->devtype == IMX27_CAMERA;
+}
+
 static struct mx2_buffer *mx2_ibuf_to_buf(struct mx2_buf_internal *int_buf)
 {
         return container_of(int_buf, struct mx2_buffer, internal);
@@ -434,9 +466,9 @@ static void mx2_camera_deactivate(struct mx2_camera_dev *pcdev)
 
         clk_disable_unprepare(pcdev->clk_csi);
         writel(0, pcdev->base_csi + CSICR1);
-        if (cpu_is_mx27()) {
+        if (is_imx27_camera(pcdev)) {
                 writel(0, pcdev->base_emma + PRP_CNTL);
-        } else if (cpu_is_mx25()) {
+        } else if (is_imx25_camera(pcdev)) {
                 spin_lock_irqsave(&pcdev->lock, flags);
                 pcdev->fb1_active = NULL;
                 pcdev->fb2_active = NULL;
@@ -466,7 +498,7 @@ static int mx2_camera_add_device(struct soc_camera_device *icd)
 
         csicr1 = CSICR1_MCLKEN;
 
-        if (cpu_is_mx27())
+        if (is_imx27_camera(pcdev))
                 csicr1 |= CSICR1_PRP_IF_EN | CSICR1_FCC |
                         CSICR1_RXFF_LEVEL(0);
 
@@ -542,7 +574,7 @@ out:
 static irqreturn_t mx25_camera_irq(int irq_csi, void *data)
 {
         struct mx2_camera_dev *pcdev = data;
-        u32 status = readl(pcdev->base_csi + CSISR);
+        u32 status = readl(pcdev->base_csi + pcdev->reg_csisr);
 
         if (status & CSISR_DMA_TSF_FB1_INT)
                 mx25_camera_frame_done(pcdev, 1, MX2_STATE_DONE);
@@ -551,7 +583,7 @@ static irqreturn_t mx25_camera_irq(int irq_csi, void *data)
 
         /* FIXME: handle CSISR_RFF_OR_INT */
 
-        writel(status, pcdev->base_csi + CSISR);
+        writel(status, pcdev->base_csi + pcdev->reg_csisr);
 
         return IRQ_HANDLED;
 }
@@ -636,7 +668,7 @@ static void mx2_videobuf_queue(struct vb2_buffer *vb)
         buf->state = MX2_STATE_QUEUED;
         list_add_tail(&buf->internal.queue, &pcdev->capture);
 
-        if (cpu_is_mx25()) {
+        if (is_imx25_camera(pcdev)) {
                 u32 csicr3, dma_inten = 0;
 
                 if (pcdev->fb1_active == NULL) {
@@ -655,20 +687,20 @@ static void mx2_videobuf_queue(struct vb2_buffer *vb)
                         list_del(&buf->internal.queue);
                         buf->state = MX2_STATE_ACTIVE;
 
-                        csicr3 = readl(pcdev->base_csi + CSICR3);
+                        csicr3 = readl(pcdev->base_csi + pcdev->reg_csicr3);
 
                         /* Reflash DMA */
                         writel(csicr3 | CSICR3_DMA_REFLASH_RFF,
-                                        pcdev->base_csi + CSICR3);
+                                        pcdev->base_csi + pcdev->reg_csicr3);
 
                         /* clear & enable interrupts */
-                        writel(dma_inten, pcdev->base_csi + CSISR);
+                        writel(dma_inten, pcdev->base_csi + pcdev->reg_csisr);
                         pcdev->csicr1 |= dma_inten;
                         writel(pcdev->csicr1, pcdev->base_csi + CSICR1);
 
                         /* enable DMA */
                         csicr3 |= CSICR3_DMA_REQ_EN_RFF | CSICR3_RXFF_LEVEL(1);
-                        writel(csicr3, pcdev->base_csi + CSICR3);
+                        writel(csicr3, pcdev->base_csi + pcdev->reg_csicr3);
                 }
         }
 
@@ -712,7 +744,7 @@ static void mx2_videobuf_release(struct vb2_buffer *vb)
          */
 
         spin_lock_irqsave(&pcdev->lock, flags);
-        if (cpu_is_mx25() && buf->state == MX2_STATE_ACTIVE) {
+        if (is_imx25_camera(pcdev) && buf->state == MX2_STATE_ACTIVE) {
                 if (pcdev->fb1_active == buf) {
                         pcdev->csicr1 &= ~CSICR1_FB1_DMA_INTEN;
                         writel(0, pcdev->base_csi + CSIDMASA_FB1);
@@ -835,7 +867,7 @@ static int mx2_start_streaming(struct vb2_queue *q, unsigned int count)
         unsigned long phys;
         int bytesperline;
 
-        if (cpu_is_mx27()) {
+        if (is_imx27_camera(pcdev)) {
                 unsigned long flags;
                 if (count < 2)
                         return -EINVAL;
@@ -930,7 +962,7 @@ static int mx2_stop_streaming(struct vb2_queue *q)
         void *b;
         u32 cntl;
 
-        if (cpu_is_mx27()) {
+        if (is_imx27_camera(pcdev)) {
                 spin_lock_irqsave(&pcdev->lock, flags);
 
                 cntl = readl(pcdev->base_emma + PRP_CNTL);
@@ -1082,11 +1114,11 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd)
         if (bytesperline < 0)
                 return bytesperline;
 
-        if (cpu_is_mx27()) {
+        if (is_imx27_camera(pcdev)) {
                 ret = mx27_camera_emma_prp_reset(pcdev);
                 if (ret)
                         return ret;
-        } else if (cpu_is_mx25()) {
+        } else if (is_imx25_camera(pcdev)) {
                 writel((bytesperline * icd->user_height) >> 2,
                                 pcdev->base_csi + CSIRXCNT);
                 writel((bytesperline << 16) | icd->user_height,
@@ -1392,7 +1424,7 @@ static int mx2_camera_try_fmt(struct soc_camera_device *icd,
         /* FIXME: implement MX27 limits */
 
         /* limit to MX25 hardware capabilities */
-        if (cpu_is_mx25()) {
+        if (is_imx25_camera(pcdev)) {
                 if (xlate->host_fmt->bits_per_sample <= 8)
                         width_limit = 0xffff * 4;
                 else
@@ -1726,6 +1758,20 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev)
                 goto exit;
         }
 
+        pcdev->devtype = pdev->id_entry->driver_data;
+        switch (pcdev->devtype) {
+        case IMX25_CAMERA:
+                pcdev->reg_csisr = CSISR_IMX25;
+                pcdev->reg_csicr3 = CSICR3_IMX25;
+                break;
+        case IMX27_CAMERA:
+                pcdev->reg_csisr = CSISR_IMX27;
+                pcdev->reg_csicr3 = CSICR3_IMX27;
+                break;
+        default:
+                break;
+        }
+
         pcdev->clk_csi = devm_clk_get(&pdev->dev, "ahb");
         if (IS_ERR(pcdev->clk_csi)) {
                 dev_err(&pdev->dev, "Could not get csi clock\n");
@@ -1763,7 +1809,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev)
         pcdev->dev = &pdev->dev;
         platform_set_drvdata(pdev, pcdev);
 
-        if (cpu_is_mx25()) {
+        if (is_imx25_camera(pcdev)) {
                 err = devm_request_irq(&pdev->dev, irq_csi, mx25_camera_irq, 0,
                                        MX2_CAM_DRV_NAME, pcdev);
                 if (err) {
@@ -1772,7 +1818,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev)
                 }
         }
 
-        if (cpu_is_mx27()) {
+        if (is_imx27_camera(pcdev)) {
                 err = mx27_camera_emma_init(pdev);
                 if (err)
                         goto exit;
@@ -1789,7 +1835,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev)
         pcdev->soc_host.priv            = pcdev;
         pcdev->soc_host.v4l2_dev.dev    = &pdev->dev;
         pcdev->soc_host.nr              = pdev->id;
-        if (cpu_is_mx25())
+        if (is_imx25_camera(pcdev))
                 pcdev->soc_host.capabilities = SOCAM_HOST_CAP_STRIDE;
 
         pcdev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
@@ -1809,7 +1855,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev)
 exit_free_emma:
         vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx);
 eallocctx:
-        if (cpu_is_mx27()) {
+        if (is_imx27_camera(pcdev)) {
                 clk_disable_unprepare(pcdev->clk_emma_ipg);
                 clk_disable_unprepare(pcdev->clk_emma_ahb);
         }
@@ -1827,7 +1873,7 @@ static int __devexit mx2_camera_remove(struct platform_device *pdev)
 
         vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx);
 
-        if (cpu_is_mx27()) {
+        if (is_imx27_camera(pcdev)) {
                 clk_disable_unprepare(pcdev->clk_emma_ipg);
                 clk_disable_unprepare(pcdev->clk_emma_ahb);
         }
@@ -1841,6 +1887,7 @@ static struct platform_driver mx2_camera_driver = {
         .driver         = {
                 .name   = MX2_CAM_DRV_NAME,
         },
+        .id_table       = mx2_camera_devtype,
         .remove         = __devexit_p(mx2_camera_remove),
 };
 
diff --git a/drivers/media/platform/soc_camera/mx3_camera.c b/drivers/media/platform/soc_camera/mx3_camera.c
index 3557ac97e430..64d39b1b5582 100644
--- a/drivers/media/platform/soc_camera/mx3_camera.c
+++ b/drivers/media/platform/soc_camera/mx3_camera.c
@@ -17,6 +17,7 @@
 #include <linux/vmalloc.h>
 #include <linux/interrupt.h>
 #include <linux/sched.h>
+#include <linux/dma/ipu-dma.h>
 
 #include <media/v4l2-common.h>
 #include <media/v4l2-dev.h>
@@ -24,7 +25,6 @@
 #include <media/soc_camera.h>
 #include <media/soc_mediabus.h>
 
-#include <mach/ipu.h>
 #include <linux/platform_data/camera-mx3.h>
 #include <linux/platform_data/dma-imx.h>
 
diff --git a/drivers/media/platform/soc_camera/omap1_camera.c b/drivers/media/platform/soc_camera/omap1_camera.c
index fa08c7695ccb..cae9ce6275e9 100644
--- a/drivers/media/platform/soc_camera/omap1_camera.c
+++ b/drivers/media/platform/soc_camera/omap1_camera.c
@@ -34,12 +34,13 @@
 #include <media/videobuf-dma-contig.h>
 #include <media/videobuf-dma-sg.h>
 
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 
 #define DRIVER_NAME             "omap1-camera"
 #define DRIVER_VERSION          "0.0.2"
 
+#define OMAP_DMA_CAMERA_IF_RX           20
 
 /*
  * ---------------------------------------------------------------------------
diff --git a/drivers/media/rc/ir-rx51.c b/drivers/media/rc/ir-rx51.c
index 546199e9ccc7..82e6c1e282d5 100644
--- a/drivers/media/rc/ir-rx51.c
+++ b/drivers/media/rc/ir-rx51.c
@@ -28,7 +28,6 @@
 
 #include <plat/dmtimer.h>
 #include <plat/clock.h>
-#include <plat/omap-pm.h>
 
 #include <media/lirc.h>
 #include <media/lirc_dev.h>
diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c
index 55d589981412..998ce8cb3065 100644
--- a/drivers/mfd/menelaus.c
+++ b/drivers/mfd/menelaus.c
@@ -41,11 +41,11 @@
 #include <linux/rtc.h>
 #include <linux/bcd.h>
 #include <linux/slab.h>
+#include <linux/mfd/menelaus.h>
 
 #include <asm/mach/irq.h>
 
 #include <asm/gpio.h>
-#include <plat/menelaus.h>
 
 #define DRIVER_NAME                     "menelaus"
 
diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
index 23cec57c02ba..cebfe0a68aa7 100644
--- a/drivers/mfd/omap-usb-host.c
+++ b/drivers/mfd/omap-usb-host.c
@@ -26,9 +26,12 @@
 #include <linux/spinlock.h>
 #include <linux/gpio.h>
 #include <plat/cpu.h>
-#include <plat/usb.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/usb-omap.h>
 #include <linux/pm_runtime.h>
 
+#include "omap-usb.h"
+
 #define USBHS_DRIVER_NAME       "usbhs_omap"
 #define OMAP_EHCI_DEVICE        "ehci-omap"
 #define OMAP_OHCI_DEVICE        "ohci-omap3"
diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c
index 4b7757b84301..0db0dfa3d08c 100644
--- a/drivers/mfd/omap-usb-tll.c
+++ b/drivers/mfd/omap-usb-tll.c
@@ -25,8 +25,8 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/err.h>
-#include <plat/usb.h>
 #include <linux/pm_runtime.h>
+#include <linux/platform_data/usb-omap.h>
 
 #define USBTLL_DRIVER_NAME      "usbhs_tll"
 
diff --git a/drivers/mfd/omap-usb.h b/drivers/mfd/omap-usb.h
new file mode 100644
index 000000000000..972aa961b064
--- /dev/null
+++ b/drivers/mfd/omap-usb.h
@@ -0,0 +1,2 @@
+extern int omap_tll_enable(void);
+extern int omap_tll_disable(void);
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c
index 6290b7f1ccfe..477f63bad521 100644
--- a/drivers/mmc/host/mxcmmc.c
+++ b/drivers/mmc/host/mxcmmc.c
@@ -41,7 +41,6 @@
 #include <linux/platform_data/mmc-mxcmmc.h>
 
 #include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
 
 #define DRIVER_NAME "mxc-mmc"
 #define MXCMCI_TIMEOUT_MS 10000
@@ -113,6 +112,11 @@
 #define INT_WRITE_OP_DONE_EN            (1 << 1)
 #define INT_READ_OP_EN                  (1 << 0)
 
+enum mxcmci_type {
+        IMX21_MMC,
+        IMX31_MMC,
+};
+
 struct mxcmci_host {
         struct mmc_host         *mmc;
         struct resource         *res;
@@ -153,7 +157,26 @@ struct mxcmci_host {
         struct imx_dma_data     dma_data;
 
         struct timer_list       watchdog;
+        enum mxcmci_type        devtype;
+};
+
+static struct platform_device_id mxcmci_devtype[] = {
+        {
+                .name = "imx21-mmc",
+                .driver_data = IMX21_MMC,
+        }, {
+                .name = "imx31-mmc",
+                .driver_data = IMX31_MMC,
+        }, {
+                /* sentinel */
+        }
 };
+MODULE_DEVICE_TABLE(platform, mxcmci_devtype);
+
+static inline int is_imx31_mmc(struct mxcmci_host *host)
+{
+        return host->devtype == IMX31_MMC;
+}
 
 static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios);
 
@@ -843,6 +866,8 @@ static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
 
 static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card)
 {
+        struct mxcmci_host *mxcmci = mmc_priv(host);
+
         /*
          * MX3 SoCs have a silicon bug which corrupts CRC calculation of
          * multi-block transfers when connected SDIO peripheral doesn't
@@ -850,7 +875,7 @@ static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card)
          * One way to prevent this is to only allow 1-bit transfers.
          */
 
-        if (cpu_is_mx3() && card->type == MMC_TYPE_SDIO)
+        if (is_imx31_mmc(mxcmci) && card->type == MMC_TYPE_SDIO)
                 host->caps &= ~MMC_CAP_4_BIT_DATA;
         else
                 host->caps |= MMC_CAP_4_BIT_DATA;
@@ -948,6 +973,7 @@ static int mxcmci_probe(struct platform_device *pdev)
 
         host->mmc = mmc;
         host->pdata = pdev->dev.platform_data;
+        host->devtype = pdev->id_entry->driver_data;
         spin_lock_init(&host->lock);
 
         mxcmci_init_ocr(host);
@@ -1120,6 +1146,7 @@ static const struct dev_pm_ops mxcmci_pm_ops = {
 static struct platform_driver mxcmci_driver = {
         .probe          = mxcmci_probe,
         .remove         = mxcmci_remove,
+        .id_table       = mxcmci_devtype,
         .driver         = {
                 .name           = DRIVER_NAME,
                 .owner          = THIS_MODULE,
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index 48ad361613ef..ae115c01283b 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -28,9 +28,8 @@
 #include <linux/clk.h>
 #include <linux/scatterlist.h>
 #include <linux/slab.h>
+#include <linux/platform_data/mmc-omap.h>
 
-#include <plat/mmc.h>
-#include <plat/dma.h>
 
 #define OMAP_MMC_REG_CMD        0x00
 #define OMAP_MMC_REG_ARGL       0x01
@@ -72,6 +71,13 @@
 #define OMAP_MMC_STAT_CARD_BUSY         (1 <<  2)
 #define OMAP_MMC_STAT_END_OF_CMD        (1 <<  0)
 
+#define mmc_omap7xx()   (host->features & MMC_OMAP7XX)
+#define mmc_omap15xx()  (host->features & MMC_OMAP15XX)
+#define mmc_omap16xx()  (host->features & MMC_OMAP16XX)
+#define MMC_OMAP1_MASK  (MMC_OMAP7XX | MMC_OMAP15XX | MMC_OMAP16XX)
+#define mmc_omap1()     (host->features & MMC_OMAP1_MASK)
+#define mmc_omap2()     (!mmc_omap1())
+
 #define OMAP_MMC_REG(host, reg)         (OMAP_MMC_REG_##reg << (host)->reg_shift)
 #define OMAP_MMC_READ(host, reg)        __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
 #define OMAP_MMC_WRITE(host, reg, val)  __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg))
@@ -84,6 +90,16 @@
 #define OMAP_MMC_CMDTYPE_AC     2
 #define OMAP_MMC_CMDTYPE_ADTC   3
 
+#define OMAP_DMA_MMC_TX         21
+#define OMAP_DMA_MMC_RX         22
+#define OMAP_DMA_MMC2_TX        54
+#define OMAP_DMA_MMC2_RX        55
+
+#define OMAP24XX_DMA_MMC2_TX    47
+#define OMAP24XX_DMA_MMC2_RX    48
+#define OMAP24XX_DMA_MMC1_TX    61
+#define OMAP24XX_DMA_MMC1_RX    62
+
 
 #define DRIVER_NAME "mmci-omap"
 
@@ -147,6 +163,7 @@ struct mmc_omap_host {
         u32                     buffer_bytes_left;
         u32                     total_bytes_left;
 
+        unsigned                features;
         unsigned                use_dma:1;
         unsigned                brs_received:1, dma_done:1;
         unsigned                dma_in_use:1;
@@ -988,7 +1005,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
                  * blocksize is at least that large. Blocksize is
                  * usually 512 bytes; but not for some SD reads.
                  */
-                burst = cpu_is_omap15xx() ? 32 : 64;
+                burst = mmc_omap15xx() ? 32 : 64;
                 if (burst > data->blksz)
                         burst = data->blksz;
 
@@ -1104,8 +1121,7 @@ static void mmc_omap_set_power(struct mmc_omap_slot *slot, int power_on,
         if (slot->pdata->set_power != NULL)
                 slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on,
                                         vdd);
-
-        if (cpu_is_omap24xx()) {
+        if (mmc_omap2()) {
                 u16 w;
 
                 if (power_on) {
@@ -1239,7 +1255,7 @@ static int __devinit mmc_omap_new_slot(struct mmc_omap_host *host, int id)
         mmc->ops = &mmc_omap_ops;
         mmc->f_min = 400000;
 
-        if (cpu_class_is_omap2())
+        if (mmc_omap2())
                 mmc->f_max = 48000000;
         else
                 mmc->f_max = 24000000;
@@ -1359,6 +1375,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
         init_waitqueue_head(&host->slot_wq);
 
         host->pdata = pdata;
+        host->features = host->pdata->slots[0].features;
         host->dev = &pdev->dev;
         platform_set_drvdata(pdev, host);
 
@@ -1391,7 +1408,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
         host->dma_tx_burst = -1;
         host->dma_rx_burst = -1;
 
-        if (cpu_is_omap24xx())
+        if (mmc_omap2())
                 sig = host->id == 0 ? OMAP24XX_DMA_MMC1_TX : OMAP24XX_DMA_MMC2_TX;
         else
                 sig = host->id == 0 ? OMAP_DMA_MMC_TX : OMAP_DMA_MMC2_TX;
@@ -1407,7 +1424,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
                 dev_warn(host->dev, "unable to obtain TX DMA engine channel %u\n",
                         sig);
 #endif
-        if (cpu_is_omap24xx())
+        if (mmc_omap2())
                 sig = host->id == 0 ? OMAP24XX_DMA_MMC1_RX : OMAP24XX_DMA_MMC2_RX;
         else
                 sig = host->id == 0 ? OMAP_DMA_MMC_RX : OMAP_DMA_MMC2_RX;
@@ -1435,7 +1452,7 @@ static int __devinit mmc_omap_probe(struct platform_device *pdev)
         }
 
         host->nr_slots = pdata->nr_slots;
-        host->reg_shift = (cpu_is_omap7xx() ? 1 : 2);
+        host->reg_shift = (mmc_omap7xx() ? 1 : 2);
 
         host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0);
         if (!host->mmc_omap_wq)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index fedd258cc4ea..e7c185233b18 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -38,9 +38,7 @@
 #include <linux/gpio.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pm_runtime.h>
-#include <mach/hardware.h>
-#include <plat/mmc.h>
-#include <plat/cpu.h>
+#include <linux/platform_data/mmc-omap.h>
 
 /* OMAP HSMMC Host Controller Registers */
 #define OMAP_HSMMC_SYSSTATUS    0x0014
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 72e31d86030d..022dcdc256fb 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -37,15 +37,9 @@
 
 #include <asm/mach/flash.h>
 #include <linux/platform_data/mtd-mxc_nand.h>
-#include <mach/hardware.h>
 
 #define DRIVER_NAME "mxc_nand"
 
-#define nfc_is_v21()            (cpu_is_mx25() || cpu_is_mx35())
-#define nfc_is_v1()             (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21())
-#define nfc_is_v3_2a()          cpu_is_mx51()
-#define nfc_is_v3_2b()          cpu_is_mx53()
-
 /* Addresses for NFC registers */
 #define NFC_V1_V2_BUF_SIZE              (host->regs + 0x00)
 #define NFC_V1_V2_BUF_ADDR              (host->regs + 0x04)
@@ -1283,6 +1277,53 @@ static const struct mxc_nand_devtype_data imx53_nand_devtype_data = {
         .ppb_shift = 8,
 };
 
+static inline int is_imx21_nfc(struct mxc_nand_host *host)
+{
+        return host->devtype_data == &imx21_nand_devtype_data;
+}
+
+static inline int is_imx27_nfc(struct mxc_nand_host *host)
+{
+        return host->devtype_data == &imx27_nand_devtype_data;
+}
+
+static inline int is_imx25_nfc(struct mxc_nand_host *host)
+{
+        return host->devtype_data == &imx25_nand_devtype_data;
+}
+
+static inline int is_imx51_nfc(struct mxc_nand_host *host)
+{
+        return host->devtype_data == &imx51_nand_devtype_data;
+}
+
+static inline int is_imx53_nfc(struct mxc_nand_host *host)
+{
+        return host->devtype_data == &imx53_nand_devtype_data;
+}
+
+static struct platform_device_id mxcnd_devtype[] = {
+        {
+                .name = "imx21-nand",
+                .driver_data = (kernel_ulong_t) &imx21_nand_devtype_data,
+        }, {
+                .name = "imx27-nand",
+                .driver_data = (kernel_ulong_t) &imx27_nand_devtype_data,
+        }, {
+                .name = "imx25-nand",
+                .driver_data = (kernel_ulong_t) &imx25_nand_devtype_data,
+        }, {
+                .name = "imx51-nand",
+                .driver_data = (kernel_ulong_t) &imx51_nand_devtype_data,
+        }, {
+                .name = "imx53-nand",
+                .driver_data = (kernel_ulong_t) &imx53_nand_devtype_data,
+        }, {
+                /* sentinel */
+        }
+};
+MODULE_DEVICE_TABLE(platform, mxcnd_devtype);
+
 #ifdef CONFIG_OF_MTD
 static const struct of_device_id mxcnd_dt_ids[] = {
         {
@@ -1337,32 +1378,6 @@ static int __init mxcnd_probe_dt(struct mxc_nand_host *host)
 }
 #endif
 
-static int __init mxcnd_probe_pdata(struct mxc_nand_host *host)
-{
-        struct mxc_nand_platform_data *pdata = host->dev->platform_data;
-
-        if (!pdata)
-                return -ENODEV;
-
-        host->pdata = *pdata;
-
-        if (nfc_is_v1()) {
-                if (cpu_is_mx21())
-                        host->devtype_data = &imx21_nand_devtype_data;
-                else
-                        host->devtype_data = &imx27_nand_devtype_data;
-        } else if (nfc_is_v21()) {
-                host->devtype_data = &imx25_nand_devtype_data;
-        } else if (nfc_is_v3_2a()) {
-                host->devtype_data = &imx51_nand_devtype_data;
-        } else if (nfc_is_v3_2b()) {
-                host->devtype_data = &imx53_nand_devtype_data;
-        } else
-                BUG();
-
-        return 0;
-}
-
 static int __devinit mxcnd_probe(struct platform_device *pdev)
 {
         struct nand_chip *this;
@@ -1404,8 +1419,16 @@ static int __devinit mxcnd_probe(struct platform_device *pdev)
                 return PTR_ERR(host->clk);
 
         err = mxcnd_probe_dt(host);
-        if (err > 0)
-                err = mxcnd_probe_pdata(host);
+        if (err > 0) {
+                struct mxc_nand_platform_data *pdata = pdev->dev.platform_data;
+                if (pdata) {
+                        host->pdata = *pdata;
+                        host->devtype_data = (struct mxc_nand_devtype_data *)
+                                                pdev->id_entry->driver_data;
+                } else {
+                        err = -ENODEV;
+                }
+        }
         if (err < 0)
                 return err;
 
@@ -1494,7 +1517,7 @@ static int __devinit mxcnd_probe(struct platform_device *pdev)
         }
 
         /* first scan to find the device and get the page size */
-        if (nand_scan_ident(mtd, nfc_is_v21() ? 4 : 1, NULL)) {
+        if (nand_scan_ident(mtd, is_imx25_nfc(host) ? 4 : 1, NULL)) {
                 err = -ENXIO;
                 goto escan;
         }
@@ -1508,7 +1531,7 @@ static int __devinit mxcnd_probe(struct platform_device *pdev)
                 this->ecc.layout = host->devtype_data->ecclayout_4k;
 
         if (this->ecc.mode == NAND_ECC_HW) {
-                if (nfc_is_v1())
+                if (is_imx21_nfc(host) || is_imx27_nfc(host))
                         this->ecc.strength = 1;
                 else
                         this->ecc.strength = (host->eccsize == 4) ? 4 : 8;
@@ -1555,6 +1578,7 @@ static struct platform_driver mxcnd_driver = {
                    .owner = THIS_MODULE,
                    .of_match_table = of_match_ptr(mxcnd_dt_ids),
         },
+        .id_table = mxcnd_devtype,
         .probe = mxcnd_probe,
         .remove = __devexit_p(mxcnd_remove),
 };
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b3138620646..5c8978e90240 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -27,8 +27,7 @@
 #include <linux/bch.h>
 #endif
 
-#include <plat/dma.h>
-#include <plat/gpmc.h>
+#include <plat-omap/dma-omap.h>
 #include <linux/platform_data/mtd-nand-omap2.h>
 
 #define DRIVER_NAME     "omap2-nand"
@@ -106,10 +105,18 @@
 #define CS_MASK                         0x7
 #define ENABLE_PREFETCH                 (0x1 << 7)
 #define DMA_MPU_MODE_SHIFT              2
+#define ECCSIZE0_SHIFT                  12
 #define ECCSIZE1_SHIFT                  22
 #define ECC1RESULTSIZE                  0x1
 #define ECCCLEAR                        0x100
 #define ECC1                            0x1
+#define PREFETCH_FIFOTHRESHOLD_MAX      0x40
+#define PREFETCH_FIFOTHRESHOLD(val)     ((val) << 8)
+#define PREFETCH_STATUS_COUNT(val)      (val & 0x00003fff)
+#define PREFETCH_STATUS_FIFO_CNT(val)   ((val >> 24) & 0x7F)
+#define STATUS_BUFF_EMPTY               0x00000001
+
+#define OMAP24XX_DMA_GPMC               4
 
 /* oob info generated runtime depending on ecc algorithm and layout selected */
 static struct nand_ecclayout omap_oobinfo;
@@ -269,7 +276,7 @@ static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
                 /* wait until buffer is available for write */
                 do {
                         status = readl(info->reg.gpmc_status) &
-                                        GPMC_STATUS_BUFF_EMPTY;
+                                        STATUS_BUFF_EMPTY;
                 } while (!status);
         }
 }
@@ -307,7 +314,7 @@ static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
                 /* wait until buffer is available for write */
                 do {
                         status = readl(info->reg.gpmc_status) &
-                                        GPMC_STATUS_BUFF_EMPTY;
+                                        STATUS_BUFF_EMPTY;
                 } while (!status);
         }
 }
@@ -348,7 +355,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
         } else {
                 do {
                         r_count = readl(info->reg.gpmc_prefetch_status);
-                        r_count = GPMC_PREFETCH_STATUS_FIFO_CNT(r_count);
+                        r_count = PREFETCH_STATUS_FIFO_CNT(r_count);
                         r_count = r_count >> 2;
                         ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
                         p += r_count;
@@ -395,7 +402,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
         } else {
                 while (len) {
                         w_count = readl(info->reg.gpmc_prefetch_status);
-                        w_count = GPMC_PREFETCH_STATUS_FIFO_CNT(w_count);
+                        w_count = PREFETCH_STATUS_FIFO_CNT(w_count);
                         w_count = w_count >> 1;
                         for (i = 0; (i < w_count) && len; i++, len -= 2)
                                 iowrite16(*p++, info->nand.IO_ADDR_W);
@@ -407,7 +414,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
                 do {
                         cpu_relax();
                         val = readl(info->reg.gpmc_prefetch_status);
-                        val = GPMC_PREFETCH_STATUS_COUNT(val);
+                        val = PREFETCH_STATUS_COUNT(val);
                 } while (val && (tim++ < limit));
 
                 /* disable and stop the PFPW engine */
@@ -493,7 +500,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
         do {
                 cpu_relax();
                 val = readl(info->reg.gpmc_prefetch_status);
-                val = GPMC_PREFETCH_STATUS_COUNT(val);
+                val = PREFETCH_STATUS_COUNT(val);
         } while (val && (tim++ < limit));
 
         /* disable and stop the PFPW engine */
@@ -556,7 +563,7 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev)
         u32 bytes;
 
         bytes = readl(info->reg.gpmc_prefetch_status);
-        bytes = GPMC_PREFETCH_STATUS_FIFO_CNT(bytes);
+        bytes = PREFETCH_STATUS_FIFO_CNT(bytes);
         bytes = bytes  & 0xFFFC; /* io in multiple of 4 bytes */
         if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
                 if (this_irq == info->gpmc_irq_count)
@@ -682,7 +689,7 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
         limit = (loops_per_jiffy *  msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
         do {
                 val = readl(info->reg.gpmc_prefetch_status);
-                val = GPMC_PREFETCH_STATUS_COUNT(val);
+                val = PREFETCH_STATUS_COUNT(val);
                 cpu_relax();
         } while (val && (tim++ < limit));
 
@@ -996,7 +1003,7 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
                 cond_resched();
         }
 
-        status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA);
+        status = readb(info->reg.gpmc_nand_data);
         return status;
 }
 
@@ -1029,19 +1036,45 @@ static int omap_dev_ready(struct mtd_info *mtd)
 static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
 {
         int nerrors;
-        unsigned int dev_width;
+        unsigned int dev_width, nsectors;
         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                    mtd);
         struct nand_chip *chip = mtd->priv;
+        u32 val;
 
         nerrors = (info->nand.ecc.bytes == 13) ? 8 : 4;
         dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
+        nsectors = 1;
         /*
          * Program GPMC to perform correction on one 512-byte sector at a time.
          * Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible and
          * gives a slight (5%) performance gain (but requires additional code).
          */
-        (void)gpmc_enable_hwecc_bch(info->gpmc_cs, mode, dev_width, 1, nerrors);
+
+        writel(ECC1, info->reg.gpmc_ecc_control);
+
+        /*
+         * When using BCH, sector size is hardcoded to 512 bytes.
+         * Here we are using wrapping mode 6 both for reading and writing, with:
+         *  size0 = 0  (no additional protected byte in spare area)
+         *  size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
+         */
+        val = (32 << ECCSIZE1_SHIFT) | (0 << ECCSIZE0_SHIFT);
+        writel(val, info->reg.gpmc_ecc_size_config);
+
+        /* BCH configuration */
+        val = ((1                        << 16) | /* enable BCH */
+               (((nerrors == 8) ? 1 : 0) << 12) | /* 8 or 4 bits */
+               (0x06                     <<  8) | /* wrap mode = 6 */
+               (dev_width                <<  7) | /* bus width */
+               (((nsectors-1) & 0x7)     <<  4) | /* number of sectors */
+               (info->gpmc_cs            <<  1) | /* ECC CS */
+               (0x1));                            /* enable ECC */
+
+        writel(val, info->reg.gpmc_ecc_config);
+
+        /* clear ecc and enable bits */
+        writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
 }
 
 /**
@@ -1055,7 +1088,32 @@ static int omap3_calculate_ecc_bch4(struct mtd_info *mtd, const u_char *dat,
 {
         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                    mtd);
-        return gpmc_calculate_ecc_bch4(info->gpmc_cs, dat, ecc_code);
+        unsigned long nsectors, val1, val2;
+        int i;
+
+        nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
+
+        for (i = 0; i < nsectors; i++) {
+
+                /* Read hw-computed remainder */
+                val1 = readl(info->reg.gpmc_bch_result0[i]);
+                val2 = readl(info->reg.gpmc_bch_result1[i]);
+
+                /*
+                 * Add constant polynomial to remainder, in order to get an ecc
+                 * sequence of 0xFFs for a buffer filled with 0xFFs; and
+                 * left-justify the resulting polynomial.
+                 */
+                *ecc_code++ = 0x28 ^ ((val2 >> 12) & 0xFF);
+                *ecc_code++ = 0x13 ^ ((val2 >>  4) & 0xFF);
+                *ecc_code++ = 0xcc ^ (((val2 & 0xF) << 4)|((val1 >> 28) & 0xF));
+                *ecc_code++ = 0x39 ^ ((val1 >> 20) & 0xFF);
+                *ecc_code++ = 0x96 ^ ((val1 >> 12) & 0xFF);
+                *ecc_code++ = 0xac ^ ((val1 >> 4) & 0xFF);
+                *ecc_code++ = 0x7f ^ ((val1 & 0xF) << 4);
+        }
+
+        return 0;
 }
 
 /**
@@ -1069,7 +1127,39 @@ static int omap3_calculate_ecc_bch8(struct mtd_info *mtd, const u_char *dat,
 {
         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                    mtd);
-        return gpmc_calculate_ecc_bch8(info->gpmc_cs, dat, ecc_code);
+        unsigned long nsectors, val1, val2, val3, val4;
+        int i;
+
+        nsectors = ((readl(info->reg.gpmc_ecc_config) >> 4) & 0x7) + 1;
+
+        for (i = 0; i < nsectors; i++) {
+
+                /* Read hw-computed remainder */
+                val1 = readl(info->reg.gpmc_bch_result0[i]);
+                val2 = readl(info->reg.gpmc_bch_result1[i]);
+                val3 = readl(info->reg.gpmc_bch_result2[i]);
+                val4 = readl(info->reg.gpmc_bch_result3[i]);
+
+                /*
+                 * Add constant polynomial to remainder, in order to get an ecc
+                 * sequence of 0xFFs for a buffer filled with 0xFFs.
+                 */
+                *ecc_code++ = 0xef ^ (val4 & 0xFF);
+                *ecc_code++ = 0x51 ^ ((val3 >> 24) & 0xFF);
+                *ecc_code++ = 0x2e ^ ((val3 >> 16) & 0xFF);
+                *ecc_code++ = 0x09 ^ ((val3 >> 8) & 0xFF);
+                *ecc_code++ = 0xed ^ (val3 & 0xFF);
+                *ecc_code++ = 0x93 ^ ((val2 >> 24) & 0xFF);
+                *ecc_code++ = 0x9a ^ ((val2 >> 16) & 0xFF);
+                *ecc_code++ = 0xc2 ^ ((val2 >> 8) & 0xFF);
+                *ecc_code++ = 0x97 ^ (val2 & 0xFF);
+                *ecc_code++ = 0x79 ^ ((val1 >> 24) & 0xFF);
+                *ecc_code++ = 0xe5 ^ ((val1 >> 16) & 0xFF);
+                *ecc_code++ = 0x24 ^ ((val1 >> 8) & 0xFF);
+                *ecc_code++ = 0xb5 ^ (val1 & 0xFF);
+        }
+
+        return 0;
 }
 
 /**
@@ -1125,7 +1215,7 @@ static void omap3_free_bch(struct mtd_info *mtd)
  */
 static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
 {
-        int ret, max_errors;
+        int max_errors;
         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                    mtd);
 #ifdef CONFIG_MTD_NAND_OMAP_BCH8
@@ -1142,11 +1232,6 @@ static int omap3_init_bch(struct mtd_info *mtd, int ecc_opt)
                 goto fail;
         }
 
-        /* initialize GPMC BCH engine */
-        ret = gpmc_init_hwecc_bch(info->gpmc_cs, 1, max_errors);
-        if (ret)
-                goto fail;
-
         /* software bch library is only used to detect and locate errors */
         info->bch = init_bch(13, max_errors, 0x201b /* hw polynomial */);
         if (!info->bch)
@@ -1513,7 +1598,7 @@ static int omap_nand_remove(struct platform_device *pdev)
         /* Release NAND device, its internal structures and partitions */
         nand_release(&info->mtd);
         iounmap(info->nand.IO_ADDR_R);
-        release_mem_region(info->phys_base, NAND_IO_SIZE);
+        release_mem_region(info->phys_base, info->mem_size);
         kfree(info);
         return 0;
 }
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 1961be985171..99f96e19ebea 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -38,12 +38,10 @@
 #include <linux/regulator/consumer.h>
 
 #include <asm/mach/flash.h>
-#include <plat/gpmc.h>
 #include <linux/platform_data/mtd-onenand-omap2.h>
 #include <asm/gpio.h>
 
-#include <plat/dma.h>
-#include <plat/cpu.h>
+#include <plat-omap/dma-omap.h>
 
 #define DRIVER_NAME "omap2-onenand"
 
@@ -63,6 +61,7 @@ struct omap2_onenand {
         int freq;
         int (*setup)(void __iomem *base, int *freq_ptr);
         struct regulator *regulator;
+        u8 flags;
 };
 
 static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data)
@@ -155,7 +154,7 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
                 if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) {
                         syscfg |= ONENAND_SYS_CFG1_IOBE;
                         write_reg(c, syscfg, ONENAND_REG_SYS_CFG1);
-                        if (cpu_is_omap34xx())
+                        if (c->flags & ONENAND_IN_OMAP34XX)
                                 /* Add a delay to let GPIO settle */
                                 syscfg = read_reg(c, ONENAND_REG_SYS_CFG1);
                 }
@@ -446,13 +445,19 @@ out_copy:
 
 #else
 
-int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
-                                 unsigned char *buffer, int offset,
-                                 size_t count);
+static int omap3_onenand_read_bufferram(struct mtd_info *mtd, int area,
+                                        unsigned char *buffer, int offset,
+                                        size_t count)
+{
+        return -ENOSYS;
+}
 
-int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
-                                  const unsigned char *buffer,
-                                  int offset, size_t count);
+static int omap3_onenand_write_bufferram(struct mtd_info *mtd, int area,
+                                         const unsigned char *buffer,
+                                         int offset, size_t count)
+{
+        return -ENOSYS;
+}
 
 #endif
 
@@ -550,13 +555,19 @@ static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
 
 #else
 
-int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
-                                 unsigned char *buffer, int offset,
-                                 size_t count);
+static int omap2_onenand_read_bufferram(struct mtd_info *mtd, int area,
+                                        unsigned char *buffer, int offset,
+                                        size_t count)
+{
+        return -ENOSYS;
+}
 
-int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
-                                  const unsigned char *buffer,
-                                  int offset, size_t count);
+static int omap2_onenand_write_bufferram(struct mtd_info *mtd, int area,
+                                         const unsigned char *buffer,
+                                         int offset, size_t count)
+{
+        return -ENOSYS;
+}
 
 #endif
 
@@ -639,6 +650,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
 
         init_completion(&c->irq_done);
         init_completion(&c->dma_done);
+        c->flags = pdata->flags;
         c->gpmc_cs = pdata->cs;
         c->gpio_irq = pdata->gpio_irq;
         c->dma_channel = pdata->dma_channel;
@@ -729,7 +741,7 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev)
         this = &c->onenand;
         if (c->dma_channel >= 0) {
                 this->wait = omap2_onenand_wait;
-                if (cpu_is_omap34xx()) {
+                if (c->flags & ONENAND_IN_OMAP34XX) {
                         this->read_bufferram = omap3_onenand_read_bufferram;
                         this->write_bufferram = omap3_onenand_write_bufferram;
                 } else {
@@ -803,7 +815,6 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
         }
         iounmap(c->onenand.base);
         release_mem_region(c->phys_base, c->mem_size);
-        gpmc_cs_free(c->gpmc_cs);
         kfree(c);
 
         return 0;
diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c
index fa74efe82206..25c4b1993b3d 100644
--- a/drivers/pcmcia/omap_cf.c
+++ b/drivers/pcmcia/omap_cf.c
@@ -25,7 +25,7 @@
 #include <asm/sizes.h>
 
 #include <mach/mux.h>
-#include <plat/tc.h>
+#include <mach/tc.h>
 
 
 /* NOTE:  don't expect this to support many I/O cards.  The 16xx chips have
diff --git a/drivers/rtc/rtc-mxc.c b/drivers/rtc/rtc-mxc.c
index cd0106293a49..7304139934aa 100644
--- a/drivers/rtc/rtc-mxc.c
+++ b/drivers/rtc/rtc-mxc.c
@@ -17,8 +17,6 @@
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 
-#include <mach/hardware.h>
-
 #define RTC_INPUT_CLK_32768HZ   (0x00 << 5)
 #define RTC_INPUT_CLK_32000HZ   (0x01 << 5)
 #define RTC_INPUT_CLK_38400HZ   (0x02 << 5)
@@ -72,14 +70,38 @@ static const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = {
 #define RTC_TEST2       0x2C    /*  32bit rtc test reg 2 */
 #define RTC_TEST3       0x30    /*  32bit rtc test reg 3 */
 
+enum imx_rtc_type {
+        IMX1_RTC,
+        IMX21_RTC,
+};
+
 struct rtc_plat_data {
         struct rtc_device *rtc;
         void __iomem *ioaddr;
         int irq;
         struct clk *clk;
         struct rtc_time g_rtc_alarm;
+        enum imx_rtc_type devtype;
 };
 
+static struct platform_device_id imx_rtc_devtype[] = {
+        {
+                .name = "imx1-rtc",
+                .driver_data = IMX1_RTC,
+        }, {
+                .name = "imx21-rtc",
+                .driver_data = IMX21_RTC,
+        }, {
+                /* sentinel */
+        }
+};
+MODULE_DEVICE_TABLE(platform, imx_rtc_devtype);
+
+static inline int is_imx1_rtc(struct rtc_plat_data *data)
+{
+        return data->devtype == IMX1_RTC;
+}
+
 /*
  * This function is used to obtain the RTC time or the alarm value in
  * second.
@@ -278,10 +300,13 @@ static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm)
  */
 static int mxc_rtc_set_mmss(struct device *dev, unsigned long time)
 {
+        struct platform_device *pdev = to_platform_device(dev);
+        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
+
         /*
          * TTC_DAYR register is 9-bit in MX1 SoC, save time and day of year only
          */
-        if (cpu_is_mx1()) {
+        if (is_imx1_rtc(pdata)) {
                 struct rtc_time tm;
 
                 rtc_time_to_tm(time, &tm);
@@ -360,6 +385,8 @@ static int __devinit mxc_rtc_probe(struct platform_device *pdev)
         if (!pdata)
                 return -ENOMEM;
 
+        pdata->devtype = pdev->id_entry->driver_data;
+
         if (!devm_request_mem_region(&pdev->dev, res->start,
                                      resource_size(res), pdev->name))
                 return -EBUSY;
@@ -480,6 +507,7 @@ static struct platform_driver mxc_rtc_driver = {
 #endif
                    .owner       = THIS_MODULE,
         },
+        .id_table = imx_rtc_devtype,
         .probe = mxc_rtc_probe,
         .remove = __devexit_p(mxc_rtc_remove),
 };
diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
index 094fdc366f30..97cdf0856aed 100644
--- a/drivers/staging/nvec/nvec.c
+++ b/drivers/staging/nvec/nvec.c
@@ -39,7 +39,6 @@
 #include <linux/workqueue.h>
 
 #include <mach/clk.h>
-#include <mach/iomap.h>
 
 #include "nvec.h"
 
diff --git a/drivers/staging/tidspbridge/core/ue_deh.c b/drivers/staging/tidspbridge/core/ue_deh.c
index 3d28b2345fbd..6aea6f1b4982 100644
--- a/drivers/staging/tidspbridge/core/ue_deh.c
+++ b/drivers/staging/tidspbridge/core/ue_deh.c
@@ -19,7 +19,6 @@
 
 #include <linux/kernel.h>
 #include <linux/interrupt.h>
-#include <plat/dmtimer.h>
 
 #include <dspbridge/dbdefs.h>
 #include <dspbridge/dspdeh.h>
diff --git a/drivers/staging/tidspbridge/include/dspbridge/host_os.h b/drivers/staging/tidspbridge/include/dspbridge/host_os.h
index 5e2f4d82d925..7f3a1db31619 100644
--- a/drivers/staging/tidspbridge/include/dspbridge/host_os.h
+++ b/drivers/staging/tidspbridge/include/dspbridge/host_os.h
@@ -40,7 +40,6 @@
 #include <linux/vmalloc.h>
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
-#include <plat/clock.h>
 #include <linux/clk.h>
 #include <plat/mailbox.h>
 #include <linux/pagemap.h>
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index 8c0b7b42319c..60b076cc4e20 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -73,10 +73,42 @@
 #define ECHO_OP_SET_CANON_COL 0x81
 #define ECHO_OP_ERASE_TAB 0x82
 
+struct n_tty_data {
+        unsigned int column;
+        unsigned long overrun_time;
+        int num_overrun;
+
+        unsigned char lnext:1, erasing:1, raw:1, real_raw:1, icanon:1;
+        unsigned char echo_overrun:1;
+
+        DECLARE_BITMAP(process_char_map, 256);
+        DECLARE_BITMAP(read_flags, N_TTY_BUF_SIZE);
+
+        char *read_buf;
+        int read_head;
+        int read_tail;
+        int read_cnt;
+
+        unsigned char *echo_buf;
+        unsigned int echo_pos;
+        unsigned int echo_cnt;
+
+        int canon_data;
+        unsigned long canon_head;
+        unsigned int canon_column;
+
+        struct mutex atomic_read_lock;
+        struct mutex output_lock;
+        struct mutex echo_lock;
+        spinlock_t read_lock;
+};
+
 static inline int tty_put_user(struct tty_struct *tty, unsigned char x,
                                unsigned char __user *ptr)
 {
-        tty_audit_add_data(tty, &x, 1);
+        struct n_tty_data *ldata = tty->disc_data;
+
+        tty_audit_add_data(tty, &x, 1, ldata->icanon);
         return put_user(x, ptr);
 }
 
@@ -92,17 +124,18 @@ static inline int tty_put_user(struct tty_struct *tty, unsigned char x,
 
 static void n_tty_set_room(struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int left;
         int old_left;
 
-        /* tty->read_cnt is not read locked ? */
+        /* ldata->read_cnt is not read locked ? */
         if (I_PARMRK(tty)) {
                 /* Multiply read_cnt by 3, since each byte might take up to
                  * three times as many spaces when PARMRK is set (depending on
                  * its flags, e.g. parity error). */
-                left = N_TTY_BUF_SIZE - tty->read_cnt * 3 - 1;
+                left = N_TTY_BUF_SIZE - ldata->read_cnt * 3 - 1;
         } else
-                left = N_TTY_BUF_SIZE - tty->read_cnt - 1;
+                left = N_TTY_BUF_SIZE - ldata->read_cnt - 1;
 
         /*
          * If we are doing input canonicalization, and there are no
@@ -111,44 +144,47 @@ static void n_tty_set_room(struct tty_struct *tty)
          * characters will be beeped.
          */
         if (left <= 0)
-                left = tty->icanon && !tty->canon_data;
+                left = ldata->icanon && !ldata->canon_data;
         old_left = tty->receive_room;
         tty->receive_room = left;
 
         /* Did this open up the receive buffer? We may need to flip */
-        if (left && !old_left)
-                schedule_work(&tty->buf.work);
+        if (left && !old_left) {
+                WARN_RATELIMIT(tty->port->itty == NULL,
+                                "scheduling with invalid itty");
+                schedule_work(&tty->port->buf.work);
+        }
 }
 
-static void put_tty_queue_nolock(unsigned char c, struct tty_struct *tty)
+static void put_tty_queue_nolock(unsigned char c, struct n_tty_data *ldata)
 {
-        if (tty->read_cnt < N_TTY_BUF_SIZE) {
-                tty->read_buf[tty->read_head] = c;
-                tty->read_head = (tty->read_head + 1) & (N_TTY_BUF_SIZE-1);
-                tty->read_cnt++;
+        if (ldata->read_cnt < N_TTY_BUF_SIZE) {
+                ldata->read_buf[ldata->read_head] = c;
+                ldata->read_head = (ldata->read_head + 1) & (N_TTY_BUF_SIZE-1);
+                ldata->read_cnt++;
         }
 }
 
 /**
  *      put_tty_queue           -       add character to tty
  *      @c: character
- *      @tty: tty device
+ *      @ldata: n_tty data
  *
  *      Add a character to the tty read_buf queue. This is done under the
  *      read_lock to serialize character addition and also to protect us
  *      against parallel reads or flushes
  */
 
-static void put_tty_queue(unsigned char c, struct tty_struct *tty)
+static void put_tty_queue(unsigned char c, struct n_tty_data *ldata)
 {
         unsigned long flags;
         /*
          *      The problem of stomping on the buffers ends here.
          *      Why didn't anyone see this one coming? --AJK
         */
-        spin_lock_irqsave(&tty->read_lock, flags);
-        put_tty_queue_nolock(c, tty);
-        spin_unlock_irqrestore(&tty->read_lock, flags);
+        spin_lock_irqsave(&ldata->read_lock, flags);
+        put_tty_queue_nolock(c, ldata);
+        spin_unlock_irqrestore(&ldata->read_lock, flags);
 }
 
 /**
@@ -179,18 +215,19 @@ static void check_unthrottle(struct tty_struct *tty)
 
 static void reset_buffer_flags(struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         unsigned long flags;
 
-        spin_lock_irqsave(&tty->read_lock, flags);
-        tty->read_head = tty->read_tail = tty->read_cnt = 0;
-        spin_unlock_irqrestore(&tty->read_lock, flags);
+        spin_lock_irqsave(&ldata->read_lock, flags);
+        ldata->read_head = ldata->read_tail = ldata->read_cnt = 0;
+        spin_unlock_irqrestore(&ldata->read_lock, flags);
 
-        mutex_lock(&tty->echo_lock);
-        tty->echo_pos = tty->echo_cnt = tty->echo_overrun = 0;
-        mutex_unlock(&tty->echo_lock);
+        mutex_lock(&ldata->echo_lock);
+        ldata->echo_pos = ldata->echo_cnt = ldata->echo_overrun = 0;
+        mutex_unlock(&ldata->echo_lock);
 
-        tty->canon_head = tty->canon_data = tty->erasing = 0;
-        memset(&tty->read_flags, 0, sizeof tty->read_flags);
+        ldata->canon_head = ldata->canon_data = ldata->erasing = 0;
+        bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE);
         n_tty_set_room(tty);
 }
 
@@ -235,18 +272,19 @@ static void n_tty_flush_buffer(struct tty_struct *tty)
 
 static ssize_t n_tty_chars_in_buffer(struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         unsigned long flags;
         ssize_t n = 0;
 
-        spin_lock_irqsave(&tty->read_lock, flags);
-        if (!tty->icanon) {
-                n = tty->read_cnt;
-        } else if (tty->canon_data) {
-                n = (tty->canon_head > tty->read_tail) ?
-                        tty->canon_head - tty->read_tail :
-                        tty->canon_head + (N_TTY_BUF_SIZE - tty->read_tail);
+        spin_lock_irqsave(&ldata->read_lock, flags);
+        if (!ldata->icanon) {
+                n = ldata->read_cnt;
+        } else if (ldata->canon_data) {
+                n = (ldata->canon_head > ldata->read_tail) ?
+                        ldata->canon_head - ldata->read_tail :
+                        ldata->canon_head + (N_TTY_BUF_SIZE - ldata->read_tail);
         }
-        spin_unlock_irqrestore(&tty->read_lock, flags);
+        spin_unlock_irqrestore(&ldata->read_lock, flags);
         return n;
 }
 
@@ -301,6 +339,7 @@ static inline int is_continuation(unsigned char c, struct tty_struct *tty)
 
 static int do_output_char(unsigned char c, struct tty_struct *tty, int space)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int     spaces;
 
         if (!space)
@@ -309,48 +348,48 @@ static int do_output_char(unsigned char c, struct tty_struct *tty, int space)
         switch (c) {
         case '\n':
                 if (O_ONLRET(tty))
-                        tty->column = 0;
+                        ldata->column = 0;
                 if (O_ONLCR(tty)) {
                         if (space < 2)
                                 return -1;
-                        tty->canon_column = tty->column = 0;
+                        ldata->canon_column = ldata->column = 0;
                         tty->ops->write(tty, "\r\n", 2);
                         return 2;
                 }
-                tty->canon_column = tty->column;
+                ldata->canon_column = ldata->column;
                 break;
         case '\r':
-                if (O_ONOCR(tty) && tty->column == 0)
+                if (O_ONOCR(tty) && ldata->column == 0)
                         return 0;
                 if (O_OCRNL(tty)) {
                         c = '\n';
                         if (O_ONLRET(tty))
-                                tty->canon_column = tty->column = 0;
+                                ldata->canon_column = ldata->column = 0;
                         break;
                 }
-                tty->canon_column = tty->column = 0;
+                ldata->canon_column = ldata->column = 0;
                 break;
         case '\t':
-                spaces = 8 - (tty->column & 7);
+                spaces = 8 - (ldata->column & 7);
                 if (O_TABDLY(tty) == XTABS) {
                         if (space < spaces)
                                 return -1;
-                        tty->column += spaces;
+                        ldata->column += spaces;
                         tty->ops->write(tty, "        ", spaces);
                         return spaces;
                 }
-                tty->column += spaces;
+                ldata->column += spaces;
                 break;
         case '\b':
-                if (tty->column > 0)
-                        tty->column--;
+                if (ldata->column > 0)
+                        ldata->column--;
                 break;
         default:
                 if (!iscntrl(c)) {
                         if (O_OLCUC(tty))
                                 c = toupper(c);
                         if (!is_continuation(c, tty))
-                                tty->column++;
+                                ldata->column++;
                 }
                 break;
         }
@@ -375,14 +414,15 @@ static int do_output_char(unsigned char c, struct tty_struct *tty, int space)
 
 static int process_output(unsigned char c, struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int     space, retval;
 
-        mutex_lock(&tty->output_lock);
+        mutex_lock(&ldata->output_lock);
 
         space = tty_write_room(tty);
         retval = do_output_char(c, tty, space);
 
-        mutex_unlock(&tty->output_lock);
+        mutex_unlock(&ldata->output_lock);
         if (retval < 0)
                 return -1;
         else
@@ -411,15 +451,16 @@ static int process_output(unsigned char c, struct tty_struct *tty)
 static ssize_t process_output_block(struct tty_struct *tty,
                                     const unsigned char *buf, unsigned int nr)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int     space;
         int     i;
         const unsigned char *cp;
 
-        mutex_lock(&tty->output_lock);
+        mutex_lock(&ldata->output_lock);
 
         space = tty_write_room(tty);
         if (!space) {
-                mutex_unlock(&tty->output_lock);
+                mutex_unlock(&ldata->output_lock);
                 return 0;
         }
         if (nr > space)
@@ -431,30 +472,30 @@ static ssize_t process_output_block(struct tty_struct *tty,
                 switch (c) {
                 case '\n':
                         if (O_ONLRET(tty))
-                                tty->column = 0;
+                                ldata->column = 0;
                         if (O_ONLCR(tty))
                                 goto break_out;
-                        tty->canon_column = tty->column;
+                        ldata->canon_column = ldata->column;
                         break;
                 case '\r':
-                        if (O_ONOCR(tty) && tty->column == 0)
+                        if (O_ONOCR(tty) && ldata->column == 0)
                                 goto break_out;
                         if (O_OCRNL(tty))
                                 goto break_out;
-                        tty->canon_column = tty->column = 0;
+                        ldata->canon_column = ldata->column = 0;
                         break;
                 case '\t':
                         goto break_out;
                 case '\b':
-                        if (tty->column > 0)
-                                tty->column--;
+                        if (ldata->column > 0)
+                                ldata->column--;
                         break;
                 default:
                         if (!iscntrl(c)) {
                                 if (O_OLCUC(tty))
                                         goto break_out;
                                 if (!is_continuation(c, tty))
-                                        tty->column++;
+                                        ldata->column++;
                         }
                         break;
                 }
@@ -462,7 +503,7 @@ static ssize_t process_output_block(struct tty_struct *tty,
 break_out:
         i = tty->ops->write(tty, buf, i);
 
-        mutex_unlock(&tty->output_lock);
+        mutex_unlock(&ldata->output_lock);
         return i;
 }
 
@@ -494,21 +535,22 @@ break_out:
 
 static void process_echoes(struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int     space, nr;
         unsigned char c;
         unsigned char *cp, *buf_end;
 
-        if (!tty->echo_cnt)
+        if (!ldata->echo_cnt)
                 return;
 
-        mutex_lock(&tty->output_lock);
-        mutex_lock(&tty->echo_lock);
+        mutex_lock(&ldata->output_lock);
+        mutex_lock(&ldata->echo_lock);
 
         space = tty_write_room(tty);
 
-        buf_end = tty->echo_buf + N_TTY_BUF_SIZE;
-        cp = tty->echo_buf + tty->echo_pos;
-        nr = tty->echo_cnt;
+        buf_end = ldata->echo_buf + N_TTY_BUF_SIZE;
+        cp = ldata->echo_buf + ldata->echo_pos;
+        nr = ldata->echo_cnt;
         while (nr > 0) {
                 c = *cp;
                 if (c == ECHO_OP_START) {
@@ -545,7 +587,7 @@ static void process_echoes(struct tty_struct *tty)
                                  * Otherwise, tab spacing is normal.
                                  */
                                 if (!(num_chars & 0x80))
-                                        num_chars += tty->canon_column;
+                                        num_chars += ldata->canon_column;
                                 num_bs = 8 - (num_chars & 7);
 
                                 if (num_bs > space) {
@@ -555,22 +597,22 @@ static void process_echoes(struct tty_struct *tty)
                                 space -= num_bs;
                                 while (num_bs--) {
                                         tty_put_char(tty, '\b');
-                                        if (tty->column > 0)
-                                                tty->column--;
+                                        if (ldata->column > 0)
+                                                ldata->column--;
                                 }
                                 cp += 3;
                                 nr -= 3;
                                 break;
 
                         case ECHO_OP_SET_CANON_COL:
-                                tty->canon_column = tty->column;
+                                ldata->canon_column = ldata->column;
                                 cp += 2;
                                 nr -= 2;
                                 break;
 
                         case ECHO_OP_MOVE_BACK_COL:
-                                if (tty->column > 0)
-                                        tty->column--;
+                                if (ldata->column > 0)
+                                        ldata->column--;
                                 cp += 2;
                                 nr -= 2;
                                 break;
@@ -582,7 +624,7 @@ static void process_echoes(struct tty_struct *tty)
                                         break;
                                 }
                                 tty_put_char(tty, ECHO_OP_START);
-                                tty->column++;
+                                ldata->column++;
                                 space--;
                                 cp += 2;
                                 nr -= 2;
@@ -604,7 +646,7 @@ static void process_echoes(struct tty_struct *tty)
                                 }
                                 tty_put_char(tty, '^');
                                 tty_put_char(tty, op ^ 0100);
-                                tty->column += 2;
+                                ldata->column += 2;
                                 space -= 2;
                                 cp += 2;
                                 nr -= 2;
@@ -635,20 +677,20 @@ static void process_echoes(struct tty_struct *tty)
         }
 
         if (nr == 0) {
-                tty->echo_pos = 0;
-                tty->echo_cnt = 0;
-                tty->echo_overrun = 0;
+                ldata->echo_pos = 0;
+                ldata->echo_cnt = 0;
+                ldata->echo_overrun = 0;
         } else {
-                int num_processed = tty->echo_cnt - nr;
-                tty->echo_pos += num_processed;
-                tty->echo_pos &= N_TTY_BUF_SIZE - 1;
-                tty->echo_cnt = nr;
+                int num_processed = ldata->echo_cnt - nr;
+                ldata->echo_pos += num_processed;
+                ldata->echo_pos &= N_TTY_BUF_SIZE - 1;
+                ldata->echo_cnt = nr;
                 if (num_processed > 0)
-                        tty->echo_overrun = 0;
+                        ldata->echo_overrun = 0;
         }
 
-        mutex_unlock(&tty->echo_lock);
-        mutex_unlock(&tty->output_lock);
+        mutex_unlock(&ldata->echo_lock);
+        mutex_unlock(&ldata->output_lock);
 
         if (tty->ops->flush_chars)
                 tty->ops->flush_chars(tty);
@@ -657,72 +699,70 @@ static void process_echoes(struct tty_struct *tty)
 /**
  *      add_echo_byte   -       add a byte to the echo buffer
  *      @c: unicode byte to echo
- *      @tty: terminal device
+ *      @ldata: n_tty data
  *
  *      Add a character or operation byte to the echo buffer.
  *
  *      Should be called under the echo lock to protect the echo buffer.
  */
 
-static void add_echo_byte(unsigned char c, struct tty_struct *tty)
+static void add_echo_byte(unsigned char c, struct n_tty_data *ldata)
 {
         int     new_byte_pos;
 
-        if (tty->echo_cnt == N_TTY_BUF_SIZE) {
+        if (ldata->echo_cnt == N_TTY_BUF_SIZE) {
                 /* Circular buffer is already at capacity */
-                new_byte_pos = tty->echo_pos;
+                new_byte_pos = ldata->echo_pos;
 
                 /*
                  * Since the buffer start position needs to be advanced,
                  * be sure to step by a whole operation byte group.
                  */
-                if (tty->echo_buf[tty->echo_pos] == ECHO_OP_START) {
-                        if (tty->echo_buf[(tty->echo_pos + 1) &
+                if (ldata->echo_buf[ldata->echo_pos] == ECHO_OP_START) {
+                        if (ldata->echo_buf[(ldata->echo_pos + 1) &
                                           (N_TTY_BUF_SIZE - 1)] ==
                                                 ECHO_OP_ERASE_TAB) {
-                                tty->echo_pos += 3;
-                                tty->echo_cnt -= 2;
+                                ldata->echo_pos += 3;
+                                ldata->echo_cnt -= 2;
                         } else {
-                                tty->echo_pos += 2;
-                                tty->echo_cnt -= 1;
+                                ldata->echo_pos += 2;
+                                ldata->echo_cnt -= 1;
                         }
                 } else {
-                        tty->echo_pos++;
+                        ldata->echo_pos++;
                 }
-                tty->echo_pos &= N_TTY_BUF_SIZE - 1;
+                ldata->echo_pos &= N_TTY_BUF_SIZE - 1;
 
-                tty->echo_overrun = 1;
+                ldata->echo_overrun = 1;
         } else {
-                new_byte_pos = tty->echo_pos + tty->echo_cnt;
+                new_byte_pos = ldata->echo_pos + ldata->echo_cnt;
                 new_byte_pos &= N_TTY_BUF_SIZE - 1;
-                tty->echo_cnt++;
+                ldata->echo_cnt++;
         }
 
-        tty->echo_buf[new_byte_pos] = c;
+        ldata->echo_buf[new_byte_pos] = c;
 }
 
 /**
  *      echo_move_back_col      -       add operation to move back a column
- *      @tty: terminal device
+ *      @ldata: n_tty data
  *
  *      Add an operation to the echo buffer to move back one column.
  *
  *      Locking: echo_lock to protect the echo buffer
  */
 
-static void echo_move_back_col(struct tty_struct *tty)
+static void echo_move_back_col(struct n_tty_data *ldata)
 {
-        mutex_lock(&tty->echo_lock);
-
-        add_echo_byte(ECHO_OP_START, tty);
-        add_echo_byte(ECHO_OP_MOVE_BACK_COL, tty);
-
-        mutex_unlock(&tty->echo_lock);
+        mutex_lock(&ldata->echo_lock);
+        add_echo_byte(ECHO_OP_START, ldata);
+        add_echo_byte(ECHO_OP_MOVE_BACK_COL, ldata);
+        mutex_unlock(&ldata->echo_lock);
 }
 
 /**
  *      echo_set_canon_col      -       add operation to set the canon column
- *      @tty: terminal device
+ *      @ldata: n_tty data
  *
  *      Add an operation to the echo buffer to set the canon column
  *      to the current column.
@@ -730,21 +770,19 @@ static void echo_move_back_col(struct tty_struct *tty)
  *      Locking: echo_lock to protect the echo buffer
  */
 
-static void echo_set_canon_col(struct tty_struct *tty)
+static void echo_set_canon_col(struct n_tty_data *ldata)
 {
-        mutex_lock(&tty->echo_lock);
-
-        add_echo_byte(ECHO_OP_START, tty);
-        add_echo_byte(ECHO_OP_SET_CANON_COL, tty);
-
-        mutex_unlock(&tty->echo_lock);
+        mutex_lock(&ldata->echo_lock);
+        add_echo_byte(ECHO_OP_START, ldata);
+        add_echo_byte(ECHO_OP_SET_CANON_COL, ldata);
+        mutex_unlock(&ldata->echo_lock);
 }
 
 /**
  *      echo_erase_tab  -       add operation to erase a tab
  *      @num_chars: number of character columns already used
  *      @after_tab: true if num_chars starts after a previous tab
- *      @tty: terminal device
+ *      @ldata: n_tty data
  *
  *      Add an operation to the echo buffer to erase a tab.
  *
@@ -758,12 +796,12 @@ static void echo_set_canon_col(struct tty_struct *tty)
  */
 
 static void echo_erase_tab(unsigned int num_chars, int after_tab,
-                           struct tty_struct *tty)
+                           struct n_tty_data *ldata)
 {
-        mutex_lock(&tty->echo_lock);
+        mutex_lock(&ldata->echo_lock);
 
-        add_echo_byte(ECHO_OP_START, tty);
-        add_echo_byte(ECHO_OP_ERASE_TAB, tty);
+        add_echo_byte(ECHO_OP_START, ldata);
+        add_echo_byte(ECHO_OP_ERASE_TAB, ldata);
 
         /* We only need to know this modulo 8 (tab spacing) */
         num_chars &= 7;
@@ -772,9 +810,9 @@ static void echo_erase_tab(unsigned int num_chars, int after_tab,
         if (after_tab)
                 num_chars |= 0x80;
 
-        add_echo_byte(num_chars, tty);
+        add_echo_byte(num_chars, ldata);
 
-        mutex_unlock(&tty->echo_lock);
+        mutex_unlock(&ldata->echo_lock);
 }
 
 /**
@@ -790,18 +828,16 @@ static void echo_erase_tab(unsigned int num_chars, int after_tab,
  *      Locking: echo_lock to protect the echo buffer
  */
 
-static void echo_char_raw(unsigned char c, struct tty_struct *tty)
+static void echo_char_raw(unsigned char c, struct n_tty_data *ldata)
 {
-        mutex_lock(&tty->echo_lock);
-
+        mutex_lock(&ldata->echo_lock);
         if (c == ECHO_OP_START) {
-                add_echo_byte(ECHO_OP_START, tty);
-                add_echo_byte(ECHO_OP_START, tty);
+                add_echo_byte(ECHO_OP_START, ldata);
+                add_echo_byte(ECHO_OP_START, ldata);
         } else {
-                add_echo_byte(c, tty);
+                add_echo_byte(c, ldata);
         }
-
-        mutex_unlock(&tty->echo_lock);
+        mutex_unlock(&ldata->echo_lock);
 }
 
 /**
@@ -820,30 +856,32 @@ static void echo_char_raw(unsigned char c, struct tty_struct *tty)
 
 static void echo_char(unsigned char c, struct tty_struct *tty)
 {
-        mutex_lock(&tty->echo_lock);
+        struct n_tty_data *ldata = tty->disc_data;
+
+        mutex_lock(&ldata->echo_lock);
 
         if (c == ECHO_OP_START) {
-                add_echo_byte(ECHO_OP_START, tty);
-                add_echo_byte(ECHO_OP_START, tty);
+                add_echo_byte(ECHO_OP_START, ldata);
+                add_echo_byte(ECHO_OP_START, ldata);
         } else {
                 if (L_ECHOCTL(tty) && iscntrl(c) && c != '\t')
-                        add_echo_byte(ECHO_OP_START, tty);
-                add_echo_byte(c, tty);
+                        add_echo_byte(ECHO_OP_START, ldata);
+                add_echo_byte(c, ldata);
         }
 
-        mutex_unlock(&tty->echo_lock);
+        mutex_unlock(&ldata->echo_lock);
 }
 
 /**
  *      finish_erasing          -       complete erase
- *      @tty: tty doing the erase
+ *      @ldata: n_tty data
  */
 
-static inline void finish_erasing(struct tty_struct *tty)
+static inline void finish_erasing(struct n_tty_data *ldata)
 {
-        if (tty->erasing) {
-                echo_char_raw('/', tty);
-                tty->erasing = 0;
+        if (ldata->erasing) {
+                echo_char_raw('/', ldata);
+                ldata->erasing = 0;
         }
 }
 
@@ -861,12 +899,13 @@ static inline void finish_erasing(struct tty_struct *tty)
 
 static void eraser(unsigned char c, struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         enum { ERASE, WERASE, KILL } kill_type;
         int head, seen_alnums, cnt;
         unsigned long flags;
 
         /* FIXME: locking needed ? */
-        if (tty->read_head == tty->canon_head) {
+        if (ldata->read_head == ldata->canon_head) {
                 /* process_output('\a', tty); */ /* what do you think? */
                 return;
         }
@@ -876,24 +915,24 @@ static void eraser(unsigned char c, struct tty_struct *tty)
                 kill_type = WERASE;
         else {
                 if (!L_ECHO(tty)) {
-                        spin_lock_irqsave(&tty->read_lock, flags);
-                        tty->read_cnt -= ((tty->read_head - tty->canon_head) &
+                        spin_lock_irqsave(&ldata->read_lock, flags);
+                        ldata->read_cnt -= ((ldata->read_head - ldata->canon_head) &
                                           (N_TTY_BUF_SIZE - 1));
-                        tty->read_head = tty->canon_head;
-                        spin_unlock_irqrestore(&tty->read_lock, flags);
+                        ldata->read_head = ldata->canon_head;
+                        spin_unlock_irqrestore(&ldata->read_lock, flags);
                         return;
                 }
                 if (!L_ECHOK(tty) || !L_ECHOKE(tty) || !L_ECHOE(tty)) {
-                        spin_lock_irqsave(&tty->read_lock, flags);
-                        tty->read_cnt -= ((tty->read_head - tty->canon_head) &
+                        spin_lock_irqsave(&ldata->read_lock, flags);
+                        ldata->read_cnt -= ((ldata->read_head - ldata->canon_head) &
                                           (N_TTY_BUF_SIZE - 1));
-                        tty->read_head = tty->canon_head;
-                        spin_unlock_irqrestore(&tty->read_lock, flags);
-                        finish_erasing(tty);
+                        ldata->read_head = ldata->canon_head;
+                        spin_unlock_irqrestore(&ldata->read_lock, flags);
+                        finish_erasing(ldata);
                         echo_char(KILL_CHAR(tty), tty);
                         /* Add a newline if ECHOK is on and ECHOKE is off. */
                         if (L_ECHOK(tty))
-                                echo_char_raw('\n', tty);
+                                echo_char_raw('\n', ldata);
                         return;
                 }
                 kill_type = KILL;
@@ -901,14 +940,14 @@ static void eraser(unsigned char c, struct tty_struct *tty)
 
         seen_alnums = 0;
         /* FIXME: Locking ?? */
-        while (tty->read_head != tty->canon_head) {
-                head = tty->read_head;
+        while (ldata->read_head != ldata->canon_head) {
+                head = ldata->read_head;
 
                 /* erase a single possibly multibyte character */
                 do {
                         head = (head - 1) & (N_TTY_BUF_SIZE-1);
-                        c = tty->read_buf[head];
-                } while (is_continuation(c, tty) && head != tty->canon_head);
+                        c = ldata->read_buf[head];
+                } while (is_continuation(c, tty) && head != ldata->canon_head);
 
                 /* do not partially erase */
                 if (is_continuation(c, tty))
@@ -921,30 +960,31 @@ static void eraser(unsigned char c, struct tty_struct *tty)
                         else if (seen_alnums)
                                 break;
                 }
-                cnt = (tty->read_head - head) & (N_TTY_BUF_SIZE-1);
-                spin_lock_irqsave(&tty->read_lock, flags);
-                tty->read_head = head;
-                tty->read_cnt -= cnt;
-                spin_unlock_irqrestore(&tty->read_lock, flags);
+                cnt = (ldata->read_head - head) & (N_TTY_BUF_SIZE-1);
+                spin_lock_irqsave(&ldata->read_lock, flags);
+                ldata->read_head = head;
+                ldata->read_cnt -= cnt;
+                spin_unlock_irqrestore(&ldata->read_lock, flags);
                 if (L_ECHO(tty)) {
                         if (L_ECHOPRT(tty)) {
-                                if (!tty->erasing) {
-                                        echo_char_raw('\\', tty);
-                                        tty->erasing = 1;
+                                if (!ldata->erasing) {
+                                        echo_char_raw('\\', ldata);
+                                        ldata->erasing = 1;
                                 }
                                 /* if cnt > 1, output a multi-byte character */
                                 echo_char(c, tty);
                                 while (--cnt > 0) {
                                         head = (head+1) & (N_TTY_BUF_SIZE-1);
-                                        echo_char_raw(tty->read_buf[head], tty);
-                                        echo_move_back_col(tty);
+                                        echo_char_raw(ldata->read_buf[head],
+                                                        ldata);
+                                        echo_move_back_col(ldata);
                                 }
                         } else if (kill_type == ERASE && !L_ECHOE(tty)) {
                                 echo_char(ERASE_CHAR(tty), tty);
                         } else if (c == '\t') {
                                 unsigned int num_chars = 0;
                                 int after_tab = 0;
-                                unsigned long tail = tty->read_head;
+                                unsigned long tail = ldata->read_head;
 
                                 /*
                                  * Count the columns used for characters
@@ -953,9 +993,9 @@ static void eraser(unsigned char c, struct tty_struct *tty)
                                  * This info is used to go back the correct
                                  * number of columns.
                                  */
-                                while (tail != tty->canon_head) {
+                                while (tail != ldata->canon_head) {
                                         tail = (tail-1) & (N_TTY_BUF_SIZE-1);
-                                        c = tty->read_buf[tail];
+                                        c = ldata->read_buf[tail];
                                         if (c == '\t') {
                                                 after_tab = 1;
                                                 break;
@@ -966,25 +1006,25 @@ static void eraser(unsigned char c, struct tty_struct *tty)
                                                 num_chars++;
                                         }
                                 }
-                                echo_erase_tab(num_chars, after_tab, tty);
+                                echo_erase_tab(num_chars, after_tab, ldata);
                         } else {
                                 if (iscntrl(c) && L_ECHOCTL(tty)) {
-                                        echo_char_raw('\b', tty);
-                                        echo_char_raw(' ', tty);
-                                        echo_char_raw('\b', tty);
+                                        echo_char_raw('\b', ldata);
+                                        echo_char_raw(' ', ldata);
+                                        echo_char_raw('\b', ldata);
                                 }
                                 if (!iscntrl(c) || L_ECHOCTL(tty)) {
-                                        echo_char_raw('\b', tty);
-                                        echo_char_raw(' ', tty);
-                                        echo_char_raw('\b', tty);
+                                        echo_char_raw('\b', ldata);
+                                        echo_char_raw(' ', ldata);
+                                        echo_char_raw('\b', ldata);
                                 }
                         }
                 }
                 if (kill_type == ERASE)
                         break;
         }
-        if (tty->read_head == tty->canon_head && L_ECHO(tty))
-                finish_erasing(tty);
+        if (ldata->read_head == ldata->canon_head && L_ECHO(tty))
+                finish_erasing(ldata);
 }
 
 /**
@@ -1023,6 +1063,8 @@ static inline void isig(int sig, struct tty_struct *tty, int flush)
 
 static inline void n_tty_receive_break(struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
+
         if (I_IGNBRK(tty))
                 return;
         if (I_BRKINT(tty)) {
@@ -1030,10 +1072,10 @@ static inline void n_tty_receive_break(struct tty_struct *tty)
                 return;
         }
         if (I_PARMRK(tty)) {
-                put_tty_queue('\377', tty);
-                put_tty_queue('\0', tty);
+                put_tty_queue('\377', ldata);
+                put_tty_queue('\0', ldata);
         }
-        put_tty_queue('\0', tty);
+        put_tty_queue('\0', ldata);
         wake_up_interruptible(&tty->read_wait);
 }
 
@@ -1052,16 +1094,17 @@ static inline void n_tty_receive_break(struct tty_struct *tty)
 
 static inline void n_tty_receive_overrun(struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         char buf[64];
 
-        tty->num_overrun++;
-        if (time_before(tty->overrun_time, jiffies - HZ) ||
-                        time_after(tty->overrun_time, jiffies)) {
+        ldata->num_overrun++;
+        if (time_after(jiffies, ldata->overrun_time + HZ) ||
+                        time_after(ldata->overrun_time, jiffies)) {
                 printk(KERN_WARNING "%s: %d input overrun(s)\n",
                         tty_name(tty, buf),
-                        tty->num_overrun);
-                tty->overrun_time = jiffies;
-                tty->num_overrun = 0;
+                        ldata->num_overrun);
+                ldata->overrun_time = jiffies;
+                ldata->num_overrun = 0;
         }
 }
 
@@ -1076,16 +1119,18 @@ static inline void n_tty_receive_overrun(struct tty_struct *tty)
 static inline void n_tty_receive_parity_error(struct tty_struct *tty,
                                               unsigned char c)
 {
+        struct n_tty_data *ldata = tty->disc_data;
+
         if (I_IGNPAR(tty))
                 return;
         if (I_PARMRK(tty)) {
-                put_tty_queue('\377', tty);
-                put_tty_queue('\0', tty);
-                put_tty_queue(c, tty);
+                put_tty_queue('\377', ldata);
+                put_tty_queue('\0', ldata);
+                put_tty_queue(c, ldata);
         } else  if (I_INPCK(tty))
-                put_tty_queue('\0', tty);
+                put_tty_queue('\0', ldata);
         else
-                put_tty_queue(c, tty);
+                put_tty_queue(c, ldata);
         wake_up_interruptible(&tty->read_wait);
 }
 
@@ -1101,11 +1146,12 @@ static inline void n_tty_receive_parity_error(struct tty_struct *tty,
 
 static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         unsigned long flags;
         int parmrk;
 
-        if (tty->raw) {
-                put_tty_queue(c, tty);
+        if (ldata->raw) {
+                put_tty_queue(c, ldata);
                 return;
         }
 
@@ -1115,7 +1161,7 @@ static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
                 c = tolower(c);
 
         if (L_EXTPROC(tty)) {
-                put_tty_queue(c, tty);
+                put_tty_queue(c, ldata);
                 return;
         }
 
@@ -1143,26 +1189,26 @@ static inline void n_tty_receive_char(struct tty_struct *tty, unsigned char c)
          * handle specially, do shortcut processing to speed things
          * up.
          */
-        if (!test_bit(c, tty->process_char_map) || tty->lnext) {
-                tty->lnext = 0;
+        if (!test_bit(c, ldata->process_char_map) || ldata->lnext) {
+                ldata->lnext = 0;
                 parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty)) ? 1 : 0;
-                if (tty->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) {
+                if (ldata->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) {
                         /* beep if no space */
                         if (L_ECHO(tty))
                                 process_output('\a', tty);
                         return;
                 }
                 if (L_ECHO(tty)) {
-                        finish_erasing(tty);
+                        finish_erasing(ldata);
                         /* Record the column of first canon char. */
-                        if (tty->canon_head == tty->read_head)
-                                echo_set_canon_col(tty);
+                        if (ldata->canon_head == ldata->read_head)
+                                echo_set_canon_col(ldata);
                         echo_char(c, tty);
                         process_echoes(tty);
                 }
                 if (parmrk)
-                        put_tty_queue(c, tty);
-                put_tty_queue(c, tty);
+                        put_tty_queue(c, ldata);
+                put_tty_queue(c, ldata);
                 return;
         }
 
@@ -1218,7 +1264,7 @@ send_signal:
         } else if (c == '\n' && I_INLCR(tty))
                 c = '\r';
 
-        if (tty->icanon) {
+        if (ldata->icanon) {
                 if (c == ERASE_CHAR(tty) || c == KILL_CHAR(tty) ||
                     (c == WERASE_CHAR(tty) && L_IEXTEN(tty))) {
                         eraser(c, tty);
@@ -1226,12 +1272,12 @@ send_signal:
                         return;
                 }
                 if (c == LNEXT_CHAR(tty) && L_IEXTEN(tty)) {
-                        tty->lnext = 1;
+                        ldata->lnext = 1;
                         if (L_ECHO(tty)) {
-                                finish_erasing(tty);
+                                finish_erasing(ldata);
                                 if (L_ECHOCTL(tty)) {
-                                        echo_char_raw('^', tty);
-                                        echo_char_raw('\b', tty);
+                                        echo_char_raw('^', ldata);
+                                        echo_char_raw('\b', ldata);
                                         process_echoes(tty);
                                 }
                         }
@@ -1239,34 +1285,34 @@ send_signal:
                 }
                 if (c == REPRINT_CHAR(tty) && L_ECHO(tty) &&
                     L_IEXTEN(tty)) {
-                        unsigned long tail = tty->canon_head;
+                        unsigned long tail = ldata->canon_head;
 
-                        finish_erasing(tty);
+                        finish_erasing(ldata);
                         echo_char(c, tty);
-                        echo_char_raw('\n', tty);
-                        while (tail != tty->read_head) {
-                                echo_char(tty->read_buf[tail], tty);
+                        echo_char_raw('\n', ldata);
+                        while (tail != ldata->read_head) {
+                                echo_char(ldata->read_buf[tail], tty);
                                 tail = (tail+1) & (N_TTY_BUF_SIZE-1);
                         }
                         process_echoes(tty);
                         return;
                 }
                 if (c == '\n') {
-                        if (tty->read_cnt >= N_TTY_BUF_SIZE) {
+                        if (ldata->read_cnt >= N_TTY_BUF_SIZE) {
                                 if (L_ECHO(tty))
                                         process_output('\a', tty);
                                 return;
                         }
                         if (L_ECHO(tty) || L_ECHONL(tty)) {
-                                echo_char_raw('\n', tty);
+                                echo_char_raw('\n', ldata);
                                 process_echoes(tty);
                         }
                         goto handle_newline;
                 }
                 if (c == EOF_CHAR(tty)) {
-                        if (tty->read_cnt >= N_TTY_BUF_SIZE)
+                        if (ldata->read_cnt >= N_TTY_BUF_SIZE)
                                 return;
-                        if (tty->canon_head != tty->read_head)
+                        if (ldata->canon_head != ldata->read_head)
                                 set_bit(TTY_PUSH, &tty->flags);
                         c = __DISABLED_CHAR;
                         goto handle_newline;
@@ -1275,7 +1321,7 @@ send_signal:
                     (c == EOL2_CHAR(tty) && L_IEXTEN(tty))) {
                         parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty))
                                  ? 1 : 0;
-                        if (tty->read_cnt >= (N_TTY_BUF_SIZE - parmrk)) {
+                        if (ldata->read_cnt >= (N_TTY_BUF_SIZE - parmrk)) {
                                 if (L_ECHO(tty))
                                         process_output('\a', tty);
                                 return;
@@ -1285,8 +1331,8 @@ send_signal:
                          */
                         if (L_ECHO(tty)) {
                                 /* Record the column of first canon char. */
-                                if (tty->canon_head == tty->read_head)
-                                        echo_set_canon_col(tty);
+                                if (ldata->canon_head == ldata->read_head)
+                                        echo_set_canon_col(ldata);
                                 echo_char(c, tty);
                                 process_echoes(tty);
                         }
@@ -1295,15 +1341,15 @@ send_signal:
                          * EOL_CHAR and EOL2_CHAR?
                          */
                         if (parmrk)
-                                put_tty_queue(c, tty);
+                                put_tty_queue(c, ldata);
 
 handle_newline:
-                        spin_lock_irqsave(&tty->read_lock, flags);
-                        set_bit(tty->read_head, tty->read_flags);
-                        put_tty_queue_nolock(c, tty);
-                        tty->canon_head = tty->read_head;
-                        tty->canon_data++;
-                        spin_unlock_irqrestore(&tty->read_lock, flags);
+                        spin_lock_irqsave(&ldata->read_lock, flags);
+                        set_bit(ldata->read_head, ldata->read_flags);
+                        put_tty_queue_nolock(c, ldata);
+                        ldata->canon_head = ldata->read_head;
+                        ldata->canon_data++;
+                        spin_unlock_irqrestore(&ldata->read_lock, flags);
                         kill_fasync(&tty->fasync, SIGIO, POLL_IN);
                         if (waitqueue_active(&tty->read_wait))
                                 wake_up_interruptible(&tty->read_wait);
@@ -1312,29 +1358,29 @@ handle_newline:
         }
 
         parmrk = (c == (unsigned char) '\377' && I_PARMRK(tty)) ? 1 : 0;
-        if (tty->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) {
+        if (ldata->read_cnt >= (N_TTY_BUF_SIZE - parmrk - 1)) {
                 /* beep if no space */
                 if (L_ECHO(tty))
                         process_output('\a', tty);
                 return;
         }
         if (L_ECHO(tty)) {
-                finish_erasing(tty);
+                finish_erasing(ldata);
                 if (c == '\n')
-                        echo_char_raw('\n', tty);
+                        echo_char_raw('\n', ldata);
                 else {
                         /* Record the column of first canon char. */
-                        if (tty->canon_head == tty->read_head)
-                                echo_set_canon_col(tty);
+                        if (ldata->canon_head == ldata->read_head)
+                                echo_set_canon_col(ldata);
                         echo_char(c, tty);
                 }
                 process_echoes(tty);
         }
 
         if (parmrk)
-                put_tty_queue(c, tty);
+                put_tty_queue(c, ldata);
 
-        put_tty_queue(c, tty);
+        put_tty_queue(c, ldata);
 }
 
 
@@ -1369,33 +1415,31 @@ static void n_tty_write_wakeup(struct tty_struct *tty)
 static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
                               char *fp, int count)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         const unsigned char *p;
         char *f, flags = TTY_NORMAL;
         int     i;
         char    buf[64];
         unsigned long cpuflags;
 
-        if (!tty->read_buf)
-                return;
-
-        if (tty->real_raw) {
-                spin_lock_irqsave(&tty->read_lock, cpuflags);
-                i = min(N_TTY_BUF_SIZE - tty->read_cnt,
-                        N_TTY_BUF_SIZE - tty->read_head);
+        if (ldata->real_raw) {
+                spin_lock_irqsave(&ldata->read_lock, cpuflags);
+                i = min(N_TTY_BUF_SIZE - ldata->read_cnt,
+                        N_TTY_BUF_SIZE - ldata->read_head);
                 i = min(count, i);
-                memcpy(tty->read_buf + tty->read_head, cp, i);
-                tty->read_head = (tty->read_head + i) & (N_TTY_BUF_SIZE-1);
-                tty->read_cnt += i;
+                memcpy(ldata->read_buf + ldata->read_head, cp, i);
+                ldata->read_head = (ldata->read_head + i) & (N_TTY_BUF_SIZE-1);
+                ldata->read_cnt += i;
                 cp += i;
                 count -= i;
 
-                i = min(N_TTY_BUF_SIZE - tty->read_cnt,
-                        N_TTY_BUF_SIZE - tty->read_head);
+                i = min(N_TTY_BUF_SIZE - ldata->read_cnt,
+                        N_TTY_BUF_SIZE - ldata->read_head);
                 i = min(count, i);
-                memcpy(tty->read_buf + tty->read_head, cp, i);
-                tty->read_head = (tty->read_head + i) & (N_TTY_BUF_SIZE-1);
-                tty->read_cnt += i;
-                spin_unlock_irqrestore(&tty->read_lock, cpuflags);
+                memcpy(ldata->read_buf + ldata->read_head, cp, i);
+                ldata->read_head = (ldata->read_head + i) & (N_TTY_BUF_SIZE-1);
+                ldata->read_cnt += i;
+                spin_unlock_irqrestore(&ldata->read_lock, cpuflags);
         } else {
                 for (i = count, p = cp, f = fp; i; i--, p++) {
                         if (f)
@@ -1426,7 +1470,7 @@ static void n_tty_receive_buf(struct tty_struct *tty, const unsigned char *cp,
 
         n_tty_set_room(tty);
 
-        if ((!tty->icanon && (tty->read_cnt >= tty->minimum_to_wake)) ||
+        if ((!ldata->icanon && (ldata->read_cnt >= tty->minimum_to_wake)) ||
                 L_EXTPROC(tty)) {
                 kill_fasync(&tty->fasync, SIGIO, POLL_IN);
                 if (waitqueue_active(&tty->read_wait))
@@ -1470,25 +1514,25 @@ int is_ignored(int sig)
 
 static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int canon_change = 1;
-        BUG_ON(!tty);
 
         if (old)
                 canon_change = (old->c_lflag ^ tty->termios.c_lflag) & ICANON;
         if (canon_change) {
-                memset(&tty->read_flags, 0, sizeof tty->read_flags);
-                tty->canon_head = tty->read_tail;
-                tty->canon_data = 0;
-                tty->erasing = 0;
+                bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE);
+                ldata->canon_head = ldata->read_tail;
+                ldata->canon_data = 0;
+                ldata->erasing = 0;
         }
 
-        if (canon_change && !L_ICANON(tty) && tty->read_cnt)
+        if (canon_change && !L_ICANON(tty) && ldata->read_cnt)
                 wake_up_interruptible(&tty->read_wait);
 
-        tty->icanon = (L_ICANON(tty) != 0);
+        ldata->icanon = (L_ICANON(tty) != 0);
         if (test_bit(TTY_HW_COOK_IN, &tty->flags)) {
-                tty->raw = 1;
-                tty->real_raw = 1;
+                ldata->raw = 1;
+                ldata->real_raw = 1;
                 n_tty_set_room(tty);
                 return;
         }
@@ -1496,51 +1540,51 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
             I_ICRNL(tty) || I_INLCR(tty) || L_ICANON(tty) ||
             I_IXON(tty) || L_ISIG(tty) || L_ECHO(tty) ||
             I_PARMRK(tty)) {
-                memset(tty->process_char_map, 0, 256/8);
+                bitmap_zero(ldata->process_char_map, 256);
 
                 if (I_IGNCR(tty) || I_ICRNL(tty))
-                        set_bit('\r', tty->process_char_map);
+                        set_bit('\r', ldata->process_char_map);
                 if (I_INLCR(tty))
-                        set_bit('\n', tty->process_char_map);
+                        set_bit('\n', ldata->process_char_map);
 
                 if (L_ICANON(tty)) {
-                        set_bit(ERASE_CHAR(tty), tty->process_char_map);
-                        set_bit(KILL_CHAR(tty), tty->process_char_map);
-                        set_bit(EOF_CHAR(tty), tty->process_char_map);
-                        set_bit('\n', tty->process_char_map);
-                        set_bit(EOL_CHAR(tty), tty->process_char_map);
+                        set_bit(ERASE_CHAR(tty), ldata->process_char_map);
+                        set_bit(KILL_CHAR(tty), ldata->process_char_map);
+                        set_bit(EOF_CHAR(tty), ldata->process_char_map);
+                        set_bit('\n', ldata->process_char_map);
+                        set_bit(EOL_CHAR(tty), ldata->process_char_map);
                         if (L_IEXTEN(tty)) {
                                 set_bit(WERASE_CHAR(tty),
-                                        tty->process_char_map);
+                                        ldata->process_char_map);
                                 set_bit(LNEXT_CHAR(tty),
-                                        tty->process_char_map);
+                                        ldata->process_char_map);
                                 set_bit(EOL2_CHAR(tty),
-                                        tty->process_char_map);
+                                        ldata->process_char_map);
                                 if (L_ECHO(tty))
                                         set_bit(REPRINT_CHAR(tty),
-                                                tty->process_char_map);
+                                                ldata->process_char_map);
                         }
                 }
                 if (I_IXON(tty)) {
-                        set_bit(START_CHAR(tty), tty->process_char_map);
-                        set_bit(STOP_CHAR(tty), tty->process_char_map);
+                        set_bit(START_CHAR(tty), ldata->process_char_map);
+                        set_bit(STOP_CHAR(tty), ldata->process_char_map);
                 }
                 if (L_ISIG(tty)) {
-                        set_bit(INTR_CHAR(tty), tty->process_char_map);
-                        set_bit(QUIT_CHAR(tty), tty->process_char_map);
-                        set_bit(SUSP_CHAR(tty), tty->process_char_map);
+                        set_bit(INTR_CHAR(tty), ldata->process_char_map);
+                        set_bit(QUIT_CHAR(tty), ldata->process_char_map);
+                        set_bit(SUSP_CHAR(tty), ldata->process_char_map);
                 }
-                clear_bit(__DISABLED_CHAR, tty->process_char_map);
-                tty->raw = 0;
-                tty->real_raw = 0;
+                clear_bit(__DISABLED_CHAR, ldata->process_char_map);
+                ldata->raw = 0;
+                ldata->real_raw = 0;
         } else {
-                tty->raw = 1;
+                ldata->raw = 1;
                 if ((I_IGNBRK(tty) || (!I_BRKINT(tty) && !I_PARMRK(tty))) &&
                     (I_IGNPAR(tty) || !I_INPCK(tty)) &&
                     (tty->driver->flags & TTY_DRIVER_REAL_RAW))
-                        tty->real_raw = 1;
+                        ldata->real_raw = 1;
                 else
-                        tty->real_raw = 0;
+                        ldata->real_raw = 0;
         }
         n_tty_set_room(tty);
         /* The termios change make the tty ready for I/O */
@@ -1560,15 +1604,13 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
 
 static void n_tty_close(struct tty_struct *tty)
 {
+        struct n_tty_data *ldata = tty->disc_data;
+
         n_tty_flush_buffer(tty);
-        if (tty->read_buf) {
-                kfree(tty->read_buf);
-                tty->read_buf = NULL;
-        }
-        if (tty->echo_buf) {
-                kfree(tty->echo_buf);
-                tty->echo_buf = NULL;
-        }
+        kfree(ldata->read_buf);
+        kfree(ldata->echo_buf);
+        kfree(ldata);
+        tty->disc_data = NULL;
 }
 
 /**
@@ -1583,37 +1625,50 @@ static void n_tty_close(struct tty_struct *tty)
 
 static int n_tty_open(struct tty_struct *tty)
 {
-        if (!tty)
-                return -EINVAL;
+        struct n_tty_data *ldata;
+
+        ldata = kzalloc(sizeof(*ldata), GFP_KERNEL);
+        if (!ldata)
+                goto err;
+
+        ldata->overrun_time = jiffies;
+        mutex_init(&ldata->atomic_read_lock);
+        mutex_init(&ldata->output_lock);
+        mutex_init(&ldata->echo_lock);
+        spin_lock_init(&ldata->read_lock);
 
         /* These are ugly. Currently a malloc failure here can panic */
-        if (!tty->read_buf) {
-                tty->read_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL);
-                if (!tty->read_buf)
-                        return -ENOMEM;
-        }
-        if (!tty->echo_buf) {
-                tty->echo_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL);
+        ldata->read_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL);
+        ldata->echo_buf = kzalloc(N_TTY_BUF_SIZE, GFP_KERNEL);
+        if (!ldata->read_buf || !ldata->echo_buf)
+                goto err_free_bufs;
 
-                if (!tty->echo_buf)
-                        return -ENOMEM;
-        }
+        tty->disc_data = ldata;
         reset_buffer_flags(tty);
         tty_unthrottle(tty);
-        tty->column = 0;
+        ldata->column = 0;
         n_tty_set_termios(tty, NULL);
         tty->minimum_to_wake = 1;
         tty->closing = 0;
+
         return 0;
+err_free_bufs:
+        kfree(ldata->read_buf);
+        kfree(ldata->echo_buf);
+        kfree(ldata);
+err:
+        return -ENOMEM;
 }
 
 static inline int input_available_p(struct tty_struct *tty, int amt)
 {
+        struct n_tty_data *ldata = tty->disc_data;
+
         tty_flush_to_ldisc(tty);
-        if (tty->icanon && !L_EXTPROC(tty)) {
-                if (tty->canon_data)
+        if (ldata->icanon && !L_EXTPROC(tty)) {
+                if (ldata->canon_data)
                         return 1;
-        } else if (tty->read_cnt >= (amt ? amt : 1))
+        } else if (ldata->read_cnt >= (amt ? amt : 1))
                 return 1;
 
         return 0;
@@ -1632,7 +1687,7 @@ static inline int input_available_p(struct tty_struct *tty, int amt)
  *      buffer, and once to drain the space from the (physical) beginning of
  *      the buffer to head pointer.
  *
- *      Called under the tty->atomic_read_lock sem
+ *      Called under the ldata->atomic_read_lock sem
  *
  */
 
@@ -1641,29 +1696,31 @@ static int copy_from_read_buf(struct tty_struct *tty,
                                       size_t *nr)
 
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int retval;
         size_t n;
         unsigned long flags;
         bool is_eof;
 
         retval = 0;
-        spin_lock_irqsave(&tty->read_lock, flags);
-        n = min(tty->read_cnt, N_TTY_BUF_SIZE - tty->read_tail);
+        spin_lock_irqsave(&ldata->read_lock, flags);
+        n = min(ldata->read_cnt, N_TTY_BUF_SIZE - ldata->read_tail);
         n = min(*nr, n);
-        spin_unlock_irqrestore(&tty->read_lock, flags);
+        spin_unlock_irqrestore(&ldata->read_lock, flags);
         if (n) {
-                retval = copy_to_user(*b, &tty->read_buf[tty->read_tail], n);
+                retval = copy_to_user(*b, &ldata->read_buf[ldata->read_tail], n);
                 n -= retval;
                 is_eof = n == 1 &&
-                        tty->read_buf[tty->read_tail] == EOF_CHAR(tty);
-                tty_audit_add_data(tty, &tty->read_buf[tty->read_tail], n);
-                spin_lock_irqsave(&tty->read_lock, flags);
-                tty->read_tail = (tty->read_tail + n) & (N_TTY_BUF_SIZE-1);
-                tty->read_cnt -= n;
+                        ldata->read_buf[ldata->read_tail] == EOF_CHAR(tty);
+                tty_audit_add_data(tty, &ldata->read_buf[ldata->read_tail], n,
+                                ldata->icanon);
+                spin_lock_irqsave(&ldata->read_lock, flags);
+                ldata->read_tail = (ldata->read_tail + n) & (N_TTY_BUF_SIZE-1);
+                ldata->read_cnt -= n;
                 /* Turn single EOF into zero-length read */
-                if (L_EXTPROC(tty) && tty->icanon && is_eof && !tty->read_cnt)
+                if (L_EXTPROC(tty) && ldata->icanon && is_eof && !ldata->read_cnt)
                         n = 0;
-                spin_unlock_irqrestore(&tty->read_lock, flags);
+                spin_unlock_irqrestore(&ldata->read_lock, flags);
                 *b += n;
                 *nr -= n;
         }
@@ -1730,6 +1787,7 @@ static int job_control(struct tty_struct *tty, struct file *file)
 static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
                          unsigned char __user *buf, size_t nr)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         unsigned char __user *b = buf;
         DECLARE_WAITQUEUE(wait, current);
         int c;
@@ -1741,17 +1799,13 @@ static ssize_t n_tty_read(struct tty_struct *tty, struct file *file,
         int packet;
 
 do_it_again:
-
-        if (WARN_ON(!tty->read_buf))
-                return -EAGAIN;
-
         c = job_control(tty, file);
         if (c < 0)
                 return c;
 
         minimum = time = 0;
         timeout = MAX_SCHEDULE_TIMEOUT;
-        if (!tty->icanon) {
+        if (!ldata->icanon) {
                 time = (HZ / 10) * TIME_CHAR(tty);
                 minimum = MIN_CHAR(tty);
                 if (minimum) {
@@ -1774,10 +1828,10 @@ do_it_again:
          *      Internal serialization of reads.
          */
         if (file->f_flags & O_NONBLOCK) {
-                if (!mutex_trylock(&tty->atomic_read_lock))
+                if (!mutex_trylock(&ldata->atomic_read_lock))
                         return -EAGAIN;
         } else {
-                if (mutex_lock_interruptible(&tty->atomic_read_lock))
+                if (mutex_lock_interruptible(&ldata->atomic_read_lock))
                         return -ERESTARTSYS;
         }
         packet = tty->packet;
@@ -1830,7 +1884,6 @@ do_it_again:
                         /* FIXME: does n_tty_set_room need locking ? */
                         n_tty_set_room(tty);
                         timeout = schedule_timeout(timeout);
-                        BUG_ON(!tty->read_buf);
                         continue;
                 }
                 __set_current_state(TASK_RUNNING);
@@ -1845,45 +1898,45 @@ do_it_again:
                         nr--;
                 }
 
-                if (tty->icanon && !L_EXTPROC(tty)) {
+                if (ldata->icanon && !L_EXTPROC(tty)) {
                         /* N.B. avoid overrun if nr == 0 */
-                        spin_lock_irqsave(&tty->read_lock, flags);
-                        while (nr && tty->read_cnt) {
+                        spin_lock_irqsave(&ldata->read_lock, flags);
+                        while (nr && ldata->read_cnt) {
                                 int eol;
 
-                                eol = test_and_clear_bit(tty->read_tail,
-                                                tty->read_flags);
-                                c = tty->read_buf[tty->read_tail];
-                                tty->read_tail = ((tty->read_tail+1) &
+                                eol = test_and_clear_bit(ldata->read_tail,
+                                                ldata->read_flags);
+                                c = ldata->read_buf[ldata->read_tail];
+                                ldata->read_tail = ((ldata->read_tail+1) &
                                                   (N_TTY_BUF_SIZE-1));
-                                tty->read_cnt--;
+                                ldata->read_cnt--;
                                 if (eol) {
                                         /* this test should be redundant:
                                          * we shouldn't be reading data if
                                          * canon_data is 0
                                          */
-                                        if (--tty->canon_data < 0)
-                                                tty->canon_data = 0;
+                                        if (--ldata->canon_data < 0)
+                                                ldata->canon_data = 0;
                                 }
-                                spin_unlock_irqrestore(&tty->read_lock, flags);
+                                spin_unlock_irqrestore(&ldata->read_lock, flags);
 
                                 if (!eol || (c != __DISABLED_CHAR)) {
                                         if (tty_put_user(tty, c, b++)) {
                                                 retval = -EFAULT;
                                                 b--;
-                                                spin_lock_irqsave(&tty->read_lock, flags);
+                                                spin_lock_irqsave(&ldata->read_lock, flags);
                                                 break;
                                         }
                                         nr--;
                                 }
                                 if (eol) {
                                         tty_audit_push(tty);
-                                        spin_lock_irqsave(&tty->read_lock, flags);
+                                        spin_lock_irqsave(&ldata->read_lock, flags);
                                         break;
                                 }
-                                spin_lock_irqsave(&tty->read_lock, flags);
+                                spin_lock_irqsave(&ldata->read_lock, flags);
                         }
-                        spin_unlock_irqrestore(&tty->read_lock, flags);
+                        spin_unlock_irqrestore(&ldata->read_lock, flags);
                         if (retval)
                                 break;
                 } else {
@@ -1915,7 +1968,7 @@ do_it_again:
                 if (time)
                         timeout = time;
         }
-        mutex_unlock(&tty->atomic_read_lock);
+        mutex_unlock(&ldata->atomic_read_lock);
         remove_wait_queue(&tty->read_wait, &wait);
 
         if (!waitqueue_active(&tty->read_wait))
@@ -2076,19 +2129,19 @@ static unsigned int n_tty_poll(struct tty_struct *tty, struct file *file,
         return mask;
 }
 
-static unsigned long inq_canon(struct tty_struct *tty)
+static unsigned long inq_canon(struct n_tty_data *ldata)
 {
         int nr, head, tail;
 
-        if (!tty->canon_data)
+        if (!ldata->canon_data)
                 return 0;
-        head = tty->canon_head;
-        tail = tty->read_tail;
+        head = ldata->canon_head;
+        tail = ldata->read_tail;
         nr = (head - tail) & (N_TTY_BUF_SIZE-1);
         /* Skip EOF-chars.. */
         while (head != tail) {
-                if (test_bit(tail, tty->read_flags) &&
-                    tty->read_buf[tail] == __DISABLED_CHAR)
+                if (test_bit(tail, ldata->read_flags) &&
+                    ldata->read_buf[tail] == __DISABLED_CHAR)
                         nr--;
                 tail = (tail+1) & (N_TTY_BUF_SIZE-1);
         }
@@ -2098,6 +2151,7 @@ static unsigned long inq_canon(struct tty_struct *tty)
 static int n_tty_ioctl(struct tty_struct *tty, struct file *file,
                        unsigned int cmd, unsigned long arg)
 {
+        struct n_tty_data *ldata = tty->disc_data;
         int retval;
 
         switch (cmd) {
@@ -2105,9 +2159,9 @@ static int n_tty_ioctl(struct tty_struct *tty, struct file *file,
                 return put_user(tty_chars_in_buffer(tty), (int __user *) arg);
         case TIOCINQ:
                 /* FIXME: Locking */
-                retval = tty->read_cnt;
+                retval = ldata->read_cnt;
                 if (L_ICANON(tty))
-                        retval = inq_canon(tty);
+                        retval = inq_canon(ldata);
                 return put_user(retval, (unsigned int __user *) arg);
         default:
                 return n_tty_ioctl_helper(tty, file, cmd, arg);
diff --git a/drivers/tty/pty.c b/drivers/tty/pty.c
index a82b39939a9c..4219f040adb8 100644
--- a/drivers/tty/pty.c
+++ b/drivers/tty/pty.c
@@ -4,9 +4,6 @@
  *  Added support for a Unix98-style ptmx device.
  *    -- C. Scott Ananian <cananian@alumni.princeton.edu>, 14-Jan-1998
  *
- *  When reading this code see also fs/devpts. In particular note that the
- *  driver_data field is used by the devpts side as a binding to the devpts
- *  inode.
  */
 
 #include <linux/module.h>
@@ -59,7 +56,7 @@ static void pty_close(struct tty_struct *tty, struct file *filp)
 #ifdef CONFIG_UNIX98_PTYS
                 if (tty->driver == ptm_driver) {
                         mutex_lock(&devpts_mutex);
-                        devpts_pty_kill(tty->link);
+                        devpts_pty_kill(tty->link->driver_data);
                         mutex_unlock(&devpts_mutex);
                 }
 #endif
@@ -96,7 +93,7 @@ static void pty_unthrottle(struct tty_struct *tty)
 
 static int pty_space(struct tty_struct *to)
 {
-        int n = 8192 - to->buf.memory_used;
+        int n = 8192 - to->port->buf.memory_used;
         if (n < 0)
                 return 0;
         return n;
@@ -348,6 +345,7 @@ static int pty_common_install(struct tty_driver *driver, struct tty_struct *tty,
         tty_port_init(ports[1]);
         o_tty->port = ports[0];
         tty->port = ports[1];
+        o_tty->port->itty = o_tty;
 
         tty_driver_kref_get(driver);
         tty->count++;
@@ -366,8 +364,15 @@ err:
         return retval;
 }
 
+/* this is called once with whichever end is closed last */
+static void pty_unix98_shutdown(struct tty_struct *tty)
+{
+        devpts_kill_index(tty->driver_data, tty->index);
+}
+
 static void pty_cleanup(struct tty_struct *tty)
 {
+        tty->port->itty = NULL;
         kfree(tty->port);
 }
 
@@ -547,7 +552,7 @@ static struct tty_struct *pts_unix98_lookup(struct tty_driver *driver,
         struct tty_struct *tty;
 
         mutex_lock(&devpts_mutex);
-        tty = devpts_get_tty(pts_inode, idx);
+        tty = devpts_get_priv(pts_inode);
         mutex_unlock(&devpts_mutex);
         /* Master must be open before slave */
         if (!tty)
@@ -581,6 +586,7 @@ static const struct tty_operations ptm_unix98_ops = {
         .set_termios = pty_set_termios,
         .ioctl = pty_unix98_ioctl,
         .resize = pty_resize,
+        .shutdown = pty_unix98_shutdown,
         .cleanup = pty_cleanup
 };
 
@@ -596,6 +602,7 @@ static const struct tty_operations pty_unix98_ops = {
         .chars_in_buffer = pty_chars_in_buffer,
         .unthrottle = pty_unthrottle,
         .set_termios = pty_set_termios,
+        .shutdown = pty_unix98_shutdown,
         .cleanup = pty_cleanup,
 };
 
@@ -614,6 +621,7 @@ static const struct tty_operations pty_unix98_ops = {
 static int ptmx_open(struct inode *inode, struct file *filp)
 {
         struct tty_struct *tty;
+        struct inode *slave_inode;
         int retval;
         int index;
 
@@ -650,15 +658,21 @@ static int ptmx_open(struct inode *inode, struct file *filp)
 
         tty_add_file(tty, filp);
 
-        retval = devpts_pty_new(inode, tty->link);
-        if (retval)
+        slave_inode = devpts_pty_new(inode,
+                        MKDEV(UNIX98_PTY_SLAVE_MAJOR, index), index,
+                        tty->link);
+        if (IS_ERR(slave_inode)) {
+                retval = PTR_ERR(slave_inode);
                 goto err_release;
+        }
 
         retval = ptm_driver->ops->open(tty, filp);
         if (retval)
                 goto err_release;
 
         tty_unlock(tty);
+        tty->driver_data = inode;
+        tty->link->driver_data = slave_inode;
         return 0;
 err_release:
         tty_unlock(tty);
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 3ba4234592bc..5ccbd90540cf 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -2349,16 +2349,14 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
                         serial_port_out(port, UART_EFR, efr);
         }
 
-#ifdef CONFIG_ARCH_OMAP1
         /* Workaround to enable 115200 baud on OMAP1510 internal ports */
-        if (cpu_is_omap1510() && is_omap_port(up)) {
+        if (is_omap1510_8250(up)) {
                 if (baud == 115200) {
                         quot = 1;
                         serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
                 } else
                         serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
         }
-#endif
 
         /*
          * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
@@ -2439,10 +2437,9 @@ static unsigned int serial8250_port_size(struct uart_8250_port *pt)
 {
         if (pt->port.iotype == UPIO_AU)
                 return 0x1000;
-#ifdef CONFIG_ARCH_OMAP1
-        if (is_omap_port(pt))
+        if (is_omap1_8250(pt))
                 return 0x16 << pt->port.regshift;
-#endif
+
         return 8 << pt->port.regshift;
 }
 
diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h
index 5a76f9c8d36b..3b4ea84898c2 100644
--- a/drivers/tty/serial/8250/8250.h
+++ b/drivers/tty/serial/8250/8250.h
@@ -106,3 +106,39 @@ static inline int serial8250_pnp_init(void) { return 0; }
 static inline void serial8250_pnp_exit(void) { }
 #endif
 
+#ifdef CONFIG_ARCH_OMAP1
+static inline int is_omap1_8250(struct uart_8250_port *pt)
+{
+        int res;
+
+        switch (pt->port.mapbase) {
+        case OMAP1_UART1_BASE:
+        case OMAP1_UART2_BASE:
+        case OMAP1_UART3_BASE:
+                res = 1;
+                break;
+        default:
+                res = 0;
+                break;
+        }
+
+        return res;
+}
+
+static inline int is_omap1510_8250(struct uart_8250_port *pt)
+{
+        if (!cpu_is_omap1510())
+                return 0;
+
+        return is_omap1_8250(pt);
+}
+#else
+static inline int is_omap1_8250(struct uart_8250_port *pt)
+{
+        return 0;
+}
+static inline int is_omap1510_8250(struct uart_8250_port *pt)
+{
+        return 0;
+}
+#endif
diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c
index eaafb98debed..843a150ba105 100644
--- a/drivers/tty/serial/8250/8250_early.c
+++ b/drivers/tty/serial/8250/8250_early.c
@@ -140,7 +140,7 @@ static void __init init_port(struct early_serial8250_device *device)
         serial_out(port, UART_FCR, 0);          /* no fifo */
         serial_out(port, UART_MCR, 0x3);        /* DTR + RTS */
 
-        divisor = port->uartclk / (16 * device->baud);
+        divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * device->baud);
         c = serial_in(port, UART_LCR);
         serial_out(port, UART_LCR, c | UART_LCR_DLAB);
         serial_out(port, UART_DLL, divisor & 0xff);
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 7f04717176aa..740458ca62cc 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -530,16 +530,16 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
         switch (level) {
         case 3:
                 if (!IS_ERR(ourport->baudclk))
-                        clk_disable(ourport->baudclk);
+                        clk_disable_unprepare(ourport->baudclk);
 
-                clk_disable(ourport->clk);
+                clk_disable_unprepare(ourport->clk);
                 break;
 
         case 0:
-                clk_enable(ourport->clk);
+                clk_prepare_enable(ourport->clk);
 
                 if (!IS_ERR(ourport->baudclk))
-                        clk_enable(ourport->baudclk);
+                        clk_prepare_enable(ourport->baudclk);
 
                 break;
         default:
@@ -713,11 +713,11 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
                 s3c24xx_serial_setsource(port, clk_sel);
 
                 if (!IS_ERR(ourport->baudclk)) {
-                        clk_disable(ourport->baudclk);
+                        clk_disable_unprepare(ourport->baudclk);
                         ourport->baudclk = ERR_PTR(-EINVAL);
                 }
 
-                clk_enable(clk);
+                clk_prepare_enable(clk);
 
                 ourport->baudclk = clk;
                 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
@@ -1287,9 +1287,9 @@ static int s3c24xx_serial_resume(struct device *dev)
         struct s3c24xx_uart_port *ourport = to_ourport(port);
 
         if (port) {
-                clk_enable(ourport->clk);
+                clk_prepare_enable(ourport->clk);
                 s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port));
-                clk_disable(ourport->clk);
+                clk_disable_unprepare(ourport->clk);
 
                 uart_resume_port(&s3c24xx_uart_drv, port);
         }
diff --git a/drivers/tty/tty_audit.c b/drivers/tty/tty_audit.c
index b0b39b823ccf..6953dc82850c 100644
--- a/drivers/tty/tty_audit.c
+++ b/drivers/tty/tty_audit.c
@@ -23,7 +23,7 @@ struct tty_audit_buf {
 };
 
 static struct tty_audit_buf *tty_audit_buf_alloc(int major, int minor,
-                                                 int icanon)
+                                                 unsigned icanon)
 {
         struct tty_audit_buf *buf;
 
@@ -239,7 +239,8 @@ int tty_audit_push_task(struct task_struct *tsk, kuid_t loginuid, u32 sessionid)
  *      if TTY auditing is disabled or out of memory.  Otherwise, return a new
  *      reference to the buffer.
  */
-static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty)
+static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty,
+                unsigned icanon)
 {
         struct tty_audit_buf *buf, *buf2;
 
@@ -257,7 +258,7 @@ static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty)
 
         buf2 = tty_audit_buf_alloc(tty->driver->major,
                                    tty->driver->minor_start + tty->index,
-                                   tty->icanon);
+                                   icanon);
         if (buf2 == NULL) {
                 audit_log_lost("out of memory in TTY auditing");
                 return NULL;
@@ -287,7 +288,7 @@ static struct tty_audit_buf *tty_audit_buf_get(struct tty_struct *tty)
  *      Audit @data of @size from @tty, if necessary.
  */
 void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
-                        size_t size)
+                        size_t size, unsigned icanon)
 {
         struct tty_audit_buf *buf;
         int major, minor;
@@ -299,7 +300,7 @@ void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
             && tty->driver->subtype == PTY_TYPE_MASTER)
                 return;
 
-        buf = tty_audit_buf_get(tty);
+        buf = tty_audit_buf_get(tty, icanon);
         if (!buf)
                 return;
 
@@ -307,11 +308,11 @@ void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
         major = tty->driver->major;
         minor = tty->driver->minor_start + tty->index;
         if (buf->major != major || buf->minor != minor
-            || buf->icanon != tty->icanon) {
+            || buf->icanon != icanon) {
                 tty_audit_buf_push_current(buf);
                 buf->major = major;
                 buf->minor = minor;
-                buf->icanon = tty->icanon;
+                buf->icanon = icanon;
         }
         do {
                 size_t run;
diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c
index 91e326ffe7db..6cf87d7afb7e 100644
--- a/drivers/tty/tty_buffer.c
+++ b/drivers/tty/tty_buffer.c
@@ -27,19 +27,21 @@
  *      Locking: none
  */
 
-void tty_buffer_free_all(struct tty_struct *tty)
+void tty_buffer_free_all(struct tty_port *port)
 {
+        struct tty_bufhead *buf = &port->buf;
         struct tty_buffer *thead;
-        while ((thead = tty->buf.head) != NULL) {
-                tty->buf.head = thead->next;
+
+        while ((thead = buf->head) != NULL) {
+                buf->head = thead->next;
                 kfree(thead);
         }
-        while ((thead = tty->buf.free) != NULL) {
-                tty->buf.free = thead->next;
+        while ((thead = buf->free) != NULL) {
+                buf->free = thead->next;
                 kfree(thead);
         }
-        tty->buf.tail = NULL;
-        tty->buf.memory_used = 0;
+        buf->tail = NULL;
+        buf->memory_used = 0;
 }
 
 /**
@@ -54,11 +56,11 @@ void tty_buffer_free_all(struct tty_struct *tty)
  *      Locking: Caller must hold tty->buf.lock
  */
 
-static struct tty_buffer *tty_buffer_alloc(struct tty_struct *tty, size_t size)
+static struct tty_buffer *tty_buffer_alloc(struct tty_port *port, size_t size)
 {
         struct tty_buffer *p;
 
-        if (tty->buf.memory_used + size > 65536)
+        if (port->buf.memory_used + size > 65536)
                 return NULL;
         p = kmalloc(sizeof(struct tty_buffer) + 2 * size, GFP_ATOMIC);
         if (p == NULL)
@@ -70,7 +72,7 @@ static struct tty_buffer *tty_buffer_alloc(struct tty_struct *tty, size_t size)
         p->read = 0;
         p->char_buf_ptr = (char *)(p->data);
         p->flag_buf_ptr = (unsigned char *)p->char_buf_ptr + size;
-        tty->buf.memory_used += size;
+        port->buf.memory_used += size;
         return p;
 }
 
@@ -85,17 +87,19 @@ static struct tty_buffer *tty_buffer_alloc(struct tty_struct *tty, size_t size)
  *      Locking: Caller must hold tty->buf.lock
  */
 
-static void tty_buffer_free(struct tty_struct *tty, struct tty_buffer *b)
+static void tty_buffer_free(struct tty_port *port, struct tty_buffer *b)
 {
+        struct tty_bufhead *buf = &port->buf;
+
         /* Dumb strategy for now - should keep some stats */
-        tty->buf.memory_used -= b->size;
-        WARN_ON(tty->buf.memory_used < 0);
+        buf->memory_used -= b->size;
+        WARN_ON(buf->memory_used < 0);
 
         if (b->size >= 512)
                 kfree(b);
         else {
-                b->next = tty->buf.free;
-                tty->buf.free = b;
+                b->next = buf->free;
+                buf->free = b;
         }
 }
 
@@ -110,15 +114,16 @@ static void tty_buffer_free(struct tty_struct *tty, struct tty_buffer *b)
  *      Locking: Caller must hold tty->buf.lock
  */
 
-static void __tty_buffer_flush(struct tty_struct *tty)
+static void __tty_buffer_flush(struct tty_port *port)
 {
+        struct tty_bufhead *buf = &port->buf;
         struct tty_buffer *thead;
 
-        while ((thead = tty->buf.head) != NULL) {
-                tty->buf.head = thead->next;
-                tty_buffer_free(tty, thead);
+        while ((thead = buf->head) != NULL) {
+                buf->head = thead->next;
+                tty_buffer_free(port, thead);
         }
-        tty->buf.tail = NULL;
+        buf->tail = NULL;
 }
 
 /**
@@ -134,21 +139,24 @@ static void __tty_buffer_flush(struct tty_struct *tty)
 
 void tty_buffer_flush(struct tty_struct *tty)
 {
+        struct tty_port *port = tty->port;
+        struct tty_bufhead *buf = &port->buf;
         unsigned long flags;
-        spin_lock_irqsave(&tty->buf.lock, flags);
+
+        spin_lock_irqsave(&buf->lock, flags);
 
         /* If the data is being pushed to the tty layer then we can't
            process it here. Instead set a flag and the flush_to_ldisc
            path will process the flush request before it exits */
-        if (test_bit(TTY_FLUSHING, &tty->flags)) {
-                set_bit(TTY_FLUSHPENDING, &tty->flags);
-                spin_unlock_irqrestore(&tty->buf.lock, flags);
+        if (test_bit(TTYP_FLUSHING, &port->iflags)) {
+                set_bit(TTYP_FLUSHPENDING, &port->iflags);
+                spin_unlock_irqrestore(&buf->lock, flags);
                 wait_event(tty->read_wait,
-                                test_bit(TTY_FLUSHPENDING, &tty->flags) == 0);
+                                test_bit(TTYP_FLUSHPENDING, &port->iflags) == 0);
                 return;
         } else
-                __tty_buffer_flush(tty);
-        spin_unlock_irqrestore(&tty->buf.lock, flags);
+                __tty_buffer_flush(port);
+        spin_unlock_irqrestore(&buf->lock, flags);
 }
 
 /**
@@ -163,9 +171,9 @@ void tty_buffer_flush(struct tty_struct *tty)
  *      Locking: Caller must hold tty->buf.lock
  */
 
-static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size)
+static struct tty_buffer *tty_buffer_find(struct tty_port *port, size_t size)
 {
-        struct tty_buffer **tbh = &tty->buf.free;
+        struct tty_buffer **tbh = &port->buf.free;
         while ((*tbh) != NULL) {
                 struct tty_buffer *t = *tbh;
                 if (t->size >= size) {
@@ -174,14 +182,14 @@ static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size)
                         t->used = 0;
                         t->commit = 0;
                         t->read = 0;
-                        tty->buf.memory_used += t->size;
+                        port->buf.memory_used += t->size;
                         return t;
                 }
                 tbh = &((*tbh)->next);
         }
         /* Round the buffer size out */
         size = (size + 0xFF) & ~0xFF;
-        return tty_buffer_alloc(tty, size);
+        return tty_buffer_alloc(port, size);
         /* Should possibly check if this fails for the largest buffer we
            have queued and recycle that ? */
 }
@@ -192,29 +200,31 @@ static struct tty_buffer *tty_buffer_find(struct tty_struct *tty, size_t size)
  *
  *      Make at least size bytes of linear space available for the tty
  *      buffer. If we fail return the size we managed to find.
- *      Locking: Caller must hold tty->buf.lock
+ *      Locking: Caller must hold port->buf.lock
  */
-static int __tty_buffer_request_room(struct tty_struct *tty, size_t size)
+static int __tty_buffer_request_room(struct tty_port *port, size_t size)
 {
+        struct tty_bufhead *buf = &port->buf;
         struct tty_buffer *b, *n;
         int left;
         /* OPTIMISATION: We could keep a per tty "zero" sized buffer to
            remove this conditional if its worth it. This would be invisible
            to the callers */
-        if ((b = tty->buf.tail) != NULL)
+        b = buf->tail;
+        if (b != NULL)
                 left = b->size - b->used;
         else
                 left = 0;
 
         if (left < size) {
                 /* This is the slow path - looking for new buffers to use */
-                if ((n = tty_buffer_find(tty, size)) != NULL) {
+                if ((n = tty_buffer_find(port, size)) != NULL) {
                         if (b != NULL) {
                                 b->next = n;
                                 b->commit = b->used;
                         } else
-                                tty->buf.head = n;
-                        tty->buf.tail = n;
+                                buf->head = n;
+                        buf->tail = n;
                 } else
                         size = left;
         }
@@ -231,16 +241,17 @@ static int __tty_buffer_request_room(struct tty_struct *tty, size_t size)
  *      Make at least size bytes of linear space available for the tty
  *      buffer. If we fail return the size we managed to find.
  *
- *      Locking: Takes tty->buf.lock
+ *      Locking: Takes port->buf.lock
  */
 int tty_buffer_request_room(struct tty_struct *tty, size_t size)
 {
+        struct tty_port *port = tty->port;
         unsigned long flags;
         int length;
 
-        spin_lock_irqsave(&tty->buf.lock, flags);
-        length = __tty_buffer_request_room(tty, size);
-        spin_unlock_irqrestore(&tty->buf.lock, flags);
+        spin_lock_irqsave(&port->buf.lock, flags);
+        length = __tty_buffer_request_room(port, size);
+        spin_unlock_irqrestore(&port->buf.lock, flags);
         return length;
 }
 EXPORT_SYMBOL_GPL(tty_buffer_request_room);
@@ -255,12 +266,13 @@ EXPORT_SYMBOL_GPL(tty_buffer_request_room);
  *      Queue a series of bytes to the tty buffering. All the characters
  *      passed are marked with the supplied flag. Returns the number added.
  *
- *      Locking: Called functions may take tty->buf.lock
+ *      Locking: Called functions may take port->buf.lock
  */
 
 int tty_insert_flip_string_fixed_flag(struct tty_struct *tty,
                 const unsigned char *chars, char flag, size_t size)
 {
+        struct tty_bufhead *buf = &tty->port->buf;
         int copied = 0;
         do {
                 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE);
@@ -268,18 +280,18 @@ int tty_insert_flip_string_fixed_flag(struct tty_struct *tty,
                 unsigned long flags;
                 struct tty_buffer *tb;
 
-                spin_lock_irqsave(&tty->buf.lock, flags);
-                space = __tty_buffer_request_room(tty, goal);
-                tb = tty->buf.tail;
+                spin_lock_irqsave(&buf->lock, flags);
+                space = __tty_buffer_request_room(tty->port, goal);
+                tb = buf->tail;
                 /* If there is no space then tb may be NULL */
                 if (unlikely(space == 0)) {
-                        spin_unlock_irqrestore(&tty->buf.lock, flags);
+                        spin_unlock_irqrestore(&buf->lock, flags);
                         break;
                 }
                 memcpy(tb->char_buf_ptr + tb->used, chars, space);
                 memset(tb->flag_buf_ptr + tb->used, flag, space);
                 tb->used += space;
-                spin_unlock_irqrestore(&tty->buf.lock, flags);
+                spin_unlock_irqrestore(&buf->lock, flags);
                 copied += space;
                 chars += space;
                 /* There is a small chance that we need to split the data over
@@ -300,12 +312,13 @@ EXPORT_SYMBOL(tty_insert_flip_string_fixed_flag);
  *      the flags array indicates the status of the character. Returns the
  *      number added.
  *
- *      Locking: Called functions may take tty->buf.lock
+ *      Locking: Called functions may take port->buf.lock
  */
 
 int tty_insert_flip_string_flags(struct tty_struct *tty,
                 const unsigned char *chars, const char *flags, size_t size)
 {
+        struct tty_bufhead *buf = &tty->port->buf;
         int copied = 0;
         do {
                 int goal = min_t(size_t, size - copied, TTY_BUFFER_PAGE);
@@ -313,18 +326,18 @@ int tty_insert_flip_string_flags(struct tty_struct *tty,
                 unsigned long __flags;
                 struct tty_buffer *tb;
 
-                spin_lock_irqsave(&tty->buf.lock, __flags);
-                space = __tty_buffer_request_room(tty, goal);
-                tb = tty->buf.tail;
+                spin_lock_irqsave(&buf->lock, __flags);
+                space = __tty_buffer_request_room(tty->port, goal);
+                tb = buf->tail;
                 /* If there is no space then tb may be NULL */
                 if (unlikely(space == 0)) {
-                        spin_unlock_irqrestore(&tty->buf.lock, __flags);
+                        spin_unlock_irqrestore(&buf->lock, __flags);
                         break;
                 }
                 memcpy(tb->char_buf_ptr + tb->used, chars, space);
                 memcpy(tb->flag_buf_ptr + tb->used, flags, space);
                 tb->used += space;
-                spin_unlock_irqrestore(&tty->buf.lock, __flags);
+                spin_unlock_irqrestore(&buf->lock, __flags);
                 copied += space;
                 chars += space;
                 flags += space;
@@ -342,18 +355,23 @@ EXPORT_SYMBOL(tty_insert_flip_string_flags);
  *      Takes any pending buffers and transfers their ownership to the
  *      ldisc side of the queue. It then schedules those characters for
  *      processing by the line discipline.
+ *      Note that this function can only be used when the low_latency flag
+ *      is unset. Otherwise the workqueue won't be flushed.
  *
- *      Locking: Takes tty->buf.lock
+ *      Locking: Takes port->buf.lock
  */
 
 void tty_schedule_flip(struct tty_struct *tty)
 {
+        struct tty_bufhead *buf = &tty->port->buf;
         unsigned long flags;
-        spin_lock_irqsave(&tty->buf.lock, flags);
-        if (tty->buf.tail != NULL)
-                tty->buf.tail->commit = tty->buf.tail->used;
-        spin_unlock_irqrestore(&tty->buf.lock, flags);
-        schedule_work(&tty->buf.work);
+        WARN_ON(tty->low_latency);
+
+        spin_lock_irqsave(&buf->lock, flags);
+        if (buf->tail != NULL)
+                buf->tail->commit = buf->tail->used;
+        spin_unlock_irqrestore(&buf->lock, flags);
+        schedule_work(&buf->work);
 }
 EXPORT_SYMBOL(tty_schedule_flip);
 
@@ -369,26 +387,27 @@ EXPORT_SYMBOL(tty_schedule_flip);
  *      that need their own block copy routines into the buffer. There is no
  *      guarantee the buffer is a DMA target!
  *
- *      Locking: May call functions taking tty->buf.lock
+ *      Locking: May call functions taking port->buf.lock
  */
 
 int tty_prepare_flip_string(struct tty_struct *tty, unsigned char **chars,
-                                                                size_t size)
+                size_t size)
 {
+        struct tty_bufhead *buf = &tty->port->buf;
         int space;
         unsigned long flags;
         struct tty_buffer *tb;
 
-        spin_lock_irqsave(&tty->buf.lock, flags);
-        space = __tty_buffer_request_room(tty, size);
+        spin_lock_irqsave(&buf->lock, flags);
+        space = __tty_buffer_request_room(tty->port, size);
 
-        tb = tty->buf.tail;
+        tb = buf->tail;
         if (likely(space)) {
                 *chars = tb->char_buf_ptr + tb->used;
                 memset(tb->flag_buf_ptr + tb->used, TTY_NORMAL, space);
                 tb->used += space;
         }
-        spin_unlock_irqrestore(&tty->buf.lock, flags);
+        spin_unlock_irqrestore(&buf->lock, flags);
         return space;
 }
 EXPORT_SYMBOL_GPL(tty_prepare_flip_string);
@@ -406,26 +425,27 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string);
  *      that need their own block copy routines into the buffer. There is no
  *      guarantee the buffer is a DMA target!
  *
- *      Locking: May call functions taking tty->buf.lock
+ *      Locking: May call functions taking port->buf.lock
  */
 
 int tty_prepare_flip_string_flags(struct tty_struct *tty,
                         unsigned char **chars, char **flags, size_t size)
 {
+        struct tty_bufhead *buf = &tty->port->buf;
         int space;
         unsigned long __flags;
         struct tty_buffer *tb;
 
-        spin_lock_irqsave(&tty->buf.lock, __flags);
-        space = __tty_buffer_request_room(tty, size);
+        spin_lock_irqsave(&buf->lock, __flags);
+        space = __tty_buffer_request_room(tty->port, size);
 
-        tb = tty->buf.tail;
+        tb = buf->tail;
         if (likely(space)) {
                 *chars = tb->char_buf_ptr + tb->used;
                 *flags = tb->flag_buf_ptr + tb->used;
                 tb->used += space;
         }
-        spin_unlock_irqrestore(&tty->buf.lock, __flags);
+        spin_unlock_irqrestore(&buf->lock, __flags);
         return space;
 }
 EXPORT_SYMBOL_GPL(tty_prepare_flip_string_flags);
@@ -446,20 +466,25 @@ EXPORT_SYMBOL_GPL(tty_prepare_flip_string_flags);
 
 static void flush_to_ldisc(struct work_struct *work)
 {
-        struct tty_struct *tty =
-                container_of(work, struct tty_struct, buf.work);
+        struct tty_port *port = container_of(work, struct tty_port, buf.work);
+        struct tty_bufhead *buf = &port->buf;
+        struct tty_struct *tty;
         unsigned long   flags;
         struct tty_ldisc *disc;
 
+        tty = port->itty;
+        if (WARN_RATELIMIT(tty == NULL, "tty is NULL"))
+                return;
+
         disc = tty_ldisc_ref(tty);
         if (disc == NULL)       /*  !TTY_LDISC */
                 return;
 
-        spin_lock_irqsave(&tty->buf.lock, flags);
+        spin_lock_irqsave(&buf->lock, flags);
 
-        if (!test_and_set_bit(TTY_FLUSHING, &tty->flags)) {
+        if (!test_and_set_bit(TTYP_FLUSHING, &port->iflags)) {
                 struct tty_buffer *head;
-                while ((head = tty->buf.head) != NULL) {
+                while ((head = buf->head) != NULL) {
                         int count;
                         char *char_buf;
                         unsigned char *flag_buf;
@@ -468,14 +493,14 @@ static void flush_to_ldisc(struct work_struct *work)
                         if (!count) {
                                 if (head->next == NULL)
                                         break;
-                                tty->buf.head = head->next;
-                                tty_buffer_free(tty, head);
+                                buf->head = head->next;
+                                tty_buffer_free(port, head);
                                 continue;
                         }
                         /* Ldisc or user is trying to flush the buffers
                            we are feeding to the ldisc, stop feeding the
                            line discipline as we want to empty the queue */
-                        if (test_bit(TTY_FLUSHPENDING, &tty->flags))
+                        if (test_bit(TTYP_FLUSHPENDING, &port->iflags))
                                 break;
                         if (!tty->receive_room)
                                 break;
@@ -484,22 +509,22 @@ static void flush_to_ldisc(struct work_struct *work)
                         char_buf = head->char_buf_ptr + head->read;
                         flag_buf = head->flag_buf_ptr + head->read;
                         head->read += count;
-                        spin_unlock_irqrestore(&tty->buf.lock, flags);
+                        spin_unlock_irqrestore(&buf->lock, flags);
                         disc->ops->receive_buf(tty, char_buf,
                                                         flag_buf, count);
-                        spin_lock_irqsave(&tty->buf.lock, flags);
+                        spin_lock_irqsave(&buf->lock, flags);
                 }
-                clear_bit(TTY_FLUSHING, &tty->flags);
+                clear_bit(TTYP_FLUSHING, &port->iflags);
         }
 
         /* We may have a deferred request to flush the input buffer,
            if so pull the chain under the lock and empty the queue */
-        if (test_bit(TTY_FLUSHPENDING, &tty->flags)) {
-                __tty_buffer_flush(tty);
-                clear_bit(TTY_FLUSHPENDING, &tty->flags);
+        if (test_bit(TTYP_FLUSHPENDING, &port->iflags)) {
+                __tty_buffer_flush(port);
+                clear_bit(TTYP_FLUSHPENDING, &port->iflags);
                 wake_up(&tty->read_wait);
         }
-        spin_unlock_irqrestore(&tty->buf.lock, flags);
+        spin_unlock_irqrestore(&buf->lock, flags);
 
         tty_ldisc_deref(disc);
 }
@@ -514,7 +539,8 @@ static void flush_to_ldisc(struct work_struct *work)
  */
 void tty_flush_to_ldisc(struct tty_struct *tty)
 {
-        flush_work(&tty->buf.work);
+        if (!tty->low_latency)
+                flush_work(&tty->port->buf.work);
 }
 
 /**
@@ -532,16 +558,18 @@ void tty_flush_to_ldisc(struct tty_struct *tty)
 
 void tty_flip_buffer_push(struct tty_struct *tty)
 {
+        struct tty_bufhead *buf = &tty->port->buf;
         unsigned long flags;
-        spin_lock_irqsave(&tty->buf.lock, flags);
-        if (tty->buf.tail != NULL)
-                tty->buf.tail->commit = tty->buf.tail->used;
-        spin_unlock_irqrestore(&tty->buf.lock, flags);
+
+        spin_lock_irqsave(&buf->lock, flags);
+        if (buf->tail != NULL)
+                buf->tail->commit = buf->tail->used;
+        spin_unlock_irqrestore(&buf->lock, flags);
 
         if (tty->low_latency)
-                flush_to_ldisc(&tty->buf.work);
+                flush_to_ldisc(&buf->work);
         else
-                schedule_work(&tty->buf.work);
+                schedule_work(&buf->work);
 }
 EXPORT_SYMBOL(tty_flip_buffer_push);
 
@@ -555,13 +583,15 @@ EXPORT_SYMBOL(tty_flip_buffer_push);
  *      Locking: none
  */
 
-void tty_buffer_init(struct tty_struct *tty)
+void tty_buffer_init(struct tty_port *port)
 {
-        spin_lock_init(&tty->buf.lock);
-        tty->buf.head = NULL;
-        tty->buf.tail = NULL;
-        tty->buf.free = NULL;
-        tty->buf.memory_used = 0;
-        INIT_WORK(&tty->buf.work, flush_to_ldisc);
+        struct tty_bufhead *buf = &port->buf;
+
+        spin_lock_init(&buf->lock);
+        buf->head = NULL;
+        buf->tail = NULL;
+        buf->free = NULL;
+        buf->memory_used = 0;
+        INIT_WORK(&buf->work, flush_to_ldisc);
 }
 
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index 2ea176b2280e..a3eba7f359ed 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -186,7 +186,6 @@ void free_tty_struct(struct tty_struct *tty)
         if (tty->dev)
                 put_device(tty->dev);
         kfree(tty->write_buf);
-        tty_buffer_free_all(tty);
         tty->magic = 0xDEADDEAD;
         kfree(tty);
 }
@@ -1417,6 +1416,8 @@ struct tty_struct *tty_init_dev(struct tty_driver *driver, int idx)
                         "%s: %s driver does not set tty->port. This will crash the kernel later. Fix the driver!\n",
                         __func__, tty->driver->name);
 
+        tty->port->itty = tty;
+
         /*
          * Structures all installed ... call the ldisc open routines.
          * If we fail here just call release_tty to clean up.  No need
@@ -1552,6 +1553,7 @@ static void release_tty(struct tty_struct *tty, int idx)
                 tty->ops->shutdown(tty);
         tty_free_termios(tty);
         tty_driver_remove_tty(tty->driver, tty);
+        tty->port->itty = NULL;
 
         if (tty->link)
                 tty_kref_put(tty->link);
@@ -1625,7 +1627,6 @@ int tty_release(struct inode *inode, struct file *filp)
         struct tty_struct *tty = file_tty(filp);
         struct tty_struct *o_tty;
         int     pty_master, tty_closing, o_tty_closing, do_sleep;
-        int     devpts;
         int     idx;
         char    buf[64];
 
@@ -1640,7 +1641,6 @@ int tty_release(struct inode *inode, struct file *filp)
         idx = tty->index;
         pty_master = (tty->driver->type == TTY_DRIVER_TYPE_PTY &&
                       tty->driver->subtype == PTY_TYPE_MASTER);
-        devpts = (tty->driver->flags & TTY_DRIVER_DEVPTS_MEM) != 0;
         /* Review: parallel close */
         o_tty = tty->link;
 
@@ -1799,9 +1799,6 @@ int tty_release(struct inode *inode, struct file *filp)
         release_tty(tty, idx);
         mutex_unlock(&tty_mutex);
 
-        /* Make this pty number available for reallocation */
-        if (devpts)
-                devpts_kill_index(inode, idx);
         return 0;
 }
 
@@ -2937,19 +2934,13 @@ void initialize_tty_struct(struct tty_struct *tty,
         tty_ldisc_init(tty);
         tty->session = NULL;
         tty->pgrp = NULL;
-        tty->overrun_time = jiffies;
-        tty_buffer_init(tty);
         mutex_init(&tty->legacy_mutex);
         mutex_init(&tty->termios_mutex);
         mutex_init(&tty->ldisc_mutex);
         init_waitqueue_head(&tty->write_wait);
         init_waitqueue_head(&tty->read_wait);
         INIT_WORK(&tty->hangup_work, do_tty_hangup);
-        mutex_init(&tty->atomic_read_lock);
         mutex_init(&tty->atomic_write_lock);
-        mutex_init(&tty->output_lock);
-        mutex_init(&tty->echo_lock);
-        spin_lock_init(&tty->read_lock);
         spin_lock_init(&tty->ctrl_lock);
         INIT_LIST_HEAD(&tty->tty_files);
         INIT_WORK(&tty->SAK_work, do_SAK_work);
diff --git a/drivers/tty/tty_ldisc.c b/drivers/tty/tty_ldisc.c
index 0f2a2c5e704c..f4e6754525dc 100644
--- a/drivers/tty/tty_ldisc.c
+++ b/drivers/tty/tty_ldisc.c
@@ -512,7 +512,7 @@ static void tty_ldisc_restore(struct tty_struct *tty, struct tty_ldisc *old)
 static int tty_ldisc_halt(struct tty_struct *tty)
 {
         clear_bit(TTY_LDISC, &tty->flags);
-        return cancel_work_sync(&tty->buf.work);
+        return cancel_work_sync(&tty->port->buf.work);
 }
 
 /**
@@ -525,7 +525,7 @@ static void tty_ldisc_flush_works(struct tty_struct *tty)
 {
         flush_work(&tty->hangup_work);
         flush_work(&tty->SAK_work);
-        flush_work(&tty->buf.work);
+        flush_work(&tty->port->buf.work);
 }
 
 /**
@@ -704,9 +704,9 @@ enable:
         /* Restart the work queue in case no characters kick it off. Safe if
            already running */
         if (work)
-                schedule_work(&tty->buf.work);
+                schedule_work(&tty->port->buf.work);
         if (o_work)
-                schedule_work(&o_tty->buf.work);
+                schedule_work(&o_tty->port->buf.work);
         mutex_unlock(&tty->ldisc_mutex);
         tty_unlock(tty);
         return retval;
@@ -817,7 +817,7 @@ void tty_ldisc_hangup(struct tty_struct *tty)
          */
         clear_bit(TTY_LDISC, &tty->flags);
         tty_unlock(tty);
-        cancel_work_sync(&tty->buf.work);
+        cancel_work_sync(&tty->port->buf.work);
         mutex_unlock(&tty->ldisc_mutex);
 retry:
         tty_lock(tty);
@@ -897,6 +897,11 @@ int tty_ldisc_setup(struct tty_struct *tty, struct tty_struct *o_tty)
 
 static void tty_ldisc_kill(struct tty_struct *tty)
 {
+        /* There cannot be users from userspace now. But there still might be
+         * drivers holding a reference via tty_ldisc_ref. Do not steal them the
+         * ldisc until they are done. */
+        tty_ldisc_wait_idle(tty, MAX_SCHEDULE_TIMEOUT);
+
         mutex_lock(&tty->ldisc_mutex);
         /*
          * Now kill off the ldisc
diff --git a/drivers/tty/tty_port.c b/drivers/tty/tty_port.c
index d7bdd8d0c23f..416b42f7c346 100644
--- a/drivers/tty/tty_port.c
+++ b/drivers/tty/tty_port.c
@@ -21,6 +21,7 @@
 void tty_port_init(struct tty_port *port)
 {
         memset(port, 0, sizeof(*port));
+        tty_buffer_init(port);
         init_waitqueue_head(&port->open_wait);
         init_waitqueue_head(&port->close_wait);
         init_waitqueue_head(&port->delta_msr_wait);
@@ -126,6 +127,7 @@ static void tty_port_destructor(struct kref *kref)
         struct tty_port *port = container_of(kref, struct tty_port, kref);
         if (port->xmit_buf)
                 free_page((unsigned long)port->xmit_buf);
+        tty_buffer_free_all(port);
         if (port->ops->destruct)
                 port->ops->destruct(port);
         else
diff --git a/drivers/tty/vt/selection.c b/drivers/tty/vt/selection.c
index 8e9b4be97a2d..60b7b6926059 100644
--- a/drivers/tty/vt/selection.c
+++ b/drivers/tty/vt/selection.c
@@ -341,15 +341,11 @@ int paste_selection(struct tty_struct *tty)
         struct  tty_ldisc *ld;
         DECLARE_WAITQUEUE(wait, current);
 
-
         console_lock();
         poke_blanked_console();
         console_unlock();
 
-        /* FIXME: wtf is this supposed to achieve ? */
-        ld = tty_ldisc_ref(tty);
-        if (!ld)
-                ld = tty_ldisc_ref_wait(tty);
+        ld = tty_ldisc_ref_wait(tty);
 
         /* FIXME: this is completely unsafe */
         add_wait_queue(&vc->paste_wait, &wait);
@@ -361,8 +357,7 @@ int paste_selection(struct tty_struct *tty)
                 }
                 count = sel_buffer_lth - pasted;
                 count = min(count, tty->receive_room);
-                tty->ldisc->ops->receive_buf(tty, sel_buffer + pasted,
-                                                                NULL, count);
+                ld->ops->receive_buf(tty, sel_buffer + pasted, NULL, count);
                 pasted += count;
         }
         remove_wait_queue(&vc->paste_wait, &wait);
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c
index 2a4749c3eb3f..23afa06b65a4 100644
--- a/drivers/usb/gadget/omap_udc.c
+++ b/drivers/usb/gadget/omap_udc.c
@@ -44,7 +44,7 @@
 #include <asm/unaligned.h>
 #include <asm/mach-types.h>
 
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 #include <mach/usb.h>
 
@@ -61,6 +61,8 @@
 #define DRIVER_DESC     "OMAP UDC driver"
 #define DRIVER_VERSION  "4 October 2004"
 
+#define OMAP_DMA_USB_W2FC_TX0           29
+
 /*
  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
  * D+ pullup to allow enumeration.  That's too early for the gadget
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index 4a08fc0b27c9..8e58a5fa1994 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -24,7 +24,6 @@
 #include <linux/usb/ulpi.h>
 #include <linux/slab.h>
 
-#include <mach/hardware.h>
 #include <linux/platform_data/usb-ehci-mxc.h>
 
 #include <asm/mach-types.h>
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index d7fe287d0678..0d5ac36fdf47 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -39,12 +39,13 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/usb/ulpi.h>
-#include <plat/usb.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pm_runtime.h>
 #include <linux/gpio.h>
 #include <linux/clk.h>
 
+#include <linux/platform_data/usb-omap.h>
+
 /* EHCI Register Set */
 #define EHCI_INSNREG04                                  (0xA0)
 #define EHCI_INSNREG04_DISABLE_UNSUSPEND                (1 << 5)
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 6223d1757848..2de089001ae9 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -28,7 +28,10 @@
 #include <linux/pm_runtime.h>
 
 #include <linux/usb/tegra_usb_phy.h>
-#include <mach/iomap.h>
+
+#define TEGRA_USB_BASE                  0xC5000000
+#define TEGRA_USB2_BASE                 0xC5004000
+#define TEGRA_USB3_BASE                 0xC5008000
 
 #define TEGRA_USB_DMA_ALIGN 32
 
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index 4531d03503c3..439e6e4f2d6b 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -25,7 +25,6 @@
 #include <asm/mach-types.h>
 
 #include <mach/mux.h>
-#include <plat/fpga.h>
 
 #include <mach/hardware.h>
 #include <mach/irqs.h>
@@ -93,14 +92,14 @@ static int omap_ohci_transceiver_power(int on)
 {
         if (on) {
                 if (machine_is_omap_innovator() && cpu_is_omap1510())
-                        fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
+                        __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
                                 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
                                INNOVATOR_FPGA_CAM_USB_CONTROL);
                 else if (machine_is_omap_osk())
                         tps65010_set_gpio_out_value(GPIO1, LOW);
         } else {
                 if (machine_is_omap_innovator() && cpu_is_omap1510())
-                        fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
+                        __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
                                 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
                                INNOVATOR_FPGA_CAM_USB_CONTROL);
                 else if (machine_is_omap_osk())
diff --git a/drivers/usb/host/ohci-omap3.c b/drivers/usb/host/ohci-omap3.c
index 1b8133b6e451..bd7803dce9be 100644
--- a/drivers/usb/host/ohci-omap3.c
+++ b/drivers/usb/host/ohci-omap3.c
@@ -30,7 +30,6 @@
  */
 
 #include <linux/platform_device.h>
-#include <plat/usb.h>
 #include <linux/pm_runtime.h>
 
 /*-------------------------------------------------------------------------*/
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
index c964d6af178b..a87cdd2387cf 100644
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
@@ -34,8 +34,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/usb/nop-usb-xceiv.h>
-
-#include <plat/usb.h>
+#include <linux/platform_data/usb-omap.h>
 
 #include "musb_core.h"
 
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index ff5f112053d2..aa34f22181c1 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -38,13 +38,12 @@
 #include <linux/pm_runtime.h>
 #include <linux/module.h>
 #include <linux/usb/nop-usb-xceiv.h>
+#include <linux/platform_data/usb-omap.h>
 
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/of_address.h>
 
-#include <plat/usb.h>
-
 #include "musb_core.h"
 
 #ifdef CONFIG_OF
diff --git a/drivers/usb/musb/omap2430.h b/drivers/usb/musb/omap2430.h
index b85f3973e78c..8ef656659fcb 100644
--- a/drivers/usb/musb/omap2430.h
+++ b/drivers/usb/musb/omap2430.h
@@ -10,7 +10,7 @@
 #ifndef __MUSB_OMAP243X_H__
 #define __MUSB_OMAP243X_H__
 
-#include <plat/usb.h>
+#include <linux/platform_data/usb-omap.h>
 
 /*
  * OMAP2430-specific definitions
diff --git a/drivers/usb/musb/tusb6010_omap.c b/drivers/usb/musb/tusb6010_omap.c
index 7a62b95dac24..bfca114f7c56 100644
--- a/drivers/usb/musb/tusb6010_omap.c
+++ b/drivers/usb/musb/tusb6010_omap.c
@@ -16,7 +16,7 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 #include "musb_core.h"
 #include "tusb6010.h"
@@ -25,6 +25,13 @@
 
 #define MAX_DMAREQ              5       /* REVISIT: Really 6, but req5 not OK */
 
+#define OMAP24XX_DMA_EXT_DMAREQ0        2
+#define OMAP24XX_DMA_EXT_DMAREQ1        3
+#define OMAP242X_DMA_EXT_DMAREQ2        14
+#define OMAP242X_DMA_EXT_DMAREQ3        15
+#define OMAP242X_DMA_EXT_DMAREQ4        16
+#define OMAP242X_DMA_EXT_DMAREQ5        64
+
 struct tusb_omap_dma_ch {
         struct musb             *musb;
         void __iomem            *tbase;
diff --git a/drivers/usb/phy/tegra_usb_phy.c b/drivers/usb/phy/tegra_usb_phy.c
index 987116f9efcd..9d13c81754e0 100644
--- a/drivers/usb/phy/tegra_usb_phy.c
+++ b/drivers/usb/phy/tegra_usb_phy.c
@@ -29,7 +29,9 @@
 #include <linux/usb/ulpi.h>
 #include <asm/mach-types.h>
 #include <linux/usb/tegra_usb_phy.h>
-#include <mach/iomap.h>
+
+#define TEGRA_USB_BASE          0xC5000000
+#define TEGRA_USB_SIZE          SZ_16K
 
 #define ULPI_VIEWPORT           0x170
 
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c
index cf2688de0832..e501dbc966b3 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/imxfb.c
@@ -33,7 +33,6 @@
 #include <linux/math64.h>
 
 #include <linux/platform_data/video-imxfb.h>
-#include <mach/hardware.h>
 
 /*
  * Complain if VAR is out of range.
@@ -53,8 +52,8 @@
 #define LCDC_SIZE       0x04
 #define SIZE_XMAX(x)    ((((x) >> 4) & 0x3f) << 20)
 
-#define YMAX_MASK       (cpu_is_mx1() ? 0x1ff : 0x3ff)
-#define SIZE_YMAX(y)    ((y) & YMAX_MASK)
+#define YMAX_MASK_IMX1  0x1ff
+#define YMAX_MASK_IMX21 0x3ff
 
 #define LCDC_VPW        0x08
 #define VPW_VPW(x)      ((x) & 0x3ff)
@@ -128,12 +127,18 @@ struct imxfb_rgb {
         struct fb_bitfield      transp;
 };
 
+enum imxfb_type {
+        IMX1_FB,
+        IMX21_FB,
+};
+
 struct imxfb_info {
         struct platform_device  *pdev;
         void __iomem            *regs;
         struct clk              *clk_ipg;
         struct clk              *clk_ahb;
         struct clk              *clk_per;
+        enum imxfb_type         devtype;
 
         /*
          * These are the addresses we mapped
@@ -168,6 +173,24 @@ struct imxfb_info {
         void (*backlight_power)(int);
 };
 
+static struct platform_device_id imxfb_devtype[] = {
+        {
+                .name = "imx1-fb",
+                .driver_data = IMX1_FB,
+        }, {
+                .name = "imx21-fb",
+                .driver_data = IMX21_FB,
+        }, {
+                /* sentinel */
+        }
+};
+MODULE_DEVICE_TABLE(platform, imxfb_devtype);
+
+static inline int is_imx1_fb(struct imxfb_info *fbi)
+{
+        return fbi->devtype == IMX1_FB;
+}
+
 #define IMX_NAME        "IMX"
 
 /*
@@ -366,7 +389,7 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
                 break;
         case 16:
         default:
-                if (cpu_is_mx1())
+                if (is_imx1_fb(fbi))
                         pcr |= PCR_BPIX_12;
                 else
                         pcr |= PCR_BPIX_16;
@@ -596,6 +619,7 @@ static struct fb_ops imxfb_ops = {
 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
 {
         struct imxfb_info *fbi = info->par;
+        u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
 
         pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
                 var->xres, var->hsync_len,
@@ -617,7 +641,7 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
         if (var->right_margin > 255)
                 printk(KERN_ERR "%s: invalid right_margin %d\n",
                         info->fix.id, var->right_margin);
-        if (var->yres < 1 || var->yres > YMAX_MASK)
+        if (var->yres < 1 || var->yres > ymax_mask)
                 printk(KERN_ERR "%s: invalid yres %d\n",
                         info->fix.id, var->yres);
         if (var->vsync_len > 100)
@@ -645,7 +669,7 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
                 VCR_V_WAIT_2(var->upper_margin),
                 fbi->regs + LCDC_VCR);
 
-        writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres),
+        writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
                         fbi->regs + LCDC_SIZE);
 
         writel(fbi->pcr, fbi->regs + LCDC_PCR);
@@ -765,6 +789,7 @@ static int __init imxfb_probe(struct platform_device *pdev)
                 return -ENOMEM;
 
         fbi = info->par;
+        fbi->devtype = pdev->id_entry->driver_data;
 
         if (!fb_mode)
                 fb_mode = pdata->mode[0].mode.name;
@@ -939,6 +964,7 @@ static struct platform_driver imxfb_driver = {
         .driver         = {
                 .name   = DRIVER_NAME,
         },
+        .id_table       = imxfb_devtype,
 };
 
 static int imxfb_setup(void)
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index ce1d452464ed..736887208574 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -26,10 +26,9 @@
 #include <linux/console.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
+#include <linux/dma/ipu-dma.h>
 
 #include <linux/platform_data/dma-imx.h>
-#include <mach/hardware.h>
-#include <mach/ipu.h>
 #include <linux/platform_data/video-mx3fb.h>
 
 #include <asm/io.h>
diff --git a/drivers/video/omap/lcd_inn1510.c b/drivers/video/omap/lcd_inn1510.c
index b38b1dd15ce3..2ee423279e35 100644
--- a/drivers/video/omap/lcd_inn1510.c
+++ b/drivers/video/omap/lcd_inn1510.c
@@ -23,7 +23,8 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 
-#include <plat/fpga.h>
+#include <mach/hardware.h>
+
 #include "omapfb.h"
 
 static int innovator1510_panel_init(struct lcd_panel *panel,
@@ -38,13 +39,13 @@ static void innovator1510_panel_cleanup(struct lcd_panel *panel)
 
 static int innovator1510_panel_enable(struct lcd_panel *panel)
 {
-        fpga_write(0x7, OMAP1510_FPGA_LCD_PANEL_CONTROL);
+        __raw_writeb(0x7, OMAP1510_FPGA_LCD_PANEL_CONTROL);
         return 0;
 }
 
 static void innovator1510_panel_disable(struct lcd_panel *panel)
 {
-        fpga_write(0x0, OMAP1510_FPGA_LCD_PANEL_CONTROL);
+        __raw_writeb(0x0, OMAP1510_FPGA_LCD_PANEL_CONTROL);
 }
 
 static unsigned long innovator1510_panel_get_caps(struct lcd_panel *panel)
diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c
index 7767338f8b14..c39d6e46f8c5 100644
--- a/drivers/video/omap/lcdc.c
+++ b/drivers/video/omap/lcdc.c
@@ -31,7 +31,7 @@
 #include <linux/gfp.h>
 
 #include <mach/lcdc.h>
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 #include <asm/mach-types.h>
 
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index 4351c438b76f..1b5ee8ec192a 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -30,7 +30,7 @@
 #include <linux/uaccess.h>
 #include <linux/module.h>
 
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 #include "omapfb.h"
 #include "lcdc.h"
diff --git a/drivers/video/omap/sossi.c b/drivers/video/omap/sossi.c
index f79c137753d7..c510a4457398 100644
--- a/drivers/video/omap/sossi.c
+++ b/drivers/video/omap/sossi.c
@@ -25,7 +25,7 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
 
-#include <plat/dma.h>
+#include <plat-omap/dma-omap.h>
 
 #include "omapfb.h"
 #include "lcdc.h"
diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c
index b2af72dc20bd..d94ef9e31a35 100644
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/omap2/dss/core.c
@@ -237,7 +237,7 @@ static int __init omap_dss_probe(struct platform_device *pdev)
 
         core.pdev = pdev;
 
-        dss_features_init();
+        dss_features_init(pdata->version);
 
         dss_apply_init();
 
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index b43477a5fae8..a5ab354f267a 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -37,8 +37,6 @@
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 
-#include <plat/cpu.h>
-
 #include <video/omapdss.h>
 
 #include "dss.h"
@@ -4042,29 +4040,44 @@ static const struct dispc_features omap44xx_dispc_feats __initconst = {
         .gfx_fifo_workaround    =       true,
 };
 
-static int __init dispc_init_features(struct device *dev)
+static int __init dispc_init_features(struct platform_device *pdev)
 {
+        struct omap_dss_board_info *pdata = pdev->dev.platform_data;
         const struct dispc_features *src;
         struct dispc_features *dst;
 
-        dst = devm_kzalloc(dev, sizeof(*dst), GFP_KERNEL);
+        dst = devm_kzalloc(&pdev->dev, sizeof(*dst), GFP_KERNEL);
         if (!dst) {
-                dev_err(dev, "Failed to allocate DISPC Features\n");
+                dev_err(&pdev->dev, "Failed to allocate DISPC Features\n");
                 return -ENOMEM;
         }
 
-        if (cpu_is_omap24xx()) {
+        switch (pdata->version) {
+        case OMAPDSS_VER_OMAP24xx:
                 src = &omap24xx_dispc_feats;
-        } else if (cpu_is_omap34xx()) {
-                if (omap_rev() < OMAP3430_REV_ES3_0)
-                        src = &omap34xx_rev1_0_dispc_feats;
-                else
-                        src = &omap34xx_rev3_0_dispc_feats;
-        } else if (cpu_is_omap44xx()) {
+                break;
+
+        case OMAPDSS_VER_OMAP34xx_ES1:
+                src = &omap34xx_rev1_0_dispc_feats;
+                break;
+
+        case OMAPDSS_VER_OMAP34xx_ES3:
+        case OMAPDSS_VER_OMAP3630:
+        case OMAPDSS_VER_AM35xx:
+                src = &omap34xx_rev3_0_dispc_feats;
+                break;
+
+        case OMAPDSS_VER_OMAP4430_ES1:
+        case OMAPDSS_VER_OMAP4430_ES2:
+        case OMAPDSS_VER_OMAP4:
                 src = &omap44xx_dispc_feats;
-        } else if (soc_is_omap54xx()) {
+                break;
+
+        case OMAPDSS_VER_OMAP5:
                 src = &omap44xx_dispc_feats;
-        } else {
+                break;
+
+        default:
                 return -ENODEV;
         }
 
@@ -4084,7 +4097,7 @@ static int __init omap_dispchw_probe(struct platform_device *pdev)
 
         dispc.pdev = pdev;
 
-        r = dispc_init_features(&dispc.pdev->dev);
+        r = dispc_init_features(dispc.pdev);
         if (r)
                 return r;
 
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 5f6eea801b06..602102cebcbf 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -35,8 +35,6 @@
 
 #include <video/omapdss.h>
 
-#include <plat/cpu.h>
-
 #include "dss.h"
 #include "dss_features.h"
 
@@ -796,29 +794,46 @@ static const struct dss_features omap54xx_dss_feats __initconst = {
         .dpi_select_source      =       &dss_dpi_select_source_omap5,
 };
 
-static int __init dss_init_features(struct device *dev)
+static int __init dss_init_features(struct platform_device *pdev)
 {
+        struct omap_dss_board_info *pdata = pdev->dev.platform_data;
         const struct dss_features *src;
         struct dss_features *dst;
 
-        dst = devm_kzalloc(dev, sizeof(*dst), GFP_KERNEL);
+        dst = devm_kzalloc(&pdev->dev, sizeof(*dst), GFP_KERNEL);
         if (!dst) {
-                dev_err(dev, "Failed to allocate local DSS Features\n");
+                dev_err(&pdev->dev, "Failed to allocate local DSS Features\n");
                 return -ENOMEM;
         }
 
-        if (cpu_is_omap24xx())
+        switch (pdata->version) {
+        case OMAPDSS_VER_OMAP24xx:
                 src = &omap24xx_dss_feats;
-        else if (cpu_is_omap3630())
-                src = &omap3630_dss_feats;
-        else if (cpu_is_omap34xx())
+                break;
+
+        case OMAPDSS_VER_OMAP34xx_ES1:
+        case OMAPDSS_VER_OMAP34xx_ES3:
+        case OMAPDSS_VER_AM35xx:
                 src = &omap34xx_dss_feats;
-        else if (cpu_is_omap44xx())
+                break;
+
+        case OMAPDSS_VER_OMAP3630:
+                src = &omap3630_dss_feats;
+                break;
+
+        case OMAPDSS_VER_OMAP4430_ES1:
+        case OMAPDSS_VER_OMAP4430_ES2:
+        case OMAPDSS_VER_OMAP4:
                 src = &omap44xx_dss_feats;
-        else if (soc_is_omap54xx())
+                break;
+
+        case OMAPDSS_VER_OMAP5:
                 src = &omap54xx_dss_feats;
-        else
+                break;
+
+        default:
                 return -ENODEV;
+        }
 
         memcpy(dst, src, sizeof(*dst));
         dss.feat = dst;
@@ -835,7 +850,7 @@ static int __init omap_dsshw_probe(struct platform_device *pdev)
 
         dss.pdev = pdev;
 
-        r = dss_init_features(&dss.pdev->dev);
+        r = dss_init_features(dss.pdev);
         if (r)
                 return r;
 
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c
index acbc1e1efba3..3e8287c8709d 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -23,7 +23,6 @@
 #include <linux/slab.h>
 
 #include <video/omapdss.h>
-#include <plat/cpu.h>
 
 #include "dss.h"
 #include "dss_features.h"
@@ -825,10 +824,20 @@ static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
 
 };
 
-void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data)
+void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
+                enum omapdss_version version)
 {
-        if (cpu_is_omap44xx())
+        switch (version) {
+        case OMAPDSS_VER_OMAP4430_ES1:
+        case OMAPDSS_VER_OMAP4430_ES2:
+        case OMAPDSS_VER_OMAP4:
                 ip_data->ops = &omap4_hdmi_functions;
+                break;
+        default:
+                ip_data->ops = NULL;
+        }
+
+        WARN_ON(ip_data->ops == NULL);
 }
 #endif
 
@@ -929,29 +938,44 @@ bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
         return omap_current_dss_features->supported_rotation_types & rot_type;
 }
 
-void dss_features_init(void)
+void dss_features_init(enum omapdss_version version)
 {
-        if (cpu_is_omap24xx())
+        switch (version) {
+        case OMAPDSS_VER_OMAP24xx:
                 omap_current_dss_features = &omap2_dss_features;
-        else if (cpu_is_omap3630())
+                break;
+
+        case OMAPDSS_VER_OMAP34xx_ES1:
+        case OMAPDSS_VER_OMAP34xx_ES3:
+                omap_current_dss_features = &omap3430_dss_features;
+                break;
+
+        case OMAPDSS_VER_OMAP3630:
                 omap_current_dss_features = &omap3630_dss_features;
-        else if (cpu_is_omap34xx()) {
-                if (soc_is_am35xx()) {
-                        omap_current_dss_features = &am35xx_dss_features;
-                } else {
-                        omap_current_dss_features = &omap3430_dss_features;
-                }
-        }
-        else if (omap_rev() == OMAP4430_REV_ES1_0)
+                break;
+
+        case OMAPDSS_VER_OMAP4430_ES1:
                 omap_current_dss_features = &omap4430_es1_0_dss_features;
-        else if (omap_rev() == OMAP4430_REV_ES2_0 ||
-                omap_rev() == OMAP4430_REV_ES2_1 ||
-                omap_rev() == OMAP4430_REV_ES2_2)
+                break;
+
+        case OMAPDSS_VER_OMAP4430_ES2:
                 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
-        else if (cpu_is_omap44xx())
+                break;
+
+        case OMAPDSS_VER_OMAP4:
                 omap_current_dss_features = &omap4_dss_features;
-        else if (soc_is_omap54xx())
+                break;
+
+        case OMAPDSS_VER_OMAP5:
                 omap_current_dss_features = &omap5_dss_features;
-        else
+                break;
+
+        case OMAPDSS_VER_AM35xx:
+                omap_current_dss_features = &am35xx_dss_features;
+                break;
+
+        default:
                 DSSWARN("Unsupported OMAP version");
+                break;
+        }
 }
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h
index 9218113b5e88..fc492ef72a51 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -123,8 +123,9 @@ bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
 
 bool dss_has_feature(enum dss_feat_id id);
 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
-void dss_features_init(void);
+void dss_features_init(enum omapdss_version version);
 #if defined(CONFIG_OMAP4_DSS_HDMI)
-void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data);
+void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
+                enum omapdss_version version);
 #endif
 #endif
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 8c9b8b3b7f77..0d6d7213a858 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -323,6 +323,7 @@ static void hdmi_runtime_put(void)
 
 static int __init hdmi_init_display(struct omap_dss_device *dssdev)
 {
+        struct omap_dss_board_info *pdata = hdmi.pdev->dev.platform_data;
         int r;
 
         struct gpio gpios[] = {
@@ -333,7 +334,7 @@ static int __init hdmi_init_display(struct omap_dss_device *dssdev)
 
         DSSDBG("init_display\n");
 
-        dss_init_hdmi_ip_ops(&hdmi.ip_data);
+        dss_init_hdmi_ip_ops(&hdmi.ip_data, pdata->version);
 
         if (hdmi.vdda_hdmi_dac_reg == NULL) {
                 struct regulator *reg;
diff --git a/drivers/video/omap2/omapfb/omapfb-ioctl.c b/drivers/video/omap2/omapfb/omapfb-ioctl.c
index d630b26a005c..532a31b3d96b 100644
--- a/drivers/video/omap2/omapfb/omapfb-ioctl.c
+++ b/drivers/video/omap2/omapfb/omapfb-ioctl.c
@@ -30,7 +30,7 @@
 #include <linux/export.h>
 
 #include <video/omapdss.h>
-#include <plat/vrfb.h>
+#include <video/omapvrfb.h>
 #include <plat/vram.h>
 
 #include "omapfb.h"
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
index 16db1589bd91..bc225e46fdd2 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -31,9 +31,8 @@
 #include <linux/omapfb.h>
 
 #include <video/omapdss.h>
-#include <plat/cpu.h>
 #include <plat/vram.h>
-#include <plat/vrfb.h>
+#include <video/omapvrfb.h>
 
 #include "omapfb.h"
 
@@ -2396,10 +2395,7 @@ static int __init omapfb_probe(struct platform_device *pdev)
                 goto err0;
         }
 
-        /* TODO : Replace cpu check with omap_has_vrfb once HAS_FEATURE
-        *        available for OMAP2 and OMAP3
-        */
-        if (def_vrfb && !cpu_is_omap24xx() && !cpu_is_omap34xx()) {
+        if (def_vrfb && !omap_vrfb_supported()) {
                 def_vrfb = 0;
                 dev_warn(&pdev->dev, "VRFB is not supported on this hardware, "
                                 "ignoring the module parameter vrfb=y\n");
diff --git a/drivers/video/omap2/omapfb/omapfb-sysfs.c b/drivers/video/omap2/omapfb/omapfb-sysfs.c
index e8d8cc76a435..17aa174e187c 100644
--- a/drivers/video/omap2/omapfb/omapfb-sysfs.c
+++ b/drivers/video/omap2/omapfb/omapfb-sysfs.c
@@ -30,7 +30,7 @@
 #include <linux/omapfb.h>
 
 #include <video/omapdss.h>
-#include <plat/vrfb.h>
+#include <video/omapvrfb.h>
 
 #include "omapfb.h"
 
diff --git a/drivers/video/omap2/vrfb.c b/drivers/video/omap2/vrfb.c
index 7e990220ad2a..5d8fdac3b800 100644
--- a/drivers/video/omap2/vrfb.c
+++ b/drivers/video/omap2/vrfb.c
@@ -26,9 +26,9 @@
 #include <linux/io.h>
 #include <linux/bitops.h>
 #include <linux/mutex.h>
+#include <linux/platform_device.h>
 
-#include <plat/vrfb.h>
-#include <plat/sdrc.h>
+#include <video/omapvrfb.h>
 
 #ifdef DEBUG
 #define DBG(format, ...) pr_debug("VRFB: " format, ## __VA_ARGS__)
@@ -36,10 +36,10 @@
 #define DBG(format, ...)
 #endif
 
-#define SMS_ROT_VIRT_BASE(context, rot) \
-        (((context >= 4) ? 0xD0000000 : 0x70000000) \
-         + (0x4000000 * (context)) \
-         + (0x1000000 * (rot)))
+#define SMS_ROT_CONTROL(context)        (0x0 + 0x10 * context)
+#define SMS_ROT_SIZE(context)           (0x4 + 0x10 * context)
+#define SMS_ROT_PHYSICAL_BA(context)    (0x8 + 0x10 * context)
+#define SMS_ROT_VIRT_BASE(rot)          (0x1000000 * (rot))
 
 #define OMAP_VRFB_SIZE                  (2048 * 2048 * 4)
 
@@ -53,10 +53,16 @@
 #define SMS_PW_OFFSET           4
 #define SMS_PS_OFFSET           0
 
-#define VRFB_NUM_CTXS 12
 /* bitmap of reserved contexts */
 static unsigned long ctx_map;
 
+struct vrfb_ctx {
+        u32 base;
+        u32 physical_ba;
+        u32 control;
+        u32 size;
+};
+
 static DEFINE_MUTEX(ctx_lock);
 
 /*
@@ -65,17 +71,34 @@ static DEFINE_MUTEX(ctx_lock);
  * we don't need locking, since no drivers will run until after the wake-up
  * has finished.
  */
-static struct {
-        u32 physical_ba;
-        u32 control;
-        u32 size;
-} vrfb_hw_context[VRFB_NUM_CTXS];
+
+static void __iomem *vrfb_base;
+
+static int num_ctxs;
+static struct vrfb_ctx *ctxs;
+
+static bool vrfb_loaded;
+
+static void omap2_sms_write_rot_control(u32 val, unsigned ctx)
+{
+        __raw_writel(val, vrfb_base + SMS_ROT_CONTROL(ctx));
+}
+
+static void omap2_sms_write_rot_size(u32 val, unsigned ctx)
+{
+        __raw_writel(val, vrfb_base + SMS_ROT_SIZE(ctx));
+}
+
+static void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx)
+{
+        __raw_writel(val, vrfb_base + SMS_ROT_PHYSICAL_BA(ctx));
+}
 
 static inline void restore_hw_context(int ctx)
 {
-        omap2_sms_write_rot_control(vrfb_hw_context[ctx].control, ctx);
-        omap2_sms_write_rot_size(vrfb_hw_context[ctx].size, ctx);
-        omap2_sms_write_rot_physical_ba(vrfb_hw_context[ctx].physical_ba, ctx);
+        omap2_sms_write_rot_control(ctxs[ctx].control, ctx);
+        omap2_sms_write_rot_size(ctxs[ctx].size, ctx);
+        omap2_sms_write_rot_physical_ba(ctxs[ctx].physical_ba, ctx);
 }
 
 static u32 get_image_width_roundup(u16 width, u8 bytespp)
@@ -196,9 +219,9 @@ void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr,
         control |= VRFB_PAGE_WIDTH_EXP  << SMS_PW_OFFSET;
         control |= VRFB_PAGE_HEIGHT_EXP << SMS_PH_OFFSET;
 
-        vrfb_hw_context[ctx].physical_ba = paddr;
-        vrfb_hw_context[ctx].size = size;
-        vrfb_hw_context[ctx].control = control;
+        ctxs[ctx].physical_ba = paddr;
+        ctxs[ctx].size = size;
+        ctxs[ctx].control = control;
 
         omap2_sms_write_rot_physical_ba(paddr, ctx);
         omap2_sms_write_rot_size(size, ctx);
@@ -274,11 +297,11 @@ int omap_vrfb_request_ctx(struct vrfb *vrfb)
 
         mutex_lock(&ctx_lock);
 
-        for (ctx = 0; ctx < VRFB_NUM_CTXS; ++ctx)
+        for (ctx = 0; ctx < num_ctxs; ++ctx)
                 if ((ctx_map & (1 << ctx)) == 0)
                         break;
 
-        if (ctx == VRFB_NUM_CTXS) {
+        if (ctx == num_ctxs) {
                 pr_err("vrfb: no free contexts\n");
                 r = -EBUSY;
                 goto out;
@@ -293,7 +316,7 @@ int omap_vrfb_request_ctx(struct vrfb *vrfb)
         vrfb->context = ctx;
 
         for (rot = 0; rot < 4; ++rot) {
-                paddr = SMS_ROT_VIRT_BASE(ctx, rot);
+                paddr = ctxs[ctx].base + SMS_ROT_VIRT_BASE(rot);
                 if (!request_mem_region(paddr, OMAP_VRFB_SIZE, "vrfb")) {
                         pr_err("vrfb: failed to reserve VRFB "
                                         "area for ctx %d, rotation %d\n",
@@ -314,3 +337,80 @@ out:
         return r;
 }
 EXPORT_SYMBOL(omap_vrfb_request_ctx);
+
+bool omap_vrfb_supported(void)
+{
+        return vrfb_loaded;
+}
+EXPORT_SYMBOL(omap_vrfb_supported);
+
+static int __init vrfb_probe(struct platform_device *pdev)
+{
+        struct resource *mem;
+        int i;
+
+        /* first resource is the register res, the rest are vrfb contexts */
+
+        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!mem) {
+                dev_err(&pdev->dev, "can't get vrfb base address\n");
+                return -EINVAL;
+        }
+
+        vrfb_base = devm_request_and_ioremap(&pdev->dev, mem);
+        if (!vrfb_base) {
+                dev_err(&pdev->dev, "can't ioremap vrfb memory\n");
+                return -ENOMEM;
+        }
+
+        num_ctxs = pdev->num_resources - 1;
+
+        ctxs = devm_kzalloc(&pdev->dev,
+                        sizeof(struct vrfb_ctx) * num_ctxs,
+                        GFP_KERNEL);
+
+        if (!ctxs)
+                return -ENOMEM;
+
+        for (i = 0; i < num_ctxs; ++i) {
+                mem = platform_get_resource(pdev, IORESOURCE_MEM, 1 + i);
+                if (!mem) {
+                        dev_err(&pdev->dev, "can't get vrfb ctx %d address\n",
+                                        i);
+                        return -EINVAL;
+                }
+
+                ctxs[i].base = mem->start;
+        }
+
+        vrfb_loaded = true;
+
+        return 0;
+}
+
+static void __exit vrfb_remove(struct platform_device *pdev)
+{
+        vrfb_loaded = false;
+}
+
+static struct platform_driver vrfb_driver = {
+        .driver.name    = "omapvrfb",
+        .remove         = __exit_p(vrfb_remove),
+};
+
+static int __init vrfb_init(void)
+{
+        return platform_driver_probe(&vrfb_driver, &vrfb_probe);
+}
+
+static void __exit vrfb_exit(void)
+{
+        platform_driver_unregister(&vrfb_driver);
+}
+
+module_init(vrfb_init);
+module_exit(vrfb_exit);
+
+MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");
+MODULE_DESCRIPTION("OMAP VRFB");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c
index bcfab2b00ad2..9a45d0294cf4 100644
--- a/drivers/watchdog/imx2_wdt.c
+++ b/drivers/watchdog/imx2_wdt.c
@@ -33,7 +33,6 @@
 #include <linux/uaccess.h>
 #include <linux/timer.h>
 #include <linux/jiffies.h>
-#include <mach/hardware.h>
 
 #define DRIVER_NAME "imx2-wdt"
 
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index f5db18dbc0f9..477a1d47a64c 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -46,8 +46,8 @@
 #include <linux/slab.h>
 #include <linux/pm_runtime.h>
 #include <mach/hardware.h>
-#include <plat/cpu.h>
-#include <plat/prcm.h>
+
+#include <linux/platform_data/omap-wd-timer.h>
 
 #include "omap_wdt.h"
 
@@ -202,8 +202,10 @@ static ssize_t omap_wdt_write(struct file *file, const char __user *data,
 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
                                                 unsigned long arg)
 {
+        struct omap_wd_timer_platform_data *pdata;
         struct omap_wdt_dev *wdev;
-        int new_margin;
+        u32 rs;
+        int new_margin, bs;
         static const struct watchdog_info ident = {
                 .identity = "OMAP Watchdog",
                 .options = WDIOF_SETTIMEOUT,
@@ -211,6 +213,7 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
         };
 
         wdev = file->private_data;
+        pdata = wdev->dev->platform_data;
 
         switch (cmd) {
         case WDIOC_GETSUPPORT:
@@ -219,17 +222,12 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
         case WDIOC_GETSTATUS:
                 return put_user(0, (int __user *)arg);
         case WDIOC_GETBOOTSTATUS:
-#ifdef CONFIG_ARCH_OMAP1
-                if (cpu_is_omap16xx())
-                        return put_user(__raw_readw(ARM_SYSST),
-                                        (int __user *)arg);
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
-                if (cpu_is_omap24xx())
-                        return put_user(omap_prcm_get_reset_sources(),
-                                        (int __user *)arg);
-#endif
-                return put_user(0, (int __user *)arg);
+                if (!pdata || !pdata->read_reset_sources)
+                        return put_user(0, (int __user *)arg);
+                rs = pdata->read_reset_sources();
+                bs = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
+                        WDIOF_CARDRESET : 0;
+                return put_user(bs, (int __user *)arg);
         case WDIOC_KEEPALIVE:
                 spin_lock(&wdt_lock);
                 omap_wdt_ping(wdev);
diff --git a/fs/devpts/inode.c b/fs/devpts/inode.c
index 14afbabe6546..472e6befc54d 100644
--- a/fs/devpts/inode.c
+++ b/fs/devpts/inode.c
@@ -545,37 +545,38 @@ void devpts_kill_index(struct inode *ptmx_inode, int idx)
         mutex_unlock(&allocated_ptys_lock);
 }
 
-int devpts_pty_new(struct inode *ptmx_inode, struct tty_struct *tty)
+/**
+ * devpts_pty_new -- create a new inode in /dev/pts/
+ * @ptmx_inode: inode of the master
+ * @device: major+minor of the node to be created
+ * @index: used as a name of the node
+ * @priv: what's given back by devpts_get_priv
+ *
+ * The created inode is returned. Remove it from /dev/pts/ by devpts_pty_kill.
+ */
+struct inode *devpts_pty_new(struct inode *ptmx_inode, dev_t device, int index,
+                void *priv)
 {
-        /* tty layer puts index from devpts_new_index() in here */
-        int number = tty->index;
-        struct tty_driver *driver = tty->driver;
-        dev_t device = MKDEV(driver->major, driver->minor_start+number);
         struct dentry *dentry;
         struct super_block *sb = pts_sb_from_inode(ptmx_inode);
-        struct inode *inode = new_inode(sb);
+        struct inode *inode;
         struct dentry *root = sb->s_root;
         struct pts_fs_info *fsi = DEVPTS_SB(sb);
         struct pts_mount_opts *opts = &fsi->mount_opts;
-        int ret = 0;
         char s[12];
 
-        /* We're supposed to be given the slave end of a pty */
-        BUG_ON(driver->type != TTY_DRIVER_TYPE_PTY);
-        BUG_ON(driver->subtype != PTY_TYPE_SLAVE);
-
+        inode = new_inode(sb);
         if (!inode)
-                return -ENOMEM;
+                return ERR_PTR(-ENOMEM);
 
-        inode->i_ino = number + 3;
+        inode->i_ino = index + 3;
         inode->i_uid = opts->setuid ? opts->uid : current_fsuid();
         inode->i_gid = opts->setgid ? opts->gid : current_fsgid();
         inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;
         init_special_inode(inode, S_IFCHR|opts->mode, device);
-        inode->i_private = tty;
-        tty->driver_data = inode;
+        inode->i_private = priv;
 
-        sprintf(s, "%d", number);
+        sprintf(s, "%d", index);
 
         mutex_lock(&root->d_inode->i_mutex);
 
@@ -585,18 +586,24 @@ int devpts_pty_new(struct inode *ptmx_inode, struct tty_struct *tty)
                 fsnotify_create(root->d_inode, dentry);
         } else {
                 iput(inode);
-                ret = -ENOMEM;
+                inode = ERR_PTR(-ENOMEM);
         }
 
         mutex_unlock(&root->d_inode->i_mutex);
 
-        return ret;
+        return inode;
 }
 
-struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number)
+/**
+ * devpts_get_priv -- get private data for a slave
+ * @pts_inode: inode of the slave
+ *
+ * Returns whatever was passed as priv in devpts_pty_new for a given inode.
+ */
+void *devpts_get_priv(struct inode *pts_inode)
 {
         struct dentry *dentry;
-        struct tty_struct *tty;
+        void *priv = NULL;
 
         BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));
 
@@ -605,18 +612,22 @@ struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number)
         if (!dentry)
                 return NULL;
 
-        tty = NULL;
         if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC)
-                tty = (struct tty_struct *)pts_inode->i_private;
+                priv = pts_inode->i_private;
 
         dput(dentry);
 
-        return tty;
+        return priv;
 }
 
-void devpts_pty_kill(struct tty_struct *tty)
+/**
+ * devpts_pty_kill -- remove inode form /dev/pts/
+ * @inode: inode of the slave to be removed
+ *
+ * This is an inverse operation of devpts_pty_new.
+ */
+void devpts_pty_kill(struct inode *inode)
 {
-        struct inode *inode = tty->driver_data;
         struct super_block *sb = pts_sb_from_inode(inode);
         struct dentry *root = sb->s_root;
         struct dentry *dentry;
diff --git a/include/linux/devpts_fs.h b/include/linux/devpts_fs.h
index 5ce0e5fd712e..251a2090a554 100644
--- a/include/linux/devpts_fs.h
+++ b/include/linux/devpts_fs.h
@@ -20,28 +20,28 @@
 int devpts_new_index(struct inode *ptmx_inode);
 void devpts_kill_index(struct inode *ptmx_inode, int idx);
 /* mknod in devpts */
-int devpts_pty_new(struct inode *ptmx_inode, struct tty_struct *tty);
-/* get tty structure */
-struct tty_struct *devpts_get_tty(struct inode *pts_inode, int number);
+struct inode *devpts_pty_new(struct inode *ptmx_inode, dev_t device, int index,
+                void *priv);
+/* get private structure */
+void *devpts_get_priv(struct inode *pts_inode);
 /* unlink */
-void devpts_pty_kill(struct tty_struct *tty);
+void devpts_pty_kill(struct inode *inode);
 
 #else
 
 /* Dummy stubs in the no-pty case */
 static inline int devpts_new_index(struct inode *ptmx_inode) { return -EINVAL; }
 static inline void devpts_kill_index(struct inode *ptmx_inode, int idx) { }
-static inline int devpts_pty_new(struct inode *ptmx_inode,
-                                struct tty_struct *tty)
+static inline struct inode *devpts_pty_new(struct inode *ptmx_inode,
+                dev_t device, int index, void *priv)
 {
-        return -EINVAL;
+        return ERR_PTR(-EINVAL);
 }
-static inline struct tty_struct *devpts_get_tty(struct inode *pts_inode,
-                int number)
+static inline void *devpts_get_priv(struct inode *pts_inode)
 {
         return NULL;
 }
-static inline void devpts_pty_kill(struct tty_struct *tty) { }
+static inline void devpts_pty_kill(struct inode *inode) { }
 
 #endif
 
diff --git a/arch/arm/plat-mxc/include/mach/ipu.h b/include/linux/dma/ipu-dma.h
index 539e559d18b2..18031115c668 100644
--- a/arch/arm/plat-mxc/include/mach/ipu.h
+++ b/include/linux/dma/ipu-dma.h
@@ -9,8 +9,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef _IPU_H_
-#define _IPU_H_
+#ifndef __LINUX_DMA_IPU_DMA_H
+#define __LINUX_DMA_IPU_DMA_H
 
 #include <linux/types.h>
 #include <linux/dmaengine.h>
@@ -174,4 +174,4 @@ struct idmac_channel {
 #define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd)
 #define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan)
 
-#endif
+#endif /* __LINUX_DMA_IPU_DMA_H */
diff --git a/arch/arm/plat-omap/include/plat/menelaus.h b/include/linux/mfd/menelaus.h
index 4a970ec62dd1..f097e89134cb 100644
--- a/arch/arm/plat-omap/include/plat/menelaus.h
+++ b/include/linux/mfd/menelaus.h
@@ -1,6 +1,4 @@
 /*
- * arch/arm/plat-omap/include/mach/menelaus.h
- *
  * Functions to access Menelaus power management chip
  */
 
diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h
index 63f3c2804239..92c7fd72f636 100644
--- a/include/linux/platform_data/asoc-imx-ssi.h
+++ b/include/linux/platform_data/asoc-imx-ssi.h
@@ -17,5 +17,7 @@ struct imx_ssi_platform_data {
         void (*ac97_warm_reset)(struct snd_ac97 *ac97);
 };
 
+extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
+
 #endif /* __MACH_SSI_H */
 
diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h
index 1b9080385b46..f6d30cc1cb77 100644
--- a/include/linux/platform_data/dma-imx.h
+++ b/include/linux/platform_data/dma-imx.h
@@ -61,7 +61,9 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan)
 static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
 {
         return strstr(dev_name(chan->device->dev), "sdma") ||
-                !strcmp(dev_name(chan->device->dev), "imx-dma");
+                !strcmp(dev_name(chan->device->dev), "imx1-dma") ||
+                !strcmp(dev_name(chan->device->dev), "imx21-dma") ||
+                !strcmp(dev_name(chan->device->dev), "imx27-dma");
 }
 
 #endif
diff --git a/include/linux/platform_data/dmtimer-omap.h b/include/linux/platform_data/dmtimer-omap.h
new file mode 100644
index 000000000000..a19b78d826e9
--- /dev/null
+++ b/include/linux/platform_data/dmtimer-omap.h
@@ -0,0 +1,31 @@
+/*
+ * DMTIMER platform data for TI OMAP platforms
+ *
+ * Copyright (C) 2012 Texas Instruments
+ * Author: Jon Hunter <jon-hunter@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__
+#define __PLATFORM_DATA_DMTIMER_OMAP_H__
+
+struct dmtimer_platform_data {
+        /* set_timer_src - Only used for OMAP1 devices */
+        int (*set_timer_src)(struct platform_device *pdev, int source);
+        u32 timer_capability;
+        u32 timer_errata;
+        int (*get_context_loss_count)(struct device *);
+};
+
+#endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */
diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h
index e8741c2678d5..5d50b25a73d7 100644
--- a/include/linux/platform_data/gpio-omap.h
+++ b/include/linux/platform_data/gpio-omap.h
@@ -26,7 +26,6 @@
 
 #include <linux/io.h>
 #include <linux/platform_device.h>
-#include <mach/irqs.h>
 
 #define OMAP1_MPUIO_BASE                        0xfffb5000
 
diff --git a/arch/arm/plat-omap/include/plat/led.h b/include/linux/platform_data/leds-omap.h
index 25e451e7e2fd..56c9b2a0ada5 100644
--- a/arch/arm/plat-omap/include/plat/led.h
+++ b/include/linux/platform_data/leds-omap.h
@@ -1,6 +1,4 @@
 /*
- *  arch/arm/plat-omap/include/mach/led.h
- *
  *  Copyright (C) 2006 Samsung Electronics
  *  Kyungmin Park <kyungmin.park@samsung.com>
  *
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/include/linux/platform_data/mmc-omap.h
index 8b4e4f2da2f5..2bf6ea82ff94 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/include/linux/platform_data/mmc-omap.h
@@ -8,27 +8,6 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef __OMAP2_MMC_H
-#define __OMAP2_MMC_H
-
-#include <linux/types.h>
-#include <linux/device.h>
-#include <linux/mmc/host.h>
-
-#include <plat/omap_hwmod.h>
-
-#define OMAP15XX_NR_MMC         1
-#define OMAP16XX_NR_MMC         2
-#define OMAP1_MMC_SIZE          0x080
-#define OMAP1_MMC1_BASE         0xfffb7800
-#define OMAP1_MMC2_BASE         0xfffb7c00      /* omap16xx only */
-
-#define OMAP24XX_NR_MMC         2
-#define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
-#define OMAP2_MMC1_BASE         0x4809c000
-
-#define OMAP4_MMC_REG_OFFSET    0x100
-
 #define OMAP_MMC_MAX_SLOTS      2
 
 /*
@@ -50,6 +29,8 @@
 #define OMAP_HSMMC_SUPPORTS_DUAL_VOLT           BIT(0)
 #define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ       BIT(1)
 
+struct mmc_card;
+
 struct omap_mmc_dev_attr {
         u8 flags;
 };
@@ -126,6 +107,9 @@ struct omap_mmc_platform_data {
                 /* we can put the features above into this variable */
 #define HSMMC_HAS_PBIAS         (1 << 0)
 #define HSMMC_HAS_UPDATED_RESET (1 << 1)
+#define MMC_OMAP7XX             (1 << 2)
+#define MMC_OMAP15XX            (1 << 3)
+#define MMC_OMAP16XX            (1 << 4)
                 unsigned features;
 
                 int switch_pin;                 /* gpio (card detect) */
@@ -164,25 +148,3 @@ struct omap_mmc_platform_data {
 
         } slots[OMAP_MMC_MAX_SLOTS];
 };
-
-/* called from board-specific card detection service routine */
-extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
-                                        int is_closed);
-
-#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
-void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
-                                int nr_controllers);
-void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
-#else
-static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
-                                int nr_controllers)
-{
-}
-static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
-{
-}
-#endif
-
-extern int omap_msdi_reset(struct omap_hwmod *oh);
-
-#endif
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 1a68c1e5fe53..24d32ca34bef 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -8,9 +8,13 @@
  * published by the Free Software Foundation.
  */
 
-#include <plat/gpmc.h>
+#ifndef _MTD_NAND_OMAP2_H
+#define _MTD_NAND_OMAP2_H
+
 #include <linux/mtd/partitions.h>
 
+#define GPMC_BCH_NUM_REMAINDER  8
+
 enum nand_io {
         NAND_OMAP_PREFETCH_POLLED = 0,  /* prefetch polled mode, default */
         NAND_OMAP_POLLED,               /* polled mode, without prefetch */
@@ -18,10 +22,38 @@ enum nand_io {
         NAND_OMAP_PREFETCH_IRQ          /* prefetch enabled irq mode */
 };
 
+enum omap_ecc {
+                /* 1-bit ecc: stored at end of spare area */
+        OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
+        OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
+                /* 1-bit ecc: stored at beginning of spare area as romcode */
+        OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
+        OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
+        OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
+};
+
+struct gpmc_nand_regs {
+        void __iomem    *gpmc_status;
+        void __iomem    *gpmc_nand_command;
+        void __iomem    *gpmc_nand_address;
+        void __iomem    *gpmc_nand_data;
+        void __iomem    *gpmc_prefetch_config1;
+        void __iomem    *gpmc_prefetch_config2;
+        void __iomem    *gpmc_prefetch_control;
+        void __iomem    *gpmc_prefetch_status;
+        void __iomem    *gpmc_ecc_config;
+        void __iomem    *gpmc_ecc_control;
+        void __iomem    *gpmc_ecc_size_config;
+        void __iomem    *gpmc_ecc1_result;
+        void __iomem    *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
+        void __iomem    *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
+};
+
 struct omap_nand_platform_data {
         int                     cs;
         struct mtd_partition    *parts;
-        struct gpmc_timings     *gpmc_t;
         int                     nr_parts;
         bool                    dev_ready;
         enum nand_io            xfer_type;
@@ -30,14 +62,4 @@ struct omap_nand_platform_data {
         struct gpmc_nand_regs   reg;
 };
 
-/* minimum size for IO mapping */
-#define NAND_IO_SIZE    4
-
-#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
-extern int gpmc_nand_init(struct omap_nand_platform_data *d);
-#else
-static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
-{
-        return 0;
-}
 #endif
diff --git a/include/linux/platform_data/mtd-onenand-omap2.h b/include/linux/platform_data/mtd-onenand-omap2.h
index 2858667d2e4f..685af7e8b120 100644
--- a/include/linux/platform_data/mtd-onenand-omap2.h
+++ b/include/linux/platform_data/mtd-onenand-omap2.h
@@ -9,17 +9,15 @@
  * published by the Free Software Foundation.
  */
 
+#ifndef __MTD_ONENAND_OMAP2_H
+#define __MTD_ONENAND_OMAP2_H
+
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 
 #define ONENAND_SYNC_READ       (1 << 0)
 #define ONENAND_SYNC_READWRITE  (1 << 1)
-
-struct onenand_freq_info {
-        u16                     maf_id;
-        u16                     dev_id;
-        u16                     ver_id;
-};
+#define ONENAND_IN_OMAP34XX     (1 << 2)
 
 struct omap_onenand_platform_data {
         int                     cs;
@@ -27,27 +25,9 @@ struct omap_onenand_platform_data {
         struct mtd_partition    *parts;
         int                     nr_parts;
         int                     (*onenand_setup)(void __iomem *, int *freq_ptr);
-        int             (*get_freq)(const struct onenand_freq_info *freq_info,
-                                    bool *clk_dep);
         int                     dma_channel;
         u8                      flags;
         u8                      regulator_can_sleep;
         u8                      skip_initial_unlocking;
 };
-
-#define ONENAND_MAX_PARTITIONS 8
-
-#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
-        defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
-
-extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
-
-#else
-
-#define board_onenand_data      NULL
-
-static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
-{
-}
-
 #endif
diff --git a/include/linux/platform_data/omap-wd-timer.h b/include/linux/platform_data/omap-wd-timer.h
new file mode 100644
index 000000000000..d75f5f802d98
--- /dev/null
+++ b/include/linux/platform_data/omap-wd-timer.h
@@ -0,0 +1,38 @@
+/*
+ * OMAP2+ WDTIMER-specific function prototypes
+ *
+ * Copyright (C) 2012 Texas Instruments, Inc.
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H
+#define __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H
+
+#include <linux/types.h>
+
+/*
+ * Standardized OMAP reset source bits
+ *
+ * This is a subset of the ones listed in arch/arm/mach-omap2/prm.h
+ * and are the only ones needed in the watchdog driver.
+ */
+#define OMAP_MPU_WD_RST_SRC_ID_SHIFT                            3
+
+/**
+ * struct omap_wd_timer_platform_data - WDTIMER integration to the host SoC
+ * @read_reset_sources - fn ptr for the SoC to indicate the last reset cause
+ *
+ * The function pointed to by @read_reset_sources must return its data
+ * in a standard format - search for RST_SRC_ID_SHIFT in
+ * arch/arm/mach-omap2
+ */
+struct omap_wd_timer_platform_data {
+        u32 (*read_reset_sources)(void);
+};
+
+#endif
diff --git a/include/linux/platform_data/usb-omap.h b/include/linux/platform_data/usb-omap.h
new file mode 100644
index 000000000000..8570bcfe6311
--- /dev/null
+++ b/include/linux/platform_data/usb-omap.h
@@ -0,0 +1,80 @@
+/*
+ * usb-omap.h - Platform data for the various OMAP USB IPs
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * This software is distributed under the terms of the GNU General Public
+ * License ("GPL") version 2, as published by the Free Software Foundation.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define OMAP3_HS_USB_PORTS      3
+
+enum usbhs_omap_port_mode {
+        OMAP_USBHS_PORT_MODE_UNUSED,
+        OMAP_EHCI_PORT_MODE_PHY,
+        OMAP_EHCI_PORT_MODE_TLL,
+        OMAP_EHCI_PORT_MODE_HSIC,
+        OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0,
+        OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM,
+        OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0,
+        OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM,
+        OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0,
+        OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM,
+        OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0,
+        OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM,
+        OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0,
+        OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM
+};
+
+struct usbtll_omap_platform_data {
+        enum usbhs_omap_port_mode               port_mode[OMAP3_HS_USB_PORTS];
+};
+
+struct ehci_hcd_omap_platform_data {
+        enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
+        int                             reset_gpio_port[OMAP3_HS_USB_PORTS];
+        struct regulator                *regulator[OMAP3_HS_USB_PORTS];
+        unsigned                        phy_reset:1;
+};
+
+struct ohci_hcd_omap_platform_data {
+        enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
+        unsigned                        es2_compatibility:1;
+};
+
+struct usbhs_omap_platform_data {
+        enum usbhs_omap_port_mode               port_mode[OMAP3_HS_USB_PORTS];
+
+        struct ehci_hcd_omap_platform_data      *ehci_data;
+        struct ohci_hcd_omap_platform_data      *ohci_data;
+};
+
+/*-------------------------------------------------------------------------*/
+
+struct omap_musb_board_data {
+        u8      interface_type;
+        u8      mode;
+        u16     power;
+        unsigned extvbus:1;
+        void    (*set_phy_power)(u8 on);
+        void    (*clear_irq)(void);
+        void    (*set_mode)(u8 mode);
+        void    (*reset)(void);
+};
+
+enum musb_interface {
+        MUSB_INTERFACE_ULPI,
+        MUSB_INTERFACE_UTMI
+};
diff --git a/arch/arm/mach-tegra/include/mach/tegra-ahb.h b/include/linux/tegra-ahb.h
index e0f8c84b1d8c..f1cd075ceee1 100644
--- a/arch/arm/mach-tegra/include/mach/tegra-ahb.h
+++ b/include/linux/tegra-ahb.h
@@ -11,9 +11,9 @@
  * more details.
  */
 
-#ifndef __MACH_TEGRA_AHB_H__
-#define __MACH_TEGRA_AHB_H__
+#ifndef __LINUX_AHB_H__
+#define __LINUX_AHB_H__
 
 extern int tegra_ahb_enable_smmu(struct device_node *ahb);
 
-#endif  /* __MACH_TEGRA_AHB_H__ */
+#endif  /* __LINUX_AHB_H__ */
diff --git a/include/linux/tty.h b/include/linux/tty.h
index f0b4eb47297c..d7ff88fb8967 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -188,7 +188,9 @@ struct tty_port_operations {
 };
         
 struct tty_port {
+        struct tty_bufhead      buf;            /* Locked internally */
         struct tty_struct       *tty;           /* Back pointer */
+        struct tty_struct       *itty;          /* internal back ptr */
         const struct tty_port_operations *ops;  /* Port operations */
         spinlock_t              lock;           /* Lock protecting tty field */
         int                     blocked_open;   /* Waiting to open */
@@ -197,6 +199,9 @@ struct tty_port {
         wait_queue_head_t       close_wait;     /* Close waiters */
         wait_queue_head_t       delta_msr_wait; /* Modem status change */
         unsigned long           flags;          /* TTY flags ASY_*/
+        unsigned long           iflags;         /* TTYP_ internal flags */
+#define TTYP_FLUSHING                   1  /* Flushing to ldisc in progress */
+#define TTYP_FLUSHPENDING               2  /* Queued buffer flush pending */
         unsigned char           console:1;      /* port is a console */
         struct mutex            mutex;          /* Locking */
         struct mutex            buf_mutex;      /* Buffer alloc lock */
@@ -235,6 +240,7 @@ struct tty_struct {
         struct mutex ldisc_mutex;
         struct tty_ldisc *ldisc;
 
+        struct mutex atomic_write_lock;
         struct mutex legacy_mutex;
         struct mutex termios_mutex;
         spinlock_t ctrl_lock;
@@ -254,7 +260,6 @@ struct tty_struct {
 
         struct tty_struct *link;
         struct fasync_struct *fasync;
-        struct tty_bufhead buf;         /* Locked internally */
         int alt_speed;          /* For magic substitution of 38400 bps */
         wait_queue_head_t write_wait;
         wait_queue_head_t read_wait;
@@ -265,37 +270,10 @@ struct tty_struct {
 
 #define N_TTY_BUF_SIZE 4096
 
-        /*
-         * The following is data for the N_TTY line discipline.  For
-         * historical reasons, this is included in the tty structure.
-         * Mostly locked by the BKL.
-         */
-        unsigned int column;
-        unsigned char lnext:1, erasing:1, raw:1, real_raw:1, icanon:1;
         unsigned char closing:1;
-        unsigned char echo_overrun:1;
         unsigned short minimum_to_wake;
-        unsigned long overrun_time;
-        int num_overrun;
-        unsigned long process_char_map[256/(8*sizeof(unsigned long))];
-        char *read_buf;
-        int read_head;
-        int read_tail;
-        int read_cnt;
-        unsigned long read_flags[N_TTY_BUF_SIZE/(8*sizeof(unsigned long))];
-        unsigned char *echo_buf;
-        unsigned int echo_pos;
-        unsigned int echo_cnt;
-        int canon_data;
-        unsigned long canon_head;
-        unsigned int canon_column;
-        struct mutex atomic_read_lock;
-        struct mutex atomic_write_lock;
-        struct mutex output_lock;
-        struct mutex echo_lock;
         unsigned char *write_buf;
         int write_cnt;
-        spinlock_t read_lock;
         /* If the tty has a pending do_SAK, queue it here - akpm */
         struct work_struct SAK_work;
         struct tty_port *port;
@@ -335,8 +313,6 @@ struct tty_file_private {
 #define TTY_PTY_LOCK            16      /* pty private */
 #define TTY_NO_WRITE_SPLIT      17      /* Preserve write boundaries to driver */
 #define TTY_HUPPED              18      /* Post driver->hangup() */
-#define TTY_FLUSHING            19      /* Flushing to ldisc in progress */
-#define TTY_FLUSHPENDING        20      /* Queued buffer flush pending */
 #define TTY_HUPPING             21      /* ->hangup() in progress */
 
 #define TTY_WRITE_FLUSH(tty) tty_write_flush((tty))
@@ -412,9 +388,9 @@ extern void disassociate_ctty(int priv);
 extern void no_tty(void);
 extern void tty_flip_buffer_push(struct tty_struct *tty);
 extern void tty_flush_to_ldisc(struct tty_struct *tty);
-extern void tty_buffer_free_all(struct tty_struct *tty);
+extern void tty_buffer_free_all(struct tty_port *port);
 extern void tty_buffer_flush(struct tty_struct *tty);
-extern void tty_buffer_init(struct tty_struct *tty);
+extern void tty_buffer_init(struct tty_port *port);
 extern speed_t tty_get_baud_rate(struct tty_struct *tty);
 extern speed_t tty_termios_baud_rate(struct ktermios *termios);
 extern speed_t tty_termios_input_baud_rate(struct ktermios *termios);
@@ -535,7 +511,7 @@ extern void n_tty_inherit_ops(struct tty_ldisc_ops *ops);
 /* tty_audit.c */
 #ifdef CONFIG_AUDIT
 extern void tty_audit_add_data(struct tty_struct *tty, unsigned char *data,
-                               size_t size);
+                               size_t size, unsigned icanon);
 extern void tty_audit_exit(void);
 extern void tty_audit_fork(struct signal_struct *sig);
 extern void tty_audit_tiocsti(struct tty_struct *tty, char ch);
@@ -544,7 +520,7 @@ extern int tty_audit_push_task(struct task_struct *tsk,
                                kuid_t loginuid, u32 sessionid);
 #else
 static inline void tty_audit_add_data(struct tty_struct *tty,
-                                      unsigned char *data, size_t size)
+                unsigned char *data, size_t size, unsigned icanon)
 {
 }
 static inline void tty_audit_tiocsti(struct tty_struct *tty, char ch)
diff --git a/include/linux/tty_flip.h b/include/linux/tty_flip.h
index 9239d033a0a3..2002344ed36a 100644
--- a/include/linux/tty_flip.h
+++ b/include/linux/tty_flip.h
@@ -11,7 +11,7 @@ void tty_schedule_flip(struct tty_struct *tty);
 static inline int tty_insert_flip_char(struct tty_struct *tty,
                                         unsigned char ch, char flag)
 {
-        struct tty_buffer *tb = tty->buf.tail;
+        struct tty_buffer *tb = tty->port->buf.tail;
         if (tb && tb->used < tb->size) {
                 tb->flag_buf_ptr[tb->used] = flag;
                 tb->char_buf_ptr[tb->used++] = ch;
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 3729173b7fbc..88c829466fc1 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -314,6 +314,19 @@ int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
 int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
 void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
 
+enum omapdss_version {
+        OMAPDSS_VER_UNKNOWN = 0,
+        OMAPDSS_VER_OMAP24xx,
+        OMAPDSS_VER_OMAP34xx_ES1,       /* OMAP3430 ES1.0, 2.0 */
+        OMAPDSS_VER_OMAP34xx_ES3,       /* OMAP3430 ES3.0+ */
+        OMAPDSS_VER_OMAP3630,
+        OMAPDSS_VER_AM35xx,
+        OMAPDSS_VER_OMAP4430_ES1,       /* OMAP4430 ES1.0 */
+        OMAPDSS_VER_OMAP4430_ES2,       /* OMAP4430 ES2.0, 2.1, 2.2 */
+        OMAPDSS_VER_OMAP4,              /* All other OMAP4s */
+        OMAPDSS_VER_OMAP5,
+};
+
 /* Board specific data */
 struct omap_dss_board_info {
         int (*get_context_loss_count)(struct device *dev);
@@ -323,6 +336,7 @@ struct omap_dss_board_info {
         int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
         void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
         int (*set_min_bus_tput)(struct device *dev, unsigned long r);
+        enum omapdss_version version;
 };
 
 /* Init with the board info */
diff --git a/arch/arm/plat-omap/include/plat/vrfb.h b/include/video/omapvrfb.h
index 3792bdea2f6d..bb0bd89f8bc6 100644
--- a/arch/arm/plat-omap/include/plat/vrfb.h
+++ b/include/video/omapvrfb.h
@@ -36,6 +36,7 @@ struct vrfb {
 };
 
 #ifdef CONFIG_OMAP2_VRFB
+extern bool omap_vrfb_supported(void);
 extern int omap_vrfb_request_ctx(struct vrfb *vrfb);
 extern void omap_vrfb_release_ctx(struct vrfb *vrfb);
 extern void omap_vrfb_adjust_size(u16 *width, u16 *height,
@@ -49,6 +50,7 @@ extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot);
 extern void omap_vrfb_restore_context(void);
 
 #else
+static inline bool omap_vrfb_supported(void) { return false; }
 static inline int omap_vrfb_request_ctx(struct vrfb *vrfb) { return 0; }
 static inline void omap_vrfb_release_ctx(struct vrfb *vrfb) {}
 static inline void omap_vrfb_adjust_size(u16 *width, u16 *height,
diff --git a/kernel/printk.c b/kernel/printk.c
index 2d607f4d1797..22e070f3470a 100644
--- a/kernel/printk.c
+++ b/kernel/printk.c
@@ -87,6 +87,12 @@ static DEFINE_SEMAPHORE(console_sem);
 struct console *console_drivers;
 EXPORT_SYMBOL_GPL(console_drivers);
 
+#ifdef CONFIG_LOCKDEP
+static struct lockdep_map console_lock_dep_map = {
+        .name = "console_lock"
+};
+#endif
+
 /*
  * This is used for debugging the mess that is the VT code by
  * keeping track if we have the console semaphore held. It's
@@ -1908,12 +1914,14 @@ static int __cpuinit console_cpu_notify(struct notifier_block *self,
  */
 void console_lock(void)
 {
-        BUG_ON(in_interrupt());
+        might_sleep();
+
         down(&console_sem);
         if (console_suspended)
                 return;
         console_locked = 1;
         console_may_schedule = 1;
+        mutex_acquire(&console_lock_dep_map, 0, 0, _RET_IP_);
 }
 EXPORT_SYMBOL(console_lock);
 
@@ -1935,6 +1943,7 @@ int console_trylock(void)
         }
         console_locked = 1;
         console_may_schedule = 0;
+        mutex_acquire(&console_lock_dep_map, 0, 1, _RET_IP_);
         return 1;
 }
 EXPORT_SYMBOL(console_trylock);
@@ -2095,6 +2104,7 @@ skip:
                 local_irq_restore(flags);
         }
         console_locked = 0;
+        mutex_release(&console_lock_dep_map, 1, _RET_IP_);
 
         /* Release the exclusive_console once it is used */
         if (unlikely(exclusive_console))
diff --git a/sound/soc/fsl/imx-pcm-fiq.c b/sound/soc/fsl/imx-pcm-fiq.c
index 22c6130957ba..9ffc9e66308f 100644
--- a/sound/soc/fsl/imx-pcm-fiq.c
+++ b/sound/soc/fsl/imx-pcm-fiq.c
@@ -29,7 +29,6 @@
 
 #include <asm/fiq.h>
 
-#include <mach/irqs.h>
 #include <linux/platform_data/asoc-imx-ssi.h>
 
 #include "imx-ssi.h"
diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c
index 006f7d465ed2..dd566444e3c3 100644
--- a/sound/soc/fsl/imx-ssi.c
+++ b/sound/soc/fsl/imx-ssi.c
@@ -48,7 +48,6 @@
 #include <sound/soc.h>
 
 #include <linux/platform_data/asoc-imx-ssi.h>
-#include <mach/hardware.h>
 
 #include "imx-ssi.h"
 
diff --git a/sound/soc/omap/am3517evm.c b/sound/soc/omap/am3517evm.c
index fad350682ca2..c1900b2a6f28 100644
--- a/sound/soc/omap/am3517evm.c
+++ b/sound/soc/omap/am3517evm.c
@@ -25,8 +25,6 @@
 #include <sound/soc.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 
 #include "omap-mcbsp.h"
diff --git a/sound/soc/omap/n810.c b/sound/soc/omap/n810.c
index 521bfc3d2b2b..230b8c144848 100644
--- a/sound/soc/omap/n810.c
+++ b/sound/soc/omap/n810.c
@@ -29,7 +29,6 @@
 #include <sound/soc.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
 #include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 340874ebf9ae..52977aa30355 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -32,9 +32,14 @@
 #include <sound/dmaengine_pcm.h>
 #include <sound/soc.h>
 
-#include <plat/cpu.h>
 #include "omap-pcm.h"
 
+#ifdef CONFIG_ARCH_OMAP1
+#define pcm_omap1510()  cpu_is_omap1510()
+#else
+#define pcm_omap1510()  0
+#endif
+
 static const struct snd_pcm_hardware omap_pcm_hardware = {
         .info                   = SNDRV_PCM_INFO_MMAP |
                                   SNDRV_PCM_INFO_MMAP_VALID |
@@ -159,7 +164,7 @@ static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
 {
         snd_pcm_uframes_t offset;
 
-        if (cpu_is_omap1510())
+        if (pcm_omap1510())
                 offset = snd_dmaengine_pcm_pointer_no_residue(substream);
         else
                 offset = snd_dmaengine_pcm_pointer(substream);
diff --git a/sound/soc/omap/osk5912.c b/sound/soc/omap/osk5912.c
index 3960e8df9c76..06ef8d67ed1c 100644
--- a/sound/soc/omap/osk5912.c
+++ b/sound/soc/omap/osk5912.c
@@ -28,7 +28,6 @@
 #include <sound/soc.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
 #include <linux/gpio.h>
 #include <linux/module.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
diff --git a/sound/soc/omap/sdp3430.c b/sound/soc/omap/sdp3430.c
index 597cae769cea..b462a2c9385f 100644
--- a/sound/soc/omap/sdp3430.c
+++ b/sound/soc/omap/sdp3430.c
@@ -31,8 +31,6 @@
 #include <sound/jack.h>
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index bf5610122c76..64b67a309196 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -26,7 +26,6 @@
 #include <linux/regmap.h>
 #include <linux/slab.h>
 #include <mach/clk.h>
-#include <mach/dma.h>
 #include <sound/soc.h>
 #include "tegra30_ahub.h"
 
diff --git a/sound/soc/tegra/tegra_pcm.h b/sound/soc/tegra/tegra_pcm.h
index b40279b9f413..bc8b46af928e 100644
--- a/sound/soc/tegra/tegra_pcm.h
+++ b/sound/soc/tegra/tegra_pcm.h
@@ -31,8 +31,6 @@
 #ifndef __TEGRA_PCM_H__
 #define __TEGRA_PCM_H__
 
-#include <mach/dma.h>
-
 struct tegra_pcm_dma_params {
         unsigned long addr;
         unsigned long wrap;