diff options
author | Michael Buesch <mb@bu3sch.de> | 2009-02-03 13:36:45 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-02-09 15:03:49 -0500 |
commit | 686aa5f2137d04f389e527f0391d65232338e599 (patch) | |
tree | 862b75e93dd4cd2bede173c2ad6308934e8e6307 | |
parent | c9703146158c0415a60799570397e488bc982af5 (diff) |
b43: Port spec bugfixes for the LP baseband init
A few bugs were fixed in the LP baseband init specs.
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/b43/phy_lp.c | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c index 99cc9739aced..fdd31d3672d2 100644 --- a/drivers/net/wireless/b43/phy_lp.c +++ b/drivers/net/wireless/b43/phy_lp.c | |||
@@ -70,6 +70,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev) | |||
70 | 70 | ||
71 | static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) | 71 | static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) |
72 | { | 72 | { |
73 | struct ssb_bus *bus = dev->dev->bus; | ||
73 | struct b43_phy_lp *lpphy = dev->phy.lp; | 74 | struct b43_phy_lp *lpphy = dev->phy.lp; |
74 | 75 | ||
75 | b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50); | 76 | b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50); |
@@ -89,7 +90,7 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) | |||
89 | b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000); | 90 | b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000); |
90 | b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000); | 91 | b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000); |
91 | b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1); | 92 | b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1); |
92 | b43_phy_maskset(dev, B43_LPPHY_CCKLMSSTEPSIZE, 0xFF01, 0x10); | 93 | b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x10); |
93 | b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4); | 94 | b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4); |
94 | b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100); | 95 | b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100); |
95 | b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48); | 96 | b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48); |
@@ -101,8 +102,13 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) | |||
101 | b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xF81F, 0xA0); | 102 | b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xF81F, 0xA0); |
102 | b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300); | 103 | b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300); |
103 | b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00); | 104 | b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00); |
104 | b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00); | 105 | if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) { |
105 | b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD); | 106 | b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100); |
107 | b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xA); | ||
108 | } else { | ||
109 | b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00); | ||
110 | b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD); | ||
111 | } | ||
106 | b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F); | 112 | b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F); |
107 | b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC); | 113 | b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC); |
108 | b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19); | 114 | b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19); |
@@ -114,17 +120,8 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) | |||
114 | b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12); | 120 | b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12); |
115 | b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000); | 121 | b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000); |
116 | 122 | ||
117 | if (dev->phy.rev < 2) { | 123 | b43_lptab_write(dev, B43_LPTAB16(0x08, 0x14), 0); |
118 | //FIXME this will never execute. | 124 | b43_lptab_write(dev, B43_LPTAB16(0x08, 0x12), 0x40); |
119 | |||
120 | //FIXME 32bit? | ||
121 | b43_lptab_write(dev, B43_LPTAB32(0x11, 0x14), 0); | ||
122 | b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40); | ||
123 | } else { | ||
124 | //FIXME 32bit? | ||
125 | b43_lptab_write(dev, B43_LPTAB32(0x08, 0x14), 0); | ||
126 | b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40); | ||
127 | } | ||
128 | 125 | ||
129 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { | 126 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { |
130 | b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40); | 127 | b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40); |