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authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-09-24 07:24:05 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-01 01:45:15 -0400
commit6801c18c0a43386bb44712cbc028a7e05adb9f0d (patch)
tree4f34799e3b704f8ac4132f18c874bbe32bc3cb52
parentf2335330ec5cd9c4b189b365560c044fe8556ccf (diff)
drm/i915: Add HSW CRT output readout support
Call intel_ddi_get_config() to get the pipe_bpp settings from DDI. The sync polarity settings from DDI are irrelevant for CRT output, so override them with data from the ADPA register. v2: Extract intel_crt_get_flags() Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69691 Tested-by: Qingshuai Tian <qingshuai.tian@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c34
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c4
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
3 files changed, 32 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index f9a5f3d1f0cd..019c4cea7bb0 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -83,13 +83,11 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
83 return true; 83 return true;
84} 84}
85 85
86static void intel_crt_get_config(struct intel_encoder *encoder, 86static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
87 struct intel_crtc_config *pipe_config)
88{ 87{
89 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 88 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
90 struct intel_crt *crt = intel_encoder_to_crt(encoder); 89 struct intel_crt *crt = intel_encoder_to_crt(encoder);
91 u32 tmp, flags = 0; 90 u32 tmp, flags = 0;
92 int dotclock;
93 91
94 tmp = I915_READ(crt->adpa_reg); 92 tmp = I915_READ(crt->adpa_reg);
95 93
@@ -103,16 +101,37 @@ static void intel_crt_get_config(struct intel_encoder *encoder,
103 else 101 else
104 flags |= DRM_MODE_FLAG_NVSYNC; 102 flags |= DRM_MODE_FLAG_NVSYNC;
105 103
106 pipe_config->adjusted_mode.flags |= flags; 104 return flags;
105}
106
107static void intel_crt_get_config(struct intel_encoder *encoder,
108 struct intel_crtc_config *pipe_config)
109{
110 struct drm_device *dev = encoder->base.dev;
111 int dotclock;
112
113 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
107 114
108 dotclock = pipe_config->port_clock; 115 dotclock = pipe_config->port_clock;
109 116
110 if (HAS_PCH_SPLIT(dev_priv->dev)) 117 if (HAS_PCH_SPLIT(dev))
111 ironlake_check_encoder_dotclock(pipe_config, dotclock); 118 ironlake_check_encoder_dotclock(pipe_config, dotclock);
112 119
113 pipe_config->adjusted_mode.clock = dotclock; 120 pipe_config->adjusted_mode.clock = dotclock;
114} 121}
115 122
123static void hsw_crt_get_config(struct intel_encoder *encoder,
124 struct intel_crtc_config *pipe_config)
125{
126 intel_ddi_get_config(encoder, pipe_config);
127
128 pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
129 DRM_MODE_FLAG_NHSYNC |
130 DRM_MODE_FLAG_PVSYNC |
131 DRM_MODE_FLAG_NVSYNC);
132 pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
133}
134
116/* Note: The caller is required to filter out dpms modes not supported by the 135/* Note: The caller is required to filter out dpms modes not supported by the
117 * platform. */ 136 * platform. */
118static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) 137static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
@@ -804,7 +823,10 @@ void intel_crt_init(struct drm_device *dev)
804 crt->base.mode_set = intel_crt_mode_set; 823 crt->base.mode_set = intel_crt_mode_set;
805 crt->base.disable = intel_disable_crt; 824 crt->base.disable = intel_disable_crt;
806 crt->base.enable = intel_enable_crt; 825 crt->base.enable = intel_enable_crt;
807 crt->base.get_config = intel_crt_get_config; 826 if (IS_HASWELL(dev))
827 crt->base.get_config = hsw_crt_get_config;
828 else
829 crt->base.get_config = intel_crt_get_config;
808 if (I915_HAS_HOTPLUG(dev)) 830 if (I915_HAS_HOTPLUG(dev))
809 crt->base.hpd_pin = HPD_CRT; 831 crt->base.hpd_pin = HPD_CRT;
810 if (HAS_DDI(dev)) 832 if (HAS_DDI(dev))
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 7e9fa53a1477..a43ac3a17bdc 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1269,8 +1269,8 @@ static void intel_ddi_hot_plug(struct intel_encoder *intel_encoder)
1269 intel_dp_check_link_status(intel_dp); 1269 intel_dp_check_link_status(intel_dp);
1270} 1270}
1271 1271
1272static void intel_ddi_get_config(struct intel_encoder *encoder, 1272void intel_ddi_get_config(struct intel_encoder *encoder,
1273 struct intel_crtc_config *pipe_config) 1273 struct intel_crtc_config *pipe_config)
1274{ 1274{
1275 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; 1275 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1276 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); 1276 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index fb38ef10ac5d..e7fe5f1f72df 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -828,5 +828,7 @@ extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe
828 828
829extern bool intel_crtc_active(struct drm_crtc *crtc); 829extern bool intel_crtc_active(struct drm_crtc *crtc);
830extern void i915_disable_vga_mem(struct drm_device *dev); 830extern void i915_disable_vga_mem(struct drm_device *dev);
831extern void intel_ddi_get_config(struct intel_encoder *encoder,
832 struct intel_crtc_config *pipe_config);
831 833
832#endif /* __INTEL_DRV_H__ */ 834#endif /* __INTEL_DRV_H__ */