diff options
author | David Vrabel <david.vrabel@citrix.com> | 2014-04-28 05:31:04 -0400 |
---|---|---|
committer | David Vrabel <david.vrabel@citrix.com> | 2014-04-28 05:31:04 -0400 |
commit | 67dadcb324c2fe059cb2c35f8b80df42bb23f7c4 (patch) | |
tree | 3521a2a9e05a7de426ab50bc7685489ad6340e54 | |
parent | eb47f71200b7d5b4c8c1f8c75675f592d855aafd (diff) | |
parent | e26a9e00afc482b971afcaef1db8c9034d4d6d7c (diff) |
Merge commit 'e26a9e0' into stable/for-linus-3.15
69 files changed, 502 insertions, 387 deletions
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 4bdc41622c36..70b1eff477b3 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile | |||
@@ -13,6 +13,7 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o | |||
13 | obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o | 13 | obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o |
14 | obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o | 14 | obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o |
15 | obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o | 15 | obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o |
16 | CFLAGS_REMOVE_mcpm_entry.o = -pg | ||
16 | AFLAGS_mcpm_head.o := -march=armv7-a | 17 | AFLAGS_mcpm_head.o := -march=armv7-a |
17 | AFLAGS_vlock.o := -march=armv7-a | 18 | AFLAGS_vlock.o := -march=armv7-a |
18 | obj-$(CONFIG_TI_PRIV_EDMA) += edma.o | 19 | obj-$(CONFIG_TI_PRIV_EDMA) += edma.o |
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 5c2285160575..380ac4f20000 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -30,8 +30,8 @@ | |||
30 | * Endian independent macros for shifting bytes within registers. | 30 | * Endian independent macros for shifting bytes within registers. |
31 | */ | 31 | */ |
32 | #ifndef __ARMEB__ | 32 | #ifndef __ARMEB__ |
33 | #define pull lsr | 33 | #define lspull lsr |
34 | #define push lsl | 34 | #define lspush lsl |
35 | #define get_byte_0 lsl #0 | 35 | #define get_byte_0 lsl #0 |
36 | #define get_byte_1 lsr #8 | 36 | #define get_byte_1 lsr #8 |
37 | #define get_byte_2 lsr #16 | 37 | #define get_byte_2 lsr #16 |
@@ -41,8 +41,8 @@ | |||
41 | #define put_byte_2 lsl #16 | 41 | #define put_byte_2 lsl #16 |
42 | #define put_byte_3 lsl #24 | 42 | #define put_byte_3 lsl #24 |
43 | #else | 43 | #else |
44 | #define pull lsl | 44 | #define lspull lsl |
45 | #define push lsr | 45 | #define lspush lsr |
46 | #define get_byte_0 lsr #24 | 46 | #define get_byte_0 lsr #24 |
47 | #define get_byte_1 lsr #16 | 47 | #define get_byte_1 lsr #16 |
48 | #define get_byte_2 lsr #8 | 48 | #define get_byte_2 lsr #8 |
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h index 62d2cb53b069..9a92fd7864a8 100644 --- a/arch/arm/include/asm/atomic.h +++ b/arch/arm/include/asm/atomic.h | |||
@@ -60,6 +60,7 @@ static inline int atomic_add_return(int i, atomic_t *v) | |||
60 | int result; | 60 | int result; |
61 | 61 | ||
62 | smp_mb(); | 62 | smp_mb(); |
63 | prefetchw(&v->counter); | ||
63 | 64 | ||
64 | __asm__ __volatile__("@ atomic_add_return\n" | 65 | __asm__ __volatile__("@ atomic_add_return\n" |
65 | "1: ldrex %0, [%3]\n" | 66 | "1: ldrex %0, [%3]\n" |
@@ -99,6 +100,7 @@ static inline int atomic_sub_return(int i, atomic_t *v) | |||
99 | int result; | 100 | int result; |
100 | 101 | ||
101 | smp_mb(); | 102 | smp_mb(); |
103 | prefetchw(&v->counter); | ||
102 | 104 | ||
103 | __asm__ __volatile__("@ atomic_sub_return\n" | 105 | __asm__ __volatile__("@ atomic_sub_return\n" |
104 | "1: ldrex %0, [%3]\n" | 106 | "1: ldrex %0, [%3]\n" |
@@ -121,6 +123,7 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) | |||
121 | unsigned long res; | 123 | unsigned long res; |
122 | 124 | ||
123 | smp_mb(); | 125 | smp_mb(); |
126 | prefetchw(&ptr->counter); | ||
124 | 127 | ||
125 | do { | 128 | do { |
126 | __asm__ __volatile__("@ atomic_cmpxchg\n" | 129 | __asm__ __volatile__("@ atomic_cmpxchg\n" |
@@ -138,6 +141,33 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) | |||
138 | return oldval; | 141 | return oldval; |
139 | } | 142 | } |
140 | 143 | ||
144 | static inline int __atomic_add_unless(atomic_t *v, int a, int u) | ||
145 | { | ||
146 | int oldval, newval; | ||
147 | unsigned long tmp; | ||
148 | |||
149 | smp_mb(); | ||
150 | prefetchw(&v->counter); | ||
151 | |||
152 | __asm__ __volatile__ ("@ atomic_add_unless\n" | ||
153 | "1: ldrex %0, [%4]\n" | ||
154 | " teq %0, %5\n" | ||
155 | " beq 2f\n" | ||
156 | " add %1, %0, %6\n" | ||
157 | " strex %2, %1, [%4]\n" | ||
158 | " teq %2, #0\n" | ||
159 | " bne 1b\n" | ||
160 | "2:" | ||
161 | : "=&r" (oldval), "=&r" (newval), "=&r" (tmp), "+Qo" (v->counter) | ||
162 | : "r" (&v->counter), "r" (u), "r" (a) | ||
163 | : "cc"); | ||
164 | |||
165 | if (oldval != u) | ||
166 | smp_mb(); | ||
167 | |||
168 | return oldval; | ||
169 | } | ||
170 | |||
141 | #else /* ARM_ARCH_6 */ | 171 | #else /* ARM_ARCH_6 */ |
142 | 172 | ||
143 | #ifdef CONFIG_SMP | 173 | #ifdef CONFIG_SMP |
@@ -186,10 +216,6 @@ static inline int atomic_cmpxchg(atomic_t *v, int old, int new) | |||
186 | return ret; | 216 | return ret; |
187 | } | 217 | } |
188 | 218 | ||
189 | #endif /* __LINUX_ARM_ARCH__ */ | ||
190 | |||
191 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
192 | |||
193 | static inline int __atomic_add_unless(atomic_t *v, int a, int u) | 219 | static inline int __atomic_add_unless(atomic_t *v, int a, int u) |
194 | { | 220 | { |
195 | int c, old; | 221 | int c, old; |
@@ -200,6 +226,10 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u) | |||
200 | return c; | 226 | return c; |
201 | } | 227 | } |
202 | 228 | ||
229 | #endif /* __LINUX_ARM_ARCH__ */ | ||
230 | |||
231 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
232 | |||
203 | #define atomic_inc(v) atomic_add(1, v) | 233 | #define atomic_inc(v) atomic_add(1, v) |
204 | #define atomic_dec(v) atomic_sub(1, v) | 234 | #define atomic_dec(v) atomic_sub(1, v) |
205 | 235 | ||
@@ -299,6 +329,7 @@ static inline long long atomic64_add_return(long long i, atomic64_t *v) | |||
299 | unsigned long tmp; | 329 | unsigned long tmp; |
300 | 330 | ||
301 | smp_mb(); | 331 | smp_mb(); |
332 | prefetchw(&v->counter); | ||
302 | 333 | ||
303 | __asm__ __volatile__("@ atomic64_add_return\n" | 334 | __asm__ __volatile__("@ atomic64_add_return\n" |
304 | "1: ldrexd %0, %H0, [%3]\n" | 335 | "1: ldrexd %0, %H0, [%3]\n" |
@@ -340,6 +371,7 @@ static inline long long atomic64_sub_return(long long i, atomic64_t *v) | |||
340 | unsigned long tmp; | 371 | unsigned long tmp; |
341 | 372 | ||
342 | smp_mb(); | 373 | smp_mb(); |
374 | prefetchw(&v->counter); | ||
343 | 375 | ||
344 | __asm__ __volatile__("@ atomic64_sub_return\n" | 376 | __asm__ __volatile__("@ atomic64_sub_return\n" |
345 | "1: ldrexd %0, %H0, [%3]\n" | 377 | "1: ldrexd %0, %H0, [%3]\n" |
@@ -364,6 +396,7 @@ static inline long long atomic64_cmpxchg(atomic64_t *ptr, long long old, | |||
364 | unsigned long res; | 396 | unsigned long res; |
365 | 397 | ||
366 | smp_mb(); | 398 | smp_mb(); |
399 | prefetchw(&ptr->counter); | ||
367 | 400 | ||
368 | do { | 401 | do { |
369 | __asm__ __volatile__("@ atomic64_cmpxchg\n" | 402 | __asm__ __volatile__("@ atomic64_cmpxchg\n" |
@@ -388,6 +421,7 @@ static inline long long atomic64_xchg(atomic64_t *ptr, long long new) | |||
388 | unsigned long tmp; | 421 | unsigned long tmp; |
389 | 422 | ||
390 | smp_mb(); | 423 | smp_mb(); |
424 | prefetchw(&ptr->counter); | ||
391 | 425 | ||
392 | __asm__ __volatile__("@ atomic64_xchg\n" | 426 | __asm__ __volatile__("@ atomic64_xchg\n" |
393 | "1: ldrexd %0, %H0, [%3]\n" | 427 | "1: ldrexd %0, %H0, [%3]\n" |
@@ -409,6 +443,7 @@ static inline long long atomic64_dec_if_positive(atomic64_t *v) | |||
409 | unsigned long tmp; | 443 | unsigned long tmp; |
410 | 444 | ||
411 | smp_mb(); | 445 | smp_mb(); |
446 | prefetchw(&v->counter); | ||
412 | 447 | ||
413 | __asm__ __volatile__("@ atomic64_dec_if_positive\n" | 448 | __asm__ __volatile__("@ atomic64_dec_if_positive\n" |
414 | "1: ldrexd %0, %H0, [%3]\n" | 449 | "1: ldrexd %0, %H0, [%3]\n" |
@@ -436,6 +471,7 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) | |||
436 | int ret = 1; | 471 | int ret = 1; |
437 | 472 | ||
438 | smp_mb(); | 473 | smp_mb(); |
474 | prefetchw(&v->counter); | ||
439 | 475 | ||
440 | __asm__ __volatile__("@ atomic64_add_unless\n" | 476 | __asm__ __volatile__("@ atomic64_add_unless\n" |
441 | "1: ldrexd %0, %H0, [%4]\n" | 477 | "1: ldrexd %0, %H0, [%4]\n" |
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h index df2fbba7efc8..abb2c3769b01 100644 --- a/arch/arm/include/asm/cmpxchg.h +++ b/arch/arm/include/asm/cmpxchg.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define __ASM_ARM_CMPXCHG_H | 2 | #define __ASM_ARM_CMPXCHG_H |
3 | 3 | ||
4 | #include <linux/irqflags.h> | 4 | #include <linux/irqflags.h> |
5 | #include <linux/prefetch.h> | ||
5 | #include <asm/barrier.h> | 6 | #include <asm/barrier.h> |
6 | 7 | ||
7 | #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) | 8 | #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) |
@@ -35,6 +36,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size | |||
35 | #endif | 36 | #endif |
36 | 37 | ||
37 | smp_mb(); | 38 | smp_mb(); |
39 | prefetchw((const void *)ptr); | ||
38 | 40 | ||
39 | switch (size) { | 41 | switch (size) { |
40 | #if __LINUX_ARM_ARCH__ >= 6 | 42 | #if __LINUX_ARM_ARCH__ >= 6 |
@@ -138,6 +140,8 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, | |||
138 | { | 140 | { |
139 | unsigned long oldval, res; | 141 | unsigned long oldval, res; |
140 | 142 | ||
143 | prefetchw((const void *)ptr); | ||
144 | |||
141 | switch (size) { | 145 | switch (size) { |
142 | #ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */ | 146 | #ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */ |
143 | case 1: | 147 | case 1: |
@@ -230,6 +234,8 @@ static inline unsigned long long __cmpxchg64(unsigned long long *ptr, | |||
230 | unsigned long long oldval; | 234 | unsigned long long oldval; |
231 | unsigned long res; | 235 | unsigned long res; |
232 | 236 | ||
237 | prefetchw(ptr); | ||
238 | |||
233 | __asm__ __volatile__( | 239 | __asm__ __volatile__( |
234 | "1: ldrexd %1, %H1, [%3]\n" | 240 | "1: ldrexd %1, %H1, [%3]\n" |
235 | " teq %1, %4\n" | 241 | " teq %1, %4\n" |
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index acdde76b39bb..42f0889f0584 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h | |||
@@ -71,6 +71,7 @@ | |||
71 | #define ARM_CPU_PART_CORTEX_A5 0xC050 | 71 | #define ARM_CPU_PART_CORTEX_A5 0xC050 |
72 | #define ARM_CPU_PART_CORTEX_A15 0xC0F0 | 72 | #define ARM_CPU_PART_CORTEX_A15 0xC0F0 |
73 | #define ARM_CPU_PART_CORTEX_A7 0xC070 | 73 | #define ARM_CPU_PART_CORTEX_A7 0xC070 |
74 | #define ARM_CPU_PART_CORTEX_A12 0xC0D0 | ||
74 | 75 | ||
75 | #define ARM_CPU_XSCALE_ARCH_MASK 0xe000 | 76 | #define ARM_CPU_XSCALE_ARCH_MASK 0xe000 |
76 | #define ARM_CPU_XSCALE_ARCH_V1 0x2000 | 77 | #define ARM_CPU_XSCALE_ARCH_V1 0x2000 |
diff --git a/arch/arm/include/asm/floppy.h b/arch/arm/include/asm/floppy.h index c9f03eccc9d8..f4882553fbb0 100644 --- a/arch/arm/include/asm/floppy.h +++ b/arch/arm/include/asm/floppy.h | |||
@@ -25,7 +25,7 @@ | |||
25 | 25 | ||
26 | #define fd_inb(port) inb((port)) | 26 | #define fd_inb(port) inb((port)) |
27 | #define fd_request_irq() request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\ | 27 | #define fd_request_irq() request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\ |
28 | IRQF_DISABLED,"floppy",NULL) | 28 | 0,"floppy",NULL) |
29 | #define fd_free_irq() free_irq(IRQ_FLOPPYDISK,NULL) | 29 | #define fd_free_irq() free_irq(IRQ_FLOPPYDISK,NULL) |
30 | #define fd_disable_irq() disable_irq(IRQ_FLOPPYDISK) | 30 | #define fd_disable_irq() disable_irq(IRQ_FLOPPYDISK) |
31 | #define fd_enable_irq() enable_irq(IRQ_FLOPPYDISK) | 31 | #define fd_enable_irq() enable_irq(IRQ_FLOPPYDISK) |
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h index e42cf597f6e6..53e69dae796f 100644 --- a/arch/arm/include/asm/futex.h +++ b/arch/arm/include/asm/futex.h | |||
@@ -3,11 +3,6 @@ | |||
3 | 3 | ||
4 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
5 | 5 | ||
6 | #if defined(CONFIG_CPU_USE_DOMAINS) && defined(CONFIG_SMP) | ||
7 | /* ARM doesn't provide unprivileged exclusive memory accessors */ | ||
8 | #include <asm-generic/futex.h> | ||
9 | #else | ||
10 | |||
11 | #include <linux/futex.h> | 6 | #include <linux/futex.h> |
12 | #include <linux/uaccess.h> | 7 | #include <linux/uaccess.h> |
13 | #include <asm/errno.h> | 8 | #include <asm/errno.h> |
@@ -28,6 +23,7 @@ | |||
28 | 23 | ||
29 | #define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \ | 24 | #define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \ |
30 | smp_mb(); \ | 25 | smp_mb(); \ |
26 | prefetchw(uaddr); \ | ||
31 | __asm__ __volatile__( \ | 27 | __asm__ __volatile__( \ |
32 | "1: ldrex %1, [%3]\n" \ | 28 | "1: ldrex %1, [%3]\n" \ |
33 | " " insn "\n" \ | 29 | " " insn "\n" \ |
@@ -51,6 +47,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, | |||
51 | return -EFAULT; | 47 | return -EFAULT; |
52 | 48 | ||
53 | smp_mb(); | 49 | smp_mb(); |
50 | /* Prefetching cannot fault */ | ||
51 | prefetchw(uaddr); | ||
54 | __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" | 52 | __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n" |
55 | "1: ldrex %1, [%4]\n" | 53 | "1: ldrex %1, [%4]\n" |
56 | " teq %1, %2\n" | 54 | " teq %1, %2\n" |
@@ -164,6 +162,5 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr) | |||
164 | return ret; | 162 | return ret; |
165 | } | 163 | } |
166 | 164 | ||
167 | #endif /* !(CPU_USE_DOMAINS && SMP) */ | ||
168 | #endif /* __KERNEL__ */ | 165 | #endif /* __KERNEL__ */ |
169 | #endif /* _ASM_ARM_FUTEX_H */ | 166 | #endif /* _ASM_ARM_FUTEX_H */ |
diff --git a/arch/arm/include/asm/hw_breakpoint.h b/arch/arm/include/asm/hw_breakpoint.h index eef55ea9ef00..8e427c7b4425 100644 --- a/arch/arm/include/asm/hw_breakpoint.h +++ b/arch/arm/include/asm/hw_breakpoint.h | |||
@@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg, | |||
51 | #define ARM_DEBUG_ARCH_V7_ECP14 3 | 51 | #define ARM_DEBUG_ARCH_V7_ECP14 3 |
52 | #define ARM_DEBUG_ARCH_V7_MM 4 | 52 | #define ARM_DEBUG_ARCH_V7_MM 4 |
53 | #define ARM_DEBUG_ARCH_V7_1 5 | 53 | #define ARM_DEBUG_ARCH_V7_1 5 |
54 | #define ARM_DEBUG_ARCH_V8 6 | ||
54 | 55 | ||
55 | /* Breakpoint */ | 56 | /* Breakpoint */ |
56 | #define ARM_BREAKPOINT_EXECUTE 0 | 57 | #define ARM_BREAKPOINT_EXECUTE 0 |
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h index 6ff56eca3f1f..6e183fd269fb 100644 --- a/arch/arm/include/asm/hwcap.h +++ b/arch/arm/include/asm/hwcap.h | |||
@@ -9,6 +9,7 @@ | |||
9 | * instruction set this cpu supports. | 9 | * instruction set this cpu supports. |
10 | */ | 10 | */ |
11 | #define ELF_HWCAP (elf_hwcap) | 11 | #define ELF_HWCAP (elf_hwcap) |
12 | extern unsigned int elf_hwcap; | 12 | #define ELF_HWCAP2 (elf_hwcap2) |
13 | extern unsigned int elf_hwcap, elf_hwcap2; | ||
13 | #endif | 14 | #endif |
14 | #endif | 15 | #endif |
diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h index 863c892b4aaa..70f9b9bfb1f9 100644 --- a/arch/arm/include/asm/jump_label.h +++ b/arch/arm/include/asm/jump_label.h | |||
@@ -4,7 +4,6 @@ | |||
4 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
5 | 5 | ||
6 | #include <linux/types.h> | 6 | #include <linux/types.h> |
7 | #include <asm/system.h> | ||
8 | 7 | ||
9 | #define JUMP_LABEL_NOP_SIZE 4 | 8 | #define JUMP_LABEL_NOP_SIZE 4 |
10 | 9 | ||
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 4afb376d9c7c..02fa2558f662 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
@@ -166,9 +166,17 @@ | |||
166 | * Physical vs virtual RAM address space conversion. These are | 166 | * Physical vs virtual RAM address space conversion. These are |
167 | * private definitions which should NOT be used outside memory.h | 167 | * private definitions which should NOT be used outside memory.h |
168 | * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. | 168 | * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. |
169 | * | ||
170 | * PFNs are used to describe any physical page; this means | ||
171 | * PFN 0 == physical address 0. | ||
169 | */ | 172 | */ |
170 | #ifndef __virt_to_phys | 173 | #if defined(__virt_to_phys) |
171 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT | 174 | #define PHYS_OFFSET PLAT_PHYS_OFFSET |
175 | #define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT)) | ||
176 | |||
177 | #define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT) | ||
178 | |||
179 | #elif defined(CONFIG_ARM_PATCH_PHYS_VIRT) | ||
172 | 180 | ||
173 | /* | 181 | /* |
174 | * Constants used to force the right instruction encodings and shifts | 182 | * Constants used to force the right instruction encodings and shifts |
@@ -177,12 +185,17 @@ | |||
177 | #define __PV_BITS_31_24 0x81000000 | 185 | #define __PV_BITS_31_24 0x81000000 |
178 | #define __PV_BITS_7_0 0x81 | 186 | #define __PV_BITS_7_0 0x81 |
179 | 187 | ||
180 | extern u64 __pv_phys_offset; | 188 | extern unsigned long __pv_phys_pfn_offset; |
181 | extern u64 __pv_offset; | 189 | extern u64 __pv_offset; |
182 | extern void fixup_pv_table(const void *, unsigned long); | 190 | extern void fixup_pv_table(const void *, unsigned long); |
183 | extern const void *__pv_table_begin, *__pv_table_end; | 191 | extern const void *__pv_table_begin, *__pv_table_end; |
184 | 192 | ||
185 | #define PHYS_OFFSET __pv_phys_offset | 193 | #define PHYS_OFFSET ((phys_addr_t)__pv_phys_pfn_offset << PAGE_SHIFT) |
194 | #define PHYS_PFN_OFFSET (__pv_phys_pfn_offset) | ||
195 | |||
196 | #define virt_to_pfn(kaddr) \ | ||
197 | ((((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT) + \ | ||
198 | PHYS_PFN_OFFSET) | ||
186 | 199 | ||
187 | #define __pv_stub(from,to,instr,type) \ | 200 | #define __pv_stub(from,to,instr,type) \ |
188 | __asm__("@ __pv_stub\n" \ | 201 | __asm__("@ __pv_stub\n" \ |
@@ -243,6 +256,7 @@ static inline unsigned long __phys_to_virt(phys_addr_t x) | |||
243 | #else | 256 | #else |
244 | 257 | ||
245 | #define PHYS_OFFSET PLAT_PHYS_OFFSET | 258 | #define PHYS_OFFSET PLAT_PHYS_OFFSET |
259 | #define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT)) | ||
246 | 260 | ||
247 | static inline phys_addr_t __virt_to_phys(unsigned long x) | 261 | static inline phys_addr_t __virt_to_phys(unsigned long x) |
248 | { | 262 | { |
@@ -254,18 +268,11 @@ static inline unsigned long __phys_to_virt(phys_addr_t x) | |||
254 | return x - PHYS_OFFSET + PAGE_OFFSET; | 268 | return x - PHYS_OFFSET + PAGE_OFFSET; |
255 | } | 269 | } |
256 | 270 | ||
257 | #endif | 271 | #define virt_to_pfn(kaddr) \ |
258 | #endif | 272 | ((((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT) + \ |
273 | PHYS_PFN_OFFSET) | ||
259 | 274 | ||
260 | /* | 275 | #endif |
261 | * PFNs are used to describe any physical page; this means | ||
262 | * PFN 0 == physical address 0. | ||
263 | * | ||
264 | * This is the PFN of the first RAM page in the kernel | ||
265 | * direct-mapped view. We assume this is the first page | ||
266 | * of RAM in the mem_map as well. | ||
267 | */ | ||
268 | #define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT)) | ||
269 | 276 | ||
270 | /* | 277 | /* |
271 | * These are *only* valid on the kernel direct mapped RAM memory. | 278 | * These are *only* valid on the kernel direct mapped RAM memory. |
@@ -343,9 +350,9 @@ static inline __deprecated void *bus_to_virt(unsigned long x) | |||
343 | */ | 350 | */ |
344 | #define ARCH_PFN_OFFSET PHYS_PFN_OFFSET | 351 | #define ARCH_PFN_OFFSET PHYS_PFN_OFFSET |
345 | 352 | ||
346 | #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) | 353 | #define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) |
347 | #define virt_addr_valid(kaddr) (((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) \ | 354 | #define virt_addr_valid(kaddr) (((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) \ |
348 | && pfn_valid(__pa(kaddr) >> PAGE_SHIFT) ) | 355 | && pfn_valid(virt_to_pfn(kaddr))) |
349 | 356 | ||
350 | #endif | 357 | #endif |
351 | 358 | ||
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h index dfff709fda3c..219ac88a9542 100644 --- a/arch/arm/include/asm/pgtable-2level.h +++ b/arch/arm/include/asm/pgtable-2level.h | |||
@@ -140,6 +140,7 @@ | |||
140 | #define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ | 140 | #define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ |
141 | #define L_PTE_MT_DEV_WC (_AT(pteval_t, 0x09) << 2) /* 1001 */ | 141 | #define L_PTE_MT_DEV_WC (_AT(pteval_t, 0x09) << 2) /* 1001 */ |
142 | #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ | 142 | #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ |
143 | #define L_PTE_MT_VECTORS (_AT(pteval_t, 0x0f) << 2) /* 1111 */ | ||
143 | #define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) | 144 | #define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) |
144 | 145 | ||
145 | #ifndef __ASSEMBLY__ | 146 | #ifndef __ASSEMBLY__ |
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 7d59b524f2af..5478e5d6ad89 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h | |||
@@ -216,13 +216,16 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) | |||
216 | 216 | ||
217 | #define pte_none(pte) (!pte_val(pte)) | 217 | #define pte_none(pte) (!pte_val(pte)) |
218 | #define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) | 218 | #define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) |
219 | #define pte_valid(pte) (pte_val(pte) & L_PTE_VALID) | ||
220 | #define pte_accessible(mm, pte) (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte)) | ||
219 | #define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY)) | 221 | #define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY)) |
220 | #define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY) | 222 | #define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY) |
221 | #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) | 223 | #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) |
222 | #define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN)) | 224 | #define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN)) |
223 | #define pte_special(pte) (0) | 225 | #define pte_special(pte) (0) |
224 | 226 | ||
225 | #define pte_present_user(pte) (pte_present(pte) && (pte_val(pte) & L_PTE_USER)) | 227 | #define pte_valid_user(pte) \ |
228 | (pte_valid(pte) && (pte_val(pte) & L_PTE_USER) && pte_young(pte)) | ||
226 | 229 | ||
227 | #if __LINUX_ARM_ARCH__ < 6 | 230 | #if __LINUX_ARM_ARCH__ < 6 |
228 | static inline void __sync_icache_dcache(pte_t pteval) | 231 | static inline void __sync_icache_dcache(pte_t pteval) |
@@ -237,7 +240,7 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |||
237 | { | 240 | { |
238 | unsigned long ext = 0; | 241 | unsigned long ext = 0; |
239 | 242 | ||
240 | if (addr < TASK_SIZE && pte_present_user(pteval)) { | 243 | if (addr < TASK_SIZE && pte_valid_user(pteval)) { |
241 | __sync_icache_dcache(pteval); | 244 | __sync_icache_dcache(pteval); |
242 | ext |= PTE_EXT_NG; | 245 | ext |= PTE_EXT_NG; |
243 | } | 246 | } |
diff --git a/arch/arm/include/asm/sync_bitops.h b/arch/arm/include/asm/sync_bitops.h index 63479eecbf76..9732b8e11e63 100644 --- a/arch/arm/include/asm/sync_bitops.h +++ b/arch/arm/include/asm/sync_bitops.h | |||
@@ -2,7 +2,6 @@ | |||
2 | #define __ASM_SYNC_BITOPS_H__ | 2 | #define __ASM_SYNC_BITOPS_H__ |
3 | 3 | ||
4 | #include <asm/bitops.h> | 4 | #include <asm/bitops.h> |
5 | #include <asm/system.h> | ||
6 | 5 | ||
7 | /* sync_bitops functions are equivalent to the SMP implementation of the | 6 | /* sync_bitops functions are equivalent to the SMP implementation of the |
8 | * original functions, independently from CONFIG_SMP being defined. | 7 | * original functions, independently from CONFIG_SMP being defined. |
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h deleted file mode 100644 index 368165e33c1c..000000000000 --- a/arch/arm/include/asm/system.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */ | ||
2 | #include <asm/barrier.h> | ||
3 | #include <asm/compiler.h> | ||
4 | #include <asm/cmpxchg.h> | ||
5 | #include <asm/switch_to.h> | ||
6 | #include <asm/system_info.h> | ||
7 | #include <asm/system_misc.h> | ||
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 72abdc541f38..12c3a5decc60 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <asm/unified.h> | 19 | #include <asm/unified.h> |
20 | #include <asm/compiler.h> | 20 | #include <asm/compiler.h> |
21 | 21 | ||
22 | #if __LINUX_ARM_ARCH__ < 6 | 22 | #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS |
23 | #include <asm-generic/uaccess-unaligned.h> | 23 | #include <asm-generic/uaccess-unaligned.h> |
24 | #else | 24 | #else |
25 | #define __get_user_unaligned __get_user | 25 | #define __get_user_unaligned __get_user |
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index 7dcc10d67253..20d12f230a2f 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h | |||
@@ -28,4 +28,13 @@ | |||
28 | #define HWCAP_LPAE (1 << 20) | 28 | #define HWCAP_LPAE (1 << 20) |
29 | #define HWCAP_EVTSTRM (1 << 21) | 29 | #define HWCAP_EVTSTRM (1 << 21) |
30 | 30 | ||
31 | /* | ||
32 | * HWCAP2 flags - for elf_hwcap2 (in kernel) and AT_HWCAP2 | ||
33 | */ | ||
34 | #define HWCAP2_AES (1 << 0) | ||
35 | #define HWCAP2_PMULL (1 << 1) | ||
36 | #define HWCAP2_SHA1 (1 << 2) | ||
37 | #define HWCAP2_SHA2 (1 << 3) | ||
38 | #define HWCAP2_CRC32 (1 << 4) | ||
39 | |||
31 | #endif /* _UAPI__ASMARM_HWCAP_H */ | 40 | #endif /* _UAPI__ASMARM_HWCAP_H */ |
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 85e664b6a5f1..f7b450f97e68 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c | |||
@@ -158,6 +158,6 @@ EXPORT_SYMBOL(__gnu_mcount_nc); | |||
158 | #endif | 158 | #endif |
159 | 159 | ||
160 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT | 160 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT |
161 | EXPORT_SYMBOL(__pv_phys_offset); | 161 | EXPORT_SYMBOL(__pv_phys_pfn_offset); |
162 | EXPORT_SYMBOL(__pv_offset); | 162 | EXPORT_SYMBOL(__pv_offset); |
163 | #endif | 163 | #endif |
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index 317da88ae65b..91f48804e3bb 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c | |||
@@ -608,41 +608,10 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, | |||
608 | */ | 608 | */ |
609 | int pcibios_enable_device(struct pci_dev *dev, int mask) | 609 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
610 | { | 610 | { |
611 | u16 cmd, old_cmd; | 611 | if (pci_has_flag(PCI_PROBE_ONLY)) |
612 | int idx; | 612 | return 0; |
613 | struct resource *r; | ||
614 | |||
615 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | ||
616 | old_cmd = cmd; | ||
617 | for (idx = 0; idx < 6; idx++) { | ||
618 | /* Only set up the requested stuff */ | ||
619 | if (!(mask & (1 << idx))) | ||
620 | continue; | ||
621 | |||
622 | r = dev->resource + idx; | ||
623 | if (!r->start && r->end) { | ||
624 | printk(KERN_ERR "PCI: Device %s not available because" | ||
625 | " of resource collisions\n", pci_name(dev)); | ||
626 | return -EINVAL; | ||
627 | } | ||
628 | if (r->flags & IORESOURCE_IO) | ||
629 | cmd |= PCI_COMMAND_IO; | ||
630 | if (r->flags & IORESOURCE_MEM) | ||
631 | cmd |= PCI_COMMAND_MEMORY; | ||
632 | } | ||
633 | 613 | ||
634 | /* | 614 | return pci_enable_resources(dev, mask); |
635 | * Bridges (eg, cardbus bridges) need to be fully enabled | ||
636 | */ | ||
637 | if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) | ||
638 | cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; | ||
639 | |||
640 | if (cmd != old_cmd) { | ||
641 | printk("PCI: enabling device %s (%04x -> %04x)\n", | ||
642 | pci_name(dev), old_cmd, cmd); | ||
643 | pci_write_config_word(dev, PCI_COMMAND, cmd); | ||
644 | } | ||
645 | return 0; | ||
646 | } | 615 | } |
647 | 616 | ||
648 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | 617 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index f5f381d91556..f8c08839edf3 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -584,9 +584,10 @@ __fixup_pv_table: | |||
584 | subs r3, r0, r3 @ PHYS_OFFSET - PAGE_OFFSET | 584 | subs r3, r0, r3 @ PHYS_OFFSET - PAGE_OFFSET |
585 | add r4, r4, r3 @ adjust table start address | 585 | add r4, r4, r3 @ adjust table start address |
586 | add r5, r5, r3 @ adjust table end address | 586 | add r5, r5, r3 @ adjust table end address |
587 | add r6, r6, r3 @ adjust __pv_phys_offset address | 587 | add r6, r6, r3 @ adjust __pv_phys_pfn_offset address |
588 | add r7, r7, r3 @ adjust __pv_offset address | 588 | add r7, r7, r3 @ adjust __pv_offset address |
589 | str r8, [r6, #LOW_OFFSET] @ save computed PHYS_OFFSET to __pv_phys_offset | 589 | mov r0, r8, lsr #12 @ convert to PFN |
590 | str r0, [r6, #LOW_OFFSET] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset | ||
590 | strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits | 591 | strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits |
591 | mov r6, r3, lsr #24 @ constant for add/sub instructions | 592 | mov r6, r3, lsr #24 @ constant for add/sub instructions |
592 | teq r3, r6, lsl #24 @ must be 16MiB aligned | 593 | teq r3, r6, lsl #24 @ must be 16MiB aligned |
@@ -600,7 +601,7 @@ ENDPROC(__fixup_pv_table) | |||
600 | 1: .long . | 601 | 1: .long . |
601 | .long __pv_table_begin | 602 | .long __pv_table_begin |
602 | .long __pv_table_end | 603 | .long __pv_table_end |
603 | 2: .long __pv_phys_offset | 604 | 2: .long __pv_phys_pfn_offset |
604 | .long __pv_offset | 605 | .long __pv_offset |
605 | 606 | ||
606 | .text | 607 | .text |
@@ -688,11 +689,11 @@ ENTRY(fixup_pv_table) | |||
688 | ENDPROC(fixup_pv_table) | 689 | ENDPROC(fixup_pv_table) |
689 | 690 | ||
690 | .data | 691 | .data |
691 | .globl __pv_phys_offset | 692 | .globl __pv_phys_pfn_offset |
692 | .type __pv_phys_offset, %object | 693 | .type __pv_phys_pfn_offset, %object |
693 | __pv_phys_offset: | 694 | __pv_phys_pfn_offset: |
694 | .quad 0 | 695 | .word 0 |
695 | .size __pv_phys_offset, . -__pv_phys_offset | 696 | .size __pv_phys_pfn_offset, . -__pv_phys_pfn_offset |
696 | 697 | ||
697 | .globl __pv_offset | 698 | .globl __pv_offset |
698 | .type __pv_offset, %object | 699 | .type __pv_offset, %object |
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 3d446605cbf8..9da35c6d3411 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c | |||
@@ -167,7 +167,7 @@ static int debug_arch_supported(void) | |||
167 | /* Can we determine the watchpoint access type from the fsr? */ | 167 | /* Can we determine the watchpoint access type from the fsr? */ |
168 | static int debug_exception_updates_fsr(void) | 168 | static int debug_exception_updates_fsr(void) |
169 | { | 169 | { |
170 | return 0; | 170 | return get_debug_arch() >= ARM_DEBUG_ARCH_V8; |
171 | } | 171 | } |
172 | 172 | ||
173 | /* Determine number of WRP registers available. */ | 173 | /* Determine number of WRP registers available. */ |
@@ -257,6 +257,7 @@ static int enable_monitor_mode(void) | |||
257 | break; | 257 | break; |
258 | case ARM_DEBUG_ARCH_V7_ECP14: | 258 | case ARM_DEBUG_ARCH_V7_ECP14: |
259 | case ARM_DEBUG_ARCH_V7_1: | 259 | case ARM_DEBUG_ARCH_V7_1: |
260 | case ARM_DEBUG_ARCH_V8: | ||
260 | ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN)); | 261 | ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN)); |
261 | isb(); | 262 | isb(); |
262 | break; | 263 | break; |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 1e8b030dbefd..50e198c1e9c8 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -100,6 +100,9 @@ EXPORT_SYMBOL(system_serial_high); | |||
100 | unsigned int elf_hwcap __read_mostly; | 100 | unsigned int elf_hwcap __read_mostly; |
101 | EXPORT_SYMBOL(elf_hwcap); | 101 | EXPORT_SYMBOL(elf_hwcap); |
102 | 102 | ||
103 | unsigned int elf_hwcap2 __read_mostly; | ||
104 | EXPORT_SYMBOL(elf_hwcap2); | ||
105 | |||
103 | 106 | ||
104 | #ifdef MULTI_CPU | 107 | #ifdef MULTI_CPU |
105 | struct processor processor __read_mostly; | 108 | struct processor processor __read_mostly; |
@@ -1005,6 +1008,15 @@ static const char *hwcap_str[] = { | |||
1005 | NULL | 1008 | NULL |
1006 | }; | 1009 | }; |
1007 | 1010 | ||
1011 | static const char *hwcap2_str[] = { | ||
1012 | "aes", | ||
1013 | "pmull", | ||
1014 | "sha1", | ||
1015 | "sha2", | ||
1016 | "crc32", | ||
1017 | NULL | ||
1018 | }; | ||
1019 | |||
1008 | static int c_show(struct seq_file *m, void *v) | 1020 | static int c_show(struct seq_file *m, void *v) |
1009 | { | 1021 | { |
1010 | int i, j; | 1022 | int i, j; |
@@ -1028,6 +1040,10 @@ static int c_show(struct seq_file *m, void *v) | |||
1028 | if (elf_hwcap & (1 << j)) | 1040 | if (elf_hwcap & (1 << j)) |
1029 | seq_printf(m, "%s ", hwcap_str[j]); | 1041 | seq_printf(m, "%s ", hwcap_str[j]); |
1030 | 1042 | ||
1043 | for (j = 0; hwcap2_str[j]; j++) | ||
1044 | if (elf_hwcap2 & (1 << j)) | ||
1045 | seq_printf(m, "%s ", hwcap2_str[j]); | ||
1046 | |||
1031 | seq_printf(m, "\nCPU implementer\t: 0x%02x\n", cpuid >> 24); | 1047 | seq_printf(m, "\nCPU implementer\t: 0x%02x\n", cpuid >> 24); |
1032 | seq_printf(m, "CPU architecture: %s\n", | 1048 | seq_printf(m, "CPU architecture: %s\n", |
1033 | proc_arch[cpu_architecture()]); | 1049 | proc_arch[cpu_architecture()]); |
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index 00df012c4678..3c217694ebec 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c | |||
@@ -68,6 +68,12 @@ EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2); | |||
68 | struct unwind_ctrl_block { | 68 | struct unwind_ctrl_block { |
69 | unsigned long vrs[16]; /* virtual register set */ | 69 | unsigned long vrs[16]; /* virtual register set */ |
70 | const unsigned long *insn; /* pointer to the current instructions word */ | 70 | const unsigned long *insn; /* pointer to the current instructions word */ |
71 | unsigned long sp_high; /* highest value of sp allowed */ | ||
72 | /* | ||
73 | * 1 : check for stack overflow for each register pop. | ||
74 | * 0 : save overhead if there is plenty of stack remaining. | ||
75 | */ | ||
76 | int check_each_pop; | ||
71 | int entries; /* number of entries left to interpret */ | 77 | int entries; /* number of entries left to interpret */ |
72 | int byte; /* current byte number in the instructions word */ | 78 | int byte; /* current byte number in the instructions word */ |
73 | }; | 79 | }; |
@@ -235,12 +241,85 @@ static unsigned long unwind_get_byte(struct unwind_ctrl_block *ctrl) | |||
235 | return ret; | 241 | return ret; |
236 | } | 242 | } |
237 | 243 | ||
244 | /* Before poping a register check whether it is feasible or not */ | ||
245 | static int unwind_pop_register(struct unwind_ctrl_block *ctrl, | ||
246 | unsigned long **vsp, unsigned int reg) | ||
247 | { | ||
248 | if (unlikely(ctrl->check_each_pop)) | ||
249 | if (*vsp >= (unsigned long *)ctrl->sp_high) | ||
250 | return -URC_FAILURE; | ||
251 | |||
252 | ctrl->vrs[reg] = *(*vsp)++; | ||
253 | return URC_OK; | ||
254 | } | ||
255 | |||
256 | /* Helper functions to execute the instructions */ | ||
257 | static int unwind_exec_pop_subset_r4_to_r13(struct unwind_ctrl_block *ctrl, | ||
258 | unsigned long mask) | ||
259 | { | ||
260 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
261 | int load_sp, reg = 4; | ||
262 | |||
263 | load_sp = mask & (1 << (13 - 4)); | ||
264 | while (mask) { | ||
265 | if (mask & 1) | ||
266 | if (unwind_pop_register(ctrl, &vsp, reg)) | ||
267 | return -URC_FAILURE; | ||
268 | mask >>= 1; | ||
269 | reg++; | ||
270 | } | ||
271 | if (!load_sp) | ||
272 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
273 | |||
274 | return URC_OK; | ||
275 | } | ||
276 | |||
277 | static int unwind_exec_pop_r4_to_rN(struct unwind_ctrl_block *ctrl, | ||
278 | unsigned long insn) | ||
279 | { | ||
280 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
281 | int reg; | ||
282 | |||
283 | /* pop R4-R[4+bbb] */ | ||
284 | for (reg = 4; reg <= 4 + (insn & 7); reg++) | ||
285 | if (unwind_pop_register(ctrl, &vsp, reg)) | ||
286 | return -URC_FAILURE; | ||
287 | |||
288 | if (insn & 0x80) | ||
289 | if (unwind_pop_register(ctrl, &vsp, 14)) | ||
290 | return -URC_FAILURE; | ||
291 | |||
292 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
293 | |||
294 | return URC_OK; | ||
295 | } | ||
296 | |||
297 | static int unwind_exec_pop_subset_r0_to_r3(struct unwind_ctrl_block *ctrl, | ||
298 | unsigned long mask) | ||
299 | { | ||
300 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
301 | int reg = 0; | ||
302 | |||
303 | /* pop R0-R3 according to mask */ | ||
304 | while (mask) { | ||
305 | if (mask & 1) | ||
306 | if (unwind_pop_register(ctrl, &vsp, reg)) | ||
307 | return -URC_FAILURE; | ||
308 | mask >>= 1; | ||
309 | reg++; | ||
310 | } | ||
311 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
312 | |||
313 | return URC_OK; | ||
314 | } | ||
315 | |||
238 | /* | 316 | /* |
239 | * Execute the current unwind instruction. | 317 | * Execute the current unwind instruction. |
240 | */ | 318 | */ |
241 | static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | 319 | static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) |
242 | { | 320 | { |
243 | unsigned long insn = unwind_get_byte(ctrl); | 321 | unsigned long insn = unwind_get_byte(ctrl); |
322 | int ret = URC_OK; | ||
244 | 323 | ||
245 | pr_debug("%s: insn = %08lx\n", __func__, insn); | 324 | pr_debug("%s: insn = %08lx\n", __func__, insn); |
246 | 325 | ||
@@ -250,8 +329,6 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | |||
250 | ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4; | 329 | ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4; |
251 | else if ((insn & 0xf0) == 0x80) { | 330 | else if ((insn & 0xf0) == 0x80) { |
252 | unsigned long mask; | 331 | unsigned long mask; |
253 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
254 | int load_sp, reg = 4; | ||
255 | 332 | ||
256 | insn = (insn << 8) | unwind_get_byte(ctrl); | 333 | insn = (insn << 8) | unwind_get_byte(ctrl); |
257 | mask = insn & 0x0fff; | 334 | mask = insn & 0x0fff; |
@@ -261,29 +338,16 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | |||
261 | return -URC_FAILURE; | 338 | return -URC_FAILURE; |
262 | } | 339 | } |
263 | 340 | ||
264 | /* pop R4-R15 according to mask */ | 341 | ret = unwind_exec_pop_subset_r4_to_r13(ctrl, mask); |
265 | load_sp = mask & (1 << (13 - 4)); | 342 | if (ret) |
266 | while (mask) { | 343 | goto error; |
267 | if (mask & 1) | ||
268 | ctrl->vrs[reg] = *vsp++; | ||
269 | mask >>= 1; | ||
270 | reg++; | ||
271 | } | ||
272 | if (!load_sp) | ||
273 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
274 | } else if ((insn & 0xf0) == 0x90 && | 344 | } else if ((insn & 0xf0) == 0x90 && |
275 | (insn & 0x0d) != 0x0d) | 345 | (insn & 0x0d) != 0x0d) |
276 | ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f]; | 346 | ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f]; |
277 | else if ((insn & 0xf0) == 0xa0) { | 347 | else if ((insn & 0xf0) == 0xa0) { |
278 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | 348 | ret = unwind_exec_pop_r4_to_rN(ctrl, insn); |
279 | int reg; | 349 | if (ret) |
280 | 350 | goto error; | |
281 | /* pop R4-R[4+bbb] */ | ||
282 | for (reg = 4; reg <= 4 + (insn & 7); reg++) | ||
283 | ctrl->vrs[reg] = *vsp++; | ||
284 | if (insn & 0x80) | ||
285 | ctrl->vrs[14] = *vsp++; | ||
286 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
287 | } else if (insn == 0xb0) { | 351 | } else if (insn == 0xb0) { |
288 | if (ctrl->vrs[PC] == 0) | 352 | if (ctrl->vrs[PC] == 0) |
289 | ctrl->vrs[PC] = ctrl->vrs[LR]; | 353 | ctrl->vrs[PC] = ctrl->vrs[LR]; |
@@ -291,8 +355,6 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | |||
291 | ctrl->entries = 0; | 355 | ctrl->entries = 0; |
292 | } else if (insn == 0xb1) { | 356 | } else if (insn == 0xb1) { |
293 | unsigned long mask = unwind_get_byte(ctrl); | 357 | unsigned long mask = unwind_get_byte(ctrl); |
294 | unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; | ||
295 | int reg = 0; | ||
296 | 358 | ||
297 | if (mask == 0 || mask & 0xf0) { | 359 | if (mask == 0 || mask & 0xf0) { |
298 | pr_warning("unwind: Spare encoding %04lx\n", | 360 | pr_warning("unwind: Spare encoding %04lx\n", |
@@ -300,14 +362,9 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | |||
300 | return -URC_FAILURE; | 362 | return -URC_FAILURE; |
301 | } | 363 | } |
302 | 364 | ||
303 | /* pop R0-R3 according to mask */ | 365 | ret = unwind_exec_pop_subset_r0_to_r3(ctrl, mask); |
304 | while (mask) { | 366 | if (ret) |
305 | if (mask & 1) | 367 | goto error; |
306 | ctrl->vrs[reg] = *vsp++; | ||
307 | mask >>= 1; | ||
308 | reg++; | ||
309 | } | ||
310 | ctrl->vrs[SP] = (unsigned long)vsp; | ||
311 | } else if (insn == 0xb2) { | 368 | } else if (insn == 0xb2) { |
312 | unsigned long uleb128 = unwind_get_byte(ctrl); | 369 | unsigned long uleb128 = unwind_get_byte(ctrl); |
313 | 370 | ||
@@ -320,7 +377,8 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | |||
320 | pr_debug("%s: fp = %08lx sp = %08lx lr = %08lx pc = %08lx\n", __func__, | 377 | pr_debug("%s: fp = %08lx sp = %08lx lr = %08lx pc = %08lx\n", __func__, |
321 | ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); | 378 | ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); |
322 | 379 | ||
323 | return URC_OK; | 380 | error: |
381 | return ret; | ||
324 | } | 382 | } |
325 | 383 | ||
326 | /* | 384 | /* |
@@ -329,13 +387,13 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) | |||
329 | */ | 387 | */ |
330 | int unwind_frame(struct stackframe *frame) | 388 | int unwind_frame(struct stackframe *frame) |
331 | { | 389 | { |
332 | unsigned long high, low; | 390 | unsigned long low; |
333 | const struct unwind_idx *idx; | 391 | const struct unwind_idx *idx; |
334 | struct unwind_ctrl_block ctrl; | 392 | struct unwind_ctrl_block ctrl; |
335 | 393 | ||
336 | /* only go to a higher address on the stack */ | 394 | /* store the highest address on the stack to avoid crossing it*/ |
337 | low = frame->sp; | 395 | low = frame->sp; |
338 | high = ALIGN(low, THREAD_SIZE); | 396 | ctrl.sp_high = ALIGN(low, THREAD_SIZE); |
339 | 397 | ||
340 | pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, | 398 | pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, |
341 | frame->pc, frame->lr, frame->sp); | 399 | frame->pc, frame->lr, frame->sp); |
@@ -382,11 +440,16 @@ int unwind_frame(struct stackframe *frame) | |||
382 | return -URC_FAILURE; | 440 | return -URC_FAILURE; |
383 | } | 441 | } |
384 | 442 | ||
443 | ctrl.check_each_pop = 0; | ||
444 | |||
385 | while (ctrl.entries > 0) { | 445 | while (ctrl.entries > 0) { |
386 | int urc = unwind_exec_insn(&ctrl); | 446 | int urc; |
447 | if ((ctrl.sp_high - ctrl.vrs[SP]) < sizeof(ctrl.vrs)) | ||
448 | ctrl.check_each_pop = 1; | ||
449 | urc = unwind_exec_insn(&ctrl); | ||
387 | if (urc < 0) | 450 | if (urc < 0) |
388 | return urc; | 451 | return urc; |
389 | if (ctrl.vrs[SP] < low || ctrl.vrs[SP] >= high) | 452 | if (ctrl.vrs[SP] < low || ctrl.vrs[SP] >= ctrl.sp_high) |
390 | return -URC_FAILURE; | 453 | return -URC_FAILURE; |
391 | } | 454 | } |
392 | 455 | ||
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index 52886b89706c..9f12ed1eea86 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h | |||
@@ -37,6 +37,11 @@ UNWIND( .fnstart ) | |||
37 | add r1, r1, r0, lsl #2 @ Get word offset | 37 | add r1, r1, r0, lsl #2 @ Get word offset |
38 | mov r3, r2, lsl r3 @ create mask | 38 | mov r3, r2, lsl r3 @ create mask |
39 | smp_dmb | 39 | smp_dmb |
40 | #if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP) | ||
41 | .arch_extension mp | ||
42 | ALT_SMP(W(pldw) [r1]) | ||
43 | ALT_UP(W(nop)) | ||
44 | #endif | ||
40 | 1: ldrex r2, [r1] | 45 | 1: ldrex r2, [r1] |
41 | ands r0, r2, r3 @ save old value of bit | 46 | ands r0, r2, r3 @ save old value of bit |
42 | \instr r2, r2, r3 @ toggle bit | 47 | \instr r2, r2, r3 @ toggle bit |
diff --git a/arch/arm/lib/copy_template.S b/arch/arm/lib/copy_template.S index 805e3f8fb007..3bc8eb811a73 100644 --- a/arch/arm/lib/copy_template.S +++ b/arch/arm/lib/copy_template.S | |||
@@ -197,24 +197,24 @@ | |||
197 | 197 | ||
198 | 12: PLD( pld [r1, #124] ) | 198 | 12: PLD( pld [r1, #124] ) |
199 | 13: ldr4w r1, r4, r5, r6, r7, abort=19f | 199 | 13: ldr4w r1, r4, r5, r6, r7, abort=19f |
200 | mov r3, lr, pull #\pull | 200 | mov r3, lr, lspull #\pull |
201 | subs r2, r2, #32 | 201 | subs r2, r2, #32 |
202 | ldr4w r1, r8, r9, ip, lr, abort=19f | 202 | ldr4w r1, r8, r9, ip, lr, abort=19f |
203 | orr r3, r3, r4, push #\push | 203 | orr r3, r3, r4, lspush #\push |
204 | mov r4, r4, pull #\pull | 204 | mov r4, r4, lspull #\pull |
205 | orr r4, r4, r5, push #\push | 205 | orr r4, r4, r5, lspush #\push |
206 | mov r5, r5, pull #\pull | 206 | mov r5, r5, lspull #\pull |
207 | orr r5, r5, r6, push #\push | 207 | orr r5, r5, r6, lspush #\push |
208 | mov r6, r6, pull #\pull | 208 | mov r6, r6, lspull #\pull |
209 | orr r6, r6, r7, push #\push | 209 | orr r6, r6, r7, lspush #\push |
210 | mov r7, r7, pull #\pull | 210 | mov r7, r7, lspull #\pull |
211 | orr r7, r7, r8, push #\push | 211 | orr r7, r7, r8, lspush #\push |
212 | mov r8, r8, pull #\pull | 212 | mov r8, r8, lspull #\pull |
213 | orr r8, r8, r9, push #\push | 213 | orr r8, r8, r9, lspush #\push |
214 | mov r9, r9, pull #\pull | 214 | mov r9, r9, lspull #\pull |
215 | orr r9, r9, ip, push #\push | 215 | orr r9, r9, ip, lspush #\push |
216 | mov ip, ip, pull #\pull | 216 | mov ip, ip, lspull #\pull |
217 | orr ip, ip, lr, push #\push | 217 | orr ip, ip, lr, lspush #\push |
218 | str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f | 218 | str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f |
219 | bge 12b | 219 | bge 12b |
220 | PLD( cmn r2, #96 ) | 220 | PLD( cmn r2, #96 ) |
@@ -225,10 +225,10 @@ | |||
225 | 14: ands ip, r2, #28 | 225 | 14: ands ip, r2, #28 |
226 | beq 16f | 226 | beq 16f |
227 | 227 | ||
228 | 15: mov r3, lr, pull #\pull | 228 | 15: mov r3, lr, lspull #\pull |
229 | ldr1w r1, lr, abort=21f | 229 | ldr1w r1, lr, abort=21f |
230 | subs ip, ip, #4 | 230 | subs ip, ip, #4 |
231 | orr r3, r3, lr, push #\push | 231 | orr r3, r3, lr, lspush #\push |
232 | str1w r0, r3, abort=21f | 232 | str1w r0, r3, abort=21f |
233 | bgt 15b | 233 | bgt 15b |
234 | CALGN( cmp r2, #0 ) | 234 | CALGN( cmp r2, #0 ) |
diff --git a/arch/arm/lib/csumpartialcopygeneric.S b/arch/arm/lib/csumpartialcopygeneric.S index d620a5f22a09..d6e742d24007 100644 --- a/arch/arm/lib/csumpartialcopygeneric.S +++ b/arch/arm/lib/csumpartialcopygeneric.S | |||
@@ -141,7 +141,7 @@ FN_ENTRY | |||
141 | tst len, #2 | 141 | tst len, #2 |
142 | mov r5, r4, get_byte_0 | 142 | mov r5, r4, get_byte_0 |
143 | beq .Lexit | 143 | beq .Lexit |
144 | adcs sum, sum, r4, push #16 | 144 | adcs sum, sum, r4, lspush #16 |
145 | strb r5, [dst], #1 | 145 | strb r5, [dst], #1 |
146 | mov r5, r4, get_byte_1 | 146 | mov r5, r4, get_byte_1 |
147 | strb r5, [dst], #1 | 147 | strb r5, [dst], #1 |
@@ -171,23 +171,23 @@ FN_ENTRY | |||
171 | cmp ip, #2 | 171 | cmp ip, #2 |
172 | beq .Lsrc2_aligned | 172 | beq .Lsrc2_aligned |
173 | bhi .Lsrc3_aligned | 173 | bhi .Lsrc3_aligned |
174 | mov r4, r5, pull #8 @ C = 0 | 174 | mov r4, r5, lspull #8 @ C = 0 |
175 | bics ip, len, #15 | 175 | bics ip, len, #15 |
176 | beq 2f | 176 | beq 2f |
177 | 1: load4l r5, r6, r7, r8 | 177 | 1: load4l r5, r6, r7, r8 |
178 | orr r4, r4, r5, push #24 | 178 | orr r4, r4, r5, lspush #24 |
179 | mov r5, r5, pull #8 | 179 | mov r5, r5, lspull #8 |
180 | orr r5, r5, r6, push #24 | 180 | orr r5, r5, r6, lspush #24 |
181 | mov r6, r6, pull #8 | 181 | mov r6, r6, lspull #8 |
182 | orr r6, r6, r7, push #24 | 182 | orr r6, r6, r7, lspush #24 |
183 | mov r7, r7, pull #8 | 183 | mov r7, r7, lspull #8 |
184 | orr r7, r7, r8, push #24 | 184 | orr r7, r7, r8, lspush #24 |
185 | stmia dst!, {r4, r5, r6, r7} | 185 | stmia dst!, {r4, r5, r6, r7} |
186 | adcs sum, sum, r4 | 186 | adcs sum, sum, r4 |
187 | adcs sum, sum, r5 | 187 | adcs sum, sum, r5 |
188 | adcs sum, sum, r6 | 188 | adcs sum, sum, r6 |
189 | adcs sum, sum, r7 | 189 | adcs sum, sum, r7 |
190 | mov r4, r8, pull #8 | 190 | mov r4, r8, lspull #8 |
191 | sub ip, ip, #16 | 191 | sub ip, ip, #16 |
192 | teq ip, #0 | 192 | teq ip, #0 |
193 | bne 1b | 193 | bne 1b |
@@ -196,50 +196,50 @@ FN_ENTRY | |||
196 | tst ip, #8 | 196 | tst ip, #8 |
197 | beq 3f | 197 | beq 3f |
198 | load2l r5, r6 | 198 | load2l r5, r6 |
199 | orr r4, r4, r5, push #24 | 199 | orr r4, r4, r5, lspush #24 |
200 | mov r5, r5, pull #8 | 200 | mov r5, r5, lspull #8 |
201 | orr r5, r5, r6, push #24 | 201 | orr r5, r5, r6, lspush #24 |
202 | stmia dst!, {r4, r5} | 202 | stmia dst!, {r4, r5} |
203 | adcs sum, sum, r4 | 203 | adcs sum, sum, r4 |
204 | adcs sum, sum, r5 | 204 | adcs sum, sum, r5 |
205 | mov r4, r6, pull #8 | 205 | mov r4, r6, lspull #8 |
206 | tst ip, #4 | 206 | tst ip, #4 |
207 | beq 4f | 207 | beq 4f |
208 | 3: load1l r5 | 208 | 3: load1l r5 |
209 | orr r4, r4, r5, push #24 | 209 | orr r4, r4, r5, lspush #24 |
210 | str r4, [dst], #4 | 210 | str r4, [dst], #4 |
211 | adcs sum, sum, r4 | 211 | adcs sum, sum, r4 |
212 | mov r4, r5, pull #8 | 212 | mov r4, r5, lspull #8 |
213 | 4: ands len, len, #3 | 213 | 4: ands len, len, #3 |
214 | beq .Ldone | 214 | beq .Ldone |
215 | mov r5, r4, get_byte_0 | 215 | mov r5, r4, get_byte_0 |
216 | tst len, #2 | 216 | tst len, #2 |
217 | beq .Lexit | 217 | beq .Lexit |
218 | adcs sum, sum, r4, push #16 | 218 | adcs sum, sum, r4, lspush #16 |
219 | strb r5, [dst], #1 | 219 | strb r5, [dst], #1 |
220 | mov r5, r4, get_byte_1 | 220 | mov r5, r4, get_byte_1 |
221 | strb r5, [dst], #1 | 221 | strb r5, [dst], #1 |
222 | mov r5, r4, get_byte_2 | 222 | mov r5, r4, get_byte_2 |
223 | b .Lexit | 223 | b .Lexit |
224 | 224 | ||
225 | .Lsrc2_aligned: mov r4, r5, pull #16 | 225 | .Lsrc2_aligned: mov r4, r5, lspull #16 |
226 | adds sum, sum, #0 | 226 | adds sum, sum, #0 |
227 | bics ip, len, #15 | 227 | bics ip, len, #15 |
228 | beq 2f | 228 | beq 2f |
229 | 1: load4l r5, r6, r7, r8 | 229 | 1: load4l r5, r6, r7, r8 |
230 | orr r4, r4, r5, push #16 | 230 | orr r4, r4, r5, lspush #16 |
231 | mov r5, r5, pull #16 | 231 | mov r5, r5, lspull #16 |
232 | orr r5, r5, r6, push #16 | 232 | orr r5, r5, r6, lspush #16 |
233 | mov r6, r6, pull #16 | 233 | mov r6, r6, lspull #16 |
234 | orr r6, r6, r7, push #16 | 234 | orr r6, r6, r7, lspush #16 |
235 | mov r7, r7, pull #16 | 235 | mov r7, r7, lspull #16 |
236 | orr r7, r7, r8, push #16 | 236 | orr r7, r7, r8, lspush #16 |
237 | stmia dst!, {r4, r5, r6, r7} | 237 | stmia dst!, {r4, r5, r6, r7} |
238 | adcs sum, sum, r4 | 238 | adcs sum, sum, r4 |
239 | adcs sum, sum, r5 | 239 | adcs sum, sum, r5 |
240 | adcs sum, sum, r6 | 240 | adcs sum, sum, r6 |
241 | adcs sum, sum, r7 | 241 | adcs sum, sum, r7 |
242 | mov r4, r8, pull #16 | 242 | mov r4, r8, lspull #16 |
243 | sub ip, ip, #16 | 243 | sub ip, ip, #16 |
244 | teq ip, #0 | 244 | teq ip, #0 |
245 | bne 1b | 245 | bne 1b |
@@ -248,20 +248,20 @@ FN_ENTRY | |||
248 | tst ip, #8 | 248 | tst ip, #8 |
249 | beq 3f | 249 | beq 3f |
250 | load2l r5, r6 | 250 | load2l r5, r6 |
251 | orr r4, r4, r5, push #16 | 251 | orr r4, r4, r5, lspush #16 |
252 | mov r5, r5, pull #16 | 252 | mov r5, r5, lspull #16 |
253 | orr r5, r5, r6, push #16 | 253 | orr r5, r5, r6, lspush #16 |
254 | stmia dst!, {r4, r5} | 254 | stmia dst!, {r4, r5} |
255 | adcs sum, sum, r4 | 255 | adcs sum, sum, r4 |
256 | adcs sum, sum, r5 | 256 | adcs sum, sum, r5 |
257 | mov r4, r6, pull #16 | 257 | mov r4, r6, lspull #16 |
258 | tst ip, #4 | 258 | tst ip, #4 |
259 | beq 4f | 259 | beq 4f |
260 | 3: load1l r5 | 260 | 3: load1l r5 |
261 | orr r4, r4, r5, push #16 | 261 | orr r4, r4, r5, lspush #16 |
262 | str r4, [dst], #4 | 262 | str r4, [dst], #4 |
263 | adcs sum, sum, r4 | 263 | adcs sum, sum, r4 |
264 | mov r4, r5, pull #16 | 264 | mov r4, r5, lspull #16 |
265 | 4: ands len, len, #3 | 265 | 4: ands len, len, #3 |
266 | beq .Ldone | 266 | beq .Ldone |
267 | mov r5, r4, get_byte_0 | 267 | mov r5, r4, get_byte_0 |
@@ -276,24 +276,24 @@ FN_ENTRY | |||
276 | load1b r5 | 276 | load1b r5 |
277 | b .Lexit | 277 | b .Lexit |
278 | 278 | ||
279 | .Lsrc3_aligned: mov r4, r5, pull #24 | 279 | .Lsrc3_aligned: mov r4, r5, lspull #24 |
280 | adds sum, sum, #0 | 280 | adds sum, sum, #0 |
281 | bics ip, len, #15 | 281 | bics ip, len, #15 |
282 | beq 2f | 282 | beq 2f |
283 | 1: load4l r5, r6, r7, r8 | 283 | 1: load4l r5, r6, r7, r8 |
284 | orr r4, r4, r5, push #8 | 284 | orr r4, r4, r5, lspush #8 |
285 | mov r5, r5, pull #24 | 285 | mov r5, r5, lspull #24 |
286 | orr r5, r5, r6, push #8 | 286 | orr r5, r5, r6, lspush #8 |
287 | mov r6, r6, pull #24 | 287 | mov r6, r6, lspull #24 |
288 | orr r6, r6, r7, push #8 | 288 | orr r6, r6, r7, lspush #8 |
289 | mov r7, r7, pull #24 | 289 | mov r7, r7, lspull #24 |
290 | orr r7, r7, r8, push #8 | 290 | orr r7, r7, r8, lspush #8 |
291 | stmia dst!, {r4, r5, r6, r7} | 291 | stmia dst!, {r4, r5, r6, r7} |
292 | adcs sum, sum, r4 | 292 | adcs sum, sum, r4 |
293 | adcs sum, sum, r5 | 293 | adcs sum, sum, r5 |
294 | adcs sum, sum, r6 | 294 | adcs sum, sum, r6 |
295 | adcs sum, sum, r7 | 295 | adcs sum, sum, r7 |
296 | mov r4, r8, pull #24 | 296 | mov r4, r8, lspull #24 |
297 | sub ip, ip, #16 | 297 | sub ip, ip, #16 |
298 | teq ip, #0 | 298 | teq ip, #0 |
299 | bne 1b | 299 | bne 1b |
@@ -302,20 +302,20 @@ FN_ENTRY | |||
302 | tst ip, #8 | 302 | tst ip, #8 |
303 | beq 3f | 303 | beq 3f |
304 | load2l r5, r6 | 304 | load2l r5, r6 |
305 | orr r4, r4, r5, push #8 | 305 | orr r4, r4, r5, lspush #8 |
306 | mov r5, r5, pull #24 | 306 | mov r5, r5, lspull #24 |
307 | orr r5, r5, r6, push #8 | 307 | orr r5, r5, r6, lspush #8 |
308 | stmia dst!, {r4, r5} | 308 | stmia dst!, {r4, r5} |
309 | adcs sum, sum, r4 | 309 | adcs sum, sum, r4 |
310 | adcs sum, sum, r5 | 310 | adcs sum, sum, r5 |
311 | mov r4, r6, pull #24 | 311 | mov r4, r6, lspull #24 |
312 | tst ip, #4 | 312 | tst ip, #4 |
313 | beq 4f | 313 | beq 4f |
314 | 3: load1l r5 | 314 | 3: load1l r5 |
315 | orr r4, r4, r5, push #8 | 315 | orr r4, r4, r5, lspush #8 |
316 | str r4, [dst], #4 | 316 | str r4, [dst], #4 |
317 | adcs sum, sum, r4 | 317 | adcs sum, sum, r4 |
318 | mov r4, r5, pull #24 | 318 | mov r4, r5, lspull #24 |
319 | 4: ands len, len, #3 | 319 | 4: ands len, len, #3 |
320 | beq .Ldone | 320 | beq .Ldone |
321 | mov r5, r4, get_byte_0 | 321 | mov r5, r4, get_byte_0 |
@@ -326,7 +326,7 @@ FN_ENTRY | |||
326 | load1l r4 | 326 | load1l r4 |
327 | mov r5, r4, get_byte_0 | 327 | mov r5, r4, get_byte_0 |
328 | strb r5, [dst], #1 | 328 | strb r5, [dst], #1 |
329 | adcs sum, sum, r4, push #24 | 329 | adcs sum, sum, r4, lspush #24 |
330 | mov r5, r4, get_byte_1 | 330 | mov r5, r4, get_byte_1 |
331 | b .Lexit | 331 | b .Lexit |
332 | FN_EXIT | 332 | FN_EXIT |
diff --git a/arch/arm/lib/io-readsl.S b/arch/arm/lib/io-readsl.S index 5fb97e7f9f4b..7a7430950c79 100644 --- a/arch/arm/lib/io-readsl.S +++ b/arch/arm/lib/io-readsl.S | |||
@@ -47,25 +47,25 @@ ENTRY(__raw_readsl) | |||
47 | strb ip, [r1], #1 | 47 | strb ip, [r1], #1 |
48 | 48 | ||
49 | 4: subs r2, r2, #1 | 49 | 4: subs r2, r2, #1 |
50 | mov ip, r3, pull #24 | 50 | mov ip, r3, lspull #24 |
51 | ldrne r3, [r0] | 51 | ldrne r3, [r0] |
52 | orrne ip, ip, r3, push #8 | 52 | orrne ip, ip, r3, lspush #8 |
53 | strne ip, [r1], #4 | 53 | strne ip, [r1], #4 |
54 | bne 4b | 54 | bne 4b |
55 | b 8f | 55 | b 8f |
56 | 56 | ||
57 | 5: subs r2, r2, #1 | 57 | 5: subs r2, r2, #1 |
58 | mov ip, r3, pull #16 | 58 | mov ip, r3, lspull #16 |
59 | ldrne r3, [r0] | 59 | ldrne r3, [r0] |
60 | orrne ip, ip, r3, push #16 | 60 | orrne ip, ip, r3, lspush #16 |
61 | strne ip, [r1], #4 | 61 | strne ip, [r1], #4 |
62 | bne 5b | 62 | bne 5b |
63 | b 7f | 63 | b 7f |
64 | 64 | ||
65 | 6: subs r2, r2, #1 | 65 | 6: subs r2, r2, #1 |
66 | mov ip, r3, pull #8 | 66 | mov ip, r3, lspull #8 |
67 | ldrne r3, [r0] | 67 | ldrne r3, [r0] |
68 | orrne ip, ip, r3, push #24 | 68 | orrne ip, ip, r3, lspush #24 |
69 | strne ip, [r1], #4 | 69 | strne ip, [r1], #4 |
70 | bne 6b | 70 | bne 6b |
71 | 71 | ||
diff --git a/arch/arm/lib/io-writesl.S b/arch/arm/lib/io-writesl.S index 8d3b7813725c..d0d104a0dd11 100644 --- a/arch/arm/lib/io-writesl.S +++ b/arch/arm/lib/io-writesl.S | |||
@@ -41,26 +41,26 @@ ENTRY(__raw_writesl) | |||
41 | blt 5f | 41 | blt 5f |
42 | bgt 6f | 42 | bgt 6f |
43 | 43 | ||
44 | 4: mov ip, r3, pull #16 | 44 | 4: mov ip, r3, lspull #16 |
45 | ldr r3, [r1], #4 | 45 | ldr r3, [r1], #4 |
46 | subs r2, r2, #1 | 46 | subs r2, r2, #1 |
47 | orr ip, ip, r3, push #16 | 47 | orr ip, ip, r3, lspush #16 |
48 | str ip, [r0] | 48 | str ip, [r0] |
49 | bne 4b | 49 | bne 4b |
50 | mov pc, lr | 50 | mov pc, lr |
51 | 51 | ||
52 | 5: mov ip, r3, pull #8 | 52 | 5: mov ip, r3, lspull #8 |
53 | ldr r3, [r1], #4 | 53 | ldr r3, [r1], #4 |
54 | subs r2, r2, #1 | 54 | subs r2, r2, #1 |
55 | orr ip, ip, r3, push #24 | 55 | orr ip, ip, r3, lspush #24 |
56 | str ip, [r0] | 56 | str ip, [r0] |
57 | bne 5b | 57 | bne 5b |
58 | mov pc, lr | 58 | mov pc, lr |
59 | 59 | ||
60 | 6: mov ip, r3, pull #24 | 60 | 6: mov ip, r3, lspull #24 |
61 | ldr r3, [r1], #4 | 61 | ldr r3, [r1], #4 |
62 | subs r2, r2, #1 | 62 | subs r2, r2, #1 |
63 | orr ip, ip, r3, push #8 | 63 | orr ip, ip, r3, lspush #8 |
64 | str ip, [r0] | 64 | str ip, [r0] |
65 | bne 6b | 65 | bne 6b |
66 | mov pc, lr | 66 | mov pc, lr |
diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S index 938fc14f962d..d1fc0c0c342c 100644 --- a/arch/arm/lib/memmove.S +++ b/arch/arm/lib/memmove.S | |||
@@ -147,24 +147,24 @@ ENTRY(memmove) | |||
147 | 147 | ||
148 | 12: PLD( pld [r1, #-128] ) | 148 | 12: PLD( pld [r1, #-128] ) |
149 | 13: ldmdb r1!, {r7, r8, r9, ip} | 149 | 13: ldmdb r1!, {r7, r8, r9, ip} |
150 | mov lr, r3, push #\push | 150 | mov lr, r3, lspush #\push |
151 | subs r2, r2, #32 | 151 | subs r2, r2, #32 |
152 | ldmdb r1!, {r3, r4, r5, r6} | 152 | ldmdb r1!, {r3, r4, r5, r6} |
153 | orr lr, lr, ip, pull #\pull | 153 | orr lr, lr, ip, lspull #\pull |
154 | mov ip, ip, push #\push | 154 | mov ip, ip, lspush #\push |
155 | orr ip, ip, r9, pull #\pull | 155 | orr ip, ip, r9, lspull #\pull |
156 | mov r9, r9, push #\push | 156 | mov r9, r9, lspush #\push |
157 | orr r9, r9, r8, pull #\pull | 157 | orr r9, r9, r8, lspull #\pull |
158 | mov r8, r8, push #\push | 158 | mov r8, r8, lspush #\push |
159 | orr r8, r8, r7, pull #\pull | 159 | orr r8, r8, r7, lspull #\pull |
160 | mov r7, r7, push #\push | 160 | mov r7, r7, lspush #\push |
161 | orr r7, r7, r6, pull #\pull | 161 | orr r7, r7, r6, lspull #\pull |
162 | mov r6, r6, push #\push | 162 | mov r6, r6, lspush #\push |
163 | orr r6, r6, r5, pull #\pull | 163 | orr r6, r6, r5, lspull #\pull |
164 | mov r5, r5, push #\push | 164 | mov r5, r5, lspush #\push |
165 | orr r5, r5, r4, pull #\pull | 165 | orr r5, r5, r4, lspull #\pull |
166 | mov r4, r4, push #\push | 166 | mov r4, r4, lspush #\push |
167 | orr r4, r4, r3, pull #\pull | 167 | orr r4, r4, r3, lspull #\pull |
168 | stmdb r0!, {r4 - r9, ip, lr} | 168 | stmdb r0!, {r4 - r9, ip, lr} |
169 | bge 12b | 169 | bge 12b |
170 | PLD( cmn r2, #96 ) | 170 | PLD( cmn r2, #96 ) |
@@ -175,10 +175,10 @@ ENTRY(memmove) | |||
175 | 14: ands ip, r2, #28 | 175 | 14: ands ip, r2, #28 |
176 | beq 16f | 176 | beq 16f |
177 | 177 | ||
178 | 15: mov lr, r3, push #\push | 178 | 15: mov lr, r3, lspush #\push |
179 | ldr r3, [r1, #-4]! | 179 | ldr r3, [r1, #-4]! |
180 | subs ip, ip, #4 | 180 | subs ip, ip, #4 |
181 | orr lr, lr, r3, pull #\pull | 181 | orr lr, lr, r3, lspull #\pull |
182 | str lr, [r0, #-4]! | 182 | str lr, [r0, #-4]! |
183 | bgt 15b | 183 | bgt 15b |
184 | CALGN( cmp r2, #0 ) | 184 | CALGN( cmp r2, #0 ) |
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index 5c908b1cb8ed..e50520904b76 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S | |||
@@ -117,9 +117,9 @@ USER( TUSER( strgtb) r3, [r0], #1) @ May fault | |||
117 | .Lc2u_1fupi: subs r2, r2, #4 | 117 | .Lc2u_1fupi: subs r2, r2, #4 |
118 | addmi ip, r2, #4 | 118 | addmi ip, r2, #4 |
119 | bmi .Lc2u_1nowords | 119 | bmi .Lc2u_1nowords |
120 | mov r3, r7, pull #8 | 120 | mov r3, r7, lspull #8 |
121 | ldr r7, [r1], #4 | 121 | ldr r7, [r1], #4 |
122 | orr r3, r3, r7, push #24 | 122 | orr r3, r3, r7, lspush #24 |
123 | USER( TUSER( str) r3, [r0], #4) @ May fault | 123 | USER( TUSER( str) r3, [r0], #4) @ May fault |
124 | mov ip, r0, lsl #32 - PAGE_SHIFT | 124 | mov ip, r0, lsl #32 - PAGE_SHIFT |
125 | rsb ip, ip, #0 | 125 | rsb ip, ip, #0 |
@@ -131,30 +131,30 @@ USER( TUSER( str) r3, [r0], #4) @ May fault | |||
131 | subs ip, ip, #16 | 131 | subs ip, ip, #16 |
132 | blt .Lc2u_1rem8lp | 132 | blt .Lc2u_1rem8lp |
133 | 133 | ||
134 | .Lc2u_1cpy8lp: mov r3, r7, pull #8 | 134 | .Lc2u_1cpy8lp: mov r3, r7, lspull #8 |
135 | ldmia r1!, {r4 - r7} | 135 | ldmia r1!, {r4 - r7} |
136 | subs ip, ip, #16 | 136 | subs ip, ip, #16 |
137 | orr r3, r3, r4, push #24 | 137 | orr r3, r3, r4, lspush #24 |
138 | mov r4, r4, pull #8 | 138 | mov r4, r4, lspull #8 |
139 | orr r4, r4, r5, push #24 | 139 | orr r4, r4, r5, lspush #24 |
140 | mov r5, r5, pull #8 | 140 | mov r5, r5, lspull #8 |
141 | orr r5, r5, r6, push #24 | 141 | orr r5, r5, r6, lspush #24 |
142 | mov r6, r6, pull #8 | 142 | mov r6, r6, lspull #8 |
143 | orr r6, r6, r7, push #24 | 143 | orr r6, r6, r7, lspush #24 |
144 | stmia r0!, {r3 - r6} @ Shouldnt fault | 144 | stmia r0!, {r3 - r6} @ Shouldnt fault |
145 | bpl .Lc2u_1cpy8lp | 145 | bpl .Lc2u_1cpy8lp |
146 | 146 | ||
147 | .Lc2u_1rem8lp: tst ip, #8 | 147 | .Lc2u_1rem8lp: tst ip, #8 |
148 | movne r3, r7, pull #8 | 148 | movne r3, r7, lspull #8 |
149 | ldmneia r1!, {r4, r7} | 149 | ldmneia r1!, {r4, r7} |
150 | orrne r3, r3, r4, push #24 | 150 | orrne r3, r3, r4, lspush #24 |
151 | movne r4, r4, pull #8 | 151 | movne r4, r4, lspull #8 |
152 | orrne r4, r4, r7, push #24 | 152 | orrne r4, r4, r7, lspush #24 |
153 | stmneia r0!, {r3 - r4} @ Shouldnt fault | 153 | stmneia r0!, {r3 - r4} @ Shouldnt fault |
154 | tst ip, #4 | 154 | tst ip, #4 |
155 | movne r3, r7, pull #8 | 155 | movne r3, r7, lspull #8 |
156 | ldrne r7, [r1], #4 | 156 | ldrne r7, [r1], #4 |
157 | orrne r3, r3, r7, push #24 | 157 | orrne r3, r3, r7, lspush #24 |
158 | TUSER( strne) r3, [r0], #4 @ Shouldnt fault | 158 | TUSER( strne) r3, [r0], #4 @ Shouldnt fault |
159 | ands ip, ip, #3 | 159 | ands ip, ip, #3 |
160 | beq .Lc2u_1fupi | 160 | beq .Lc2u_1fupi |
@@ -172,9 +172,9 @@ USER( TUSER( strgtb) r3, [r0], #1) @ May fault | |||
172 | .Lc2u_2fupi: subs r2, r2, #4 | 172 | .Lc2u_2fupi: subs r2, r2, #4 |
173 | addmi ip, r2, #4 | 173 | addmi ip, r2, #4 |
174 | bmi .Lc2u_2nowords | 174 | bmi .Lc2u_2nowords |
175 | mov r3, r7, pull #16 | 175 | mov r3, r7, lspull #16 |
176 | ldr r7, [r1], #4 | 176 | ldr r7, [r1], #4 |
177 | orr r3, r3, r7, push #16 | 177 | orr r3, r3, r7, lspush #16 |
178 | USER( TUSER( str) r3, [r0], #4) @ May fault | 178 | USER( TUSER( str) r3, [r0], #4) @ May fault |
179 | mov ip, r0, lsl #32 - PAGE_SHIFT | 179 | mov ip, r0, lsl #32 - PAGE_SHIFT |
180 | rsb ip, ip, #0 | 180 | rsb ip, ip, #0 |
@@ -186,30 +186,30 @@ USER( TUSER( str) r3, [r0], #4) @ May fault | |||
186 | subs ip, ip, #16 | 186 | subs ip, ip, #16 |
187 | blt .Lc2u_2rem8lp | 187 | blt .Lc2u_2rem8lp |
188 | 188 | ||
189 | .Lc2u_2cpy8lp: mov r3, r7, pull #16 | 189 | .Lc2u_2cpy8lp: mov r3, r7, lspull #16 |
190 | ldmia r1!, {r4 - r7} | 190 | ldmia r1!, {r4 - r7} |
191 | subs ip, ip, #16 | 191 | subs ip, ip, #16 |
192 | orr r3, r3, r4, push #16 | 192 | orr r3, r3, r4, lspush #16 |
193 | mov r4, r4, pull #16 | 193 | mov r4, r4, lspull #16 |
194 | orr r4, r4, r5, push #16 | 194 | orr r4, r4, r5, lspush #16 |
195 | mov r5, r5, pull #16 | 195 | mov r5, r5, lspull #16 |
196 | orr r5, r5, r6, push #16 | 196 | orr r5, r5, r6, lspush #16 |
197 | mov r6, r6, pull #16 | 197 | mov r6, r6, lspull #16 |
198 | orr r6, r6, r7, push #16 | 198 | orr r6, r6, r7, lspush #16 |
199 | stmia r0!, {r3 - r6} @ Shouldnt fault | 199 | stmia r0!, {r3 - r6} @ Shouldnt fault |
200 | bpl .Lc2u_2cpy8lp | 200 | bpl .Lc2u_2cpy8lp |
201 | 201 | ||
202 | .Lc2u_2rem8lp: tst ip, #8 | 202 | .Lc2u_2rem8lp: tst ip, #8 |
203 | movne r3, r7, pull #16 | 203 | movne r3, r7, lspull #16 |
204 | ldmneia r1!, {r4, r7} | 204 | ldmneia r1!, {r4, r7} |
205 | orrne r3, r3, r4, push #16 | 205 | orrne r3, r3, r4, lspush #16 |
206 | movne r4, r4, pull #16 | 206 | movne r4, r4, lspull #16 |
207 | orrne r4, r4, r7, push #16 | 207 | orrne r4, r4, r7, lspush #16 |
208 | stmneia r0!, {r3 - r4} @ Shouldnt fault | 208 | stmneia r0!, {r3 - r4} @ Shouldnt fault |
209 | tst ip, #4 | 209 | tst ip, #4 |
210 | movne r3, r7, pull #16 | 210 | movne r3, r7, lspull #16 |
211 | ldrne r7, [r1], #4 | 211 | ldrne r7, [r1], #4 |
212 | orrne r3, r3, r7, push #16 | 212 | orrne r3, r3, r7, lspush #16 |
213 | TUSER( strne) r3, [r0], #4 @ Shouldnt fault | 213 | TUSER( strne) r3, [r0], #4 @ Shouldnt fault |
214 | ands ip, ip, #3 | 214 | ands ip, ip, #3 |
215 | beq .Lc2u_2fupi | 215 | beq .Lc2u_2fupi |
@@ -227,9 +227,9 @@ USER( TUSER( strgtb) r3, [r0], #1) @ May fault | |||
227 | .Lc2u_3fupi: subs r2, r2, #4 | 227 | .Lc2u_3fupi: subs r2, r2, #4 |
228 | addmi ip, r2, #4 | 228 | addmi ip, r2, #4 |
229 | bmi .Lc2u_3nowords | 229 | bmi .Lc2u_3nowords |
230 | mov r3, r7, pull #24 | 230 | mov r3, r7, lspull #24 |
231 | ldr r7, [r1], #4 | 231 | ldr r7, [r1], #4 |
232 | orr r3, r3, r7, push #8 | 232 | orr r3, r3, r7, lspush #8 |
233 | USER( TUSER( str) r3, [r0], #4) @ May fault | 233 | USER( TUSER( str) r3, [r0], #4) @ May fault |
234 | mov ip, r0, lsl #32 - PAGE_SHIFT | 234 | mov ip, r0, lsl #32 - PAGE_SHIFT |
235 | rsb ip, ip, #0 | 235 | rsb ip, ip, #0 |
@@ -241,30 +241,30 @@ USER( TUSER( str) r3, [r0], #4) @ May fault | |||
241 | subs ip, ip, #16 | 241 | subs ip, ip, #16 |
242 | blt .Lc2u_3rem8lp | 242 | blt .Lc2u_3rem8lp |
243 | 243 | ||
244 | .Lc2u_3cpy8lp: mov r3, r7, pull #24 | 244 | .Lc2u_3cpy8lp: mov r3, r7, lspull #24 |
245 | ldmia r1!, {r4 - r7} | 245 | ldmia r1!, {r4 - r7} |
246 | subs ip, ip, #16 | 246 | subs ip, ip, #16 |
247 | orr r3, r3, r4, push #8 | 247 | orr r3, r3, r4, lspush #8 |
248 | mov r4, r4, pull #24 | 248 | mov r4, r4, lspull #24 |
249 | orr r4, r4, r5, push #8 | 249 | orr r4, r4, r5, lspush #8 |
250 | mov r5, r5, pull #24 | 250 | mov r5, r5, lspull #24 |
251 | orr r5, r5, r6, push #8 | 251 | orr r5, r5, r6, lspush #8 |
252 | mov r6, r6, pull #24 | 252 | mov r6, r6, lspull #24 |
253 | orr r6, r6, r7, push #8 | 253 | orr r6, r6, r7, lspush #8 |
254 | stmia r0!, {r3 - r6} @ Shouldnt fault | 254 | stmia r0!, {r3 - r6} @ Shouldnt fault |
255 | bpl .Lc2u_3cpy8lp | 255 | bpl .Lc2u_3cpy8lp |
256 | 256 | ||
257 | .Lc2u_3rem8lp: tst ip, #8 | 257 | .Lc2u_3rem8lp: tst ip, #8 |
258 | movne r3, r7, pull #24 | 258 | movne r3, r7, lspull #24 |
259 | ldmneia r1!, {r4, r7} | 259 | ldmneia r1!, {r4, r7} |
260 | orrne r3, r3, r4, push #8 | 260 | orrne r3, r3, r4, lspush #8 |
261 | movne r4, r4, pull #24 | 261 | movne r4, r4, lspull #24 |
262 | orrne r4, r4, r7, push #8 | 262 | orrne r4, r4, r7, lspush #8 |
263 | stmneia r0!, {r3 - r4} @ Shouldnt fault | 263 | stmneia r0!, {r3 - r4} @ Shouldnt fault |
264 | tst ip, #4 | 264 | tst ip, #4 |
265 | movne r3, r7, pull #24 | 265 | movne r3, r7, lspull #24 |
266 | ldrne r7, [r1], #4 | 266 | ldrne r7, [r1], #4 |
267 | orrne r3, r3, r7, push #8 | 267 | orrne r3, r3, r7, lspush #8 |
268 | TUSER( strne) r3, [r0], #4 @ Shouldnt fault | 268 | TUSER( strne) r3, [r0], #4 @ Shouldnt fault |
269 | ands ip, ip, #3 | 269 | ands ip, ip, #3 |
270 | beq .Lc2u_3fupi | 270 | beq .Lc2u_3fupi |
@@ -382,9 +382,9 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault | |||
382 | .Lcfu_1fupi: subs r2, r2, #4 | 382 | .Lcfu_1fupi: subs r2, r2, #4 |
383 | addmi ip, r2, #4 | 383 | addmi ip, r2, #4 |
384 | bmi .Lcfu_1nowords | 384 | bmi .Lcfu_1nowords |
385 | mov r3, r7, pull #8 | 385 | mov r3, r7, lspull #8 |
386 | USER( TUSER( ldr) r7, [r1], #4) @ May fault | 386 | USER( TUSER( ldr) r7, [r1], #4) @ May fault |
387 | orr r3, r3, r7, push #24 | 387 | orr r3, r3, r7, lspush #24 |
388 | str r3, [r0], #4 | 388 | str r3, [r0], #4 |
389 | mov ip, r1, lsl #32 - PAGE_SHIFT | 389 | mov ip, r1, lsl #32 - PAGE_SHIFT |
390 | rsb ip, ip, #0 | 390 | rsb ip, ip, #0 |
@@ -396,30 +396,30 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault | |||
396 | subs ip, ip, #16 | 396 | subs ip, ip, #16 |
397 | blt .Lcfu_1rem8lp | 397 | blt .Lcfu_1rem8lp |
398 | 398 | ||
399 | .Lcfu_1cpy8lp: mov r3, r7, pull #8 | 399 | .Lcfu_1cpy8lp: mov r3, r7, lspull #8 |
400 | ldmia r1!, {r4 - r7} @ Shouldnt fault | 400 | ldmia r1!, {r4 - r7} @ Shouldnt fault |
401 | subs ip, ip, #16 | 401 | subs ip, ip, #16 |
402 | orr r3, r3, r4, push #24 | 402 | orr r3, r3, r4, lspush #24 |
403 | mov r4, r4, pull #8 | 403 | mov r4, r4, lspull #8 |
404 | orr r4, r4, r5, push #24 | 404 | orr r4, r4, r5, lspush #24 |
405 | mov r5, r5, pull #8 | 405 | mov r5, r5, lspull #8 |
406 | orr r5, r5, r6, push #24 | 406 | orr r5, r5, r6, lspush #24 |
407 | mov r6, r6, pull #8 | 407 | mov r6, r6, lspull #8 |
408 | orr r6, r6, r7, push #24 | 408 | orr r6, r6, r7, lspush #24 |
409 | stmia r0!, {r3 - r6} | 409 | stmia r0!, {r3 - r6} |
410 | bpl .Lcfu_1cpy8lp | 410 | bpl .Lcfu_1cpy8lp |
411 | 411 | ||
412 | .Lcfu_1rem8lp: tst ip, #8 | 412 | .Lcfu_1rem8lp: tst ip, #8 |
413 | movne r3, r7, pull #8 | 413 | movne r3, r7, lspull #8 |
414 | ldmneia r1!, {r4, r7} @ Shouldnt fault | 414 | ldmneia r1!, {r4, r7} @ Shouldnt fault |
415 | orrne r3, r3, r4, push #24 | 415 | orrne r3, r3, r4, lspush #24 |
416 | movne r4, r4, pull #8 | 416 | movne r4, r4, lspull #8 |
417 | orrne r4, r4, r7, push #24 | 417 | orrne r4, r4, r7, lspush #24 |
418 | stmneia r0!, {r3 - r4} | 418 | stmneia r0!, {r3 - r4} |
419 | tst ip, #4 | 419 | tst ip, #4 |
420 | movne r3, r7, pull #8 | 420 | movne r3, r7, lspull #8 |
421 | USER( TUSER( ldrne) r7, [r1], #4) @ May fault | 421 | USER( TUSER( ldrne) r7, [r1], #4) @ May fault |
422 | orrne r3, r3, r7, push #24 | 422 | orrne r3, r3, r7, lspush #24 |
423 | strne r3, [r0], #4 | 423 | strne r3, [r0], #4 |
424 | ands ip, ip, #3 | 424 | ands ip, ip, #3 |
425 | beq .Lcfu_1fupi | 425 | beq .Lcfu_1fupi |
@@ -437,9 +437,9 @@ USER( TUSER( ldrne) r7, [r1], #4) @ May fault | |||
437 | .Lcfu_2fupi: subs r2, r2, #4 | 437 | .Lcfu_2fupi: subs r2, r2, #4 |
438 | addmi ip, r2, #4 | 438 | addmi ip, r2, #4 |
439 | bmi .Lcfu_2nowords | 439 | bmi .Lcfu_2nowords |
440 | mov r3, r7, pull #16 | 440 | mov r3, r7, lspull #16 |
441 | USER( TUSER( ldr) r7, [r1], #4) @ May fault | 441 | USER( TUSER( ldr) r7, [r1], #4) @ May fault |
442 | orr r3, r3, r7, push #16 | 442 | orr r3, r3, r7, lspush #16 |
443 | str r3, [r0], #4 | 443 | str r3, [r0], #4 |
444 | mov ip, r1, lsl #32 - PAGE_SHIFT | 444 | mov ip, r1, lsl #32 - PAGE_SHIFT |
445 | rsb ip, ip, #0 | 445 | rsb ip, ip, #0 |
@@ -452,30 +452,30 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault | |||
452 | blt .Lcfu_2rem8lp | 452 | blt .Lcfu_2rem8lp |
453 | 453 | ||
454 | 454 | ||
455 | .Lcfu_2cpy8lp: mov r3, r7, pull #16 | 455 | .Lcfu_2cpy8lp: mov r3, r7, lspull #16 |
456 | ldmia r1!, {r4 - r7} @ Shouldnt fault | 456 | ldmia r1!, {r4 - r7} @ Shouldnt fault |
457 | subs ip, ip, #16 | 457 | subs ip, ip, #16 |
458 | orr r3, r3, r4, push #16 | 458 | orr r3, r3, r4, lspush #16 |
459 | mov r4, r4, pull #16 | 459 | mov r4, r4, lspull #16 |
460 | orr r4, r4, r5, push #16 | 460 | orr r4, r4, r5, lspush #16 |
461 | mov r5, r5, pull #16 | 461 | mov r5, r5, lspull #16 |
462 | orr r5, r5, r6, push #16 | 462 | orr r5, r5, r6, lspush #16 |
463 | mov r6, r6, pull #16 | 463 | mov r6, r6, lspull #16 |
464 | orr r6, r6, r7, push #16 | 464 | orr r6, r6, r7, lspush #16 |
465 | stmia r0!, {r3 - r6} | 465 | stmia r0!, {r3 - r6} |
466 | bpl .Lcfu_2cpy8lp | 466 | bpl .Lcfu_2cpy8lp |
467 | 467 | ||
468 | .Lcfu_2rem8lp: tst ip, #8 | 468 | .Lcfu_2rem8lp: tst ip, #8 |
469 | movne r3, r7, pull #16 | 469 | movne r3, r7, lspull #16 |
470 | ldmneia r1!, {r4, r7} @ Shouldnt fault | 470 | ldmneia r1!, {r4, r7} @ Shouldnt fault |
471 | orrne r3, r3, r4, push #16 | 471 | orrne r3, r3, r4, lspush #16 |
472 | movne r4, r4, pull #16 | 472 | movne r4, r4, lspull #16 |
473 | orrne r4, r4, r7, push #16 | 473 | orrne r4, r4, r7, lspush #16 |
474 | stmneia r0!, {r3 - r4} | 474 | stmneia r0!, {r3 - r4} |
475 | tst ip, #4 | 475 | tst ip, #4 |
476 | movne r3, r7, pull #16 | 476 | movne r3, r7, lspull #16 |
477 | USER( TUSER( ldrne) r7, [r1], #4) @ May fault | 477 | USER( TUSER( ldrne) r7, [r1], #4) @ May fault |
478 | orrne r3, r3, r7, push #16 | 478 | orrne r3, r3, r7, lspush #16 |
479 | strne r3, [r0], #4 | 479 | strne r3, [r0], #4 |
480 | ands ip, ip, #3 | 480 | ands ip, ip, #3 |
481 | beq .Lcfu_2fupi | 481 | beq .Lcfu_2fupi |
@@ -493,9 +493,9 @@ USER( TUSER( ldrgtb) r3, [r1], #0) @ May fault | |||
493 | .Lcfu_3fupi: subs r2, r2, #4 | 493 | .Lcfu_3fupi: subs r2, r2, #4 |
494 | addmi ip, r2, #4 | 494 | addmi ip, r2, #4 |
495 | bmi .Lcfu_3nowords | 495 | bmi .Lcfu_3nowords |
496 | mov r3, r7, pull #24 | 496 | mov r3, r7, lspull #24 |
497 | USER( TUSER( ldr) r7, [r1], #4) @ May fault | 497 | USER( TUSER( ldr) r7, [r1], #4) @ May fault |
498 | orr r3, r3, r7, push #8 | 498 | orr r3, r3, r7, lspush #8 |
499 | str r3, [r0], #4 | 499 | str r3, [r0], #4 |
500 | mov ip, r1, lsl #32 - PAGE_SHIFT | 500 | mov ip, r1, lsl #32 - PAGE_SHIFT |
501 | rsb ip, ip, #0 | 501 | rsb ip, ip, #0 |
@@ -507,30 +507,30 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault | |||
507 | subs ip, ip, #16 | 507 | subs ip, ip, #16 |
508 | blt .Lcfu_3rem8lp | 508 | blt .Lcfu_3rem8lp |
509 | 509 | ||
510 | .Lcfu_3cpy8lp: mov r3, r7, pull #24 | 510 | .Lcfu_3cpy8lp: mov r3, r7, lspull #24 |
511 | ldmia r1!, {r4 - r7} @ Shouldnt fault | 511 | ldmia r1!, {r4 - r7} @ Shouldnt fault |
512 | orr r3, r3, r4, push #8 | 512 | orr r3, r3, r4, lspush #8 |
513 | mov r4, r4, pull #24 | 513 | mov r4, r4, lspull #24 |
514 | orr r4, r4, r5, push #8 | 514 | orr r4, r4, r5, lspush #8 |
515 | mov r5, r5, pull #24 | 515 | mov r5, r5, lspull #24 |
516 | orr r5, r5, r6, push #8 | 516 | orr r5, r5, r6, lspush #8 |
517 | mov r6, r6, pull #24 | 517 | mov r6, r6, lspull #24 |
518 | orr r6, r6, r7, push #8 | 518 | orr r6, r6, r7, lspush #8 |
519 | stmia r0!, {r3 - r6} | 519 | stmia r0!, {r3 - r6} |
520 | subs ip, ip, #16 | 520 | subs ip, ip, #16 |
521 | bpl .Lcfu_3cpy8lp | 521 | bpl .Lcfu_3cpy8lp |
522 | 522 | ||
523 | .Lcfu_3rem8lp: tst ip, #8 | 523 | .Lcfu_3rem8lp: tst ip, #8 |
524 | movne r3, r7, pull #24 | 524 | movne r3, r7, lspull #24 |
525 | ldmneia r1!, {r4, r7} @ Shouldnt fault | 525 | ldmneia r1!, {r4, r7} @ Shouldnt fault |
526 | orrne r3, r3, r4, push #8 | 526 | orrne r3, r3, r4, lspush #8 |
527 | movne r4, r4, pull #24 | 527 | movne r4, r4, lspull #24 |
528 | orrne r4, r4, r7, push #8 | 528 | orrne r4, r4, r7, lspush #8 |
529 | stmneia r0!, {r3 - r4} | 529 | stmneia r0!, {r3 - r4} |
530 | tst ip, #4 | 530 | tst ip, #4 |
531 | movne r3, r7, pull #24 | 531 | movne r3, r7, lspull #24 |
532 | USER( TUSER( ldrne) r7, [r1], #4) @ May fault | 532 | USER( TUSER( ldrne) r7, [r1], #4) @ May fault |
533 | orrne r3, r3, r7, push #8 | 533 | orrne r3, r3, r7, lspush #8 |
534 | strne r3, [r0], #4 | 534 | strne r3, [r0], #4 |
535 | ands ip, ip, #3 | 535 | ands ip, ip, #3 |
536 | beq .Lcfu_3fupi | 536 | beq .Lcfu_3fupi |
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index e38b279f402c..384dc859e6c6 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -155,7 +155,7 @@ static irqreturn_t cns3xxx_timer_interrupt(int irq, void *dev_id) | |||
155 | 155 | ||
156 | static struct irqaction cns3xxx_timer_irq = { | 156 | static struct irqaction cns3xxx_timer_irq = { |
157 | .name = "timer", | 157 | .name = "timer", |
158 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 158 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
159 | .handler = cns3xxx_timer_interrupt, | 159 | .handler = cns3xxx_timer_interrupt, |
160 | }; | 160 | }; |
161 | 161 | ||
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 68ac934d4565..8254e716b095 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c | |||
@@ -206,7 +206,7 @@ ebsa110_timer_interrupt(int irq, void *dev_id) | |||
206 | 206 | ||
207 | static struct irqaction ebsa110_timer_irq = { | 207 | static struct irqaction ebsa110_timer_irq = { |
208 | .name = "EBSA110 Timer Tick", | 208 | .name = "EBSA110 Timer Tick", |
209 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 209 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
210 | .handler = ebsa110_timer_interrupt, | 210 | .handler = ebsa110_timer_interrupt, |
211 | }; | 211 | }; |
212 | 212 | ||
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index 3971104d32d4..bf7aa7d298e7 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c | |||
@@ -105,7 +105,7 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id) | |||
105 | static struct irqaction footbridge_timer_irq = { | 105 | static struct irqaction footbridge_timer_irq = { |
106 | .name = "dc21285_timer1", | 106 | .name = "dc21285_timer1", |
107 | .handler = timer1_interrupt, | 107 | .handler = timer1_interrupt, |
108 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 108 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
109 | .dev_id = &ckevt_dc21285, | 109 | .dev_id = &ckevt_dc21285, |
110 | }; | 110 | }; |
111 | 111 | ||
@@ -125,7 +125,7 @@ void __init footbridge_timer_init(void) | |||
125 | clockevents_config_and_register(ce, rate, 0x4, 0xffffff); | 125 | clockevents_config_and_register(ce, rate, 0x4, 0xffffff); |
126 | } | 126 | } |
127 | 127 | ||
128 | static u32 notrace footbridge_read_sched_clock(void) | 128 | static u64 notrace footbridge_read_sched_clock(void) |
129 | { | 129 | { |
130 | return ~*CSR_TIMER3_VALUE; | 130 | return ~*CSR_TIMER3_VALUE; |
131 | } | 131 | } |
@@ -138,5 +138,5 @@ void __init footbridge_sched_clock(void) | |||
138 | *CSR_TIMER3_CLR = 0; | 138 | *CSR_TIMER3_CLR = 0; |
139 | *CSR_TIMER3_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16; | 139 | *CSR_TIMER3_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_DIV16; |
140 | 140 | ||
141 | setup_sched_clock(footbridge_read_sched_clock, 24, rate); | 141 | sched_clock_register(footbridge_read_sched_clock, 24, rate); |
142 | } | 142 | } |
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index 7c2fdae9a38b..96a3d73ef4bf 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c | |||
@@ -334,15 +334,15 @@ void __init dc21285_preinit(void) | |||
334 | /* | 334 | /* |
335 | * We don't care if these fail. | 335 | * We don't care if these fail. |
336 | */ | 336 | */ |
337 | dc21285_request_irq(IRQ_PCI_SERR, dc21285_serr_irq, IRQF_DISABLED, | 337 | dc21285_request_irq(IRQ_PCI_SERR, dc21285_serr_irq, 0, |
338 | "PCI system error", &serr_timer); | 338 | "PCI system error", &serr_timer); |
339 | dc21285_request_irq(IRQ_PCI_PERR, dc21285_parity_irq, IRQF_DISABLED, | 339 | dc21285_request_irq(IRQ_PCI_PERR, dc21285_parity_irq, 0, |
340 | "PCI parity error", &perr_timer); | 340 | "PCI parity error", &perr_timer); |
341 | dc21285_request_irq(IRQ_PCI_ABORT, dc21285_abort_irq, IRQF_DISABLED, | 341 | dc21285_request_irq(IRQ_PCI_ABORT, dc21285_abort_irq, 0, |
342 | "PCI abort", NULL); | 342 | "PCI abort", NULL); |
343 | dc21285_request_irq(IRQ_DISCARD_TIMER, dc21285_discard_irq, IRQF_DISABLED, | 343 | dc21285_request_irq(IRQ_DISCARD_TIMER, dc21285_discard_irq, 0, |
344 | "Discard timer", NULL); | 344 | "Discard timer", NULL); |
345 | dc21285_request_irq(IRQ_PCI_DPERR, dc21285_dparity_irq, IRQF_DISABLED, | 345 | dc21285_request_irq(IRQ_PCI_DPERR, dc21285_dparity_irq, 0, |
346 | "PCI data parity", NULL); | 346 | "PCI data parity", NULL); |
347 | 347 | ||
348 | if (cfn_mode) { | 348 | if (cfn_mode) { |
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c index d9301dd56354..b73f52e196b9 100644 --- a/arch/arm/mach-footbridge/isa-timer.c +++ b/arch/arm/mach-footbridge/isa-timer.c | |||
@@ -27,7 +27,7 @@ static irqreturn_t pit_timer_interrupt(int irq, void *dev_id) | |||
27 | static struct irqaction pit_timer_irq = { | 27 | static struct irqaction pit_timer_irq = { |
28 | .name = "pit", | 28 | .name = "pit", |
29 | .handler = pit_timer_interrupt, | 29 | .handler = pit_timer_interrupt, |
30 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 30 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
31 | .dev_id = &i8253_clockevent, | 31 | .dev_id = &i8253_clockevent, |
32 | }; | 32 | }; |
33 | 33 | ||
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c index 87dff4f5059e..ddf8ec9d203b 100644 --- a/arch/arm/mach-gemini/idle.c +++ b/arch/arm/mach-gemini/idle.c | |||
@@ -3,7 +3,7 @@ | |||
3 | */ | 3 | */ |
4 | 4 | ||
5 | #include <linux/init.h> | 5 | #include <linux/init.h> |
6 | #include <asm/system.h> | 6 | #include <asm/system_misc.h> |
7 | #include <asm/proc-fns.h> | 7 | #include <asm/proc-fns.h> |
8 | 8 | ||
9 | static void gemini_idle(void) | 9 | static void gemini_idle(void) |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 17c0fe627435..e4f27f0e56ac 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
@@ -358,7 +358,7 @@ static struct clock_event_device integrator_clockevent = { | |||
358 | 358 | ||
359 | static struct irqaction integrator_timer_irq = { | 359 | static struct irqaction integrator_timer_irq = { |
360 | .name = "timer", | 360 | .name = "timer", |
361 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 361 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
362 | .handler = integrator_timer_interrupt, | 362 | .handler = integrator_timer_interrupt, |
363 | .dev_id = &integrator_clockevent, | 363 | .dev_id = &integrator_clockevent, |
364 | }; | 364 | }; |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..a465f27bc263 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -312,7 +312,7 @@ static irqreturn_t ixp4xx_timer_interrupt(int irq, void *dev_id) | |||
312 | 312 | ||
313 | static struct irqaction ixp4xx_timer_irq = { | 313 | static struct irqaction ixp4xx_timer_irq = { |
314 | .name = "timer1", | 314 | .name = "timer1", |
315 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 315 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
316 | .handler = ixp4xx_timer_interrupt, | 316 | .handler = ixp4xx_timer_interrupt, |
317 | .dev_id = &clockevent_ixp4xx, | 317 | .dev_id = &clockevent_ixp4xx, |
318 | }; | 318 | }; |
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c index 736dc692d540..43ee06d3abe5 100644 --- a/arch/arm/mach-ixp4xx/dsmg600-setup.c +++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c | |||
@@ -233,8 +233,7 @@ static int __init dsmg600_gpio_init(void) | |||
233 | 233 | ||
234 | gpio_request(DSMG600_RB_GPIO, "reset button"); | 234 | gpio_request(DSMG600_RB_GPIO, "reset button"); |
235 | if (request_irq(gpio_to_irq(DSMG600_RB_GPIO), &dsmg600_reset_handler, | 235 | if (request_irq(gpio_to_irq(DSMG600_RB_GPIO), &dsmg600_reset_handler, |
236 | IRQF_DISABLED | IRQF_TRIGGER_LOW, | 236 | IRQF_TRIGGER_LOW, "DSM-G600 reset button", NULL) < 0) { |
237 | "DSM-G600 reset button", NULL) < 0) { | ||
238 | 237 | ||
239 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", | 238 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", |
240 | gpio_to_irq(DSMG600_RB_GPIO)); | 239 | gpio_to_irq(DSMG600_RB_GPIO)); |
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c index 429966b756ed..5c4b0c4a1b37 100644 --- a/arch/arm/mach-ixp4xx/fsg-setup.c +++ b/arch/arm/mach-ixp4xx/fsg-setup.c | |||
@@ -208,16 +208,14 @@ static void __init fsg_init(void) | |||
208 | platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices)); | 208 | platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices)); |
209 | 209 | ||
210 | if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler, | 210 | if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler, |
211 | IRQF_DISABLED | IRQF_TRIGGER_LOW, | 211 | IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) { |
212 | "FSG reset button", NULL) < 0) { | ||
213 | 212 | ||
214 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", | 213 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", |
215 | gpio_to_irq(FSG_RB_GPIO)); | 214 | gpio_to_irq(FSG_RB_GPIO)); |
216 | } | 215 | } |
217 | 216 | ||
218 | if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler, | 217 | if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler, |
219 | IRQF_DISABLED | IRQF_TRIGGER_LOW, | 218 | IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) { |
220 | "FSG power button", NULL) < 0) { | ||
221 | 219 | ||
222 | printk(KERN_DEBUG "Power Button IRQ %d not available\n", | 220 | printk(KERN_DEBUG "Power Button IRQ %d not available\n", |
223 | gpio_to_irq(FSG_SB_GPIO)); | 221 | gpio_to_irq(FSG_SB_GPIO)); |
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c index 507cb5233537..4e0f762bc651 100644 --- a/arch/arm/mach-ixp4xx/nas100d-setup.c +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c | |||
@@ -295,8 +295,7 @@ static void __init nas100d_init(void) | |||
295 | pm_power_off = nas100d_power_off; | 295 | pm_power_off = nas100d_power_off; |
296 | 296 | ||
297 | if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler, | 297 | if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler, |
298 | IRQF_DISABLED | IRQF_TRIGGER_LOW, | 298 | IRQF_TRIGGER_LOW, "NAS100D reset button", NULL) < 0) { |
299 | "NAS100D reset button", NULL) < 0) { | ||
300 | 299 | ||
301 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", | 300 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", |
302 | gpio_to_irq(NAS100D_RB_GPIO)); | 301 | gpio_to_irq(NAS100D_RB_GPIO)); |
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c index ba5f1cda2a9d..88c025f52d8d 100644 --- a/arch/arm/mach-ixp4xx/nslu2-setup.c +++ b/arch/arm/mach-ixp4xx/nslu2-setup.c | |||
@@ -265,16 +265,14 @@ static void __init nslu2_init(void) | |||
265 | pm_power_off = nslu2_power_off; | 265 | pm_power_off = nslu2_power_off; |
266 | 266 | ||
267 | if (request_irq(gpio_to_irq(NSLU2_RB_GPIO), &nslu2_reset_handler, | 267 | if (request_irq(gpio_to_irq(NSLU2_RB_GPIO), &nslu2_reset_handler, |
268 | IRQF_DISABLED | IRQF_TRIGGER_LOW, | 268 | IRQF_TRIGGER_LOW, "NSLU2 reset button", NULL) < 0) { |
269 | "NSLU2 reset button", NULL) < 0) { | ||
270 | 269 | ||
271 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", | 270 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", |
272 | gpio_to_irq(NSLU2_RB_GPIO)); | 271 | gpio_to_irq(NSLU2_RB_GPIO)); |
273 | } | 272 | } |
274 | 273 | ||
275 | if (request_irq(gpio_to_irq(NSLU2_PB_GPIO), &nslu2_power_handler, | 274 | if (request_irq(gpio_to_irq(NSLU2_PB_GPIO), &nslu2_power_handler, |
276 | IRQF_DISABLED | IRQF_TRIGGER_HIGH, | 275 | IRQF_TRIGGER_HIGH, "NSLU2 power button", NULL) < 0) { |
277 | "NSLU2 power button", NULL) < 0) { | ||
278 | 276 | ||
279 | printk(KERN_DEBUG "Power Button IRQ %d not available\n", | 277 | printk(KERN_DEBUG "Power Button IRQ %d not available\n", |
280 | gpio_to_irq(NSLU2_PB_GPIO)); | 278 | gpio_to_irq(NSLU2_PB_GPIO)); |
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index 426c97662f5b..a197874bf382 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c | |||
@@ -122,7 +122,7 @@ static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id) | |||
122 | 122 | ||
123 | static struct irqaction ks8695_timer_irq = { | 123 | static struct irqaction ks8695_timer_irq = { |
124 | .name = "ks8695_tick", | 124 | .name = "ks8695_tick", |
125 | .flags = IRQF_DISABLED | IRQF_TIMER, | 125 | .flags = IRQF_TIMER, |
126 | .handler = ks8695_timer_interrupt, | 126 | .handler = ks8695_timer_interrupt, |
127 | }; | 127 | }; |
128 | 128 | ||
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c index 20eab63d10ba..4e5837299c04 100644 --- a/arch/arm/mach-lpc32xx/timer.c +++ b/arch/arm/mach-lpc32xx/timer.c | |||
@@ -90,7 +90,7 @@ static irqreturn_t lpc32xx_timer_interrupt(int irq, void *dev_id) | |||
90 | 90 | ||
91 | static struct irqaction lpc32xx_timer_irq = { | 91 | static struct irqaction lpc32xx_timer_irq = { |
92 | .name = "LPC32XX Timer Tick", | 92 | .name = "LPC32XX Timer Tick", |
93 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 93 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
94 | .handler = lpc32xx_timer_interrupt, | 94 | .handler = lpc32xx_timer_interrupt, |
95 | }; | 95 | }; |
96 | 96 | ||
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 024022d91fe3..bbcd2322fd27 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c | |||
@@ -186,7 +186,7 @@ static void __init timer_config(void) | |||
186 | 186 | ||
187 | static struct irqaction timer_irq = { | 187 | static struct irqaction timer_irq = { |
188 | .name = "timer", | 188 | .name = "timer", |
189 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 189 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
190 | .handler = timer_interrupt, | 190 | .handler = timer_interrupt, |
191 | .dev_id = &ckevt, | 191 | .dev_id = &ckevt, |
192 | }; | 192 | }; |
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c index 6df42e643031..3177c7a40930 100644 --- a/arch/arm/mach-netx/time.c +++ b/arch/arm/mach-netx/time.c | |||
@@ -99,7 +99,7 @@ netx_timer_interrupt(int irq, void *dev_id) | |||
99 | 99 | ||
100 | static struct irqaction netx_timer_irq = { | 100 | static struct irqaction netx_timer_irq = { |
101 | .name = "NetX Timer Tick", | 101 | .name = "NetX Timer Tick", |
102 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 102 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
103 | .handler = netx_timer_interrupt, | 103 | .handler = netx_timer_interrupt, |
104 | }; | 104 | }; |
105 | 105 | ||
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c index 25b79a297365..6a6935caac1e 100644 --- a/arch/arm/mach-omap2/am35xx-emac.c +++ b/arch/arm/mach-omap2/am35xx-emac.c | |||
@@ -17,7 +17,6 @@ | |||
17 | 17 | ||
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/davinci_emac.h> | 19 | #include <linux/davinci_emac.h> |
20 | #include <asm/system.h> | ||
21 | #include "omap_device.h" | 20 | #include "omap_device.h" |
22 | #include "am35xx.h" | 21 | #include "am35xx.h" |
23 | #include "control.h" | 22 | #include "control.h" |
diff --git a/arch/arm/mach-rpc/dma.c b/arch/arm/mach-rpc/dma.c index 85883b2e0e49..6d3517dc4772 100644 --- a/arch/arm/mach-rpc/dma.c +++ b/arch/arm/mach-rpc/dma.c | |||
@@ -141,7 +141,7 @@ static int iomd_request_dma(unsigned int chan, dma_t *dma) | |||
141 | struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); | 141 | struct iomd_dma *idma = container_of(dma, struct iomd_dma, dma); |
142 | 142 | ||
143 | return request_irq(idma->irq, iomd_dma_handle, | 143 | return request_irq(idma->irq, iomd_dma_handle, |
144 | IRQF_DISABLED, idma->dma.device_id, idma); | 144 | 0, idma->dma.device_id, idma); |
145 | } | 145 | } |
146 | 146 | ||
147 | static void iomd_free_dma(unsigned int chan, dma_t *dma) | 147 | static void iomd_free_dma(unsigned int chan, dma_t *dma) |
diff --git a/arch/arm/mach-rpc/time.c b/arch/arm/mach-rpc/time.c index 9a6def14df01..9a5158861ca9 100644 --- a/arch/arm/mach-rpc/time.c +++ b/arch/arm/mach-rpc/time.c | |||
@@ -75,7 +75,6 @@ ioc_timer_interrupt(int irq, void *dev_id) | |||
75 | 75 | ||
76 | static struct irqaction ioc_timer_irq = { | 76 | static struct irqaction ioc_timer_irq = { |
77 | .name = "timer", | 77 | .name = "timer", |
78 | .flags = IRQF_DISABLED, | ||
79 | .handler = ioc_timer_interrupt | 78 | .handler = ioc_timer_interrupt |
80 | }; | 79 | }; |
81 | 80 | ||
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 6fd4acb8f187..4852c08cb526 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -112,7 +112,7 @@ static struct clock_event_device ckevt_sa1100_osmr0 = { | |||
112 | 112 | ||
113 | static struct irqaction sa1100_timer_irq = { | 113 | static struct irqaction sa1100_timer_irq = { |
114 | .name = "ost0", | 114 | .name = "ost0", |
115 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 115 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
116 | .handler = sa1100_ost0_interrupt, | 116 | .handler = sa1100_ost0_interrupt, |
117 | .dev_id = &ckevt_sa1100_osmr0, | 117 | .dev_id = &ckevt_sa1100_osmr0, |
118 | }; | 118 | }; |
diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c index d449673e40f7..218ba5b67d92 100644 --- a/arch/arm/mach-spear/time.c +++ b/arch/arm/mach-spear/time.c | |||
@@ -172,7 +172,7 @@ static irqreturn_t spear_timer_interrupt(int irq, void *dev_id) | |||
172 | 172 | ||
173 | static struct irqaction spear_timer_irq = { | 173 | static struct irqaction spear_timer_irq = { |
174 | .name = "timer", | 174 | .name = "timer", |
175 | .flags = IRQF_DISABLED | IRQF_TIMER, | 175 | .flags = IRQF_TIMER, |
176 | .handler = spear_timer_interrupt | 176 | .handler = spear_timer_interrupt |
177 | }; | 177 | }; |
178 | 178 | ||
diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile index 0997e0b7494c..fc649bc09d0c 100644 --- a/arch/arm/mach-vexpress/Makefile +++ b/arch/arm/mach-vexpress/Makefile | |||
@@ -8,8 +8,11 @@ obj-y := v2m.o | |||
8 | obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o | 8 | obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o |
9 | obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o | 9 | obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o |
10 | CFLAGS_dcscb.o += -march=armv7-a | 10 | CFLAGS_dcscb.o += -march=armv7-a |
11 | CFLAGS_REMOVE_dcscb.o = -pg | ||
11 | obj-$(CONFIG_ARCH_VEXPRESS_SPC) += spc.o | 12 | obj-$(CONFIG_ARCH_VEXPRESS_SPC) += spc.o |
13 | CFLAGS_REMOVE_spc.o = -pg | ||
12 | obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o | 14 | obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o |
13 | CFLAGS_tc2_pm.o += -march=armv7-a | 15 | CFLAGS_tc2_pm.o += -march=armv7-a |
16 | CFLAGS_REMOVE_tc2_pm.o = -pg | ||
14 | obj-$(CONFIG_SMP) += platsmp.o | 17 | obj-$(CONFIG_SMP) += platsmp.o |
15 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | 18 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o |
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c index 30fbca844575..9230d3725599 100644 --- a/arch/arm/mach-w90x900/time.c +++ b/arch/arm/mach-w90x900/time.c | |||
@@ -111,7 +111,7 @@ static irqreturn_t nuc900_timer0_interrupt(int irq, void *dev_id) | |||
111 | 111 | ||
112 | static struct irqaction nuc900_timer0_irq = { | 112 | static struct irqaction nuc900_timer0_irq = { |
113 | .name = "nuc900-timer0", | 113 | .name = "nuc900-timer0", |
114 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 114 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
115 | .handler = nuc900_timer0_interrupt, | 115 | .handler = nuc900_timer0_interrupt, |
116 | }; | 116 | }; |
117 | 117 | ||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 1f8fed94c2a4..ca8ecdee47d8 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -446,7 +446,6 @@ config CPU_32v5 | |||
446 | 446 | ||
447 | config CPU_32v6 | 447 | config CPU_32v6 |
448 | bool | 448 | bool |
449 | select CPU_USE_DOMAINS if CPU_V6 && MMU | ||
450 | select TLS_REG_EMUL if !CPU_32v6K && !MMU | 449 | select TLS_REG_EMUL if !CPU_32v6K && !MMU |
451 | 450 | ||
452 | config CPU_32v6K | 451 | config CPU_32v6K |
@@ -671,7 +670,7 @@ config ARM_VIRT_EXT | |||
671 | 670 | ||
672 | config SWP_EMULATE | 671 | config SWP_EMULATE |
673 | bool "Emulate SWP/SWPB instructions" | 672 | bool "Emulate SWP/SWPB instructions" |
674 | depends on !CPU_USE_DOMAINS && CPU_V7 | 673 | depends on CPU_V7 |
675 | default y if SMP | 674 | default y if SMP |
676 | select HAVE_PROC_CPU if PROC_FS | 675 | select HAVE_PROC_CPU if PROC_FS |
677 | help | 676 | help |
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 48bc3c0a87ce..aae891820f8f 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c | |||
@@ -331,7 +331,9 @@ static void __init enable_l2(void) | |||
331 | enable_icache(); | 331 | enable_icache(); |
332 | if (d) | 332 | if (d) |
333 | enable_dcache(); | 333 | enable_dcache(); |
334 | } | 334 | } else |
335 | pr_err(FW_BUG | ||
336 | "Feroceon L2: bootloader left the L2 cache on!\n"); | ||
335 | } | 337 | } |
336 | 338 | ||
337 | void __init feroceon_l2_init(int __l2_wt_override) | 339 | void __init feroceon_l2_init(int __l2_wt_override) |
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 11b3914660d2..c9c6acdf90cc 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c | |||
@@ -284,9 +284,6 @@ static void __dma_free_buffer(struct page *page, size_t size) | |||
284 | } | 284 | } |
285 | 285 | ||
286 | #ifdef CONFIG_MMU | 286 | #ifdef CONFIG_MMU |
287 | #ifdef CONFIG_HUGETLB_PAGE | ||
288 | #warning ARM Coherent DMA allocator does not (yet) support huge TLB | ||
289 | #endif | ||
290 | 287 | ||
291 | static void *__alloc_from_contiguous(struct device *dev, size_t size, | 288 | static void *__alloc_from_contiguous(struct device *dev, size_t size, |
292 | pgprot_t prot, struct page **ret_page, | 289 | pgprot_t prot, struct page **ret_page, |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index a623cb3ad012..b68c6b22e1c8 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -516,6 +516,16 @@ static void __init build_mem_type_table(void) | |||
516 | s2_device_pgprot = mem_types[MT_DEVICE].prot_pte_s2; | 516 | s2_device_pgprot = mem_types[MT_DEVICE].prot_pte_s2; |
517 | 517 | ||
518 | /* | 518 | /* |
519 | * We don't use domains on ARMv6 (since this causes problems with | ||
520 | * v6/v7 kernels), so we must use a separate memory type for user | ||
521 | * r/o, kernel r/w to map the vectors page. | ||
522 | */ | ||
523 | #ifndef CONFIG_ARM_LPAE | ||
524 | if (cpu_arch == CPU_ARCH_ARMv6) | ||
525 | vecs_pgprot |= L_PTE_MT_VECTORS; | ||
526 | #endif | ||
527 | |||
528 | /* | ||
519 | * ARMv6 and above have extended page tables. | 529 | * ARMv6 and above have extended page tables. |
520 | */ | 530 | */ |
521 | if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) { | 531 | if (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP)) { |
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index e3c48a3fe063..ee1d80593958 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S | |||
@@ -112,13 +112,9 @@ | |||
112 | * 100x 1 0 1 r/o no acc | 112 | * 100x 1 0 1 r/o no acc |
113 | * 10x0 1 0 1 r/o no acc | 113 | * 10x0 1 0 1 r/o no acc |
114 | * 1011 0 0 1 r/w no acc | 114 | * 1011 0 0 1 r/w no acc |
115 | * 110x 0 1 0 r/w r/o | ||
116 | * 11x0 0 1 0 r/w r/o | ||
117 | * 1111 0 1 1 r/w r/w | ||
118 | * | ||
119 | * If !CONFIG_CPU_USE_DOMAINS, the following permissions are changed: | ||
120 | * 110x 1 1 1 r/o r/o | 115 | * 110x 1 1 1 r/o r/o |
121 | * 11x0 1 1 1 r/o r/o | 116 | * 11x0 1 1 1 r/o r/o |
117 | * 1111 0 1 1 r/w r/w | ||
122 | */ | 118 | */ |
123 | .macro armv6_mt_table pfx | 119 | .macro armv6_mt_table pfx |
124 | \pfx\()_mt_table: | 120 | \pfx\()_mt_table: |
@@ -137,7 +133,7 @@ | |||
137 | .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED | 133 | .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED |
138 | .long 0x00 @ unused | 134 | .long 0x00 @ unused |
139 | .long 0x00 @ unused | 135 | .long 0x00 @ unused |
140 | .long 0x00 @ unused | 136 | .long PTE_CACHEABLE | PTE_BUFFERABLE | PTE_EXT_APX @ L_PTE_MT_VECTORS |
141 | .endm | 137 | .endm |
142 | 138 | ||
143 | .macro armv6_set_pte_ext pfx | 139 | .macro armv6_set_pte_ext pfx |
@@ -158,24 +154,21 @@ | |||
158 | 154 | ||
159 | tst r1, #L_PTE_USER | 155 | tst r1, #L_PTE_USER |
160 | orrne r3, r3, #PTE_EXT_AP1 | 156 | orrne r3, r3, #PTE_EXT_AP1 |
161 | #ifdef CONFIG_CPU_USE_DOMAINS | ||
162 | @ allow kernel read/write access to read-only user pages | ||
163 | tstne r3, #PTE_EXT_APX | 157 | tstne r3, #PTE_EXT_APX |
164 | bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 | 158 | |
165 | #endif | 159 | @ user read-only -> kernel read-only |
160 | bicne r3, r3, #PTE_EXT_AP0 | ||
166 | 161 | ||
167 | tst r1, #L_PTE_XN | 162 | tst r1, #L_PTE_XN |
168 | orrne r3, r3, #PTE_EXT_XN | 163 | orrne r3, r3, #PTE_EXT_XN |
169 | 164 | ||
170 | orr r3, r3, r2 | 165 | eor r3, r3, r2 |
171 | 166 | ||
172 | tst r1, #L_PTE_YOUNG | 167 | tst r1, #L_PTE_YOUNG |
173 | tstne r1, #L_PTE_PRESENT | 168 | tstne r1, #L_PTE_PRESENT |
174 | moveq r3, #0 | 169 | moveq r3, #0 |
175 | #ifndef CONFIG_CPU_USE_DOMAINS | ||
176 | tstne r1, #L_PTE_NONE | 170 | tstne r1, #L_PTE_NONE |
177 | movne r3, #0 | 171 | movne r3, #0 |
178 | #endif | ||
179 | 172 | ||
180 | str r3, [r0] | 173 | str r3, [r0] |
181 | mcr p15, 0, r0, c7, c10, 1 @ flush_pte | 174 | mcr p15, 0, r0, c7, c10, 1 @ flush_pte |
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S index bdd3be4be77a..1f52915f2b28 100644 --- a/arch/arm/mm/proc-v7-2level.S +++ b/arch/arm/mm/proc-v7-2level.S | |||
@@ -90,21 +90,14 @@ ENTRY(cpu_v7_set_pte_ext) | |||
90 | 90 | ||
91 | tst r1, #L_PTE_USER | 91 | tst r1, #L_PTE_USER |
92 | orrne r3, r3, #PTE_EXT_AP1 | 92 | orrne r3, r3, #PTE_EXT_AP1 |
93 | #ifdef CONFIG_CPU_USE_DOMAINS | ||
94 | @ allow kernel read/write access to read-only user pages | ||
95 | tstne r3, #PTE_EXT_APX | ||
96 | bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 | ||
97 | #endif | ||
98 | 93 | ||
99 | tst r1, #L_PTE_XN | 94 | tst r1, #L_PTE_XN |
100 | orrne r3, r3, #PTE_EXT_XN | 95 | orrne r3, r3, #PTE_EXT_XN |
101 | 96 | ||
102 | tst r1, #L_PTE_YOUNG | 97 | tst r1, #L_PTE_YOUNG |
103 | tstne r1, #L_PTE_VALID | 98 | tstne r1, #L_PTE_VALID |
104 | #ifndef CONFIG_CPU_USE_DOMAINS | ||
105 | eorne r1, r1, #L_PTE_NONE | 99 | eorne r1, r1, #L_PTE_NONE |
106 | tstne r1, #L_PTE_NONE | 100 | tstne r1, #L_PTE_NONE |
107 | #endif | ||
108 | moveq r3, #0 | 101 | moveq r3, #0 |
109 | 102 | ||
110 | ARM( str r3, [r0, #2048]! ) | 103 | ARM( str r3, [r0, #2048]! ) |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 74f6033e76dd..195731d3813b 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -192,6 +192,7 @@ __v7_cr7mp_setup: | |||
192 | mov r10, #(1 << 0) @ Cache/TLB ops broadcasting | 192 | mov r10, #(1 << 0) @ Cache/TLB ops broadcasting |
193 | b 1f | 193 | b 1f |
194 | __v7_ca7mp_setup: | 194 | __v7_ca7mp_setup: |
195 | __v7_ca12mp_setup: | ||
195 | __v7_ca15mp_setup: | 196 | __v7_ca15mp_setup: |
196 | mov r10, #0 | 197 | mov r10, #0 |
197 | 1: | 198 | 1: |
@@ -484,6 +485,16 @@ __v7_ca7mp_proc_info: | |||
484 | .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info | 485 | .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info |
485 | 486 | ||
486 | /* | 487 | /* |
488 | * ARM Ltd. Cortex A12 processor. | ||
489 | */ | ||
490 | .type __v7_ca12mp_proc_info, #object | ||
491 | __v7_ca12mp_proc_info: | ||
492 | .long 0x410fc0d0 | ||
493 | .long 0xff0ffff0 | ||
494 | __v7_proc __v7_ca12mp_setup | ||
495 | .size __v7_ca12mp_proc_info, . - __v7_ca12mp_proc_info | ||
496 | |||
497 | /* | ||
487 | * ARM Ltd. Cortex A15 processor. | 498 | * ARM Ltd. Cortex A15 processor. |
488 | */ | 499 | */ |
489 | .type __v7_ca15mp_proc_info, #object | 500 | .type __v7_ca15mp_proc_info, #object |
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index d70b73364a3f..6ad65d8ae237 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c | |||
@@ -127,7 +127,7 @@ iop_timer_interrupt(int irq, void *dev_id) | |||
127 | static struct irqaction iop_timer_irq = { | 127 | static struct irqaction iop_timer_irq = { |
128 | .name = "IOP Timer Tick", | 128 | .name = "IOP Timer Tick", |
129 | .handler = iop_timer_interrupt, | 129 | .handler = iop_timer_interrupt, |
130 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 130 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
131 | .dev_id = &iop_clockevent, | 131 | .dev_id = &iop_clockevent, |
132 | }; | 132 | }; |
133 | 133 | ||
diff --git a/drivers/clocksource/timer-u300.c b/drivers/clocksource/timer-u300.c index e63d469661fd..5dcf756970e7 100644 --- a/drivers/clocksource/timer-u300.c +++ b/drivers/clocksource/timer-u300.c | |||
@@ -333,7 +333,7 @@ static irqreturn_t u300_timer_interrupt(int irq, void *dev_id) | |||
333 | 333 | ||
334 | static struct irqaction u300_timer_irq = { | 334 | static struct irqaction u300_timer_irq = { |
335 | .name = "U300 Timer Tick", | 335 | .name = "U300 Timer Tick", |
336 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 336 | .flags = IRQF_TIMER | IRQF_IRQPOLL, |
337 | .handler = u300_timer_interrupt, | 337 | .handler = u300_timer_interrupt, |
338 | }; | 338 | }; |
339 | 339 | ||
diff --git a/drivers/scsi/arm/acornscsi.c b/drivers/scsi/arm/acornscsi.c index 09ba1869d366..059ff477a398 100644 --- a/drivers/scsi/arm/acornscsi.c +++ b/drivers/scsi/arm/acornscsi.c | |||
@@ -2971,7 +2971,7 @@ static int acornscsi_probe(struct expansion_card *ec, const struct ecard_id *id) | |||
2971 | ec->irqaddr = ashost->fast + INT_REG; | 2971 | ec->irqaddr = ashost->fast + INT_REG; |
2972 | ec->irqmask = 0x0a; | 2972 | ec->irqmask = 0x0a; |
2973 | 2973 | ||
2974 | ret = request_irq(host->irq, acornscsi_intr, IRQF_DISABLED, "acornscsi", ashost); | 2974 | ret = request_irq(host->irq, acornscsi_intr, 0, "acornscsi", ashost); |
2975 | if (ret) { | 2975 | if (ret) { |
2976 | printk(KERN_CRIT "scsi%d: IRQ%d not free: %d\n", | 2976 | printk(KERN_CRIT "scsi%d: IRQ%d not free: %d\n", |
2977 | host->host_no, ashost->scsi.irq, ret); | 2977 | host->host_no, ashost->scsi.irq, ret); |
diff --git a/drivers/scsi/arm/cumana_1.c b/drivers/scsi/arm/cumana_1.c index b679778376c5..f8e060900052 100644 --- a/drivers/scsi/arm/cumana_1.c +++ b/drivers/scsi/arm/cumana_1.c | |||
@@ -262,7 +262,7 @@ static int cumanascsi1_probe(struct expansion_card *ec, | |||
262 | goto out_unmap; | 262 | goto out_unmap; |
263 | } | 263 | } |
264 | 264 | ||
265 | ret = request_irq(host->irq, cumanascsi_intr, IRQF_DISABLED, | 265 | ret = request_irq(host->irq, cumanascsi_intr, 0, |
266 | "CumanaSCSI-1", host); | 266 | "CumanaSCSI-1", host); |
267 | if (ret) { | 267 | if (ret) { |
268 | printk("scsi%d: IRQ%d not free: %d\n", | 268 | printk("scsi%d: IRQ%d not free: %d\n", |
diff --git a/drivers/scsi/arm/cumana_2.c b/drivers/scsi/arm/cumana_2.c index 58915f29055b..abc66f5263ec 100644 --- a/drivers/scsi/arm/cumana_2.c +++ b/drivers/scsi/arm/cumana_2.c | |||
@@ -431,7 +431,7 @@ static int cumanascsi2_probe(struct expansion_card *ec, | |||
431 | goto out_free; | 431 | goto out_free; |
432 | 432 | ||
433 | ret = request_irq(ec->irq, cumanascsi_2_intr, | 433 | ret = request_irq(ec->irq, cumanascsi_2_intr, |
434 | IRQF_DISABLED, "cumanascsi2", info); | 434 | 0, "cumanascsi2", info); |
435 | if (ret) { | 435 | if (ret) { |
436 | printk("scsi%d: IRQ%d not free: %d\n", | 436 | printk("scsi%d: IRQ%d not free: %d\n", |
437 | host->host_no, ec->irq, ret); | 437 | host->host_no, ec->irq, ret); |
diff --git a/drivers/scsi/arm/powertec.c b/drivers/scsi/arm/powertec.c index abc9593615e9..5e1b73e1b743 100644 --- a/drivers/scsi/arm/powertec.c +++ b/drivers/scsi/arm/powertec.c | |||
@@ -358,7 +358,7 @@ static int powertecscsi_probe(struct expansion_card *ec, | |||
358 | goto out_free; | 358 | goto out_free; |
359 | 359 | ||
360 | ret = request_irq(ec->irq, powertecscsi_intr, | 360 | ret = request_irq(ec->irq, powertecscsi_intr, |
361 | IRQF_DISABLED, "powertec", info); | 361 | 0, "powertec", info); |
362 | if (ret) { | 362 | if (ret) { |
363 | printk("scsi%d: IRQ%d not free: %d\n", | 363 | printk("scsi%d: IRQ%d not free: %d\n", |
364 | host->host_no, ec->irq, ret); | 364 | host->host_no, ec->irq, ret); |
diff --git a/drivers/usb/gadget/lpc32xx_udc.c b/drivers/usb/gadget/lpc32xx_udc.c index 049ebab0d360..a94bb10eeb03 100644 --- a/drivers/usb/gadget/lpc32xx_udc.c +++ b/drivers/usb/gadget/lpc32xx_udc.c | |||
@@ -55,7 +55,6 @@ | |||
55 | #include <mach/hardware.h> | 55 | #include <mach/hardware.h> |
56 | #include <linux/io.h> | 56 | #include <linux/io.h> |
57 | #include <asm/irq.h> | 57 | #include <asm/irq.h> |
58 | #include <asm/system.h> | ||
59 | 58 | ||
60 | #include <mach/platform.h> | 59 | #include <mach/platform.h> |
61 | #include <mach/irqs.h> | 60 | #include <mach/irqs.h> |
diff --git a/include/linux/memblock.h b/include/linux/memblock.h index 1ef66360f0b0..8a20a51ed42d 100644 --- a/include/linux/memblock.h +++ b/include/linux/memblock.h | |||
@@ -252,6 +252,8 @@ static inline void memblock_dump_all(void) | |||
252 | void memblock_set_current_limit(phys_addr_t limit); | 252 | void memblock_set_current_limit(phys_addr_t limit); |
253 | 253 | ||
254 | 254 | ||
255 | phys_addr_t memblock_get_current_limit(void); | ||
256 | |||
255 | /* | 257 | /* |
256 | * pfn conversion functions | 258 | * pfn conversion functions |
257 | * | 259 | * |
diff --git a/mm/memblock.c b/mm/memblock.c index 39a31e7f0045..7fe5354e7552 100644 --- a/mm/memblock.c +++ b/mm/memblock.c | |||
@@ -1407,6 +1407,11 @@ void __init_memblock memblock_set_current_limit(phys_addr_t limit) | |||
1407 | memblock.current_limit = limit; | 1407 | memblock.current_limit = limit; |
1408 | } | 1408 | } |
1409 | 1409 | ||
1410 | phys_addr_t __init_memblock memblock_get_current_limit(void) | ||
1411 | { | ||
1412 | return memblock.current_limit; | ||
1413 | } | ||
1414 | |||
1410 | static void __init_memblock memblock_dump(struct memblock_type *type, char *name) | 1415 | static void __init_memblock memblock_dump(struct memblock_type *type, char *name) |
1411 | { | 1416 | { |
1412 | unsigned long long base, size; | 1417 | unsigned long long base, size; |