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authorPhil Edworthy <phil.edworthy@renesas.com>2014-06-13 05:37:19 -0400
committerSimon Horman <horms+renesas@verge.net.au>2014-06-17 06:58:30 -0400
commit66c405e72bf332e59ab29461e33a4e94cb8bdd7a (patch)
treef0c7cf389fe7c4c1a233c17a41de3d54b6d3b573
parent4bfb37675b5343798f5260adad92a67444a9fd47 (diff)
ARM: shmobile: r8a7791: Add default PCIe bus clock
This patch adds a default PCIe bus clock node. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [horms+renesas@verge.net.au: resolved conflict] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index a15bf7af63e4..7f7eda7f2e23 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -555,6 +555,15 @@
555 clock-output-names = "audio_clk_c"; 555 clock-output-names = "audio_clk_c";
556 }; 556 };
557 557
558 /* External PCIe clock - can be overridden by the board */
559 pcie_bus_clk: pcie_bus_clk {
560 compatible = "fixed-clock";
561 #clock-cells = <0>;
562 clock-frequency = <100000000>;
563 clock-output-names = "pcie_bus";
564 status = "disabled";
565 };
566
558 /* Special CPG clocks */ 567 /* Special CPG clocks */
559 cpg_clocks: cpg_clocks@e6150000 { 568 cpg_clocks: cpg_clocks@e6150000 {
560 compatible = "renesas,r8a7791-cpg-clocks", 569 compatible = "renesas,r8a7791-cpg-clocks",