drm/i915: Disable display when fused off

FUSE_STRAP has a bit to inform us that the display has been fused off.
Use it to setup the definitive number of pipes at run-time.

v2: actually tweak num_pipes, not num_planes
v3: also tests SFUSE_STRAP bit 7
v4: rebase on top of drm-nightly
    use DRM_INFO() for the message telling display is fused off
    try to read the FUSE_LOCK bit to determine if PCH display is disabled
v5: Don't read SFUSE_STRAP (register on the PCH) if num_pipes is already 0
    from the initial device info struct (to prevent hangs) (Daniel Vetter)

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> (for v3)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (for v3)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 33 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index e281298c6fd5..033c943b6bae 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1466,16 +1466,46 @@ static void i915_dump_device_info(struct drm_i915_private *dev_priv)
  *   - it's judged too laborious to fill n static structures with the limit
  *     when a simple if statement does the job,
  *   - run-time checks (eg read fuse/strap registers) are needed.
+ *
+ * This function needs to be called:
+ *   - after the MMIO has been setup as we are reading registers,
+ *   - after the PCH has been detected,
+ *   - before the first usage of the fields it can tweak.
  */
 static void intel_device_info_runtime_init(struct drm_device *dev)
 {
+        struct drm_i915_private *dev_priv = dev->dev_private;
         struct intel_device_info *info;
 
-        info = (struct intel_device_info *)&to_i915(dev)->info;
+        info = (struct intel_device_info *)&dev_priv->info;
 
         info->num_sprites = 1;
         if (IS_VALLEYVIEW(dev))
                 info->num_sprites = 2;
+
+        if (info->num_pipes > 0 &&
+            (INTEL_INFO(dev)->gen == 7 || INTEL_INFO(dev)->gen == 8) &&
+            !IS_VALLEYVIEW(dev)) {
+                u32 fuse_strap = I915_READ(FUSE_STRAP);
+                u32 sfuse_strap = I915_READ(SFUSE_STRAP);
+
+                /*
+                 * SFUSE_STRAP is supposed to have a bit signalling the display
+                 * is fused off. Unfortunately it seems that, at least in
+                 * certain cases, fused off display means that PCH display
+                 * reads don't land anywhere. In that case, we read 0s.
+                 *
+                 * On CPT/PPT, we can detect this case as SFUSE_STRAP_FUSE_LOCK
+                 * should be set when taking over after the firmware.
+                 */
+                if (fuse_strap & ILK_INTERNAL_DISPLAY_DISABLE ||
+                    sfuse_strap & SFUSE_STRAP_DISPLAY_DISABLED ||
+                    (dev_priv->pch_type == PCH_CPT &&
+                     !(sfuse_strap & SFUSE_STRAP_FUSE_LOCK))) {
+                        DRM_INFO("Display fused off, disabling\n");
+                        info->num_pipes = 0;
+                }
+        }
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ad044b7d12e6..fc03142e4ae7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5444,6 +5444,8 @@
 
 /* SFUSE_STRAP */
 #define SFUSE_STRAP                     0xc2014
+#define  SFUSE_STRAP_FUSE_LOCK          (1<<13)
+#define  SFUSE_STRAP_DISPLAY_DISABLED   (1<<7)
 #define  SFUSE_STRAP_DDIB_DETECTED      (1<<2)
 #define  SFUSE_STRAP_DDIC_DETECTED      (1<<1)
 #define  SFUSE_STRAP_DDID_DETECTED      (1<<0)