ath9k: Initialize pll_pwrsave for AR9462/AR9565

Cards based on AR9462/AR9565 support more PCIE
power save mechanisms, so register them correctly.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

3 files changed, 5 insertions, 1 deletions

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 60aa8d71e753..cc8bea8a957f 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -366,6 +366,9 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
                 ah->config.rimt_first = 700;
         }
 
+        if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
+                ah->config.pll_pwrsave = 7;
+
         /*
          * We need this for PCI devices only (Cardbus, PCI, miniPCI)
          * _and_ if on non-uniprocessor systems (Multiprocessor/HT).
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index e124ee240dc8..2067cb523ca8 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -341,7 +341,7 @@ struct ath9k_ops_config {
         u32 ant_ctrl_comm2g_switch_enable;
         bool xatten_margin_cfg;
         bool alt_mingainidx;
-        bool pll_pwrsave;
+        u8 pll_pwrsave;
         bool tx_gain_buffalo;
         bool led_active_high;
 };
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index ca66fab78fba..de862ad13b51 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -440,6 +440,7 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc)
         /*
          * The default value of pll_pwrsave is 1.
          * For certain AR9485 cards, it is set to 0.
+         * For AR9462, AR9565 it's set to 7.
          */
         ah->config.pll_pwrsave = 1;