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authorJosh Wu <josh.wu@atmel.com>2014-11-25 03:54:28 -0500
committerMauro Carvalho Chehab <mchehab@osg.samsung.com>2015-02-02 07:40:56 -0500
commit650b1815ffa7b39947cdc33568d3113134d999ec (patch)
treea5c1962b90a2dd39380c58b085333ad3e11f83cc
parent41bc765f1e46ec7fd182573178c9ecd949c6c079 (diff)
[media] ov2640: use the v4l2 size definitions
Reuse the v4l2 size definitions from v4l2-image-sizes.h. So we can remove the rudundent definitions from ov2640.c. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
-rw-r--r--drivers/media/i2c/soc_camera/ov2640.c82
1 files changed, 30 insertions, 52 deletions
diff --git a/drivers/media/i2c/soc_camera/ov2640.c b/drivers/media/i2c/soc_camera/ov2640.c
index 6f2dd9093d94..1fdce2f6f880 100644
--- a/drivers/media/i2c/soc_camera/ov2640.c
+++ b/drivers/media/i2c/soc_camera/ov2640.c
@@ -25,6 +25,7 @@
25#include <media/v4l2-clk.h> 25#include <media/v4l2-clk.h>
26#include <media/v4l2-subdev.h> 26#include <media/v4l2-subdev.h>
27#include <media/v4l2-ctrls.h> 27#include <media/v4l2-ctrls.h>
28#include <media/v4l2-image-sizes.h>
28 29
29#define VAL_SET(x, mask, rshift, lshift) \ 30#define VAL_SET(x, mask, rshift, lshift) \
30 ((((x) >> rshift) & mask) << lshift) 31 ((((x) >> rshift) & mask) << lshift)
@@ -268,33 +269,10 @@ struct regval_list {
268 u8 value; 269 u8 value;
269}; 270};
270 271
271/* Supported resolutions */
272enum ov2640_width {
273 W_QCIF = 176,
274 W_QVGA = 320,
275 W_CIF = 352,
276 W_VGA = 640,
277 W_SVGA = 800,
278 W_XGA = 1024,
279 W_SXGA = 1280,
280 W_UXGA = 1600,
281};
282
283enum ov2640_height {
284 H_QCIF = 144,
285 H_QVGA = 240,
286 H_CIF = 288,
287 H_VGA = 480,
288 H_SVGA = 600,
289 H_XGA = 768,
290 H_SXGA = 1024,
291 H_UXGA = 1200,
292};
293
294struct ov2640_win_size { 272struct ov2640_win_size {
295 char *name; 273 char *name;
296 enum ov2640_width width; 274 u32 width;
297 enum ov2640_height height; 275 u32 height;
298 const struct regval_list *regs; 276 const struct regval_list *regs;
299}; 277};
300 278
@@ -495,17 +473,17 @@ static const struct regval_list ov2640_init_regs[] = {
495static const struct regval_list ov2640_size_change_preamble_regs[] = { 473static const struct regval_list ov2640_size_change_preamble_regs[] = {
496 { BANK_SEL, BANK_SEL_DSP }, 474 { BANK_SEL, BANK_SEL_DSP },
497 { RESET, RESET_DVP }, 475 { RESET, RESET_DVP },
498 { HSIZE8, HSIZE8_SET(W_UXGA) }, 476 { HSIZE8, HSIZE8_SET(UXGA_WIDTH) },
499 { VSIZE8, VSIZE8_SET(H_UXGA) }, 477 { VSIZE8, VSIZE8_SET(UXGA_HEIGHT) },
500 { CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN | 478 { CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
501 CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN }, 479 CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
502 { HSIZE, HSIZE_SET(W_UXGA) }, 480 { HSIZE, HSIZE_SET(UXGA_WIDTH) },
503 { VSIZE, VSIZE_SET(H_UXGA) }, 481 { VSIZE, VSIZE_SET(UXGA_HEIGHT) },
504 { XOFFL, XOFFL_SET(0) }, 482 { XOFFL, XOFFL_SET(0) },
505 { YOFFL, YOFFL_SET(0) }, 483 { YOFFL, YOFFL_SET(0) },
506 { VHYX, VHYX_HSIZE_SET(W_UXGA) | VHYX_VSIZE_SET(H_UXGA) | 484 { VHYX, VHYX_HSIZE_SET(UXGA_WIDTH) | VHYX_VSIZE_SET(UXGA_HEIGHT) |
507 VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)}, 485 VHYX_XOFF_SET(0) | VHYX_YOFF_SET(0)},
508 { TEST, TEST_HSIZE_SET(W_UXGA) }, 486 { TEST, TEST_HSIZE_SET(UXGA_WIDTH) },
509 ENDMARKER, 487 ENDMARKER,
510}; 488};
511 489
@@ -519,45 +497,45 @@ static const struct regval_list ov2640_size_change_preamble_regs[] = {
519 { RESET, 0x00} 497 { RESET, 0x00}
520 498
521static const struct regval_list ov2640_qcif_regs[] = { 499static const struct regval_list ov2640_qcif_regs[] = {
522 PER_SIZE_REG_SEQ(W_QCIF, H_QCIF, 3, 3, 4), 500 PER_SIZE_REG_SEQ(QCIF_WIDTH, QCIF_HEIGHT, 3, 3, 4),
523 ENDMARKER, 501 ENDMARKER,
524}; 502};
525 503
526static const struct regval_list ov2640_qvga_regs[] = { 504static const struct regval_list ov2640_qvga_regs[] = {
527 PER_SIZE_REG_SEQ(W_QVGA, H_QVGA, 2, 2, 4), 505 PER_SIZE_REG_SEQ(QVGA_WIDTH, QVGA_HEIGHT, 2, 2, 4),
528 ENDMARKER, 506 ENDMARKER,
529}; 507};
530 508
531static const struct regval_list ov2640_cif_regs[] = { 509static const struct regval_list ov2640_cif_regs[] = {
532 PER_SIZE_REG_SEQ(W_CIF, H_CIF, 2, 2, 8), 510 PER_SIZE_REG_SEQ(CIF_WIDTH, CIF_HEIGHT, 2, 2, 8),
533 ENDMARKER, 511 ENDMARKER,
534}; 512};
535 513
536static const struct regval_list ov2640_vga_regs[] = { 514static const struct regval_list ov2640_vga_regs[] = {
537 PER_SIZE_REG_SEQ(W_VGA, H_VGA, 0, 0, 2), 515 PER_SIZE_REG_SEQ(VGA_WIDTH, VGA_HEIGHT, 0, 0, 2),
538 ENDMARKER, 516 ENDMARKER,
539}; 517};
540 518
541static const struct regval_list ov2640_svga_regs[] = { 519static const struct regval_list ov2640_svga_regs[] = {
542 PER_SIZE_REG_SEQ(W_SVGA, H_SVGA, 1, 1, 2), 520 PER_SIZE_REG_SEQ(SVGA_WIDTH, SVGA_HEIGHT, 1, 1, 2),
543 ENDMARKER, 521 ENDMARKER,
544}; 522};
545 523
546static const struct regval_list ov2640_xga_regs[] = { 524static const struct regval_list ov2640_xga_regs[] = {
547 PER_SIZE_REG_SEQ(W_XGA, H_XGA, 0, 0, 2), 525 PER_SIZE_REG_SEQ(XGA_WIDTH, XGA_HEIGHT, 0, 0, 2),
548 { CTRLI, 0x00}, 526 { CTRLI, 0x00},
549 ENDMARKER, 527 ENDMARKER,
550}; 528};
551 529
552static const struct regval_list ov2640_sxga_regs[] = { 530static const struct regval_list ov2640_sxga_regs[] = {
553 PER_SIZE_REG_SEQ(W_SXGA, H_SXGA, 0, 0, 2), 531 PER_SIZE_REG_SEQ(SXGA_WIDTH, SXGA_HEIGHT, 0, 0, 2),
554 { CTRLI, 0x00}, 532 { CTRLI, 0x00},
555 { R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE }, 533 { R_DVP_SP, 2 | R_DVP_SP_AUTO_MODE },
556 ENDMARKER, 534 ENDMARKER,
557}; 535};
558 536
559static const struct regval_list ov2640_uxga_regs[] = { 537static const struct regval_list ov2640_uxga_regs[] = {
560 PER_SIZE_REG_SEQ(W_UXGA, H_UXGA, 0, 0, 0), 538 PER_SIZE_REG_SEQ(UXGA_WIDTH, UXGA_HEIGHT, 0, 0, 0),
561 { CTRLI, 0x00}, 539 { CTRLI, 0x00},
562 { R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE }, 540 { R_DVP_SP, 0 | R_DVP_SP_AUTO_MODE },
563 ENDMARKER, 541 ENDMARKER,
@@ -567,14 +545,14 @@ static const struct regval_list ov2640_uxga_regs[] = {
567 {.name = n, .width = w , .height = h, .regs = r } 545 {.name = n, .width = w , .height = h, .regs = r }
568 546
569static const struct ov2640_win_size ov2640_supported_win_sizes[] = { 547static const struct ov2640_win_size ov2640_supported_win_sizes[] = {
570 OV2640_SIZE("QCIF", W_QCIF, H_QCIF, ov2640_qcif_regs), 548 OV2640_SIZE("QCIF", QCIF_WIDTH, QCIF_HEIGHT, ov2640_qcif_regs),
571 OV2640_SIZE("QVGA", W_QVGA, H_QVGA, ov2640_qvga_regs), 549 OV2640_SIZE("QVGA", QVGA_WIDTH, QVGA_HEIGHT, ov2640_qvga_regs),
572 OV2640_SIZE("CIF", W_CIF, H_CIF, ov2640_cif_regs), 550 OV2640_SIZE("CIF", CIF_WIDTH, CIF_HEIGHT, ov2640_cif_regs),
573 OV2640_SIZE("VGA", W_VGA, H_VGA, ov2640_vga_regs), 551 OV2640_SIZE("VGA", VGA_WIDTH, VGA_HEIGHT, ov2640_vga_regs),
574 OV2640_SIZE("SVGA", W_SVGA, H_SVGA, ov2640_svga_regs), 552 OV2640_SIZE("SVGA", SVGA_WIDTH, SVGA_HEIGHT, ov2640_svga_regs),
575 OV2640_SIZE("XGA", W_XGA, H_XGA, ov2640_xga_regs), 553 OV2640_SIZE("XGA", XGA_WIDTH, XGA_HEIGHT, ov2640_xga_regs),
576 OV2640_SIZE("SXGA", W_SXGA, H_SXGA, ov2640_sxga_regs), 554 OV2640_SIZE("SXGA", SXGA_WIDTH, SXGA_HEIGHT, ov2640_sxga_regs),
577 OV2640_SIZE("UXGA", W_UXGA, H_UXGA, ov2640_uxga_regs), 555 OV2640_SIZE("UXGA", UXGA_WIDTH, UXGA_HEIGHT, ov2640_uxga_regs),
578}; 556};
579 557
580/* 558/*
@@ -867,7 +845,7 @@ static int ov2640_g_fmt(struct v4l2_subdev *sd,
867 struct ov2640_priv *priv = to_ov2640(client); 845 struct ov2640_priv *priv = to_ov2640(client);
868 846
869 if (!priv->win) { 847 if (!priv->win) {
870 u32 width = W_SVGA, height = H_SVGA; 848 u32 width = SVGA_WIDTH, height = SVGA_HEIGHT;
871 priv->win = ov2640_select_win(&width, &height); 849 priv->win = ov2640_select_win(&width, &height);
872 priv->cfmt_code = MEDIA_BUS_FMT_UYVY8_2X8; 850 priv->cfmt_code = MEDIA_BUS_FMT_UYVY8_2X8;
873 } 851 }
@@ -954,8 +932,8 @@ static int ov2640_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
954{ 932{
955 a->c.left = 0; 933 a->c.left = 0;
956 a->c.top = 0; 934 a->c.top = 0;
957 a->c.width = W_UXGA; 935 a->c.width = UXGA_WIDTH;
958 a->c.height = H_UXGA; 936 a->c.height = UXGA_HEIGHT;
959 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 937 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
960 938
961 return 0; 939 return 0;
@@ -965,8 +943,8 @@ static int ov2640_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
965{ 943{
966 a->bounds.left = 0; 944 a->bounds.left = 0;
967 a->bounds.top = 0; 945 a->bounds.top = 0;
968 a->bounds.width = W_UXGA; 946 a->bounds.width = UXGA_WIDTH;
969 a->bounds.height = H_UXGA; 947 a->bounds.height = UXGA_HEIGHT;
970 a->defrect = a->bounds; 948 a->defrect = a->bounds;
971 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 949 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
972 a->pixelaspect.numerator = 1; 950 a->pixelaspect.numerator = 1;