diff options
author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2014-07-31 17:24:25 -0400 |
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committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2014-08-17 19:03:42 -0400 |
commit | 632e25ca722e5361a1b40d89e77808f8f1c6799f (patch) | |
tree | 9a314ef95ddb11edf83c1b41ebe9d4510b14d71e | |
parent | 862e2b6af9413b43ef044979b934cab07bfd33e5 (diff) |
can: rcar_can: document device tree bindings
Document the R-Car CAN device tree bindings.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
-rw-r--r-- | Documentation/devicetree/bindings/net/can/rcar_can.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt new file mode 100644 index 000000000000..002d8440bf66 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt | |||
@@ -0,0 +1,43 @@ | |||
1 | Renesas R-Car CAN controller Device Tree Bindings | ||
2 | ------------------------------------------------- | ||
3 | |||
4 | Required properties: | ||
5 | - compatible: "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC. | ||
6 | "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC. | ||
7 | "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC. | ||
8 | "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC. | ||
9 | - reg: physical base address and size of the R-Car CAN register map. | ||
10 | - interrupts: interrupt specifier for the sole interrupt. | ||
11 | - clocks: phandles and clock specifiers for 3 CAN clock inputs. | ||
12 | - clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk". | ||
13 | - pinctrl-0: pin control group to be used for this controller. | ||
14 | - pinctrl-names: must be "default". | ||
15 | |||
16 | Optional properties: | ||
17 | - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are: | ||
18 | <0x0> (default) : Peripheral clock (clkp1) | ||
19 | <0x1> : Peripheral clock (clkp2) | ||
20 | <0x3> : Externally input clock | ||
21 | |||
22 | Example | ||
23 | ------- | ||
24 | |||
25 | SoC common .dtsi file: | ||
26 | |||
27 | can0: can@e6e80000 { | ||
28 | compatible = "renesas,can-r8a7791"; | ||
29 | reg = <0 0xe6e80000 0 0x1000>; | ||
30 | interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; | ||
31 | clocks = <&mstp9_clks R8A7791_CLK_RCAN0>, | ||
32 | <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; | ||
33 | clock-names = "clkp1", "clkp2", "can_clk"; | ||
34 | status = "disabled"; | ||
35 | }; | ||
36 | |||
37 | Board specific .dts file: | ||
38 | |||
39 | &can0 { | ||
40 | pinctrl-0 = <&can0_pins>; | ||
41 | pinctrl-names = "default"; | ||
42 | status = "okay"; | ||
43 | }; | ||