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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-08-07 08:02:23 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-08-14 16:49:22 -0400
commit62783b714f21a08b20acfaab1c13679e887ab66c (patch)
tree66865818a2848f6521a6041198d9b698469ebebe
parentf06812095e97af956c9fe8e0f82a5f6d5a26e5d2 (diff)
sh-pfc: r8a7790: Add DU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c134
1 files changed, 134 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index da3aaeb51f0f..64fcc00693b5 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -1725,6 +1725,104 @@ static struct sh_pfc_pin pinmux_pins[] = {
1725 PINMUX_GPIO_GP_ALL(), 1725 PINMUX_GPIO_GP_ALL(),
1726}; 1726};
1727 1727
1728/* - DU RGB ----------------------------------------------------------------- */
1729static const unsigned int du_rgb666_pins[] = {
1730 /* R[7:2], G[7:2], B[7:2] */
1731 RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19),
1732 RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16),
1733 RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 14),
1734 RCAR_GP_PIN(5, 7), RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
1735 RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 11),
1736 RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 8),
1737};
1738static const unsigned int du_rgb666_mux[] = {
1739 DU2_DR7_MARK, DU2_DR6_MARK, DU2_DR5_MARK, DU2_DR4_MARK,
1740 DU2_DR3_MARK, DU2_DR2_MARK,
1741 DU2_DG7_MARK, DU2_DG6_MARK, DU2_DG5_MARK, DU2_DG4_MARK,
1742 DU2_DG3_MARK, DU2_DG2_MARK,
1743 DU2_DB7_MARK, DU2_DB6_MARK, DU2_DB5_MARK, DU2_DB4_MARK,
1744 DU2_DB3_MARK, DU2_DB2_MARK,
1745};
1746static const unsigned int du_rgb888_pins[] = {
1747 /* R[7:0], G[7:0], B[7:0] */
1748 RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19),
1749 RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16),
1750 RCAR_GP_PIN(4, 29), RCAR_GP_PIN(4, 28), RCAR_GP_PIN(5, 4),
1751 RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 7),
1752 RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27), RCAR_GP_PIN(5, 1),
1753 RCAR_GP_PIN(4, 31), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 12),
1754 RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 9),
1755 RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 5),
1756};
1757static const unsigned int du_rgb888_mux[] = {
1758 DU2_DR7_MARK, DU2_DR6_MARK, DU2_DR5_MARK, DU2_DR4_MARK,
1759 DU2_DR3_MARK, DU2_DR2_MARK, DU2_DR1_MARK, DU2_DR0_MARK,
1760 DU2_DG7_MARK, DU2_DG6_MARK, DU2_DG5_MARK, DU2_DG4_MARK,
1761 DU2_DG3_MARK, DU2_DG2_MARK, DU2_DG1_MARK, DU2_DG0_MARK,
1762 DU2_DB7_MARK, DU2_DB6_MARK, DU2_DB5_MARK, DU2_DB4_MARK,
1763 DU2_DB3_MARK, DU2_DB2_MARK, DU2_DB1_MARK, DU2_DB0_MARK,
1764};
1765static const unsigned int du_clk_out_0_pins[] = {
1766 /* CLKOUT */
1767 RCAR_GP_PIN(5, 2),
1768};
1769static const unsigned int du_clk_out_0_mux[] = {
1770 DU0_DOTCLKOUT_MARK
1771};
1772static const unsigned int du_clk_out_1_pins[] = {
1773 /* CLKOUT */
1774 RCAR_GP_PIN(5, 3),
1775};
1776static const unsigned int du_clk_out_1_mux[] = {
1777 DU1_DOTCLKOUT_MARK
1778};
1779static const unsigned int du_sync_0_pins[] = {
1780 /* VSYNC, HSYNC, DISP */
1781 RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(5, 0),
1782};
1783static const unsigned int du_sync_0_mux[] = {
1784 DU2_EXVSYNC_DU2_VSYNC_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK,
1785 DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK
1786};
1787static const unsigned int du_sync_1_pins[] = {
1788 /* VSYNC, HSYNC, DISP */
1789 RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(5, 16),
1790};
1791static const unsigned int du_sync_1_mux[] = {
1792 DU2_EXVSYNC_DU2_VSYNC_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK,
1793 DU2_DISP_MARK
1794};
1795static const unsigned int du_cde_pins[] = {
1796 /* CDE */
1797 RCAR_GP_PIN(5, 17),
1798};
1799static const unsigned int du_cde_mux[] = {
1800 DU2_CDE_MARK,
1801};
1802/* - DU0 -------------------------------------------------------------------- */
1803static const unsigned int du0_clk_in_pins[] = {
1804 /* CLKIN */
1805 RCAR_GP_PIN(5, 26),
1806};
1807static const unsigned int du0_clk_in_mux[] = {
1808 DU_DOTCLKIN0_MARK
1809};
1810/* - DU1 -------------------------------------------------------------------- */
1811static const unsigned int du1_clk_in_pins[] = {
1812 /* CLKIN */
1813 RCAR_GP_PIN(5, 27),
1814};
1815static const unsigned int du1_clk_in_mux[] = {
1816 DU_DOTCLKIN1_MARK,
1817};
1818/* - DU2 -------------------------------------------------------------------- */
1819static const unsigned int du2_clk_in_pins[] = {
1820 /* CLKIN */
1821 RCAR_GP_PIN(5, 28),
1822};
1823static const unsigned int du2_clk_in_mux[] = {
1824 DU_DOTCLKIN2_MARK,
1825};
1728/* - ETH -------------------------------------------------------------------- */ 1826/* - ETH -------------------------------------------------------------------- */
1729static const unsigned int eth_link_pins[] = { 1827static const unsigned int eth_link_pins[] = {
1730 /* LINK */ 1828 /* LINK */
@@ -2916,6 +3014,16 @@ static const unsigned int vin1_clk_mux[] = {
2916}; 3014};
2917 3015
2918static const struct sh_pfc_pin_group pinmux_groups[] = { 3016static const struct sh_pfc_pin_group pinmux_groups[] = {
3017 SH_PFC_PIN_GROUP(du_rgb666),
3018 SH_PFC_PIN_GROUP(du_rgb888),
3019 SH_PFC_PIN_GROUP(du_clk_out_0),
3020 SH_PFC_PIN_GROUP(du_clk_out_1),
3021 SH_PFC_PIN_GROUP(du_sync_0),
3022 SH_PFC_PIN_GROUP(du_sync_1),
3023 SH_PFC_PIN_GROUP(du_cde),
3024 SH_PFC_PIN_GROUP(du0_clk_in),
3025 SH_PFC_PIN_GROUP(du1_clk_in),
3026 SH_PFC_PIN_GROUP(du2_clk_in),
2919 SH_PFC_PIN_GROUP(eth_link), 3027 SH_PFC_PIN_GROUP(eth_link),
2920 SH_PFC_PIN_GROUP(eth_magic), 3028 SH_PFC_PIN_GROUP(eth_magic),
2921 SH_PFC_PIN_GROUP(eth_mdio), 3029 SH_PFC_PIN_GROUP(eth_mdio),
@@ -3081,6 +3189,28 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
3081 SH_PFC_PIN_GROUP(vin1_clk), 3189 SH_PFC_PIN_GROUP(vin1_clk),
3082}; 3190};
3083 3191
3192static const char * const du_groups[] = {
3193 "du_rgb666",
3194 "du_rgb888",
3195 "du_clk_out_0",
3196 "du_clk_out_1",
3197 "du_sync_0",
3198 "du_sync_1",
3199 "du_cde",
3200};
3201
3202static const char * const du0_groups[] = {
3203 "du0_clk_in",
3204};
3205
3206static const char * const du1_groups[] = {
3207 "du1_clk_in",
3208};
3209
3210static const char * const du2_groups[] = {
3211 "du2_clk_in",
3212};
3213
3084static const char * const eth_groups[] = { 3214static const char * const eth_groups[] = {
3085 "eth_link", 3215 "eth_link",
3086 "eth_magic", 3216 "eth_magic",
@@ -3332,6 +3462,10 @@ static const char * const vin1_groups[] = {
3332}; 3462};
3333 3463
3334static const struct sh_pfc_function pinmux_functions[] = { 3464static const struct sh_pfc_function pinmux_functions[] = {
3465 SH_PFC_FUNCTION(du),
3466 SH_PFC_FUNCTION(du0),
3467 SH_PFC_FUNCTION(du1),
3468 SH_PFC_FUNCTION(du2),
3335 SH_PFC_FUNCTION(eth), 3469 SH_PFC_FUNCTION(eth),
3336 SH_PFC_FUNCTION(hscif0), 3470 SH_PFC_FUNCTION(hscif0),
3337 SH_PFC_FUNCTION(hscif1), 3471 SH_PFC_FUNCTION(hscif1),