diff options
| author | Dinh Nguyen <dinguyen@altera.com> | 2013-08-21 16:28:49 -0400 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-08-29 15:59:02 -0400 |
| commit | 620f5e1cbfc16aa1bd39c2c5386aee4d00850641 (patch) | |
| tree | 189266e03455c40216b7daef35d4d128b9802ce2 | |
| parent | 13960b47dc1df695f8537c32a0e0ce5ae5d4eee4 (diff) | |
dts: Rename DW APB timer compatible strings
"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
DW APB timer, just fed by different clocks. Thus, deprecate both
"dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Olof Johansson <olof@lixom.net>
v3:
- Split out a separate that cleans up the timer entries and clock information.
- Clearly states which binding is deprecated in the bindings doc.
v2:
- Deprecate the "dw-apb-timer-osc" and "dw-apb-timer-sp" but maintain
backwards compatibility in the driver.
| -rw-r--r-- | Documentation/devicetree/bindings/rtc/dw-apb.txt | 34 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 8 |
2 files changed, 15 insertions, 27 deletions
diff --git a/Documentation/devicetree/bindings/rtc/dw-apb.txt b/Documentation/devicetree/bindings/rtc/dw-apb.txt index eb2327b2bdb3..c703d51abb6c 100644 --- a/Documentation/devicetree/bindings/rtc/dw-apb.txt +++ b/Documentation/devicetree/bindings/rtc/dw-apb.txt | |||
| @@ -1,7 +1,10 @@ | |||
| 1 | * Designware APB timer | 1 | * Designware APB timer |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: "snps,dw-apb-timer-sp" or "snps,dw-apb-timer-osc" | 4 | - compatible: One of: |
| 5 | "snps,dw-apb-timer" | ||
| 6 | "snps,dw-apb-timer-sp" <DEPRECATED> | ||
| 7 | "snps,dw-apb-timer-osc" <DEPRECATED> | ||
| 5 | - reg: physical base address of the controller and length of memory mapped | 8 | - reg: physical base address of the controller and length of memory mapped |
| 6 | region. | 9 | region. |
| 7 | - interrupts: IRQ line for the timer. | 10 | - interrupts: IRQ line for the timer. |
| @@ -20,25 +23,10 @@ systems may use one. | |||
| 20 | 23 | ||
| 21 | 24 | ||
| 22 | Example: | 25 | Example: |
| 23 | 26 | timer@ffe00000 { | |
| 24 | timer1: timer@ffc09000 { | 27 | compatible = "snps,dw-apb-timer"; |
| 25 | compatible = "snps,dw-apb-timer-sp"; | 28 | interrupts = <0 170 4>; |
| 26 | interrupts = <0 168 4>; | 29 | reg = <0xffe00000 0x1000>; |
| 27 | clock-frequency = <200000000>; | 30 | clocks = <&timer_clk>, <&timer_pclk>; |
| 28 | reg = <0xffc09000 0x1000>; | 31 | clock-names = "timer", "pclk"; |
| 29 | }; | 32 | }; |
| 30 | |||
| 31 | timer2: timer@ffd00000 { | ||
| 32 | compatible = "snps,dw-apb-timer-osc"; | ||
| 33 | interrupts = <0 169 4>; | ||
| 34 | clock-frequency = <200000000>; | ||
| 35 | reg = <0xffd00000 0x1000>; | ||
| 36 | }; | ||
| 37 | |||
| 38 | timer3: timer@ffe00000 { | ||
| 39 | compatible = "snps,dw-apb-timer-osc"; | ||
| 40 | interrupts = <0 170 4>; | ||
| 41 | reg = <0xffe00000 0x1000>; | ||
| 42 | clocks = <&timer_clk>, <&timer_pclk>; | ||
| 43 | clock-names = "timer", "pclk"; | ||
| 44 | }; | ||
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index bee62a2cf6d6..e273fa993b8c 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi | |||
| @@ -476,25 +476,25 @@ | |||
| 476 | }; | 476 | }; |
| 477 | 477 | ||
| 478 | timer0: timer0@ffc08000 { | 478 | timer0: timer0@ffc08000 { |
| 479 | compatible = "snps,dw-apb-timer-sp"; | 479 | compatible = "snps,dw-apb-timer"; |
| 480 | interrupts = <0 167 4>; | 480 | interrupts = <0 167 4>; |
| 481 | reg = <0xffc08000 0x1000>; | 481 | reg = <0xffc08000 0x1000>; |
| 482 | }; | 482 | }; |
| 483 | 483 | ||
| 484 | timer1: timer1@ffc09000 { | 484 | timer1: timer1@ffc09000 { |
| 485 | compatible = "snps,dw-apb-timer-sp"; | 485 | compatible = "snps,dw-apb-timer"; |
| 486 | interrupts = <0 168 4>; | 486 | interrupts = <0 168 4>; |
| 487 | reg = <0xffc09000 0x1000>; | 487 | reg = <0xffc09000 0x1000>; |
| 488 | }; | 488 | }; |
| 489 | 489 | ||
| 490 | timer2: timer2@ffd00000 { | 490 | timer2: timer2@ffd00000 { |
| 491 | compatible = "snps,dw-apb-timer-osc"; | 491 | compatible = "snps,dw-apb-timer"; |
| 492 | interrupts = <0 169 4>; | 492 | interrupts = <0 169 4>; |
| 493 | reg = <0xffd00000 0x1000>; | 493 | reg = <0xffd00000 0x1000>; |
| 494 | }; | 494 | }; |
| 495 | 495 | ||
| 496 | timer3: timer3@ffd01000 { | 496 | timer3: timer3@ffd01000 { |
| 497 | compatible = "snps,dw-apb-timer-osc"; | 497 | compatible = "snps,dw-apb-timer"; |
| 498 | interrupts = <0 170 4>; | 498 | interrupts = <0 170 4>; |
| 499 | reg = <0xffd01000 0x1000>; | 499 | reg = <0xffd01000 0x1000>; |
| 500 | }; | 500 | }; |
