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authorPrashant Gaikwad <pgaikwad@nvidia.com>2013-01-11 02:46:26 -0500
committerStephen Warren <swarren@nvidia.com>2013-01-28 13:19:07 -0500
commit61fd290d213e25d5a119b8ca25644001ed9f8f2d (patch)
tree16d8d1da34b5970985145c14cd6b8a624486abba
parentb08e8c0ecc42afa3a2e1019851af741980dd5a6b (diff)
ARM: tegra: migrate to new clock code
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c30
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra30.c31
-rw-r--r--arch/arm/mach-tegra/clock.c19
-rw-r--r--arch/arm/mach-tegra/common.c44
-rw-r--r--arch/arm/mach-tegra/cpu-tegra.c2
-rw-r--r--arch/arm/mach-tegra/include/mach/clk.h3
-rw-r--r--arch/arm/mach-tegra/pcie.c2
-rw-r--r--arch/arm/mach-tegra/powergate.c2
-rw-r--r--drivers/clk/tegra/clk-periph.c38
-rw-r--r--drivers/clk/tegra/clk.c16
-rw-r--r--drivers/dma/tegra20-apb-dma.c2
-rw-r--r--drivers/gpu/drm/tegra/dc.c3
-rw-r--r--drivers/gpu/drm/tegra/drm.c1
-rw-r--r--drivers/gpu/drm/tegra/hdmi.c3
-rw-r--r--drivers/i2c/busses/i2c-tegra.c3
-rw-r--r--drivers/input/keyboard/tegra-kbc.c2
-rw-r--r--drivers/spi/spi-tegra20-sflash.c2
-rw-r--r--drivers/spi/spi-tegra20-slink.c2
-rw-r--r--drivers/staging/nvec/nvec.c3
-rw-r--r--include/linux/clk/tegra.h5
-rw-r--r--sound/soc/tegra/tegra30_ahub.c2
21 files changed, 73 insertions, 142 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index e1f87dd314ef..0c11b8af3af3 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -42,7 +42,6 @@
42#include <asm/setup.h> 42#include <asm/setup.h>
43 43
44#include "board.h" 44#include "board.h"
45#include "clock.h"
46#include "common.h" 45#include "common.h"
47#include "iomap.h" 46#include "iomap.h"
48 47
@@ -104,37 +103,8 @@ static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
104 {} 103 {}
105}; 104};
106 105
107static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
108 /* name parent rate enabled */
109 { "uarta", "pll_p", 216000000, true },
110 { "uartd", "pll_p", 216000000, true },
111 { "usbd", "clk_m", 12000000, false },
112 { "usb2", "clk_m", 12000000, false },
113 { "usb3", "clk_m", 12000000, false },
114 { "pll_a", "pll_p_out1", 56448000, true },
115 { "pll_a_out0", "pll_a", 11289600, true },
116 { "cdev1", NULL, 0, true },
117 { "blink", "clk_32k", 32768, true },
118 { "i2s1", "pll_a_out0", 11289600, false},
119 { "i2s2", "pll_a_out0", 11289600, false},
120 { "sdmmc1", "pll_p", 48000000, false},
121 { "sdmmc3", "pll_p", 48000000, false},
122 { "sdmmc4", "pll_p", 48000000, false},
123 { "spi", "pll_p", 20000000, false },
124 { "sbc1", "pll_p", 100000000, false },
125 { "sbc2", "pll_p", 100000000, false },
126 { "sbc3", "pll_p", 100000000, false },
127 { "sbc4", "pll_p", 100000000, false },
128 { "host1x", "pll_c", 150000000, false },
129 { "disp1", "pll_p", 600000000, false },
130 { "disp2", "pll_p", 600000000, false },
131 { NULL, NULL, 0, 0},
132};
133
134static void __init tegra_dt_init(void) 106static void __init tegra_dt_init(void)
135{ 107{
136 tegra_clk_init_from_table(tegra_dt_clk_init_table);
137
138 /* 108 /*
139 * Finished with the static registrations now; fill in the missing 109 * Finished with the static registrations now; fill in the missing
140 * devices 110 * devices
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
index cfe5fc02be77..92f6014d22a1 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -35,7 +35,6 @@
35#include <asm/hardware/gic.h> 35#include <asm/hardware/gic.h>
36 36
37#include "board.h" 37#include "board.h"
38#include "clock.h"
39#include "common.h" 38#include "common.h"
40#include "iomap.h" 39#include "iomap.h"
41 40
@@ -67,38 +66,8 @@ static struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
67 {} 66 {}
68}; 67};
69 68
70static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
71 /* name parent rate enabled */
72 { "uarta", "pll_p", 408000000, true },
73 { "pll_a", "pll_p_out1", 564480000, true },
74 { "pll_a_out0", "pll_a", 11289600, true },
75 { "extern1", "pll_a_out0", 0, true },
76 { "clk_out_1", "extern1", 0, true },
77 { "blink", "clk_32k", 32768, true },
78 { "i2s0", "pll_a_out0", 11289600, false},
79 { "i2s1", "pll_a_out0", 11289600, false},
80 { "i2s2", "pll_a_out0", 11289600, false},
81 { "i2s3", "pll_a_out0", 11289600, false},
82 { "i2s4", "pll_a_out0", 11289600, false},
83 { "sdmmc1", "pll_p", 48000000, false},
84 { "sdmmc3", "pll_p", 48000000, false},
85 { "sdmmc4", "pll_p", 48000000, false},
86 { "sbc1", "pll_p", 100000000, false},
87 { "sbc2", "pll_p", 100000000, false},
88 { "sbc3", "pll_p", 100000000, false},
89 { "sbc4", "pll_p", 100000000, false},
90 { "sbc5", "pll_p", 100000000, false},
91 { "sbc6", "pll_p", 100000000, false},
92 { "host1x", "pll_c", 150000000, false},
93 { "disp1", "pll_p", 600000000, false},
94 { "disp2", "pll_p", 600000000, false},
95 { NULL, NULL, 0, 0},
96};
97
98static void __init tegra30_dt_init(void) 69static void __init tegra30_dt_init(void)
99{ 70{
100 tegra_clk_init_from_table(tegra_dt_clk_init_table);
101
102 of_platform_populate(NULL, of_default_bus_match_table, 71 of_platform_populate(NULL, of_default_bus_match_table,
103 tegra30_auxdata_lookup, NULL); 72 tegra30_auxdata_lookup, NULL);
104} 73}
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 8c0ff061f8cf..baa0c5b008f1 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -31,9 +31,6 @@
31#include "board.h" 31#include "board.h"
32#include "clock.h" 32#include "clock.h"
33 33
34/* Global data of Tegra CPU CAR ops */
35struct tegra_cpu_car_ops *tegra_cpu_car_ops;
36
37/* 34/*
38 * Locking: 35 * Locking:
39 * 36 *
@@ -131,22 +128,6 @@ void tegra_clk_init_from_table(struct tegra_clk_init_table *table)
131 tegra_clk_init_one_from_table(table); 128 tegra_clk_init_one_from_table(table);
132} 129}
133 130
134void tegra_periph_reset_deassert(struct clk *c)
135{
136 struct clk_tegra *clk = to_clk_tegra(__clk_get_hw(c));
137 BUG_ON(!clk->reset);
138 clk->reset(__clk_get_hw(c), false);
139}
140EXPORT_SYMBOL(tegra_periph_reset_deassert);
141
142void tegra_periph_reset_assert(struct clk *c)
143{
144 struct clk_tegra *clk = to_clk_tegra(__clk_get_hw(c));
145 BUG_ON(!clk->reset);
146 clk->reset(__clk_get_hw(c), true);
147}
148EXPORT_SYMBOL(tegra_periph_reset_assert);
149
150/* Several extended clock configuration bits (e.g., clock routing, clock 131/* Several extended clock configuration bits (e.g., clock routing, clock
151 * phase control) are included in PLL and peripheral clock source 132 * phase control) are included in PLL and peripheral clock source
152 * registers. */ 133 * registers. */
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 3efe80b2af28..87dd69ccdf8e 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -22,6 +22,7 @@
22#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/of_irq.h> 24#include <linux/of_irq.h>
25#include <linux/clk/tegra.h>
25 26
26#include <asm/hardware/cache-l2x0.h> 27#include <asm/hardware/cache-l2x0.h>
27#include <asm/hardware/gic.h> 28#include <asm/hardware/gic.h>
@@ -29,7 +30,6 @@
29#include <mach/powergate.h> 30#include <mach/powergate.h>
30 31
31#include "board.h" 32#include "board.h"
32#include "clock.h"
33#include "common.h" 33#include "common.h"
34#include "fuse.h" 34#include "fuse.h"
35#include "iomap.h" 35#include "iomap.h"
@@ -65,6 +65,7 @@ static const struct of_device_id tegra_dt_irq_match[] __initconst = {
65 65
66void __init tegra_dt_init_irq(void) 66void __init tegra_dt_init_irq(void)
67{ 67{
68 tegra_clocks_init();
68 tegra_init_irq(); 69 tegra_init_irq();
69 of_irq_init(tegra_dt_irq_match); 70 of_irq_init(tegra_dt_irq_match);
70} 71}
@@ -80,43 +81,6 @@ void tegra_assert_system_reset(char mode, const char *cmd)
80 writel_relaxed(reg, reset); 81 writel_relaxed(reg, reset);
81} 82}
82 83
83#ifdef CONFIG_ARCH_TEGRA_2x_SOC
84static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
85 /* name parent rate enabled */
86 { "clk_m", NULL, 0, true },
87 { "pll_p", "clk_m", 216000000, true },
88 { "pll_p_out1", "pll_p", 28800000, true },
89 { "pll_p_out2", "pll_p", 48000000, true },
90 { "pll_p_out3", "pll_p", 72000000, true },
91 { "pll_p_out4", "pll_p", 24000000, true },
92 { "pll_c", "clk_m", 600000000, true },
93 { "pll_c_out1", "pll_c", 120000000, true },
94 { "sclk", "pll_c_out1", 120000000, true },
95 { "hclk", "sclk", 120000000, true },
96 { "pclk", "hclk", 60000000, true },
97 { "csite", NULL, 0, true },
98 { "emc", NULL, 0, true },
99 { "cpu", NULL, 0, true },
100 { NULL, NULL, 0, 0},
101};
102#endif
103
104#ifdef CONFIG_ARCH_TEGRA_3x_SOC
105static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
106 /* name parent rate enabled */
107 { "clk_m", NULL, 0, true },
108 { "pll_p", "pll_ref", 408000000, true },
109 { "pll_p_out1", "pll_p", 9600000, true },
110 { "pll_p_out4", "pll_p", 102000000, true },
111 { "sclk", "pll_p_out4", 102000000, true },
112 { "hclk", "sclk", 102000000, true },
113 { "pclk", "hclk", 51000000, true },
114 { "csite", NULL, 0, true },
115 { NULL, NULL, 0, 0},
116};
117#endif
118
119
120static void __init tegra_init_cache(void) 84static void __init tegra_init_cache(void)
121{ 85{
122#ifdef CONFIG_CACHE_L2X0 86#ifdef CONFIG_CACHE_L2X0
@@ -141,8 +105,6 @@ void __init tegra20_init_early(void)
141 tegra_cpu_reset_handler_init(); 105 tegra_cpu_reset_handler_init();
142 tegra_apb_io_init(); 106 tegra_apb_io_init();
143 tegra_init_fuse(); 107 tegra_init_fuse();
144 tegra2_init_clocks();
145 tegra_clk_init_from_table(tegra20_clk_init_table);
146 tegra_init_cache(); 108 tegra_init_cache();
147 tegra_pmc_init(); 109 tegra_pmc_init();
148 tegra_powergate_init(); 110 tegra_powergate_init();
@@ -155,8 +117,6 @@ void __init tegra30_init_early(void)
155 tegra_cpu_reset_handler_init(); 117 tegra_cpu_reset_handler_init();
156 tegra_apb_io_init(); 118 tegra_apb_io_init();
157 tegra_init_fuse(); 119 tegra_init_fuse();
158 tegra30_init_clocks();
159 tegra_clk_init_from_table(tegra30_clk_init_table);
160 tegra_init_cache(); 120 tegra_init_cache();
161 tegra_pmc_init(); 121 tegra_pmc_init();
162 tegra_powergate_init(); 122 tegra_powergate_init();
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 85d4a23bba03..ebffed67e2f5 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -266,7 +266,7 @@ static int __init tegra_cpufreq_init(void)
266 if (IS_ERR(pll_x_clk)) 266 if (IS_ERR(pll_x_clk))
267 return PTR_ERR(pll_x_clk); 267 return PTR_ERR(pll_x_clk);
268 268
269 pll_p_clk = clk_get_sys(NULL, "pll_p"); 269 pll_p_clk = clk_get_sys(NULL, "pll_p_cclk");
270 if (IS_ERR(pll_p_clk)) 270 if (IS_ERR(pll_p_clk))
271 return PTR_ERR(pll_p_clk); 271 return PTR_ERR(pll_p_clk);
272 272
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h
index 95f3a547c770..85bbf10a7d0d 100644
--- a/arch/arm/mach-tegra/include/mach/clk.h
+++ b/arch/arm/mach-tegra/include/mach/clk.h
@@ -31,9 +31,6 @@ enum tegra_clk_ex_param {
31 TEGRA_CLK_PLLD_MIPI_MUX_SEL, 31 TEGRA_CLK_PLLD_MIPI_MUX_SEL,
32}; 32};
33 33
34void tegra_periph_reset_deassert(struct clk *c);
35void tegra_periph_reset_assert(struct clk *c);
36
37#ifndef CONFIG_COMMON_CLK 34#ifndef CONFIG_COMMON_CLK
38unsigned long clk_get_rate_all_locked(struct clk *c); 35unsigned long clk_get_rate_all_locked(struct clk *c);
39#endif 36#endif
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index bffcd643d7a3..b60165f1ca02 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -33,11 +33,11 @@
33#include <linux/clk.h> 33#include <linux/clk.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <linux/export.h> 35#include <linux/export.h>
36#include <linux/clk/tegra.h>
36 37
37#include <asm/sizes.h> 38#include <asm/sizes.h>
38#include <asm/mach/pci.h> 39#include <asm/mach/pci.h>
39 40
40#include <mach/clk.h>
41#include <mach/powergate.h> 41#include <mach/powergate.h>
42 42
43#include "board.h" 43#include "board.h"
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 2cc1185d902e..c6bc8f85759c 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -26,8 +26,8 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/seq_file.h> 27#include <linux/seq_file.h>
28#include <linux/spinlock.h> 28#include <linux/spinlock.h>
29#include <linux/clk/tegra.h>
29 30
30#include <mach/clk.h>
31#include <mach/powergate.h> 31#include <mach/powergate.h>
32 32
33#include "fuse.h" 33#include "fuse.h"
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index 5978e81b175b..788486e6331a 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -110,6 +110,44 @@ static void clk_periph_disable(struct clk_hw *hw)
110 gate_ops->disable(gate_hw); 110 gate_ops->disable(gate_hw);
111} 111}
112 112
113void tegra_periph_reset_deassert(struct clk *c)
114{
115 struct clk_hw *hw = __clk_get_hw(c);
116 struct tegra_clk_periph *periph = to_clk_periph(hw);
117 struct tegra_clk_periph_gate *gate;
118
119 if (periph->magic != TEGRA_CLK_PERIPH_MAGIC) {
120 gate = to_clk_periph_gate(hw);
121 if (gate->magic != TEGRA_CLK_PERIPH_GATE_MAGIC) {
122 WARN_ON(1);
123 return;
124 }
125 } else {
126 gate = &periph->gate;
127 }
128
129 tegra_periph_reset(gate, 0);
130}
131
132void tegra_periph_reset_assert(struct clk *c)
133{
134 struct clk_hw *hw = __clk_get_hw(c);
135 struct tegra_clk_periph *periph = to_clk_periph(hw);
136 struct tegra_clk_periph_gate *gate;
137
138 if (periph->magic != TEGRA_CLK_PERIPH_MAGIC) {
139 gate = to_clk_periph_gate(hw);
140 if (gate->magic != TEGRA_CLK_PERIPH_GATE_MAGIC) {
141 WARN_ON(1);
142 return;
143 }
144 } else {
145 gate = &periph->gate;
146 }
147
148 tegra_periph_reset(gate, 1);
149}
150
113const struct clk_ops tegra_clk_periph_ops = { 151const struct clk_ops tegra_clk_periph_ops = {
114 .get_parent = clk_periph_get_parent, 152 .get_parent = clk_periph_get_parent,
115 .set_parent = clk_periph_set_parent, 153 .set_parent = clk_periph_set_parent,
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index cf023a937208..a603b9af0ad3 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -16,9 +16,14 @@
16 16
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/clk-provider.h> 18#include <linux/clk-provider.h>
19#include <linux/of.h>
20#include <linux/clk/tegra.h>
19 21
20#include "clk.h" 22#include "clk.h"
21 23
24/* Global data of Tegra CPU CAR ops */
25struct tegra_cpu_car_ops *tegra_cpu_car_ops;
26
22void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list, 27void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
23 struct clk *clks[], int clk_max) 28 struct clk *clks[], int clk_max)
24{ 29{
@@ -67,3 +72,14 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl,
67 } 72 }
68 } 73 }
69} 74}
75
76static const struct of_device_id tegra_dt_clk_match[] = {
77 { .compatible = "nvidia,tegra20-car", .data = tegra20_clock_init },
78 { .compatible = "nvidia,tegra30-car", .data = tegra30_clock_init },
79 { }
80};
81
82void __init tegra_clocks_init(void)
83{
84 of_clk_init(tegra_dt_clk_match);
85}
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
index c39e61bc8172..afc9b89e20f4 100644
--- a/drivers/dma/tegra20-apb-dma.c
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -31,8 +31,8 @@
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/pm_runtime.h> 32#include <linux/pm_runtime.h>
33#include <linux/slab.h> 33#include <linux/slab.h>
34#include <linux/clk/tegra.h>
34 35
35#include <mach/clk.h>
36#include "dmaengine.h" 36#include "dmaengine.h"
37 37
38#define TEGRA_APBDMA_GENERAL 0x0 38#define TEGRA_APBDMA_GENERAL 0x0
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 656b2e3334a6..56813f967c8f 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -12,8 +12,7 @@
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/of.h> 13#include <linux/of.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15 15#include <linux/clk/tegra.h>
16#include <mach/clk.h>
17 16
18#include "drm.h" 17#include "drm.h"
19#include "dc.h" 18#include "dc.h"
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 3a503c9e4686..d980dc75788c 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -11,7 +11,6 @@
11#include <linux/of_address.h> 11#include <linux/of_address.h>
12#include <linux/of_platform.h> 12#include <linux/of_platform.h>
13 13
14#include <mach/clk.h>
15#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
16#include <asm/dma-iommu.h> 15#include <asm/dma-iommu.h>
17 16
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index e060c7e6434d..92ad276cc5e0 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -14,8 +14,7 @@
14#include <linux/of.h> 14#include <linux/of.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/regulator/consumer.h> 16#include <linux/regulator/consumer.h>
17 17#include <linux/clk/tegra.h>
18#include <mach/clk.h>
19 18
20#include "hdmi.h" 19#include "hdmi.h"
21#include "drm.h" 20#include "drm.h"
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 7b38877ffec1..c7aca35e38fd 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -29,11 +29,10 @@
29#include <linux/of_i2c.h> 29#include <linux/of_i2c.h>
30#include <linux/of_device.h> 30#include <linux/of_device.h>
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/clk/tegra.h>
32 33
33#include <asm/unaligned.h> 34#include <asm/unaligned.h>
34 35
35#include <mach/clk.h>
36
37#define TEGRA_I2C_TIMEOUT (msecs_to_jiffies(1000)) 36#define TEGRA_I2C_TIMEOUT (msecs_to_jiffies(1000))
38#define BYTES_PER_FIFO_WORD 4 37#define BYTES_PER_FIFO_WORD 4
39 38
diff --git a/drivers/input/keyboard/tegra-kbc.c b/drivers/input/keyboard/tegra-kbc.c
index c76f96872d31..54ac1dc7d477 100644
--- a/drivers/input/keyboard/tegra-kbc.c
+++ b/drivers/input/keyboard/tegra-kbc.c
@@ -30,7 +30,7 @@
30#include <linux/clk.h> 30#include <linux/clk.h>
31#include <linux/slab.h> 31#include <linux/slab.h>
32#include <linux/input/tegra_kbc.h> 32#include <linux/input/tegra_kbc.h>
33#include <mach/clk.h> 33#include <linux/clk/tegra.h>
34 34
35#define KBC_MAX_DEBOUNCE_CNT 0x3ffu 35#define KBC_MAX_DEBOUNCE_CNT 0x3ffu
36 36
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c
index 448a8cc71df3..02feaa51a0fa 100644
--- a/drivers/spi/spi-tegra20-sflash.c
+++ b/drivers/spi/spi-tegra20-sflash.c
@@ -34,7 +34,7 @@
34#include <linux/of_device.h> 34#include <linux/of_device.h>
35#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
36#include <linux/spi/spi-tegra.h> 36#include <linux/spi/spi-tegra.h>
37#include <mach/clk.h> 37#include <linux/clk/tegra.h>
38 38
39#define SPI_COMMAND 0x000 39#define SPI_COMMAND 0x000
40#define SPI_GO BIT(30) 40#define SPI_GO BIT(30)
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
index 651167f2e0af..fa208a5cc612 100644
--- a/drivers/spi/spi-tegra20-slink.c
+++ b/drivers/spi/spi-tegra20-slink.c
@@ -35,7 +35,7 @@
35#include <linux/of_device.h> 35#include <linux/of_device.h>
36#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
37#include <linux/spi/spi-tegra.h> 37#include <linux/spi/spi-tegra.h>
38#include <mach/clk.h> 38#include <linux/clk/tegra.h>
39 39
40#define SLINK_COMMAND 0x000 40#define SLINK_COMMAND 0x000
41#define SLINK_BIT_LENGTH(x) (((x) & 0x1f) << 0) 41#define SLINK_BIT_LENGTH(x) (((x) & 0x1f) << 0)
diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c
index 2830946860d1..d51615b19797 100644
--- a/drivers/staging/nvec/nvec.c
+++ b/drivers/staging/nvec/nvec.c
@@ -37,8 +37,7 @@
37#include <linux/slab.h> 37#include <linux/slab.h>
38#include <linux/spinlock.h> 38#include <linux/spinlock.h>
39#include <linux/workqueue.h> 39#include <linux/workqueue.h>
40 40#include <linux/clk/tegra.h>
41#include <mach/clk.h>
42 41
43#include "nvec.h" 42#include "nvec.h"
44 43
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 0977f2a24757..a7e5a3999099 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -17,6 +17,8 @@
17#ifndef __LINUX_CLK_TEGRA_H_ 17#ifndef __LINUX_CLK_TEGRA_H_
18#define __LINUX_CLK_TEGRA_H_ 18#define __LINUX_CLK_TEGRA_H_
19 19
20#include <linux/clk.h>
21
20/* 22/*
21 * Tegra CPU clock and reset control ops 23 * Tegra CPU clock and reset control ops
22 * 24 *
@@ -120,5 +122,8 @@ static inline void tegra_cpu_clock_resume(void)
120 122
121void tegra20_cpu_car_ops_init(void); 123void tegra20_cpu_car_ops_init(void);
122void tegra30_cpu_car_ops_init(void); 124void tegra30_cpu_car_ops_init(void);
125void tegra_periph_reset_deassert(struct clk *c);
126void tegra_periph_reset_assert(struct clk *c);
127void tegra_clocks_init(void);
123 128
124#endif /* __LINUX_CLK_TEGRA_H_ */ 129#endif /* __LINUX_CLK_TEGRA_H_ */
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index f354dc390a0b..bb31c4123a7b 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -25,7 +25,7 @@
25#include <linux/pm_runtime.h> 25#include <linux/pm_runtime.h>
26#include <linux/regmap.h> 26#include <linux/regmap.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <mach/clk.h> 28#include <linux/clk/tegra.h>
29#include <sound/soc.h> 29#include <sound/soc.h>
30#include "tegra30_ahub.h" 30#include "tegra30_ahub.h"
31 31