diff options
author | Rob Herring <robh@kernel.org> | 2015-01-09 21:34:41 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-01-29 09:34:42 -0500 |
commit | 61dc485b90edc80d39640bd6edd77187a0ee1286 (patch) | |
tree | 591adde09b867535d3b9bcbf3ee748848cc4f846 | |
parent | 802b7c06adc7186da59110ad136d88919fdb180b (diff) |
ARM: integrator: Convert PCI to use generic config accessors
Convert the integrator PCI driver to use the generic config access
functions.
This changes accesses from __raw_readX/__raw_writeX to readX/writeX
variants. The spinlock is removed because it is unnecessary. The config
read and write functions are already protected with a spinlock and no
access can occur during the .pre_init function.
[arnd: remove unused "flags"]
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: linux-arm-kernel@lists.infradead.org
-rw-r--r-- | arch/arm/mach-integrator/pci_v3.c | 62 |
1 files changed, 5 insertions, 57 deletions
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index c186a17c2cff..2565f0e7b5cf 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -356,7 +356,6 @@ static u64 pre_mem_pci_sz; | |||
356 | * 7:2 register number | 356 | * 7:2 register number |
357 | * | 357 | * |
358 | */ | 358 | */ |
359 | static DEFINE_RAW_SPINLOCK(v3_lock); | ||
360 | 359 | ||
361 | #undef V3_LB_BASE_PREFETCH | 360 | #undef V3_LB_BASE_PREFETCH |
362 | #define V3_LB_BASE_PREFETCH 0 | 361 | #define V3_LB_BASE_PREFETCH 0 |
@@ -457,67 +456,21 @@ static void v3_close_config_window(void) | |||
457 | static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, | 456 | static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, |
458 | int size, u32 *val) | 457 | int size, u32 *val) |
459 | { | 458 | { |
460 | void __iomem *addr; | 459 | int ret = pci_generic_config_read(bus, devfn, where, size, val); |
461 | unsigned long flags; | ||
462 | u32 v; | ||
463 | |||
464 | raw_spin_lock_irqsave(&v3_lock, flags); | ||
465 | addr = v3_open_config_window(bus, devfn, where); | ||
466 | |||
467 | switch (size) { | ||
468 | case 1: | ||
469 | v = __raw_readb(addr); | ||
470 | break; | ||
471 | |||
472 | case 2: | ||
473 | v = __raw_readw(addr); | ||
474 | break; | ||
475 | |||
476 | default: | ||
477 | v = __raw_readl(addr); | ||
478 | break; | ||
479 | } | ||
480 | |||
481 | v3_close_config_window(); | 460 | v3_close_config_window(); |
482 | raw_spin_unlock_irqrestore(&v3_lock, flags); | 461 | return ret; |
483 | |||
484 | *val = v; | ||
485 | return PCIBIOS_SUCCESSFUL; | ||
486 | } | 462 | } |
487 | 463 | ||
488 | static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, | 464 | static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, |
489 | int size, u32 val) | 465 | int size, u32 val) |
490 | { | 466 | { |
491 | void __iomem *addr; | 467 | int ret = pci_generic_config_write(bus, devfn, where, size, val); |
492 | unsigned long flags; | ||
493 | |||
494 | raw_spin_lock_irqsave(&v3_lock, flags); | ||
495 | addr = v3_open_config_window(bus, devfn, where); | ||
496 | |||
497 | switch (size) { | ||
498 | case 1: | ||
499 | __raw_writeb((u8)val, addr); | ||
500 | __raw_readb(addr); | ||
501 | break; | ||
502 | |||
503 | case 2: | ||
504 | __raw_writew((u16)val, addr); | ||
505 | __raw_readw(addr); | ||
506 | break; | ||
507 | |||
508 | case 4: | ||
509 | __raw_writel(val, addr); | ||
510 | __raw_readl(addr); | ||
511 | break; | ||
512 | } | ||
513 | |||
514 | v3_close_config_window(); | 468 | v3_close_config_window(); |
515 | raw_spin_unlock_irqrestore(&v3_lock, flags); | 469 | return ret; |
516 | |||
517 | return PCIBIOS_SUCCESSFUL; | ||
518 | } | 470 | } |
519 | 471 | ||
520 | static struct pci_ops pci_v3_ops = { | 472 | static struct pci_ops pci_v3_ops = { |
473 | .map_bus = v3_open_config_window, | ||
521 | .read = v3_read_config, | 474 | .read = v3_read_config, |
522 | .write = v3_write_config, | 475 | .write = v3_write_config, |
523 | }; | 476 | }; |
@@ -658,7 +611,6 @@ static int __init pci_v3_setup(int nr, struct pci_sys_data *sys) | |||
658 | */ | 611 | */ |
659 | static void __init pci_v3_preinit(void) | 612 | static void __init pci_v3_preinit(void) |
660 | { | 613 | { |
661 | unsigned long flags; | ||
662 | unsigned int temp; | 614 | unsigned int temp; |
663 | phys_addr_t io_address = pci_pio_to_address(io_mem.start); | 615 | phys_addr_t io_address = pci_pio_to_address(io_mem.start); |
664 | 616 | ||
@@ -672,8 +624,6 @@ static void __init pci_v3_preinit(void) | |||
672 | hook_fault_code(8, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch"); | 624 | hook_fault_code(8, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch"); |
673 | hook_fault_code(10, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch"); | 625 | hook_fault_code(10, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch"); |
674 | 626 | ||
675 | raw_spin_lock_irqsave(&v3_lock, flags); | ||
676 | |||
677 | /* | 627 | /* |
678 | * Unlock V3 registers, but only if they were previously locked. | 628 | * Unlock V3 registers, but only if they were previously locked. |
679 | */ | 629 | */ |
@@ -736,8 +686,6 @@ static void __init pci_v3_preinit(void) | |||
736 | v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10)); | 686 | v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10)); |
737 | v3_writeb(V3_LB_IMASK, 0x28); | 687 | v3_writeb(V3_LB_IMASK, 0x28); |
738 | __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET); | 688 | __raw_writel(3, ap_syscon_base + INTEGRATOR_SC_PCIENABLE_OFFSET); |
739 | |||
740 | raw_spin_unlock_irqrestore(&v3_lock, flags); | ||
741 | } | 689 | } |
742 | 690 | ||
743 | static void __init pci_v3_postinit(void) | 691 | static void __init pci_v3_postinit(void) |