diff options
author | Charles Keepax <ckeepax@opensource.wolfsonmicro.com> | 2014-03-07 11:34:19 -0500 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-03-09 04:28:06 -0400 |
commit | 61719db8141acde1a6293bbbddc733655defcc3c (patch) | |
tree | c3e3d76b205fff3c50b16bb4a747ae467da62dc8 | |
parent | 87383ac5a73ff34c60d3ea483bf24cabb27fb522 (diff) |
ASoC: arizona: Move set of OUTDIV in to arizona_apply_fll
Since we know in arizona_apply_fll if we are setting the sync or ref
path there is no need to set the outdiv seperately anymore. This patch
moves this from arizona_enable_fll to arizona_apply_fll.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | sound/soc/codecs/arizona.c | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 3d4408db075f..9afd8c41d143 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c | |||
@@ -1502,14 +1502,18 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base, | |||
1502 | cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | | 1502 | cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | |
1503 | source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); | 1503 | source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); |
1504 | 1504 | ||
1505 | if (sync) | 1505 | if (sync) { |
1506 | regmap_update_bits_async(arizona->regmap, base + 0x7, | 1506 | regmap_update_bits(arizona->regmap, base + 0x7, |
1507 | ARIZONA_FLL1_GAIN_MASK, | 1507 | ARIZONA_FLL1_GAIN_MASK, |
1508 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); | 1508 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); |
1509 | else | 1509 | } else { |
1510 | regmap_update_bits_async(arizona->regmap, base + 0x9, | 1510 | regmap_update_bits(arizona->regmap, base + 0x5, |
1511 | ARIZONA_FLL1_GAIN_MASK, | 1511 | ARIZONA_FLL1_OUTDIV_MASK, |
1512 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); | 1512 | cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); |
1513 | regmap_update_bits(arizona->regmap, base + 0x9, | ||
1514 | ARIZONA_FLL1_GAIN_MASK, | ||
1515 | cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); | ||
1516 | } | ||
1513 | 1517 | ||
1514 | regmap_update_bits_async(arizona->regmap, base + 2, | 1518 | regmap_update_bits_async(arizona->regmap, base + 2, |
1515 | ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, | 1519 | ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, |
@@ -1546,10 +1550,6 @@ static void arizona_enable_fll(struct arizona_fll *fll, | |||
1546 | */ | 1550 | */ |
1547 | if (fll->ref_src >= 0 && fll->ref_freq && | 1551 | if (fll->ref_src >= 0 && fll->ref_freq && |
1548 | fll->ref_src != fll->sync_src) { | 1552 | fll->ref_src != fll->sync_src) { |
1549 | regmap_update_bits_async(arizona->regmap, fll->base + 5, | ||
1550 | ARIZONA_FLL1_OUTDIV_MASK, | ||
1551 | ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); | ||
1552 | |||
1553 | arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, | 1553 | arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, |
1554 | false); | 1554 | false); |
1555 | if (fll->sync_src >= 0) { | 1555 | if (fll->sync_src >= 0) { |
@@ -1558,10 +1558,6 @@ static void arizona_enable_fll(struct arizona_fll *fll, | |||
1558 | use_sync = true; | 1558 | use_sync = true; |
1559 | } | 1559 | } |
1560 | } else if (fll->sync_src >= 0) { | 1560 | } else if (fll->sync_src >= 0) { |
1561 | regmap_update_bits_async(arizona->regmap, fll->base + 5, | ||
1562 | ARIZONA_FLL1_OUTDIV_MASK, | ||
1563 | sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); | ||
1564 | |||
1565 | arizona_apply_fll(arizona, fll->base, sync, | 1561 | arizona_apply_fll(arizona, fll->base, sync, |
1566 | fll->sync_src, false); | 1562 | fll->sync_src, false); |
1567 | 1563 | ||