[ARM] 3826/1: iop3xx: remove IOP3??_IRQ_OFS irq offset

Get rid of the unused IOP3??_IRQ_OFS irq offset define, start IRQ
numbering from zero.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

6 files changed, 76 insertions, 120 deletions

diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index cdd6943ce768..ff049e02f5f7 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -43,7 +43,7 @@ static void
 iop321_irq_mask (unsigned int irq)
 {
 
-        iop321_mask &= ~(1 << (irq - IOP321_IRQ_OFS));
+        iop321_mask &= ~(1 << irq);
 
         intctl_write(iop321_mask);
 }
@@ -51,7 +51,7 @@ iop321_irq_mask (unsigned int irq)
 static void
 iop321_irq_unmask (unsigned int irq)
 {
-        iop321_mask |= (1 << (irq - IOP321_IRQ_OFS));
+        iop321_mask |= (1 << irq);
 
         intctl_write(iop321_mask);
 }
@@ -73,7 +73,7 @@ void __init iop321_init_irq(void)
            machine_is_iq31244())        // all interrupts are inputs to chip
                 *IOP3XX_PCIIRSR = 0x0f;
 
-        for(i = IOP321_IRQ_OFS; i < NR_IRQS; i++)
+        for(i = 0; i < NR_IRQS; i++)
         {
                 set_irq_chip(i, &ext_chip);
                 set_irq_handler(i, do_level_IRQ);
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index d667439c8573..675ed3989973 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -60,28 +60,28 @@ static inline void intstr_write1(u32 val)
 static void
 iop331_irq_mask1 (unsigned int irq)
 {
-        iop331_mask0 &= ~(1 << (irq - IOP331_IRQ_OFS));
+        iop331_mask0 &= ~(1 << irq);
         intctl_write0(iop331_mask0);
 }
 
 static void
 iop331_irq_mask2 (unsigned int irq)
 {
-        iop331_mask1 &= ~(1 << (irq - IOP331_IRQ_OFS - 32));
+        iop331_mask1 &= ~(1 << (irq - 32));
         intctl_write1(iop331_mask1);
 }
 
 static void
 iop331_irq_unmask1(unsigned int irq)
 {
-        iop331_mask0 |= (1 << (irq - IOP331_IRQ_OFS));
+        iop331_mask0 |= (1 << irq);
         intctl_write0(iop331_mask0);
 }
 
 static void
 iop331_irq_unmask2(unsigned int irq)
 {
-        iop331_mask1 |= (1 << (irq - IOP331_IRQ_OFS - 32));
+        iop331_mask1 |= (1 << (irq - 32));
         intctl_write1(iop331_mask1);
 }
 
@@ -110,7 +110,7 @@ void __init iop331_init_irq(void)
         if(machine_is_iq80331())        // all interrupts are inputs to chip
                 *IOP3XX_PCIIRSR = 0x0f;
 
-        for(i = IOP331_IRQ_OFS; i < NR_IRQS; i++)
+        for(i = 0; i < NR_IRQS; i++)
         {
                 set_irq_chip(i, (i < 32) ? &iop331_irqchip1 : &iop331_irqchip2);
                 set_irq_handler(i, do_level_IRQ);
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index 00038c17317a..c5ec1e23cbea 100644
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -24,6 +24,5 @@
                 clz     \irqnr, \irqstat
                 mov     \base, #31
                 subs    \irqnr,\base,\irqnr
-                add     \irqnr,\irqnr,#IRQ_IOP321_DMA0_EOT
 1001:
                 .endm
diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h
index 4b0c82711f96..9fefcf3372b1 100644
--- a/include/asm-arm/arch-iop32x/irqs.h
+++ b/include/asm-arm/arch-iop32x/irqs.h
@@ -15,46 +15,36 @@
 /*
  * IOP80321 chipset interrupts
  */
-#define IOP321_IRQ_OFS          0
-#define IOP321_IRQ(x)           (IOP321_IRQ_OFS + (x))
+#define IRQ_IOP321_DMA0_EOT     0
+#define IRQ_IOP321_DMA0_EOC     1
+#define IRQ_IOP321_DMA1_EOT     2
+#define IRQ_IOP321_DMA1_EOC     3
+#define IRQ_IOP321_AA_EOT       6
+#define IRQ_IOP321_AA_EOC       7
+#define IRQ_IOP321_CORE_PMON    8
+#define IRQ_IOP321_TIMER0       9
+#define IRQ_IOP321_TIMER1       10
+#define IRQ_IOP321_I2C_0        11
+#define IRQ_IOP321_I2C_1        12
+#define IRQ_IOP321_MESSAGING    13
+#define IRQ_IOP321_ATU_BIST     14
+#define IRQ_IOP321_PERFMON      15
+#define IRQ_IOP321_CORE_PMU     16
+#define IRQ_IOP321_BIU_ERR      17
+#define IRQ_IOP321_ATU_ERR      18
+#define IRQ_IOP321_MCU_ERR      19
+#define IRQ_IOP321_DMA0_ERR     20
+#define IRQ_IOP321_DMA1_ERR     21
+#define IRQ_IOP321_AA_ERR       23
+#define IRQ_IOP321_MSG_ERR      24
+#define IRQ_IOP321_SSP          25
+#define IRQ_IOP321_XINT0        27
+#define IRQ_IOP321_XINT1        28
+#define IRQ_IOP321_XINT2        29
+#define IRQ_IOP321_XINT3        30
+#define IRQ_IOP321_HPI          31
 
-/*
- * On IRQ or FIQ register
- */
-#define IRQ_IOP321_DMA0_EOT     IOP321_IRQ(0)
-#define IRQ_IOP321_DMA0_EOC     IOP321_IRQ(1)
-#define IRQ_IOP321_DMA1_EOT     IOP321_IRQ(2)
-#define IRQ_IOP321_DMA1_EOC     IOP321_IRQ(3)
-#define IRQ_IOP321_RSVD_4       IOP321_IRQ(4)
-#define IRQ_IOP321_RSVD_5       IOP321_IRQ(5)
-#define IRQ_IOP321_AA_EOT       IOP321_IRQ(6)
-#define IRQ_IOP321_AA_EOC       IOP321_IRQ(7)
-#define IRQ_IOP321_CORE_PMON    IOP321_IRQ(8)
-#define IRQ_IOP321_TIMER0       IOP321_IRQ(9)
-#define IRQ_IOP321_TIMER1       IOP321_IRQ(10)
-#define IRQ_IOP321_I2C_0        IOP321_IRQ(11)
-#define IRQ_IOP321_I2C_1        IOP321_IRQ(12)
-#define IRQ_IOP321_MESSAGING    IOP321_IRQ(13)
-#define IRQ_IOP321_ATU_BIST     IOP321_IRQ(14)
-#define IRQ_IOP321_PERFMON      IOP321_IRQ(15)
-#define IRQ_IOP321_CORE_PMU     IOP321_IRQ(16)
-#define IRQ_IOP321_BIU_ERR      IOP321_IRQ(17)
-#define IRQ_IOP321_ATU_ERR      IOP321_IRQ(18)
-#define IRQ_IOP321_MCU_ERR      IOP321_IRQ(19)
-#define IRQ_IOP321_DMA0_ERR     IOP321_IRQ(20)
-#define IRQ_IOP321_DMA1_ERR     IOP321_IRQ(21)
-#define IRQ_IOP321_RSVD_22      IOP321_IRQ(22)
-#define IRQ_IOP321_AA_ERR       IOP321_IRQ(23)
-#define IRQ_IOP321_MSG_ERR      IOP321_IRQ(24)
-#define IRQ_IOP321_SSP          IOP321_IRQ(25)
-#define IRQ_IOP321_RSVD_26      IOP321_IRQ(26)
-#define IRQ_IOP321_XINT0        IOP321_IRQ(27)
-#define IRQ_IOP321_XINT1        IOP321_IRQ(28)
-#define IRQ_IOP321_XINT2        IOP321_IRQ(29)
-#define IRQ_IOP321_XINT3        IOP321_IRQ(30)
-#define IRQ_IOP321_HPI          IOP321_IRQ(31)
-
-#define NR_IRQS                 (IOP321_IRQ(31) + 1)
+#define NR_IRQS                 32
 
 
 /*
diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S
index 57f6ea0069e4..425aa7aafa0e 100644
--- a/include/asm-arm/arch-iop33x/entry-macro.S
+++ b/include/asm-arm/arch-iop33x/entry-macro.S
@@ -30,6 +30,5 @@
                 b       1001f
 1002:           clz     \irqnr, \irqstat
                 rsbs    \irqnr,\irqnr,#31   @ recommend by RMK
-                add     \irqnr,\irqnr,#IRQ_IOP331_DMA0_EOT
 1001:
                 .endm
diff --git a/include/asm-arm/arch-iop33x/irqs.h b/include/asm-arm/arch-iop33x/irqs.h
index 45856a12815a..2e3ade3b5ff9 100644
--- a/include/asm-arm/arch-iop33x/irqs.h
+++ b/include/asm-arm/arch-iop33x/irqs.h
@@ -15,78 +15,46 @@
 /*
  * IOP80331 chipset interrupts
  */
-#define IOP331_IRQ_OFS          0
-#define IOP331_IRQ(x)           (IOP331_IRQ_OFS + (x))
+#define IRQ_IOP331_DMA0_EOT     0
+#define IRQ_IOP331_DMA0_EOC     1
+#define IRQ_IOP331_DMA1_EOT     2
+#define IRQ_IOP331_DMA1_EOC     3
+#define IRQ_IOP331_AA_EOT       6
+#define IRQ_IOP331_AA_EOC       7
+#define IRQ_IOP331_TIMER0       8
+#define IRQ_IOP331_TIMER1       9
+#define IRQ_IOP331_I2C_0        10
+#define IRQ_IOP331_I2C_1        11
+#define IRQ_IOP331_MSG          12
+#define IRQ_IOP331_MSGIBQ       13
+#define IRQ_IOP331_ATU_BIST     14
+#define IRQ_IOP331_PERFMON      15
+#define IRQ_IOP331_CORE_PMU     16
+#define IRQ_IOP331_XINT0        24
+#define IRQ_IOP331_XINT1        25
+#define IRQ_IOP331_XINT2        26
+#define IRQ_IOP331_XINT3        27
+#define IRQ_IOP331_XINT8        32
+#define IRQ_IOP331_XINT9        33
+#define IRQ_IOP331_XINT10       34
+#define IRQ_IOP331_XINT11       35
+#define IRQ_IOP331_XINT12       36
+#define IRQ_IOP331_XINT13       37
+#define IRQ_IOP331_XINT14       38
+#define IRQ_IOP331_XINT15       39
+#define IRQ_IOP331_UART0        51
+#define IRQ_IOP331_UART1        52
+#define IRQ_IOP331_PBIE         53
+#define IRQ_IOP331_ATU_CRW      54
+#define IRQ_IOP331_ATU_ERR      55
+#define IRQ_IOP331_MCU_ERR      56
+#define IRQ_IOP331_DMA0_ERR     57
+#define IRQ_IOP331_DMA1_ERR     58
+#define IRQ_IOP331_AA_ERR       60
+#define IRQ_IOP331_MSG_ERR      62
+#define IRQ_IOP331_HPI          63
 
-/*
- * On IRQ or FIQ register
- */
-#define IRQ_IOP331_DMA0_EOT     IOP331_IRQ(0)
-#define IRQ_IOP331_DMA0_EOC     IOP331_IRQ(1)
-#define IRQ_IOP331_DMA1_EOT     IOP331_IRQ(2)
-#define IRQ_IOP331_DMA1_EOC     IOP331_IRQ(3)
-#define IRQ_IOP331_RSVD_4       IOP331_IRQ(4)
-#define IRQ_IOP331_RSVD_5       IOP331_IRQ(5)
-#define IRQ_IOP331_AA_EOT       IOP331_IRQ(6)
-#define IRQ_IOP331_AA_EOC       IOP331_IRQ(7)
-#define IRQ_IOP331_TIMER0       IOP331_IRQ(8)
-#define IRQ_IOP331_TIMER1       IOP331_IRQ(9)
-#define IRQ_IOP331_I2C_0        IOP331_IRQ(10)
-#define IRQ_IOP331_I2C_1        IOP331_IRQ(11)
-#define IRQ_IOP331_MSG      IOP331_IRQ(12)
-#define IRQ_IOP331_MSGIBQ   IOP331_IRQ(13)
-#define IRQ_IOP331_ATU_BIST     IOP331_IRQ(14)
-#define IRQ_IOP331_PERFMON      IOP331_IRQ(15)
-#define IRQ_IOP331_CORE_PMU     IOP331_IRQ(16)
-#define IRQ_IOP331_RSVD_17      IOP331_IRQ(17)
-#define IRQ_IOP331_RSVD_18      IOP331_IRQ(18)
-#define IRQ_IOP331_RSVD_19      IOP331_IRQ(19)
-#define IRQ_IOP331_RSVD_20      IOP331_IRQ(20)
-#define IRQ_IOP331_RSVD_21      IOP331_IRQ(21)
-#define IRQ_IOP331_RSVD_22      IOP331_IRQ(22)
-#define IRQ_IOP331_RSVD_23      IOP331_IRQ(23)
-#define IRQ_IOP331_XINT0        IOP331_IRQ(24)
-#define IRQ_IOP331_XINT1        IOP331_IRQ(25)
-#define IRQ_IOP331_XINT2        IOP331_IRQ(26)
-#define IRQ_IOP331_XINT3        IOP331_IRQ(27)
-#define IRQ_IOP331_RSVD_28  IOP331_IRQ(28)
-#define IRQ_IOP331_RSVD_29  IOP331_IRQ(29)
-#define IRQ_IOP331_RSVD_30  IOP331_IRQ(30)
-#define IRQ_IOP331_RSVD_31  IOP331_IRQ(31)
-#define IRQ_IOP331_XINT8    IOP331_IRQ(32)  // 0
-#define IRQ_IOP331_XINT9    IOP331_IRQ(33)  // 1
-#define IRQ_IOP331_XINT10   IOP331_IRQ(34)  // 2
-#define IRQ_IOP331_XINT11   IOP331_IRQ(35)  // 3
-#define IRQ_IOP331_XINT12   IOP331_IRQ(36)  // 4
-#define IRQ_IOP331_XINT13   IOP331_IRQ(37)  // 5
-#define IRQ_IOP331_XINT14   IOP331_IRQ(38)  // 6
-#define IRQ_IOP331_XINT15   IOP331_IRQ(39)  // 7
-#define IRQ_IOP331_RSVD_40  IOP331_IRQ(40)  // 8
-#define IRQ_IOP331_RSVD_41  IOP331_IRQ(41)  // 9
-#define IRQ_IOP331_RSVD_42  IOP331_IRQ(42)  // 10
-#define IRQ_IOP331_RSVD_43  IOP331_IRQ(43)  // 11
-#define IRQ_IOP331_RSVD_44  IOP331_IRQ(44)  // 12
-#define IRQ_IOP331_RSVD_45  IOP331_IRQ(45)  // 13
-#define IRQ_IOP331_RSVD_46  IOP331_IRQ(46)  // 14
-#define IRQ_IOP331_RSVD_47  IOP331_IRQ(47)  // 15
-#define IRQ_IOP331_RSVD_48  IOP331_IRQ(48)  // 16
-#define IRQ_IOP331_RSVD_49  IOP331_IRQ(49)  // 17
-#define IRQ_IOP331_RSVD_50  IOP331_IRQ(50)  // 18
-#define IRQ_IOP331_UART0    IOP331_IRQ(51)  // 19
-#define IRQ_IOP331_UART1    IOP331_IRQ(52)  // 20
-#define IRQ_IOP331_PBIE     IOP331_IRQ(53)  // 21
-#define IRQ_IOP331_ATU_CRW  IOP331_IRQ(54)  // 22
-#define IRQ_IOP331_ATU_ERR      IOP331_IRQ(55)  // 23
-#define IRQ_IOP331_MCU_ERR      IOP331_IRQ(56)  // 24
-#define IRQ_IOP331_DMA0_ERR     IOP331_IRQ(57)  // 25
-#define IRQ_IOP331_DMA1_ERR     IOP331_IRQ(58)  // 26
-#define IRQ_IOP331_RSVD_59  IOP331_IRQ(59)  // 27
-#define IRQ_IOP331_AA_ERR       IOP331_IRQ(60)  // 28
-#define IRQ_IOP331_RSVD_61  IOP331_IRQ(61)  // 29
-#define IRQ_IOP331_MSG_ERR      IOP331_IRQ(62)  // 30
-#define IRQ_IOP331_HPI          IOP331_IRQ(63)  // 31
-
-#define NR_IRQS                 (IOP331_IRQ(63) + 1)
+#define NR_IRQS                 64
 
 
 /*