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authorAlex Deucher <alexander.deucher@amd.com>2013-08-20 18:40:46 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-08-30 16:31:16 -0400
commit607f2c2791ec81e5abca6213ff037e9405378be1 (patch)
treee5b58ee5885e40f72cee7efb28227652221aaa77
parent6a3808b8233eb91b57c230cf1161ac116a189ffd (diff)
drm/radeon: gcc fixes for radeon_atombios.c
Newer versions of gcc seem to wander off into the weeds when dealing with variable sizes arrays in structs. Rather than indexing the arrays, use pointer arithmetic. See bugs: https://bugs.freedesktop.org/show_bug.cgi?id=66932 https://bugs.freedesktop.org/show_bug.cgi?id=66972 https://bugs.freedesktop.org/show_bug.cgi?id=66945 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c42
1 files changed, 28 insertions, 14 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index ad913542ec1a..404e25d285ba 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -163,8 +163,8 @@ static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rd
163 num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / 163 num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
164 sizeof(ATOM_GPIO_I2C_ASSIGMENT); 164 sizeof(ATOM_GPIO_I2C_ASSIGMENT);
165 165
166 gpio = &i2c_info->asGPIO_Info[0];
166 for (i = 0; i < num_indices; i++) { 167 for (i = 0; i < num_indices; i++) {
167 gpio = &i2c_info->asGPIO_Info[i];
168 168
169 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i); 169 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
170 170
@@ -172,6 +172,8 @@ static struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_device *rd
172 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio); 172 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
173 break; 173 break;
174 } 174 }
175 gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
176 ((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
175 } 177 }
176 } 178 }
177 179
@@ -195,9 +197,8 @@ void radeon_atombios_i2c_init(struct radeon_device *rdev)
195 num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / 197 num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
196 sizeof(ATOM_GPIO_I2C_ASSIGMENT); 198 sizeof(ATOM_GPIO_I2C_ASSIGMENT);
197 199
200 gpio = &i2c_info->asGPIO_Info[0];
198 for (i = 0; i < num_indices; i++) { 201 for (i = 0; i < num_indices; i++) {
199 gpio = &i2c_info->asGPIO_Info[i];
200
201 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i); 202 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
202 203
203 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio); 204 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
@@ -206,6 +207,8 @@ void radeon_atombios_i2c_init(struct radeon_device *rdev)
206 sprintf(stmp, "0x%x", i2c.i2c_id); 207 sprintf(stmp, "0x%x", i2c.i2c_id);
207 rdev->i2c_bus[i] = radeon_i2c_create(rdev->ddev, &i2c, stmp); 208 rdev->i2c_bus[i] = radeon_i2c_create(rdev->ddev, &i2c, stmp);
208 } 209 }
210 gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
211 ((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
209 } 212 }
210 } 213 }
211} 214}
@@ -230,8 +233,8 @@ static struct radeon_gpio_rec radeon_lookup_gpio(struct radeon_device *rdev,
230 num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / 233 num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
231 sizeof(ATOM_GPIO_PIN_ASSIGNMENT); 234 sizeof(ATOM_GPIO_PIN_ASSIGNMENT);
232 235
236 pin = gpio_info->asGPIO_Pin;
233 for (i = 0; i < num_indices; i++) { 237 for (i = 0; i < num_indices; i++) {
234 pin = &gpio_info->asGPIO_Pin[i];
235 if (id == pin->ucGPIO_ID) { 238 if (id == pin->ucGPIO_ID) {
236 gpio.id = pin->ucGPIO_ID; 239 gpio.id = pin->ucGPIO_ID;
237 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex) * 4; 240 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex) * 4;
@@ -239,6 +242,8 @@ static struct radeon_gpio_rec radeon_lookup_gpio(struct radeon_device *rdev,
239 gpio.valid = true; 242 gpio.valid = true;
240 break; 243 break;
241 } 244 }
245 pin = (ATOM_GPIO_PIN_ASSIGNMENT *)
246 ((u8 *)pin + sizeof(ATOM_GPIO_PIN_ASSIGNMENT));
242 } 247 }
243 } 248 }
244 249
@@ -3413,10 +3418,11 @@ int radeon_atom_get_max_voltage(struct radeon_device *rdev,
3413 ATOM_VOLTAGE_FORMULA_V2 *formula = 3418 ATOM_VOLTAGE_FORMULA_V2 *formula =
3414 &voltage_object->v2.asFormula; 3419 &voltage_object->v2.asFormula;
3415 if (formula->ucNumOfVoltageEntries) { 3420 if (formula->ucNumOfVoltageEntries) {
3421 VOLTAGE_LUT_ENTRY *lut = (VOLTAGE_LUT_ENTRY *)
3422 ((u8 *)&formula->asVIDAdjustEntries[0] +
3423 (sizeof(VOLTAGE_LUT_ENTRY) * (formula->ucNumOfVoltageEntries - 1)));
3416 *max_voltage = 3424 *max_voltage =
3417 le16_to_cpu(formula->asVIDAdjustEntries[ 3425 le16_to_cpu(lut->usVoltageValue);
3418 formula->ucNumOfVoltageEntries - 1
3419 ].usVoltageValue);
3420 return 0; 3426 return 0;
3421 } 3427 }
3422 } 3428 }
@@ -3576,11 +3582,13 @@ int radeon_atom_get_voltage_table(struct radeon_device *rdev,
3576 if (voltage_object) { 3582 if (voltage_object) {
3577 ATOM_VOLTAGE_FORMULA_V2 *formula = 3583 ATOM_VOLTAGE_FORMULA_V2 *formula =
3578 &voltage_object->v2.asFormula; 3584 &voltage_object->v2.asFormula;
3585 VOLTAGE_LUT_ENTRY *lut;
3579 if (formula->ucNumOfVoltageEntries > MAX_VOLTAGE_ENTRIES) 3586 if (formula->ucNumOfVoltageEntries > MAX_VOLTAGE_ENTRIES)
3580 return -EINVAL; 3587 return -EINVAL;
3588 lut = &formula->asVIDAdjustEntries[0];
3581 for (i = 0; i < formula->ucNumOfVoltageEntries; i++) { 3589 for (i = 0; i < formula->ucNumOfVoltageEntries; i++) {
3582 voltage_table->entries[i].value = 3590 voltage_table->entries[i].value =
3583 le16_to_cpu(formula->asVIDAdjustEntries[i].usVoltageValue); 3591 le16_to_cpu(lut->usVoltageValue);
3584 ret = radeon_atom_get_voltage_gpio_settings(rdev, 3592 ret = radeon_atom_get_voltage_gpio_settings(rdev,
3585 voltage_table->entries[i].value, 3593 voltage_table->entries[i].value,
3586 voltage_type, 3594 voltage_type,
@@ -3588,6 +3596,8 @@ int radeon_atom_get_voltage_table(struct radeon_device *rdev,
3588 &voltage_table->mask_low); 3596 &voltage_table->mask_low);
3589 if (ret) 3597 if (ret)
3590 return ret; 3598 return ret;
3599 lut = (VOLTAGE_LUT_ENTRY *)
3600 ((u8 *)lut + sizeof(VOLTAGE_LUT_ENTRY));
3591 } 3601 }
3592 voltage_table->count = formula->ucNumOfVoltageEntries; 3602 voltage_table->count = formula->ucNumOfVoltageEntries;
3593 return 0; 3603 return 0;
@@ -3607,13 +3617,17 @@ int radeon_atom_get_voltage_table(struct radeon_device *rdev,
3607 if (voltage_object) { 3617 if (voltage_object) {
3608 ATOM_GPIO_VOLTAGE_OBJECT_V3 *gpio = 3618 ATOM_GPIO_VOLTAGE_OBJECT_V3 *gpio =
3609 &voltage_object->v3.asGpioVoltageObj; 3619 &voltage_object->v3.asGpioVoltageObj;
3620 VOLTAGE_LUT_ENTRY_V2 *lut;
3610 if (gpio->ucGpioEntryNum > MAX_VOLTAGE_ENTRIES) 3621 if (gpio->ucGpioEntryNum > MAX_VOLTAGE_ENTRIES)
3611 return -EINVAL; 3622 return -EINVAL;
3623 lut = &gpio->asVolGpioLut[0];
3612 for (i = 0; i < gpio->ucGpioEntryNum; i++) { 3624 for (i = 0; i < gpio->ucGpioEntryNum; i++) {
3613 voltage_table->entries[i].value = 3625 voltage_table->entries[i].value =
3614 le16_to_cpu(gpio->asVolGpioLut[i].usVoltageValue); 3626 le16_to_cpu(lut->usVoltageValue);
3615 voltage_table->entries[i].smio_low = 3627 voltage_table->entries[i].smio_low =
3616 le32_to_cpu(gpio->asVolGpioLut[i].ulVoltageId); 3628 le32_to_cpu(lut->ulVoltageId);
3629 lut = (VOLTAGE_LUT_ENTRY_V2 *)
3630 ((u8 *)lut + sizeof(VOLTAGE_LUT_ENTRY_V2));
3617 } 3631 }
3618 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal); 3632 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);
3619 voltage_table->count = gpio->ucGpioEntryNum; 3633 voltage_table->count = gpio->ucGpioEntryNum;
@@ -3739,7 +3753,6 @@ int radeon_atom_get_mclk_range_table(struct radeon_device *rdev,
3739 union vram_info *vram_info; 3753 union vram_info *vram_info;
3740 u32 mem_timing_size = gddr5 ? 3754 u32 mem_timing_size = gddr5 ?
3741 sizeof(ATOM_MEMORY_TIMING_FORMAT_V2) : sizeof(ATOM_MEMORY_TIMING_FORMAT); 3755 sizeof(ATOM_MEMORY_TIMING_FORMAT_V2) : sizeof(ATOM_MEMORY_TIMING_FORMAT);
3742 u8 *p;
3743 3756
3744 memset(mclk_range_table, 0, sizeof(struct atom_memory_clock_range_table)); 3757 memset(mclk_range_table, 0, sizeof(struct atom_memory_clock_range_table));
3745 3758
@@ -3758,6 +3771,7 @@ int radeon_atom_get_mclk_range_table(struct radeon_device *rdev,
3758 if (module_index < vram_info->v1_4.ucNumOfVRAMModule) { 3771 if (module_index < vram_info->v1_4.ucNumOfVRAMModule) {
3759 ATOM_VRAM_MODULE_V4 *vram_module = 3772 ATOM_VRAM_MODULE_V4 *vram_module =
3760 (ATOM_VRAM_MODULE_V4 *)vram_info->v1_4.aVramInfo; 3773 (ATOM_VRAM_MODULE_V4 *)vram_info->v1_4.aVramInfo;
3774 ATOM_MEMORY_TIMING_FORMAT *format;
3761 3775
3762 for (i = 0; i < module_index; i++) { 3776 for (i = 0; i < module_index; i++) {
3763 if (le16_to_cpu(vram_module->usModuleSize) == 0) 3777 if (le16_to_cpu(vram_module->usModuleSize) == 0)
@@ -3768,11 +3782,11 @@ int radeon_atom_get_mclk_range_table(struct radeon_device *rdev,
3768 mclk_range_table->num_entries = (u8) 3782 mclk_range_table->num_entries = (u8)
3769 ((le16_to_cpu(vram_module->usModuleSize) - offsetof(ATOM_VRAM_MODULE_V4, asMemTiming)) / 3783 ((le16_to_cpu(vram_module->usModuleSize) - offsetof(ATOM_VRAM_MODULE_V4, asMemTiming)) /
3770 mem_timing_size); 3784 mem_timing_size);
3771 p = (u8 *)&vram_module->asMemTiming[0]; 3785 format = &vram_module->asMemTiming[0];
3772 for (i = 0; i < mclk_range_table->num_entries; i++) { 3786 for (i = 0; i < mclk_range_table->num_entries; i++) {
3773 ATOM_MEMORY_TIMING_FORMAT *format = (ATOM_MEMORY_TIMING_FORMAT *)p;
3774 mclk_range_table->mclk[i] = le32_to_cpu(format->ulClkRange); 3787 mclk_range_table->mclk[i] = le32_to_cpu(format->ulClkRange);
3775 p += mem_timing_size; 3788 format = (ATOM_MEMORY_TIMING_FORMAT *)
3789 ((u8 *)format + mem_timing_size);
3776 } 3790 }
3777 } else 3791 } else
3778 return -EINVAL; 3792 return -EINVAL;